Three-dimensional memory devices, methods of making the same, and memory systems

Abstract

This application provides a three-dimensional storage device and its manufacturing method and storage system. The three-dimensional storage device includes: a stacked structure having a stacking direction and a first extending direction perpendicular to the stacking direction; an isolation pillar extending in the stacked structure along the stacking direction; and a first gate line slot structure penetrating the stacked structure along the stacking direction and extending along the first extending direction, including a plurality of sub-gate line slot structures spaced apart along the first extending direction, wherein a portion of the sub-gate line slot structures extends into the isolation pillar.

Description

Technical Field

[0001] This application relates to the field of memory technology, and more specifically, to a three-dimensional memory device and its manufacturing method and memory system. Background Technology

[0002] The increase in storage density of memory devices is closely related to advancements in semiconductor manufacturing processes. As the feature size of semiconductor manufacturing processes shrinks, the storage density of memory devices increases. To further improve storage density, three-dimensional memory devices (i.e., 3D memory devices) have been developed. 3D memory devices consist of multiple memory cells stacked along a vertical direction, which can multiply the integration density on a unit area of ​​wafer and reduce costs.

[0003] In NAND 3D memory devices, a stacked structure is used to provide conductor layers for the selection transistors and memory cells, with the memory cells connected to the source via a gate-line gap structure. As the number of layers in the stacked structure increases, the thickness of the stacked structure also increases, resulting in a large aspect ratio. Replacing the gate in a high aspect ratio stacked structure presents numerous technological challenges. Summary of the Invention

[0004] Embodiments of this application provide a three-dimensional storage device, the three-dimensional storage device comprising: a stacked structure having a stacking direction and a first extending direction perpendicular to the stacking direction; an isolation pillar extending in the stacked structure along the stacking direction; and a first gate line slot structure penetrating the stacked structure along the stacking direction and extending along the first extending direction, including a plurality of sub-gate line slot structures spaced apart along the first extending direction, wherein a portion of the sub-gate line slot structures extends into the isolation pillar.

[0005] In some embodiments, the three-dimensional storage device includes at least two isolation pillars spaced apart along the first extension direction; the sub-gate slot structure extends into the isolation pillars at both ends of the first extension direction.

[0006] In some embodiments, the stacked structure includes alternately stacked gate layers and insulating layers, the isolation pillars are made of insulating material, and the three-dimensional memory device further includes a residual gate disposed between the isolation pillars and the sub-gate line slot structure, wherein the gate layers and the residual gate are electrically isolated by the isolation pillars and the sub-gate line slot structure.

[0007] In some embodiments, the stacked structure has a first side and a second side along the stacking direction; the isolation pillar penetrates at least a portion of the stacked structure from the first side; and the end face area of ​​the first gate slot structure on the first side is smaller than its end face area on the second side.

[0008] In some embodiments, the isolation column extends through the stacked structure.

[0009] In some embodiments, the size of the isolation pillar is larger than the size of the portion of the subgate line slot structure along a second extension direction perpendicular to the stacking direction and the first extension direction, and the maximum size of the portion of the subgate line slot structure is greater than or equal to 150 nm along the second extension direction.

[0010] In some embodiments, the three-dimensional storage device further includes at least two second gate line slot structures that penetrate the stacked structure and extend along the first extension direction, wherein the first gate line slot structure is located between the two second gate line slot structures.

[0011] In some embodiments, two isolation pillars are provided between two adjacent sub-grid line slot structures.

[0012] Secondly, embodiments of this application provide a method for manufacturing a three-dimensional storage device. The method includes: stacking prefabricated stacked structures along a stacking direction, wherein the prefabricated stack includes a first extending direction perpendicular to the stacking direction; forming isolation pillars extending in the prefabricated stacked structure along the stacking direction; and forming a first gate line slot structure, wherein the first gate line slot structure includes a plurality of sub-gate line slot structures spaced apart along the first extending direction, wherein a portion of the sub-gate line slot structures extends into the isolation pillars.

[0013] In some embodiments, the step of forming the first grid line slot structure includes: forming a first grid line slot that penetrates the prefabricated stacked structure, wherein the first grid line slot includes a plurality of sub-grid line slots spaced apart along the first extension direction, wherein the sub-grid line slots include isolation post grooves formed by removing a portion of the isolation posts; and forming the first grid line slot structure in the first grid line slot.

[0014] In some embodiments, the step of forming the prefabricated stacked structure includes: alternately stacking sacrificial layers and insulating layers; the step of forming the isolation pillar includes: forming the isolation pillar using an insulating material; after the step of forming the isolation pillar recess, the step further includes: replacing the sacrificial layer with a gate layer to form the prefabricated stacked structure into a stacked structure, and removing the gate material in the first gate line gap, wherein a residual gate is formed in the isolation pillar recess; in the step of forming the first gate line gap structure, the residual gate is electrically isolated from the stacked structure by the isolation pillar and the first gate line gap structure.

[0015] In some embodiments, the step of forming the prefabricated stacked structure includes: forming a first prefabricated stacked structure; and forming a second prefabricated stacked structure on one side of the first prefabricated stacked structure along the stacking direction; wherein, before forming the second prefabricated stacked structure, a plurality of the isolation pillars are formed, and the isolation pillars penetrate the first prefabricated stacked structure; wherein, after forming the second prefabricated stacked structure, a first grid line slot structure is formed, wherein the end face area of ​​the first grid line slot structure in the first prefabricated stacked structure is smaller than its end face area in the second prefabricated stacked structure.

[0016] In some embodiments, the isolation column extends through the prefabricated laminated structure.

[0017] In some embodiments, the size of the isolation pillar is larger than the size of the portion of the subgate line slot structure along a second extension direction perpendicular to the stacking direction and the first extension direction, and the maximum size of the portion of the subgate line slot structure is greater than or equal to 150 nm along the second extension direction.

[0018] In some embodiments, the manufacturing method further includes forming a second gate line slot structure, wherein the second gate line slot structure extends along the first extension direction, and the first gate line slot structure is located between two second gate line slot structures.

[0019] In some embodiments, the method includes: forming at least two of the isolation posts spaced apart along the first extension direction; the step of forming the plurality of sub-grid line slot structures includes: forming two adjacent sub-grid line slot structures by spacing two of the isolation posts.

[0020] A third aspect of this application also provides a storage system including the aforementioned three-dimensional storage device; and a controller electrically connected to the three-dimensional storage device for controlling the storage device.

[0021] The three-dimensional storage device and its manufacturing method provided by the embodiments of this application reduce the probability of distortion at the bottom of the deep trench of the gate line slot structure by setting some of the gate line slot structure into discontinuous segments, thereby ensuring the stability of the entire stacked structure during the manufacturing process and in the formed three-dimensional storage device.

[0022] In some embodiments of this application, the critical dimensions at the joints of the discontinuous gate slot structures are small. In particular, by providing isolation holes at the joints of the discontinuous gate slot structures and filling the isolation holes with insulating material, the problem of interlayer leakage caused by the bottom taper at the joints of the gate slot structures is improved, thereby improving the yield and reliability of the three-dimensional memory devices. Attached Figure Description

[0023] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0024] Figure 1 This is a schematic structural diagram of a three-dimensional storage device based on related technologies;

[0025] Figure 2 yes Figure 1 Schematic diagram of the cross section at point AA;

[0026] Figure 3 yes Figure 1 Schematic diagram of the cross section at point BB;

[0027] Figure 4 This is a schematic flowchart of a method for manufacturing a three-dimensional storage device according to an embodiment of this application;

[0028] Figures 5 to 12 This is a process diagram of a manufacturing method for a three-dimensional storage device according to an embodiment of this application;

[0029] Figure 13 This is a schematic diagram of the semiconductor structure after forming the first gate gap according to the manufacturing method of an exemplary embodiment of this application;

[0030] Figure 14 It is based on Figure 13 A schematic diagram of the semiconductor structure after the first gate line gap structure is formed;

[0031] Figure 15 This is a structural diagram of a three-dimensional storage device according to an exemplary embodiment of this application;

[0032] Figure 16 This is a structural diagram of a three-dimensional storage device according to an exemplary embodiment of this application; and

[0033] Figure 17This is a structural diagram of a storage system according to an exemplary embodiment of this application. Detailed Implementation

[0034] To better understand this application, various aspects of this application will be described in more detail with reference to the accompanying drawings. It should be understood that these detailed descriptions are merely illustrative of exemplary embodiments of this application and are not intended to limit the scope of this application in any way. Throughout the specification, the same reference numerals refer to the same elements. The expression "and / or" includes any and all combinations of one or more of the associated listed items.

[0035] It should be noted that in this specification, the terms "first," "second," "third," etc., are used only to distinguish one feature from another and do not imply any limitation on the features. Therefore, without departing from the teachings of this application, the first gate slot structure discussed below may also be referred to as the second gate slot structure, and vice versa.

[0036] In the accompanying drawings, the thickness, dimensions, and shapes of the components have been slightly adjusted for ease of illustration. The drawings are for illustrative purposes only and are not drawn to scale. For example, the dimensions of the isolation pillars and the width of the grid slot structure are not to actual production scale. As used herein, the terms “approximately,” “about,” and similar terms are used as expressions of approximation, not as expressions of degree, and are intended to illustrate inherent deviations in measured or calculated values ​​that will be recognized by one of ordinary skill in the art.

[0037] It should also be understood that the terms "comprising," "including," "having," "containing," and / or "comprising," when used in this specification, indicate the presence of the stated features, elements, and / or components, but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof. Furthermore, when expressions such as "at least one of..." appear after a list of listed features, they modify the entire list of features, not individual elements in the list. Additionally, when describing embodiments of this application, the word "may" is used to mean "one or more embodiments of this application." And the term "exemplary" is intended to refer to an example or illustration.

[0038] Unless otherwise specified, all terms used herein (including engineering and technical terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. It should also be understood that, unless expressly stated herein, terms defined in common dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the relevant art, and not as having an idealized or overly formalized meaning.

[0039] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. Furthermore, unless explicitly limited or contradicted by the context, the specific steps included in the methods described in this application are not limited to the order in which they are described, but can be performed in any order or in parallel. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0040] In one embodiment, during the manufacturing process of a 3D NAND memory, a substrate is first provided, and a stacked structure is formed on the substrate. Then, channel holes (CH) are formed within the stacked structure, followed by a gate line slit (GLS) structure. This GLS structure removes the sacrificial layer from the stacked structure, forming word line (WL) openings. Gate metal is then filled into the word line openings to form the gate layer. Manufacturers strive to design and manufacture 3D memory devices to be smaller while maintaining or even increasing storage capacity.

[0041] Figures 1 to 3 This is a structural schematic diagram of a three-dimensional storage device. For example... Figure 1 As shown, the first gate line slot structure 3 includes multiple sub-gate line slot structures 4. The top feature size at the joint of the sub-gate line slot structure 4 is small, which allows the channel structures 7 on both sides to be arranged more densely in order to prevent the common source line 5 at the top of the stacked structure 2 from pressing the gap insulation layer 6 and getting close to or even in contact with the channel structure 7.

[0042] However, in some cases, such as Figure 2 and Figure 3 As shown, the profile of the gate line slot structure 3 at the bottom of the stacked structure 2 becomes sharper. This causes the sharpened part of the gate line slot structure 3 to generate metal accumulation during the metal gate line replacement process, forming a residual gate 10. This results in two adjacent gate layers 8 short-circuiting across the insulating layer 9 and even causing the three-dimensional memory device to fail.

[0043] Figure 4 A schematic flowchart illustrating a method for manufacturing a three-dimensional storage device according to an embodiment of this application is shown. Figure 4 As shown, the manufacturing method 1000 of a three-dimensional storage device may include at least the following steps S100, S200 and S300.

[0044] Step S100: A prefabricated laminated structure is formed by stacking along the stacking direction. The prefabricated laminated structure has a first side and a second side opposite to each other in the stacking direction, and the prefabricated laminated structure can extend along a first extension direction and a second extension direction. The first extension direction and the second extension direction can be perpendicular to each other. The first extension direction and the second extension direction can be staggered relative to the stacking direction, for example, they can be perpendicular.

[0045] Step S200: Forming isolation columns. Exemplarily, multiple isolation columns may be formed. Specifically, the multiple isolation columns are spaced apart along a first extending direction. The isolation columns extend in the prefabricated laminated structure along a stacking direction. Exemplarily, the isolation columns extend from a first side to a second side, or even penetrate the prefabricated laminated structure from the first side to the second side.

[0046] Step S300: Form a first grid line slot structure penetrating the prefabricated stacked structure. Exemplarily, the first grid line slot structure extends from the second side to the first side through the prefabricated stacked structure, i.e., it penetrates the prefabricated stacked structure along the stacking direction. The first grid line slot structure may include a plurality of sub-grid line slot structures spaced apart along the first extension direction. The sub-grid line slot structures are located between corresponding pairs of isolation pillars, and each end may extend partially into the isolation pillars. The positions of the isolation pillars can be preset based on the positions of the sub-grid line slot structures to be formed.

[0047] Exemplarily, the manufacturing method 1000 may further include step S400: forming a plurality of channel structures through a first prefabricated laminated structure. Exemplarily, step S400 may be performed prior to step S200.

[0048] According to some embodiments of this application, before forming the plurality of channel structures, the manufacturing method 1000 further includes a step of forming a stepped structure, and a step S500 including gate replacement. Step S500 can be performed after step S200 and before step S300. In this embodiment, gate replacement is performed after forming the channel structure.

[0049] The following will further describe each step based on specific embodiments of this application.

[0050] Implementation Method 1

[0051] The specific process of performing the manufacturing method 1000 according to Embodiment 1 is as follows.

[0052] S100

[0053] A first prefabricated stacked structure 20 can be formed on the substrate 10. For example... Figure 5As shown, a first prefabricated stacked structure 20 is disposed on a substrate 10 and includes sacrificial layers 21 and insulating layers 22 alternately stacked. In this embodiment, the number of layers can be 32, 64, 96, 128, or more layers depending on design requirements. Furthermore, other numbers of sacrificial layers 21 and insulating layers 22 can be stacked according to design requirements. In this embodiment, a 32-layer first prefabricated stacked structure 20 can be formed, while in other embodiments, an 8-layer, 16-layer, or any first prefabricated stacked structure 20 not exceeding 32 layers can be formed on the substrate 10 first, and then subsequent prefabricated stacked structures can be formed on the first prefabricated stacked structure 20.

[0054] In this embodiment, the substrate 10 may be a semiconductor substrate. For example, the substrate 10 may be a single-crystal silicon (Si) substrate, a single-crystal germanium (Ge) substrate, a silicon-on-insulator (SOI) substrate, or a germanium-on-insulator (GOI) substrate. The substrate 10 may also be a P-type doped substrate or an N-type doped substrate. In some other embodiments, the material of the substrate 10 may also be a semiconductor or compound including other elements. For example, the substrate 10 may be a gallium arsenide (GaAs) substrate, an indium phosphide (InP) substrate, or a silicon carbide (SiC) substrate. It should be understood that a suitable material can be selected as the substrate 10 according to actual needs, and this application does not impose specific limitations in this regard.

[0055] The first prefabricated stacked structure 20 can be formed by depositing alternating sacrificial layers 21 and insulating layers 22. The deposition methods for the sacrificial layers 21 and insulating layers 22 can include chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, metal-organic chemical vapor deposition (MOCVD), and atomic layer deposition (ALD), etc. The deposition method can be selected according to actual needs to form the first prefabricated stacked structure 20. For example, in the prefabricated stacked structure 20, the thicknesses of the multiple sacrificial layers 21 can be the same or different, and the thicknesses of the multiple insulating layers 22 can be the same or different; the specific thicknesses can be set according to specific process requirements.

[0056] The sacrificial layer 21 and the insulating layer 22 have different etching selectivity. For example, the insulating layer 22 can be made of insulating dielectric materials such as silicon oxide, aluminum oxide, hafnium oxide, or tantalum oxide, while the sacrificial layer 21 can be made of silicon nitride. In addition, the first prefabricated stacked structure 20 can be a preceding prefabricated stacked structure, which will be subjected to a gate replacement process later.

[0057] Figure 5In this context, the Z direction is the stacking direction, and the X direction is the first extension direction. The first prefabricated stacked structure 20 includes a storage area and a step area (not shown). Exemplarily, this embodiment includes forming a step structure (not shown) based on the first prefabricated stacked structure 20 in the step area.

[0058] S200

[0059] In step S200, a plurality of isolation columns 30 are formed penetrating the first prefabricated laminated structure 20. Figure 6 ).by Figure 6 If the lower side is the first side and the upper side is the second side, then the isolation post 30 can extend along the stacking direction or from the second side to the first side, penetrating the first prefabricated laminated structure 20. Specifically, an isolation hole (not shown) penetrating the first prefabricated laminated structure 20 can be formed first, and then insulating material can be filled into the isolation hole to form the isolation post 30.

[0060] According to this embodiment, a patterned first mask layer (not shown) can be formed on the surface of the first prefabricated stacked structure 20 facing away from the substrate 10. The patterned first mask layer includes a first opening (not shown) corresponding to an isolation hole. In some embodiments, the first mask layer also includes a second opening for etching a virtual channel hole (not shown). The positions of the isolation holes etched by subsequent etching processes and the first opening are determined by the overall layout design. A virtual channel structure can be formed in the virtual channel hole, and its position is arranged as needed. The virtual channel structure is used to support the insulating layer 22 during the gate replacement process to ensure that the first prefabricated stacked structure 20 does not collapse during gate replacement. As an example, the position of the first opening can be aligned with the first gate gap structure 40 to be formed ( Figure 11 The position corresponds to ).

[0061] Specifically, after the first opening exposes the first prefabricated stacked structure 20, an isolation hole is formed by removing the portion of the first prefabricated stacked structure 20 exposed by the first opening through an appropriate etching process, such as dry etching or wet etching. Exemplarily, a portion of the isolation hole is located in the substrate 10 but does not penetrate the substrate 10. The first mask layer can be removed after the isolation hole is formed. Multiple isolation holes can be formed simultaneously in this step; that is, the first mask layer can form multiple first openings, the positions of which correspond to the positions of the subsequently formed multiple isolation holes.

[0062] In one embodiment, the cross-sectional shape of the isolation hole in the stacking direction can be circular or square.

[0063] After forming the isolation holes, insulating material is filled into the isolation holes to form isolation pillars 30. The insulating material may include an oxide dielectric layer, such as silicon oxide.

[0064] In an exemplary implementation, such as Figure 7 and Figure 8 As shown, where, Figure 8 yes Figure 7 The cross-sectional view at the CC position shows that the XY plane can be the extension surface of the first prefabricated stacked structure 20. Figure 7 The X direction shown is the first extension direction. Figure 8 The Y direction is the second extension direction. Furthermore, the extension surface of the first prefabricated stack structure 20 may not be planar; it may be a continuous surface with undulations. The dimension d of the isolation pillar 30 in the second extension direction is set to be greater than or equal to the width of the first gate line slot 400 to be formed, that is, greater than or equal to the width of the first gate line slot structure 40 to be formed. Figure 12 The width of ) is set in this way to ensure the width of the sub-grid line slot structure 41 ( Figure 12 The tapered portion at the bottom can extend into the isolation column 30.

[0065] S300

[0066] In this step, a first grid line slot structure 40 is formed through the first prefabricated stacked structure 20. Exemplarily, in the step of forming the first grid line slot structure 40, a first grid line slot 400 is first formed through the first prefabricated stacked structure 20 along the Z direction, and then the first grid line slot structure 40 can be formed in the first grid line slot 400.

[0067] Although the isolation pillar 30 is provided to prevent the residual gate 24 from contacting the first prefabricated stack structure 20, it is not impossible that the residual gate 24 may be removed in some products. Regardless of the residual gate 24, in this embodiment, a portion of the first gate line gap 400 extends into the isolation pillar 30, and consequently, a portion of the first gate line gap structure 40 must also extend into the isolation pillar 30.

[0068] In the steps of forming the isolation aperture and the first gate line slot 400, a mask can be used to etch the first prefabricated stacked structure 20. The patterns of the mask forming the isolation aperture and the mask forming the first gate line slot 400 are determined according to their placement, thus requiring the ensuring of accurate overlay between the two masks. (Reference) Figure 8 The first sub-grid line gap 401 and the second sub-grid line gap 402 are spaced apart, and two isolation pillars 30 can be provided between them. There can be a gap between these two isolation pillars 30 to ensure that the first prefabricated laminated structure 20 is connected as a whole in the Y direction.

[0069] For example, a gap insulating layer 43 and a common source line 42 are sequentially formed in the first gate gap 400. In other embodiments, the first gate gap structure 400 can be obtained by filling the first gate gap 400 with oxide. The first gate gap structure 400 can be designed into various composite structures as needed and can be connected to the substrate 10.

[0070] First refer to Figure 11 and 12 ,like Figure 11 and Figure 12 As shown (where Figure 12 yes Figure 11 (See the cross-sectional view at DD). The first gate line slot structure 40 includes a plurality of sub-gate line slot structures 41 spaced apart along the X direction. Each sub-gate line slot structure 41 penetrates the first stacked structure 20A along the Z direction and extends into the isolation pillar 30 along the X direction. The residual gate 24 located in the first isolation pillar recess 4011 is covered by the corresponding isolation pillar 30 and sub-gate line slot structure 41. Some other residual gates 24 located in the second isolation pillar recess 4021 are covered by another pair of isolation pillars 30 and sub-gate line slot structures 41 and are electrically isolated from the gate layer 23 of the first stacked structure 20A.

[0071] S400

[0072] In this step, multiple channel structures 50 are formed that penetrate the first prefabricated laminated structure 20. Figure 8 For example, a channel hole can be formed first, penetrating the first prefabricated stacked structure 20, and then a channel structure 50 can be formed in the channel hole. The channel structure 50 can extend, for example, into the substrate 10. This step S400 can be performed before step S200.

[0073] The channel structure 50 may include a barrier layer, a storage layer, a tunneling layer, a channel layer, and an insulating filler layer (not shown) sequentially formed on the sidewalls of the channel aperture. It is understood that the insulating filler layer may serve as the core of the channel structure 50, while the channel layer, tunneling layer, storage layer, and barrier layer sequentially form a ring structure surrounding the core.

[0074] Exemplarily, multiple virtual channel structures (not shown) may also be formed in the first prefabricated laminated structure 20. The virtual channel structures may have the same layer structure as the channel structure 50, or may be filled with insulating material, and are used to support the first prefabricated laminated structure 20 to increase its strength. Exemplarily, the virtual channel structures may be located in the stepped area (not shown) of the first prefabricated laminated structure 20.

[0075] S500

[0076] In step S500, gate replacement is performed. Specifically, a first gate line gap 400 and a second gate line gap (not shown) can be formed first. Then, the sacrificial layer 21 can be removed through the first gate line gap 400 and the second gate line gap to form a sacrificial gap between any two adjacent insulating layers 22. Afterward, a gate layer 23 is formed in the sacrificial gap through the first gate line gap 400 and the second gate line gap. The gate layer 23 is located between two adjacent insulating layers 22. After gate replacement, the prefabricated stacked structure can be formed into a stacked structure, which includes alternately stacked insulating layers 22 and gate layers 23.

[0077] This step S500 can be performed after the formation of the first gate line slot 400 and before the formation of the first gate line slot structure 40. When depositing the material of the gate layer 23 after removing the sacrificial layer 21, a significant amount of material is also deposited in the first gate line slot 400, after which the material in the first gate line slot 400 needs to be removed. However, referring to... Figure 7 and Figure 8 When forming the first gate line slot 400 using, for example, etching, the cross-sectional area is smaller at lower positions along the Z direction, and the openings of the first isolation pillar groove 4011 and the second isolation pillar groove 4021 are narrower. When removing material using, for example, wet methods, the material in these narrow areas may not be completely removed, leaving conductive material residue. Figure 9 and Figure 10 The residual gate 24 is shown.

[0078] like Figure 9 As shown, the residual gate 24 is completely located within the first isolation pillar recess 4011 or the second isolation pillar recess 4021, and does not protrude from the slot opening in the X direction. Subsequently, the first gate line slot structure 40 to be formed may extend partially into the isolation pillar 30.

[0079] For example, refer to Figure 9 and Figure 10 In any cross-section of the isolation pillar 30 in the Z direction, the opening size, i.e., the maximum size 'a', of the first isolation pillar groove 4011 or the second isolation pillar groove 4021 in the Y direction is greater than or equal to 150 nm. For example, 'a' can be greater than 200 nm, and further, greater than 230 nm. Specifically, it is ensured that at the lowest cross-section, the maximum size 'a' of the first isolation pillar groove 4011 or the second isolation pillar groove 4021 in the Y direction satisfies the condition to ensure that at least a portion of the conductive material in the first isolation pillar groove 4011 or the second isolation pillar groove 4021 can also be removed.

[0080] In step S300, a gap insulating layer 43 may be formed by filling the first gate line gap 400 and the second gate line gap (not shown) with a gap dielectric material such as an oxide. Specifically, the same material as the insulating layer 22 may be selected for filling. As an example, while filling the first gate line gap 400 and the second gate line gap (not shown) with the gap insulating layer 43, the residual gate 24 in the isolation pillar recess 4011 may be covered, that is, isolated from the gate line layer 23.

[0081] like Figure 8 As shown, the first grid line slot 400 extends along a first extending direction and includes a plurality of sub-grid line slots 401 / 402 spaced apart in the first extending direction. Each sub-grid line slot structure 401 / 402 is disposed between a pair of isolation posts 30, and the portion of the first prefabricated stacked structure 20 between the two pairs of isolation posts 30 is retained.

[0082] Figure 8 In the diagram, the left-side isolation post 30 belongs to a pair of left-side isolation posts (not all shown), and the right-side isolation post belongs to a pair of right-side isolation posts (not all shown). The joint of the first sub-grid slot 401 extends into the right-side isolation post 30. Specifically, a portion of the right-side isolation post 30 is removed during the formation of the grid slot 400 to form the first isolation post recess 4011. Similarly, the second sub-grid slot 402 includes the second isolation post recess 4021.

[0083] In this embodiment, before etching the first prefabricated stacked structure 20 to form the first gate line slot 400 penetrating the first prefabricated stacked structure 20, a patterned second mask layer (not shown) can be formed on the surface of the first prefabricated stacked structure 20 away from the substrate 10. The patterned second mask layer includes a second opening corresponding to the first gate line slot 400, and the vertical projection of the second opening on the first prefabricated stacked structure 20 overlaps with the position of the first gate line slot 400.

[0084] For example, the second mask layer further includes a third opening, the shape and location of which are substantially the same as the second gate line slot (not shown) to be formed. The second gate line slot extends along a first extension direction, and the first gate line slot is located between the two second gate line slots in a second extension direction.

[0085] Specifically, by performing an appropriate etching process on the second opening, such as dry etching or wet etching, the portion of the first prefabricated stacked structure 20 exposed by the second opening is removed to form the first gate line slot 400. The etched first gate line slot structure 40 exposes the substrate 10. Exemplarily, the second gate line slot and the first gate line slot 400 divide the storage area of ​​the three-dimensional memory device into multiple block storage areas and finger storage areas. After the first gate line slot structure 400 is formed, the second mask layer can be removed.

[0086] Next, the sacrificial layer 21 can be removed through the first gate gap 400 and the second gate gap to form a sacrificial space between adjacent insulating layers 22. Exemplarily, the sacrificial layer 21 and the insulating layer 22 comprise silicon nitride and silicon oxide, respectively. In wet etching, a phosphoric acid solution can be used as the etchant, while in isotropic dry etching, the etchant includes one or more of CF4, CHF3, C4F8, C4F6, and CH2F2. During the etching step, the etchant fills the first gate gap 400 and the second gate gap. The sacrificial layer 21 is exposed to the first gate gap 400 and the second gate gap and comes into contact with the etchant. Due to the selectivity of the etchant, this etching process removes the sacrificial layer 21 relative to the insulating layer 22 to form the sacrificial space.

[0087] Then, conductive material can be filled into the sacrificial gap through the first gate gap 400 and the second gate gap to form the gate layer 23. The gate layer 23 can be formed in the sacrificial gap using deposition processes such as CVD, PVD, ALD, or any combination thereof. The material of the gate layer 23 can be metals such as tungsten, cobalt, copper, aluminum, and nickel, or it can be polycrystalline silicon, doped silicon, or any combination thereof, which can be selected according to the actual situation.

[0088] refer to Figure 11 and Figure 12 ,in, Figure 12 yes Figure 11 A cross-sectional view at point DD. During the formation of the gate layer 23, some conductive material also adheres to the sidewalls of the first gate line slot 400. After the gate layer 23 is formed, the conductive material on the sidewalls of the first gate line slot 400 needs to be removed. Because the joints at deeper locations of the sub-gate line slots 401 / 402 are too narrow, some conductive material in the isolation pillar grooves 4011 / 4021 is difficult to remove completely, resulting in residual gate 24. At shallower locations of the sub-gate line slots 401 / 402, there may be no residual conductive material, meaning the residual gate 24 can extend a distance from the bottom to the top. However, at any cross-section in the Z direction, a portion of the sub-gate line slot structure 41 extends into the isolation pillar 30.

[0089] In some implementations, such as Figure 13 As shown, the upper ends of the first sub-gate line slot 401 and the second sub-gate line slot 402 extend deeper into the isolation pillar 30 along the X direction, while the lower ends extend shallower into the isolation pillar 30. For example, it is necessary to ensure that the maximum dimension of the lower end of the first isolation pillar groove 4011 and the second isolation pillar groove 4021 in the Y direction is not less than 150 nm. In other words, due to the characteristics of the etching process, with the XY plane as the projection plane, the area of ​​the upper opening of the first sub-gate line slot 401 and the second sub-gate line slot 402 is larger than the area S1 of the bottom end; that is, the area of ​​the upper opening of the first gate line slot 400 is larger than the area of ​​its bottom end.

[0090] based on Figure 13 The semiconductor structure shown, after the first prefabricated stacked structure 20 is formed into a stacked structure 20A, a first gate line slot structure 40 is formed in the first gate line slot 400. As... Figure 14 As shown, the upper part of the first gate line slot structure 40 has a relatively large overall size in the Y direction, indicating that the gate material has been removed relatively cleanly. Furthermore, the area S2 of the sub-gate line slot structure away from the substrate 10 is approximately equal to the top opening of the original first sub-gate line slot 401 / second sub-gate line slot 402. This is mainly because the top of the first gate line slot structure 40 may be trimmed using a chemical mechanical polishing process after its formation. The area of ​​each sub-gate line slot structure near the substrate can be slightly smaller than the area S1 of the bottom of the original first sub-gate line slot 401 / second sub-gate line slot 402, due to possible residual gate material. In summary, in the process of... Figure 13 The semiconductor structure shown is formed Figure 14 After the semiconductor structure shown, Figure 14 The end face area of ​​the first gate line slot structure 40 on the first side is smaller than its end face area on the second side, wherein the first side refers to... Figure 13 The lower side, the second side refers to Figure 13 The upper side is shown.

[0091] This embodiment ensures that the junction of the sub-gate line slot structure 41 and the gate layer 23 of the first prefabricated stacked structure 20 are completely isolated by the isolation pillar 30 by setting the isolation pillar 30 in advance. As a result, any residual gate 24 that may remain at the sub-gate line slot structure 41 cannot contact the gate layer 23, thus avoiding leakage between the stacked gate layers 23 through the residual gate 24.

[0092] Implementation Method 2

[0093] In the manufacturing method for a three-dimensional memory according to this second embodiment, in step S100, a first prefabricated stacked structure 20 is first formed on a substrate 10, and a second prefabricated stacked structure is formed on the first prefabricated stacked structure 20. Exemplarily, a stepped structure (not shown) is formed in the stepped region based on the first prefabricated stacked structure 20 and the second prefabricated stacked structure.

[0094] Next, in step S200, a plurality of isolation pillars 30 are formed, and the isolation pillars 30 penetrate the first prefabricated laminated structure 20 and the second prefabricated laminated structure. Exemplarily, isolation holes can be formed after the second prefabricated laminated structure is formed, and isolation pillars 30 are formed within these holes. Exemplarily, a lower isolation pillar penetrating the first prefabricated laminated structure 20 can be formed after its formation, and then an upper isolation pillar penetrating the second prefabricated laminated structure can be formed after its formation. The upper and lower isolation pillars are positioned at the same point in the cross-section along the stacking direction, and they are connected to form the isolation pillar 30.

[0095] Exemplarily, the manufacturing method may further include the step of forming a plurality of channel structures, wherein the formed channel structures penetrate the first prefabricated stack structure 20 and the second prefabricated stack structure. In some embodiments, after forming the first prefabricated stack structure 20, a lower channel hole penetrating the first prefabricated stack structure 20 along the stacking direction may be formed and a sacrificial material may be filled in the lower channel hole; then, after forming the second prefabricated stack structure, an upper channel hole penetrating the second prefabricated stack structure along the stacking direction may be formed; the sacrificial material in the lower channel hole is removed through the upper channel hole to connect the upper channel hole and the lower channel hole, thereby forming a channel structure therein.

[0096] In step S300, the gates of the first prefabricated stacked structure and the second prefabricated stacked structure are replaced through a first gate line gap (not shown) to obtain a first stacked structure 20A and a second stacked structure 60A, and a first gate line gap structure 40 is formed in the first gate line gap, penetrating the first stacked structure 20A and the second stacked structure 60A. The first gate line gap structure 40 includes a plurality of sub-gate line gap structures 41 spaced apart along the X direction. The sub-gate line gap structures 41 are located between a pair of isolation pillars 30 and extend into the isolation pillars 30. Exemplarily, in this step S300, a second gate line gap structure (not shown) penetrating the first stacked structure 20A and the second stacked structure 60A may also be formed in the second gate line gap. The second gate line gap structure extends along a first extension direction, and in the Y direction, the first gate line gap structure 40 is located between two second gate line gap structures.

[0097] Figure 15 A three-dimensional memory device formed according to the method described in Embodiment 2 is shown. As shown, the three-dimensional memory device may include: a substrate 10, a first stacked structure 20A, a second stacked structure 60A, isolation pillars 30, and a first gate line gap structure 40. The substrate 10 is a semiconductor substrate. Suitable materials can be selected to form the substrate 10 according to actual needs, which will not be elaborated here.

[0098] The first stacked structure 20A includes an alternately stacked first gate layer 23 and a first insulating layer 22. A second stacked structure 60A is located on the first stacked structure 20A, and the second stacked structure 60A includes an alternately stacked second gate layer 63 and a second insulating layer 62. The first stacked structure 20A and the second stacked structure 60A can be considered as a whole as a composite stacked structure, which includes alternately stacked gate layers 23 / 63 and insulating layers 22 / 62.

[0099] The first gate line slot structure 40 extends in the left-right direction as shown in the figure and includes a plurality of sub-gate line slot structures 41 spaced apart in the extension direction. The first gate line slot structure 40 penetrates the composite stacked structure and can extend to the substrate 10. An isolation pillar 30 is provided at both ends of each sub-gate line slot structure 41 in the left-right direction, wherein the isolation pillar 30 penetrates the composite stacked structure. A portion of the sub-gate line slot structure 41 extends into the isolation pillar 30, and the isolation pillar 30 and the sub-gate line slot structure 41 enclose the residual gate 24 in the isolation pillar 30.

[0100] In an exemplary embodiment, the isolation pillar 30 is made of an insulating material, such as silicon oxide. In an exemplary embodiment, the cross-section of the isolation pillar 30, i.e., the cross-section parallel to the substrate 10, is circular or square. In an exemplary embodiment, the gate layer is isolated from the first gate line gap structure 40 by the isolation pillar 30 in the extending direction of the first gate line gap structure 40.

[0101] Implementation Method 3

[0102] In the manufacturing method for a three-dimensional memory device according to this embodiment three, a first prefabricated stacked structure 20 is first formed on a substrate 10 in step S100. Next, in step S200, a plurality of isolation pillars 30 are formed penetrating the first prefabricated stacked structure 20 along the stacking direction. Exemplarily, the manufacturing method provided by this embodiment further includes the steps of forming a second prefabricated stacked structure on the first prefabricated stacked structure 20, and forming a stepped structure (not shown) in a stepped region based on the first prefabricated stacked structure 20 and the second prefabricated stacked structure. After forming the stepped structure, a plurality of virtual channel structures penetrating the stepped structure may also be formed.

[0103] For example, the manufacturing method may include the step of forming a channel structure. This step can be referred to the step of forming a channel structure in Embodiment 2.

[0104] Next, in step S300, gate replacement is performed through the first gate line gap (not shown) and the second gate line gap (not shown) to form a first stacked structure 20A and a second stacked structure 60A. A first gate line gap structure 40 and a second gate line gap structure (not shown) penetrating the first stacked structure 20A and the second stacked structure 60A are formed in the first gate line gap and the second gate line gap, respectively. The first gate line gap structure 40 includes a plurality of sub-gate line gap structures 41 spaced apart along a first extension direction parallel to the substrate 10. The sub-gate line gap structures 41 are located between a corresponding pair of isolation pillars 30 and extend to the isolation pillars 30.

[0105] Figure 16 A three-dimensional memory device formed according to the method described in Embodiment 3 is shown. The three-dimensional memory device may include: a substrate 10, a first stacked structure 20A, a second stacked structure 60A, isolation pillars 30, and a first gate line slot structure 40.

[0106] Substrate 10 can be a semiconductor substrate. Appropriate materials can be selected to form substrate 10 according to actual needs, which will not be elaborated further.

[0107] The first stacked structure 20A includes an alternately stacked first gate layer 23 and a first insulating layer 22. A second stacked structure 60A is located on the first stacked structure 20A, and the second stacked structure 60A also includes an alternately stacked second gate layer 63 and a second insulating layer 62. The first stacked structure 20A and the second stacked structure 60A can be considered as a whole as a composite stacked structure, which includes alternately stacked gate layers 23 / 63 and insulating layers 22 / 62.

[0108] The first gate line slot structure 40 extends in a left-right direction and includes a plurality of sub-gate line slot structures 41 spaced apart in the extension direction. The first gate line slot structure 40 penetrates the composite stacked structure and can extend to the substrate 10. An isolation pillar 30 is provided at both ends of each sub-gate line slot structure 41 in the left-right direction, wherein the isolation pillar 30 penetrates at least the first stacked structure 20A located closer to the substrate 10.

[0109] Along the stacking direction, the area of ​​the upper end face of the sub-gate line slot structure 41, i.e., the end face on the side of the second stacked structure 60A, is larger than the area of ​​its lower end face, i.e., the end face on the side of the first stacked structure 20A. The shape of the sub-gate line slot structure 41, with a larger upper end and a smaller lower end, originates from the etching pattern of the sub-gate line slot. The shape of the sub-gate line slot makes it difficult for conductive material to remain at its X-direction end in the second stacked structure 60A. Therefore, providing an isolation pillar 30 at the first stacked structure 20A can protect the first gate layer 23 in the first stacked structure 20A, electrically isolating the first gate layer 23 from the residual gate 24. This isolation pillar 30 is shorter, and its manufacturing process is simpler.

[0110] like Figure 16 As shown, the dashed lines mark the boundary of the isolation pillar 30 in the X direction, and the isolation pillar 30 intersects with the sub-gate line slot structure 41. A portion of the sub-gate line slot structure 41 extends into the isolation pillar 30, such that the isolation pillar 30 and the sub-gate line slot structure 41 enclose the residual gate 24 located in the isolation pillar 30, which helps to separate the residual gate 24 from the first gate layer 23.

[0111] The three-dimensional memory may also include a second gate line slot structure (not shown). The second gate line slot structure extends through the first stacked structure 20A and along a first extending direction parallel to the substrate 10. In an exemplary embodiment, the first gate line slot structure 40 is located between the two second gate line slot structures.

[0112] The channel structure 50 runs through the composite stacked structure. Multiple channel structures 50 are provided between the two second grid line slot structures, and the first grid line slot structure 40 can further separate these channel structures 50.

[0113] The method for manufacturing a three-dimensional memory device provided in the embodiments of this application adds isolation pillars at both ends of each sub-gate line slot structure. The isolation pillars can be placed only at the bottom tapering position of the sub-gate line slot structure, that is, only penetrating a portion of the composite stacked structure. This arrangement avoids the leakage current problem caused by the subsequent process of filling the gate metal in the word line opening, improves the electrical performance and yield of the three-dimensional memory device, and simplifies the manufacturing process of the isolation pillars.

[0114] like Figure 17 As shown, this disclosure also provides a storage system 8, including at least one three-dimensional storage device 81, a controller 82, and a connector 83. The connector 83 is used to couple the storage system 8 to an external device.

[0115] Exemplarily, a three-dimensional storage device 81 provided in this disclosure includes the aforementioned stacked structure and peripheral circuitry. Exemplarily, the stacked structure and peripheral circuitry can be arranged in parallel and electrically connected; the stacked structure and peripheral circuitry can also be stacked and electrically connected using a bonding method. The peripheral circuitry is electrically connected to the stacked structure to facilitate the stacked structure's functionality in the circuit. The peripheral circuitry may include, for example, page buffers / sensor amplifiers, column decoders / bit line (BL) drivers, row decoders / word line (WL) drivers, voltage generators, control logic units, registers, interfaces, and data buses.

[0116] Exemplarily, the controller 82 and at least one three-dimensional storage device 81 can be integrated into a memory card. The memory card may include a PC card (PCMCIA, Personal Computer Memory Card International Association), a compact flash (CF) card, a smart media (SM) card, a memory stick, a multimedia card (MMC, RS-MMC, MMCmicro, eMMC), an SD card (SD, miniSD, microSD, SDHC), a universal flash memory card (UFS), etc. Exemplarily, the controller 82 and at least one three-dimensional storage device 81 can be integrated into a solid-state drive (SSD).

[0117] The memory or storage system provided in this disclosure has a better three-dimensional storage structure, higher manufacturing yield, and can provide better storage capacity stably and for a long time.

[0118] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of protection involved in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the described technical concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features with similar functions in this application.

Claims

1. A three-dimensional storage device, characterized in that, include: A stacked structure having a stacking direction and a first extending direction perpendicular to the stacking direction; An isolation column extends in the stacked structure along the stacking direction; as well as The first gate line slot structure penetrates the stacked structure along the stacking direction and extends along the first extension direction, including a plurality of sub-gate line slot structures spaced apart along the first extension direction, wherein a portion of the sub-gate line slot structure extends into the isolation pillar, and two isolation pillars are disposed between two adjacent sub-gate line slot structures.

2. The three-dimensional storage device according to claim 1, wherein, The three-dimensional storage device includes at least two isolation pillars spaced apart along the first extending direction; The sub-grid line slot structure extends into the isolation pillar at both ends of the first extension direction.

3. The three-dimensional storage device according to claim 1, wherein, The stacked structure includes alternately stacked gate layers and insulating layers, and the isolation pillars are made of an insulating material. The three-dimensional memory device further includes a residual gate disposed between the isolation pillar and the sub-gate line slot structure, wherein the gate layer and the residual gate are electrically isolated by the isolation pillar and the sub-gate line slot structure.

4. The three-dimensional storage device according to claim 1, wherein, The stacked structure has a first side and a second side along the stacking direction; The isolation column penetrates at least a portion of the laminated structure from the first side; The end face area of ​​the first gate slot structure on the first side is smaller than its end face area on the second side.

5. The three-dimensional storage device according to claim 4, wherein, The isolation column penetrates the stacked structure.

6. The three-dimensional storage device according to claim 1, wherein, Along a second extending direction perpendicular to both the stacking direction and the first extending direction, the size of the isolation pillar is larger than the size of said portion of the sub-gate line slot structure, and Along the second extending direction, the maximum dimension of the portion of the sub-gate line slot structure is greater than or equal to 150 nm.

7. The three-dimensional storage device according to claim 1, wherein, It also includes at least two second gate line slot structures, which penetrate the stacked structure and extend along the first extension direction, wherein the first gate line slot structure is located between the two second gate line slot structures.

8. A method for manufacturing a three-dimensional storage device, characterized in that, include: A prefabricated stacked structure is formed by stacking along a stacking direction, wherein the prefabricated stack includes a first extending direction perpendicular to the stacking direction; Forming isolation columns extending in the prefabricated laminated structure along the stacking direction; and The first grid line slot structure is formed, wherein the first grid line slot structure includes a plurality of sub-grid line slot structures spaced apart along the first extension direction, wherein a portion of the sub-grid line slot structures extends into the isolation post; The formation of the isolation pillars includes: forming at least two isolation pillars spaced apart along the first extending direction; and The step of forming the plurality of sub-grid line slot structures includes: forming two adjacent sub-grid line slot structures by spacing two of the isolation posts.

9. The manufacturing method according to claim 8, wherein, The steps for forming the first gate wire slot structure include: A first grid line slot is formed penetrating the prefabricated laminated structure, wherein the first grid line slot includes a plurality of sub-grid line slots spaced apart along the first extending direction, wherein each sub-grid line slot includes a spacer post groove formed by removing a portion of the spacer post; and The first grid line slot structure is formed in the first grid line slot.

10. The manufacturing method according to claim 9, wherein, The steps for forming the prefabricated laminated structure include: alternately stacking sacrificial layers and insulating layers; The step of forming the isolation pillar includes: forming the isolation pillar using an insulating material; The step of forming the groove of the isolation post also includes: The sacrificial layer is replaced with a gate layer to form the prefabricated stacked structure into a stacked structure, and the gate material in the first gate line gap is removed, wherein a residual gate is formed in the isolation pillar groove; In the step of forming the first gate line slot structure, the residual gate is electrically isolated from the stacked structure by the isolation pillar and the first gate line slot structure.

11. The manufacturing method according to claim 8, wherein, The steps for forming the prefabricated laminated structure include: Forming the first prefabricated laminated structure; and Along the stacking direction, a second prefabricated stacked structure is formed on one side of the first prefabricated stacked structure; Prior to forming the second prefabricated laminated structure, a plurality of isolation columns are formed, and the isolation columns penetrate the first prefabricated laminated structure. After the second prefabricated stacked structure is formed, the first grid line slot structure is formed, and the end face area of ​​the first grid line slot structure in the first prefabricated stacked structure is smaller than its end face area in the second prefabricated stacked structure.

12. The manufacturing method according to claim 8, wherein, The isolation column penetrates the prefabricated multilayer structure.

13. The manufacturing method according to claim 8, wherein, Along a second extending direction perpendicular to both the stacking direction and the first extending direction, the size of the isolation pillar is larger than the size of said portion of the sub-gate line slot structure, and Along the second extending direction, the maximum dimension of the portion of the sub-gate line slot structure is greater than or equal to 150 nm.

14. The manufacturing method according to claim 8, wherein, It also includes forming a second gate line slot structure, wherein the second gate line slot structure extends along the first extension direction, and the first gate line slot structure is located between the two second gate line slot structures.

15. A storage system, characterized in that, include: The three-dimensional storage device as described in any one of claims 1-7; as well as A controller, electrically connected to the three-dimensional storage device, is used to control the storage device.

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