Current switching circuit and control method thereof

Abstract

The application relates to a current switching circuit and a control method thereof, which comprises a power supply, a current input end, a first current output end, a second current output end, a first current mirror unit, a second current mirror unit, a third current mirror unit, a first feedback unit, a second feedback unit and a signal receiving unit. The input end of the third current mirror unit is connected with the current input end, the output end is connected with the input end of the signal receiving unit, the first output end of the signal receiving unit is connected with the input end of the first current mirror unit, the second output end of the signal receiving unit is connected with the input end of the second current mirror unit, the output end of the first current mirror is connected with the first current output end, the output end of the second current mirror is connected with the second current output end, the input end of the first feedback unit is connected with the first current mirror unit, the output end is connected with the second current mirror unit, the input end of the second feedback unit is connected with the second current mirror unit, and the output end is connected with the first current mirror unit.

Description

Technical Field

[0001] This application relates to the field of circuit structure technology, and in particular to a current switching circuit and its control method. Background Technology

[0002] In analog integrated circuit design, it is often necessary to select the path of the current signal to achieve the purpose of current switching. The most common method is to use two transmission gates to control the current switching. However, this method has certain limitations. First, the transmission gate has a conduction impedance. The voltage drop generated after the current passes through the equivalent resistance will limit the subsequent circuit. Second, the switching speed is limited. Summary of the Invention

[0003] To address the aforementioned problems, this application provides a current switching circuit and its control method, which solves the technical problem in related technologies where two transmission gates are used to control current switching, resulting in limitations on subsequent circuit stages due to on-resistance and limited switching speed.

[0004] In a first aspect, this application provides a current switching circuit, the circuit comprising:

[0005] Power supply, current input terminal, first current output terminal, second current output terminal, first current mirror unit, second current mirror unit, third current mirror unit, first feedback unit, second feedback unit, signal receiving unit;

[0006] The third current mirror unit has its input terminal connected to the current input terminal and its output terminal connected to the input terminal of the signal receiving unit. The first output terminal of the signal receiving unit is connected to the input terminal of the first current mirror unit, and the second output terminal of the signal receiving unit is connected to the input terminal of the second current mirror unit. The output terminal of the first current mirror is connected to the first current output terminal, and the output terminal of the second current mirror is connected to the second current output terminal. The first feedback unit has its input terminal connected to the first current mirror unit and its output terminal connected to the second current mirror unit. The second feedback unit has its input terminal connected to the second current mirror unit and its output terminal connected to the first current mirror unit. The power supply is used to power the entire current switching circuit.

[0007] In some embodiments, the third current mirror unit includes: a first transistor and a second transistor;

[0008] The signal receiving unit includes a third transistor and a fourth transistor;

[0009] The first feedback unit includes a fifth transistor and a sixth transistor;

[0010] The second feedback unit includes a seventh transistor and an eighth transistor;

[0011] The second current mirror unit includes: a seventh transistor and a ninth transistor;

[0012] The first current mirror unit includes: a fifth transistor and a tenth transistor;

[0013] The current input terminal is connected to the drain and gate of the first transistor, the source of the first transistor is grounded, the gate of the second transistor is connected to the gate of the first transistor, the source of the second transistor is grounded, the drain of the second transistor is connected to the source of the third transistor and the source of the fourth transistor, the drain of the third transistor is connected to the gate of the tenth transistor, the drain of the fifth transistor, the gate of the sixth transistor and the drain of the seventh transistor, the drain of the fourth transistor is connected to the drain of the sixth transistor, the gate of the seventh transistor, the drain of the eighth transistor and the gate of the ninth transistor, the drain of the tenth transistor is connected to the first current output terminal, the gate of the fifth transistor is connected to the gate of the sixth transistor, the gate of the eighth transistor is connected to the gate of the seventh transistor, and the drain of the ninth transistor is connected to the second current output terminal. The power supply is connected to the source of the tenth transistor, the source of the fifth transistor, the source of the sixth transistor, the source of the seventh transistor, the source of the eighth transistor and the source of the ninth transistor, and is used to power the entire current switching circuit.

[0014] In some embodiments, the first transistor, the second transistor, the third transistor, and the fourth transistor are NMOS transistors; the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor are PMOS transistors.

[0015] In some embodiments, the fifth transistor and the sixth transistor constitute a first feedback circuit, used to pull the potential of node J2 to a high level when conduction is detected at node J1.

[0016] In some embodiments, the seventh transistor and the eighth transistor constitute a second feedback circuit for pulling the potential of node J1 to a high level when conduction is detected at node J2.

[0017] In some embodiments, the fifth transistor and the tenth transistor constitute a first current mirror circuit for generating an equivalent current that is the same as the input current at the current input terminal and outputting it from the first current output terminal.

[0018] In some embodiments, the seventh transistor and the ninth transistor constitute a second current mirror circuit for generating an equivalent current that is the same as the input current at the current input terminal and outputting it from the second current output terminal.

[0019] In some embodiments, the first transistor and the second transistor constitute a third current mirror circuit for generating an equivalent current that is the same as the input current at the current input terminal, and inputting it into the third transistor or the fourth transistor.

[0020] Thirdly, a control method is applied to the current switching circuit described in the first aspect, the method comprising:

[0021] Receive the first control signal;

[0022] According to the first control signal, the input current at the current input terminal flows through the signal receiving unit and then flows out from the second current output terminal.

[0023] Thirdly, a control method is applied to the current switching circuit described in the first aspect, the method comprising:

[0024] Receive the second control signal;

[0025] According to the second control signal, the input current at the current input terminal flows through the signal receiving unit and then flows out from the first current output terminal.

[0026] This application provides a current switching circuit and its control method, comprising: a power supply, a current input terminal, a first current output terminal, a second current output terminal, a first current mirror unit, a second current mirror unit, a third current mirror unit, a first feedback unit, a second feedback unit, and a signal receiving unit; wherein, the input terminal of the third current mirror unit is connected to the current input terminal, and the output terminal is connected to the input terminal of the signal receiving unit; the first output terminal of the signal receiving unit is connected to the input terminal of the first current mirror unit, and the second output terminal of the signal receiving unit is connected to the input terminal of the second current mirror unit; the output terminal of the first current mirror is connected to the first current output terminal, and the output terminal of the second current mirror is connected to the second current output terminal; the input terminal of the first feedback unit is connected to the first current mirror unit, and the output terminal is connected to the second current mirror unit; the input terminal of the second feedback unit is connected to the second current mirror unit, and the output terminal is connected to the first current mirror unit; the power supply is used to power the entire current switching circuit. This application uses a feedback system to accelerate the switching speed, solving the problem of slow switching speed in traditional circuits. It also completely "copies" the input current at the current output terminal without introducing an additional switching resistor, thus solving the problem caused by the on-resistance of traditional circuits. As a result, this structure can be applied to fast and high-precision circuits. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the structure of a current switching circuit provided in an embodiment of this application;

[0029] Figure 2 This is a schematic diagram of another current switching circuit provided in an embodiment of this application;

[0030] Figure 3 This is a schematic diagram of the simulation results of the current switching circuit provided in the embodiments of this application;

[0031] Figure 4 A flowchart illustrating a control method provided in an embodiment of this application;

[0032] Figure 5 This is a flowchart illustrating another control method provided in an embodiment of this application. Detailed Implementation

[0033] The following detailed description of the embodiments of this application, in conjunction with the accompanying drawings, will provide a thorough understanding of how this application uses technical means to solve technical problems and achieve corresponding technical effects, enabling its implementation. The embodiments of this application and the various features within them can be combined with each other without conflict, and all resulting technical solutions are within the protection scope of this application.

[0034] As can be seen from the background technology, in analog integrated circuit design, it is often necessary to select the path of the current signal to achieve the purpose of current switching. The commonly used method is to use two transmission gates to control the current switching. However, this method has certain limitations. First, the transmission gate has a conduction impedance. The voltage drop generated after the current passes through the equivalent resistance will limit the subsequent circuit. Second, the switching speed is limited.

[0035] In view of this, this application provides a current switching circuit and its control method, which solves the technical problem in the related art that the use of two transmission gates to control current switching results in the limitation of the conduction impedance on the subsequent stage circuit and the limitation of the switching speed.

[0036] Example 1

[0037] Figure 1 This is a schematic diagram of a current switching circuit provided in an embodiment of this application, as shown below. Figure 1 As shown, this circuit includes:

[0038] Power supply, current input terminal, first current output terminal, second current output terminal, first current mirror unit, second current mirror unit, third current mirror unit, first feedback unit, second feedback unit, signal receiving unit;

[0039] The third current mirror unit has its input terminal connected to the current input terminal and its output terminal connected to the input terminal of the signal receiving unit. The first output terminal of the signal receiving unit is connected to the input terminal of the first current mirror unit, and the second output terminal of the signal receiving unit is connected to the input terminal of the second current mirror unit. The output terminal of the first current mirror is connected to the first current output terminal, and the output terminal of the second current mirror is connected to the second current output terminal. The first feedback unit has its input terminal connected to the first current mirror unit and its output terminal connected to the second current mirror unit. The second feedback unit has its input terminal connected to the second current mirror unit and its output terminal connected to the first current mirror unit. The power supply is used to power the entire current switching circuit.

[0040] In some embodiments,

[0041] The third current mirror unit includes: a first transistor and a second transistor;

[0042] The signal receiving unit includes a third transistor and a fourth transistor;

[0043] The first feedback unit includes a fifth transistor and a sixth transistor;

[0044] The second feedback unit includes a seventh transistor and an eighth transistor;

[0045] The second current mirror unit includes: a seventh transistor and a ninth transistor;

[0046] The first current mirror unit includes: a fifth transistor and a tenth transistor;

[0047] The current input terminal is connected to the drain and gate of the first transistor, the source of the first transistor is grounded, the gate of the second transistor is connected to the gate of the first transistor, the source of the second transistor is grounded, the drain of the second transistor is connected to the source of the third transistor and the source of the fourth transistor, the drain of the third transistor is connected to the gate of the tenth transistor, the drain of the fifth transistor, the gate of the sixth transistor and the drain of the seventh transistor, the drain of the fourth transistor is connected to the drain of the sixth transistor, the gate of the seventh transistor, the drain of the eighth transistor and the gate of the ninth transistor, the drain of the tenth transistor is connected to the first current output terminal, the gate of the fifth transistor is connected to the gate of the sixth transistor, the gate of the eighth transistor is connected to the gate of the seventh transistor, and the drain of the ninth transistor is connected to the second current output terminal. The power supply is connected to the source of the tenth transistor, the source of the fifth transistor, the source of the sixth transistor, the source of the seventh transistor, the source of the eighth transistor and the source of the ninth transistor, and is used to power the entire current switching circuit.

[0048] Specifically, such as Figure 2 The diagram shown is a structural schematic of another current switching circuit provided in an embodiment of this application.

[0049] Among them, there are 10 transistors M1 to M10, power supply VCC, current input terminal IN, first current output terminal IOUT1, and second current output terminal IOUT2;

[0050] The current input terminal IN is connected to the drain and gate of the first transistor M1, and the source of the first transistor M1 is grounded to GND. The gate of the second transistor M2 is connected to the gate of the first transistor M1, and the source of the second transistor M2 is grounded to GND. The drain of the second transistor M2 is connected to the source of the third transistor M3 and the source of the fourth transistor M4. The drain of the third transistor M3 is connected to the gate of the tenth transistor M10, the drain of the fifth transistor M5, the gate of the sixth transistor M6, and the drain of the seventh transistor M7. The drain of the fourth transistor M4 is connected to the drain of the sixth transistor M6, the gate of the seventh transistor M7, and the eighth transistor M8. The drain of the tenth transistor M10 is connected to the gate of the ninth transistor M9, the drain of the tenth transistor M10 is connected to the first current output terminal IOUT1, the gate of the fifth transistor M5 is connected to the gate of the sixth transistor M6, the gate of the eighth transistor M8 is connected to the gate of the seventh transistor M7, and the drain of the ninth transistor M9 is connected to the second current output terminal IOUT2. The power supply VCC is connected to the source of the tenth transistor M10, the source of the fifth transistor M5, the source of the sixth transistor M6, the source of the seventh transistor M7, the source of the eighth transistor M8, and the source of the ninth transistor M9, respectively, to supply power to the entire current switching circuit.

[0051] It should be noted that the first and second transistors also form a current mirror structure, which effectively inputs the input current to the third or fourth transistor.

[0052] Specifically, such as Figure 2 As shown, the control signal for switching the current is received by the gate S1 of the third transistor and the gate S1N of the fourth transistor. When the signal of input S1 is 0 and the signal of input S1N is 1, M3 is closed and M4 is open. The input current will flow through M4 through the current mirror (composed of M1 and M2).

[0053] The input current flows through the switching transistor M4 into the current mirror (composed of M7 and M9) and then out through IOUT2. At the same time, the second feedback system (composed of M7 and M8) detects the voltage conduction at node J2 and pulls the potential of node J1 to a high level, causing the current mirror (composed of M5 and M10) to turn off quickly.

[0054] When the input signal S1 is 1 and the input signal S1N is 0, M3 is turned on and M4 is turned off. The input current will flow through M3 when passing through the current mirror (composed of M1 and M2).

[0055] The input current flows through the switching transistor M3 into the current mirror (composed of M5 and M10) and out through IOUT1. At the same time, the first feedback system (composed of M5 and M6) detects that the voltage at node J1 is turned on, and pulls the potential of node J2 to a high level, causing the second current mirror unit (composed of M8 and M9) to turn off quickly.

[0056] Figure 3 The diagram shows the circuit simulation results. When the input signal S1 is 0 and S1N is 1, the input current is equal to IOUT2. When the input signal S1 is 1 and S1N is 0, the input current is equal to IOUT1. This completes the basic function of current switching in the circuit. The simulation results show that the circuit switching time is only 108 ps. Here, ps is a picosecond.

[0057] In some embodiments, the 10 transistors are all bipolar transistors.

[0058] It should be noted that, in another embodiment, a bipolar transistor may be used instead of the transistor in this application.

[0059] In some embodiments, the first transistor, the second transistor, the third transistor, and the fourth transistor are NMOS transistors.

[0060] In some embodiments, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor are PMOS transistors.

[0061] In some embodiments, the fifth transistor and the sixth transistor constitute a first feedback circuit, used to pull the potential of node J2 to a high level when conduction is detected at node J1.

[0062] It should be noted that when the potential of node J2 is pulled high, the current mirror composed of the eighth and ninth transistors is quickly turned off.

[0063] In some embodiments, the seventh transistor and the eighth transistor constitute a second feedback circuit for pulling the potential of node J1 to a high level when conduction is detected at node J2.

[0064] It should be noted that when the potential of node J1 is pulled high, the current mirror composed of the fifth and tenth transistors is quickly turned off.

[0065] In some embodiments, the fifth transistor and the tenth transistor constitute a first current mirror circuit for generating an equivalent current that is the same as the input current at the current input terminal and outputting it from the first current output terminal.

[0066] In some embodiments, the seventh transistor and the ninth transistor constitute a second current mirror circuit for generating an equivalent current that is the same as the input current at the current input terminal and outputting it from the second current output terminal.

[0067] In some embodiments, the first transistor and the second transistor constitute a third current mirror circuit for generating an equivalent current that is the same as the input current at the current input terminal, and inputting it into the third transistor or the fourth transistor.

[0068] It should be noted that a current mirror can achieve an equivalent replication of current without generating impedance.

[0069] This embodiment provides a current switching circuit, including: a power supply, a current input terminal, a first current output terminal, a second current output terminal, a first current mirror unit, a second current mirror unit, a third current mirror unit, a first feedback unit, a second feedback unit, and a signal receiving unit; wherein, the input terminal of the third current mirror unit is connected to the current input terminal, and the output terminal is connected to the input terminal of the signal receiving unit; the first output terminal of the signal receiving unit is connected to the input terminal of the first current mirror unit, and the second output terminal of the signal receiving unit is connected to the input terminal of the second current mirror unit; the output terminal of the first current mirror is connected to the first current output terminal, and the output terminal of the second current mirror is connected to the second current output terminal; the input terminal of the first feedback unit is connected to the first current mirror unit, and the output terminal is connected to the second current mirror unit; the input terminal of the second feedback unit is connected to the second current mirror unit, and the output terminal is connected to the first current mirror unit; the power supply is used to power the entire current switching circuit. This application uses a feedback system to accelerate the switching speed, solving the problem of slow switching speed in traditional circuits. It also completely "copies" the input current at the current output terminal without introducing an additional switching resistor, thus solving the problem caused by the on-resistance of traditional circuits. As a result, this structure can be applied to fast and high-precision circuits.

[0070] Example 2

[0071] Based on the current switching circuit disclosed in the above embodiments of the present invention Figure 4 The control method applied to this current switching circuit is specifically disclosed.

[0072] like Figure 4 As shown, this embodiment of the invention discloses a control method applied to the current switching circuit described in Embodiment 1 above. The method includes:

[0073] S401, Receive the first control signal;

[0074] S402. The input current at the current input terminal is controlled to flow through the signal receiving unit and then out from the second current output terminal according to the first control signal.

[0075] It should be noted that, as Figure 2 As shown, the first control signal includes an input signal S1 of the gate of the third transistor being 0, and an input signal S1N of the gate of the fourth transistor being 1.

[0076] Example 3

[0077] Based on the current switching circuit disclosed in the above embodiments of the present invention Figure 5 The control method applied to this current switching circuit is specifically disclosed.

[0078] like Figure 5 As shown, this embodiment of the invention discloses a control method applied to the current switching circuit described in Embodiment 1 above. The method includes:

[0079] S501, Receive the second control signal;

[0080] S502. The input current at the current input terminal is controlled to flow through the signal receiving unit and then out from the first current output terminal according to the second control signal.

[0081] It should be noted that, as Figure 2 As shown, the first control signal includes an input signal S1 of the gate of the third transistor being 1, and an input signal S1N of the gate of the fourth transistor being 0.

[0082] In summary, this application provides a current switching circuit and its control method. The circuit includes: a power supply, a current input terminal, a first current output terminal, a second current output terminal, a first current mirror unit, a second current mirror unit, a third current mirror unit, a first feedback unit, a second feedback unit, and a signal receiving unit. The input terminal of the third current mirror unit is connected to the current input terminal, and its output terminal is connected to the input terminal of the signal receiving unit. The first output terminal of the signal receiving unit is connected to the input terminal of the first current mirror unit, and the second output terminal of the signal receiving unit is connected to the input terminal of the second current mirror unit. The output terminal of the first current mirror unit is connected to the first current output terminal, and the output terminal of the second current mirror unit is connected to the second current output terminal. The input terminal of the first feedback unit is connected to the first current mirror unit, and its output terminal is connected to the second current mirror unit. The input terminal of the second feedback unit is connected to the second current mirror unit, and its output terminal is connected to the first current mirror unit. The power supply is used to power the entire current switching circuit. This application uses a feedback system to accelerate the switching speed, solving the problem of slow switching speed in traditional circuits. It also completely "copies" the input current at the current output terminal without introducing an additional switching resistor, thus solving the problem caused by the on-resistance of traditional circuits. As a result, this structure can be applied to fast and high-precision circuits.

[0083] In the several embodiments provided in this application, it should be understood that the disclosed methods can also be implemented in other ways. The method embodiments described above are merely illustrative.

[0084] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0085] Although the embodiments disclosed in this application are as described above, the above content is merely for the purpose of facilitating understanding of this application and is not intended to limit this application. Any person skilled in the art to which this application pertains may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in this application; however, the scope of patent protection of this application shall still be determined by the scope defined in the appended claims.

Claims

1. A current switching circuit, characterized in that, The circuit includes: Power supply, current input terminal, first current output terminal, second current output terminal, first current mirror unit, second current mirror unit, third current mirror unit, first feedback unit, second feedback unit, signal receiving unit; The third current mirror unit has its input terminal connected to the current input terminal and its output terminal connected to the input terminal of the signal receiving unit. The first output terminal of the signal receiving unit is connected to the input terminal of the first current mirror unit, and the second output terminal of the signal receiving unit is connected to the input terminal of the second current mirror unit. The output terminal of the first current mirror is connected to the first current output terminal, and the output terminal of the second current mirror is connected to the second current output terminal. The first feedback unit has its input terminal connected to the first current mirror unit and its output terminal connected to the second current mirror unit. The second feedback unit has its input terminal connected to the second current mirror unit and its output terminal connected to the first current mirror unit. The power supply is used to power the entire current switching circuit. The third current mirror unit includes: a first transistor and a second transistor; The signal receiving unit includes a third transistor and a fourth transistor; The first feedback unit includes a fifth transistor and a sixth transistor; The second feedback unit includes a seventh transistor and an eighth transistor; The second current mirror unit includes: a seventh transistor and a ninth transistor; The first current mirror unit includes: a fifth transistor and a tenth transistor; The current input terminal is connected to the drain and gate of the first transistor, the source of the first transistor is grounded, the gate of the second transistor is connected to the gate of the first transistor, the source of the second transistor is grounded, the drain of the second transistor is connected to the source of the third transistor and the source of the fourth transistor, the drain of the third transistor is connected to the gate of the tenth transistor, the drain of the fifth transistor, the gate of the sixth transistor and the drain of the seventh transistor, the drain of the fourth transistor is connected to the drain of the sixth transistor, the gate of the seventh transistor, the drain of the eighth transistor and the gate of the ninth transistor, the drain of the tenth transistor is connected to the first current output terminal, the gate of the fifth transistor is connected to the gate of the sixth transistor, the gate of the eighth transistor is connected to the gate of the seventh transistor, the drain of the ninth transistor is connected to the second current output terminal, and the power supply is connected to the source of the tenth transistor, the source of the fifth transistor, the source of the sixth transistor, the source of the seventh transistor, the source of the eighth transistor and the source of the ninth transistor, and is used to power the entire current switching circuit. The control signal for switching the current is received by the gate S1 of the third transistor and the gate S1N of the fourth transistor. When the signal of input S1 is 0 and the signal of input S1N is 1, the third transistor is turned off and the fourth transistor is turned on. The input current flows through the fourth transistor through the third current mirror unit.

2. The circuit according to claim 1, characterized in that, The first transistor, the second transistor, the third transistor, and the fourth transistor are NMOS transistors; The fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor are PMOS transistors.

3. The circuit according to claim 2, characterized in that, The fifth transistor and the sixth transistor constitute a first feedback circuit, which is used to pull the potential of node J2 to a high level when the conduction at node J1 is detected.

4. The circuit according to claim 2, characterized in that, The seventh transistor and the eighth transistor constitute a second feedback circuit, which is used to pull the potential of node J1 to a high level when the conduction at node J2 is detected.

5. The circuit according to claim 2, characterized in that, The fifth transistor and the tenth transistor constitute a first current mirror circuit, which generates an equivalent current that is the same as the input current at the current input terminal, and outputs it from the first current output terminal.

6. The circuit according to claim 2, characterized in that, The seventh transistor and the ninth transistor constitute a second current mirror circuit, which generates an equivalent current that is the same as the input current at the current input terminal, and outputs it from the second current output terminal.

7. The circuit according to claim 1, characterized in that, The first transistor and the second transistor constitute a third current mirror circuit, which is used to generate an equivalent current that is the same as the input current at the current input terminal, and input it to the third transistor or the fourth transistor.

8. A control method, characterized in that, The method, applied to the current switching circuit according to any one of claims 1-7, comprises: Receive the first control signal; According to the first control signal, the input current at the current input terminal flows through the signal receiving unit and then flows out from the second current output terminal.

9. A control method, characterized in that, The method, applied to the current switching circuit according to any one of claims 1-7, comprises: Receive the second control signal; According to the second control signal, the input current at the current input terminal flows through the signal receiving unit and then flows out from the first current output terminal.

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