Semiconductor wafer evaluation method, semiconductor wafer sorting method, and device manufacturing method

Abstract

The present invention relates to an evaluation method, comprising the following steps: obtaining shape measurement data in the thickness direction of the entire surface of a mirror-polished wafer; performing first-order or second-order differentiation on the shape measurement data in the diameter direction of the wafer at points at a certain interval at a certain rotation angle to obtain a differential distribution, comparing the obtained differential distributions, and determining a slicing direction; performing first-order or second-order differentiation on the shape measurement data in the y direction at a certain interval at a certain interval in the x direction orthogonal to the determined slicing direction, i.e., the y direction, to obtain x-y grid data; in the y direction, according to the x-y grid data, obtaining the maximum differential value in the middle region including the center of the wafer, and the maximum differential values ​​of the upper end side region and the lower end side region that are further outward than the middle region; and judging whether there is a possibility of defects in the device manufacturing process according to each maximum differential value. Thus, a method for effectively evaluating the undulating shape caused by the slicing process is provided.

Description

Technical Field

[0001] The present invention relates to a semiconductor wafer evaluation method, a semiconductor wafer sorting method and a device manufacturing method. Background Art

[0002] Recently, in the CMP process of the device manufacturing process, there have been reports of residual film abnormalities caused by uneven film thickness after grinding. It is assumed that the main cause is the characteristic undulating shape generated in the ingot cutting direction of the wire saw during the slicing process of the wafer manufacturing process. When there is a characteristic undulating shape, the convex and concave parts of the wafer have a difference in grinding allowance, resulting in uneven film thickness after grinding.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Publication No. 2004-20286 Summary of the invention

[0006] 1. Technical issues to be resolved

[0007] In order to sort wafers with undulating shapes such as residual film anomalies during the device manufacturing process, it is necessary to determine the slicing direction of the wire saw, but this method has not yet been established. Therefore, sorting based on nanotopography has been attempted, but since nanotopography is limited to representing the tiny bumps and depressions on the entire surface of the wafer with a single value, it is impossible to determine the slicing direction.

[0008] In addition, although Patent Document 1 discloses a method for evaluating the surface shape using the differential shape of the entire surface of the wafer in the diameter direction, it is based on the viewpoint of making the shape quality of the wafer different from the existing SFQR, etc., and is intended to quantitatively evaluate the shape of the semiconductor wafer, especially the shape of the outer periphery of the wafer. It is unable to determine the slicing direction required to detect the characteristic undulating shape.

[0009] Therefore, it is necessary to develop a method that can effectively detect, evaluate, and further sort the characteristic undulating shape caused by the slicing process instead of the conventional evaluation of nanotopography or wafer shape.

[0010] The present invention is made to solve the above-mentioned problems, and its purpose is to provide a method for evaluating semiconductor wafers, which can determine the slice cutting direction with high accuracy and easily, and effectively detect and evaluate the characteristic undulating shape caused by the slicing process that affects the generation of defects in the device manufacturing process.

[0011] (II) Technical solution

[0012] The present invention is made to achieve the above-mentioned purpose, and provides an evaluation method for semiconductor wafers, which uses a mirror-polished wafer as a semiconductor wafer and includes the following steps: measuring the shape of the entire surface of the mirror-polished wafer in the thickness direction by a wafer shape measuring machine to obtain shape measurement data; performing the following steps over the entire surface of the mirror-polished wafer at regular rotation angle intervals: extracting shape measurement data in the diameter direction from the shape measurement data of the entire surface of the mirror-polished wafer, performing first-order or second-order differentiation on the extracted shape measurement data in the diameter direction at points at regular intervals to obtain a differential distribution of the shape measurement data in the diameter direction, and then comparing the differential distributions of all the obtained shape measurement data in the diameter direction, and determining the diameter direction of the differential distribution containing the maximum differential value as the slicing direction of the mirror-polished wafer; setting orthogonal coordinates with the determined slicing direction and a direction orthogonal to the determined slicing direction as coordinate axes, When the determined slice cutting direction is set as the y direction and the direction orthogonal to the determined slice cutting direction is set as the x direction, the shape measurement data in the y direction is differentiated in the first or second order at a certain interval in the x direction at a certain pitch to form an xy grid based on the certain interval in the x direction and the certain interval in the y direction, thereby obtaining xy grid data; in the y direction of the mirror-polished wafer, a middle region including the center of the mirror-polished wafer, and an upper end region and a lower end region which are further outward than the middle region are set, and the maximum differential value in the middle region of the mirror-polished wafer and the maximum differential values ​​in the upper end region and the lower end region of the mirror-polished wafer are calculated based on the obtained xy grid data; and based on the maximum differential values ​​of the middle region, the upper end region and the lower end region, it is judged whether there is a possibility of defects occurring in the device manufacturing process.

[0013] According to such a semiconductor wafer evaluation method, the slice cutting direction can be determined with high precision in a simple method, and the possibility of defects in the device manufacturing process caused by the influence of the characteristic undulating shape caused by the slicing process can be judged with high precision and simplicity based on the determined slice cutting direction.

[0014] In this case, the semiconductor wafer evaluation method may be configured as follows: the shape measurement data in the diameter direction is extracted and the differential distribution is obtained at a certain rotation angle of 0.5 to 10 degrees.

[0015] This makes it possible to determine the slicing direction of the mirror-polished wafer with higher accuracy and efficiency.

[0016] At this time, the evaluation method of the semiconductor wafer can be set as follows: the certain interval between the x direction and the y direction in the xy grid is set to 0.5 to 2 mm. In addition, the evaluation method of the semiconductor wafer can be set as follows: the certain interval between the y direction in the xy grid is set to 2 to 10 mm.

[0017] As a result, it is possible to more effectively and efficiently determine with high accuracy and simply whether or not there is a possibility of a defect occurring in the device manufacturing process.

[0018] In this case, the semiconductor wafer evaluation method may be configured as follows: a flatness shape measuring machine or a nano-topography measuring machine is used as the wafer shape measuring machine.

[0019] This makes it possible to obtain more accurate shape measurement data simply and at a high measurement speed.

[0020] In this case, the semiconductor wafer evaluation method may be set as follows: a defect in the device manufacturing process is set as a residual film abnormality.

[0021] This can prevent quality defects in the device manufacturing process and effectively suppress a reduction in yield due to residual film abnormalities.

[0022] In this case, the semiconductor wafer sorting method may be configured to sort the mirror-polished wafers determined by the semiconductor wafer evaluation method to have no possibility of defects as non-defective products.

[0023] As a result, wafers with a high possibility of defects can be eliminated, and thus the yield of the device manufacturing process can be improved.

[0024] In this case, the device manufacturing method may be configured as follows: a device is manufactured using the mirror-polished wafer that has been sorted as a non-defective product by the semiconductor wafer sorting method.

[0025] As a result, higher quality devices can be manufactured with a high yield.

[0026] (III) Beneficial effects

[0027] As described above, according to the semiconductor wafer evaluation method of the present invention, the slice cutting direction can be determined with high accuracy by a simple method, thereby making it possible to determine with high accuracy whether a defect has occurred in the device manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 Represents the differential distribution of shape measurement data in multiple diameter directions.

[0029] Figure 2 An explanatory diagram showing the direction of slicing by a wire saw.

[0030] Figure 3 The accompanying drawings are provided to illustrate the semiconductor wafer evaluation method according to the present invention.

[0031] Figure 4 The accompanying drawings are provided to illustrate the semiconductor wafer evaluation method according to the present invention.

[0032] Figure 5 The evaluation results of Examples and Comparative Examples are shown. DETAILED DESCRIPTION

[0033] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0034] As described above, a method for evaluating a semiconductor wafer has been sought that can easily determine the slicing direction with high accuracy and effectively detect and evaluate the characteristic undulation shape caused by the slicing process that affects the occurrence of defects in the device manufacturing process.

[0035] The inventors of this case have repeatedly studied the above-mentioned problems, and as a result, have discovered a semiconductor wafer evaluation method, by which a slicing cutting direction can be determined with high precision in a simple method, and whether or not defects in the device manufacturing process are caused by the influence of the characteristic undulating shape caused by the slicing process can be determined with high precision and simply based on the determined slicing cutting direction, thereby completing the present invention. In this semiconductor wafer evaluation method, a mirror-polished wafer is used as a semiconductor wafer, and the method includes the following steps: measuring the shape of the entire surface of the mirror-polished wafer in the thickness direction by a wafer shape measuring machine to obtain shape measurement data; performing the following steps over the entire surface of the mirror-polished wafer at regular rotation angle intervals: extracting shape measurement data in the diameter direction from the shape measurement data of the entire surface of the mirror-polished wafer, performing first-order or second-order differentiation of the extracted shape measurement data in the diameter direction at points at a certain interval to obtain a differential distribution of the shape measurement data in the diameter direction, and then comparing the differential distributions of all the obtained shape measurement data in the diameter direction, and determining the diameter direction of the differential distribution containing the maximum differential value as The mirror-polished wafer is sliced ​​in a direction; setting an orthogonal coordinate with the determined slice cutting direction and a direction perpendicular to the determined slice cutting direction as a coordinate axis, when the determined slice cutting direction is set as a y direction and the direction perpendicular to the determined slice cutting direction is set as an x ​​direction, performing first-order or second-order differentiation on the shape measurement data in the y direction at a certain interval in the x direction, forming an xy grid based on a certain interval in the x direction and a certain interval in the y direction, and obtaining xy grid data; In the y direction of the surface-ground wafer, a middle region including the center of the mirror-ground wafer, and an upper end region and a lower end region which are further outward than the middle region are set; the maximum differential value in the middle region of the mirror-ground wafer and the maximum differential values ​​in the upper end region and the lower end region of the mirror-ground wafer are calculated based on the obtained xy grid data; and based on the maximum differential values ​​of the middle region, the upper end region and the lower end region, it is judged whether there is a possibility of defects occurring in the device manufacturing process.

[0036] Hereinafter, description will be given with reference to the drawings.

[0037] As described above, in order to sort wafers with undulating shapes such as residual film anomalies in the device manufacturing process, it is first necessary to determine the slicing and cutting direction of the wire saw. The inventors of this case obtained the first-order or second-order differential distribution of the diameter direction in multiple directions for a wafer with a known slicing and cutting direction, and found that the diameter direction containing the maximum differential value is consistent with the cutting direction after investigation.

[0038] Figure 1This chart shows the results of comparing the differential distributions (here, second-order differential values) of shape measurement data in multiple diameter directions obtained over the entire in-plane area using a mirror-polished silicon wafer (PW) with a diameter of 300 mm. Figure 1 As shown, it can be seen that the diameter direction of the differential distribution with the maximum differential value (in Figure 1 In the example, it is marked as 85°) and the direction in which the slices are actually cut by the wire saw (refer to Figure 2 ) are consistent. By utilizing this, the slicing direction of the mirror-polished wafer can be determined with high accuracy and ease.

[0039] (Process of obtaining shape measurement data)

[0040] Figure 3 , Figure 4 It is a drawing for explaining the evaluation method of the semiconductor wafer of the present invention.

[0041] First, if Figure 3 As shown, the entire surface of the mirror-polished wafer is measured using a wafer shape measuring machine ( Figure 3 The shape in the thickness direction of (a)) is measured to obtain shape measurement data. The wafer shape measuring machine used at this time is not particularly limited as long as it can measure the shape in the thickness direction of the entire wafer surface, and a known wafer shape measuring machine can be used. In particular, it is preferred to use a flatness shape measuring machine or a nano-topography measuring machine. This is because it is possible to easily obtain high-precision shape measurement data. Thereafter, the shape measurement data obtained here is used for evaluation.

[0042] (Process for determining the slicing direction of mirror-polished wafers)

[0043] Next, determine the slicing direction of the mirror-polished wafer. Figure 3 As shown in (b) of FIG. 1 , the shape measurement data in the diameter direction is extracted from the shape measurement data of the entire surface obtained. Figure 3 As shown in (b), the angle reference (0°) is set, but as long as the slice cutting direction can be determined in the end, it is arbitrary to set the reference to any position. Then, the extracted shape measurement data in the diameter direction is set to perform first-order or second-order differentiation at points with a certain spacing, and the differential distribution of the shape measurement data in the diameter direction is obtained. At this time, the spacing of the points for differentiation is not particularly limited and can be set to 0.1 to 10 mm. In addition, when the lower limit value is, for example, greater than 2 mm, the influence of the noise component can be reduced. If it is within such a range, it can be evaluated with higher accuracy. In addition, the differential is preferably a second-order differential. The accuracy of evaluation and judgment can be made higher.

[0044] The differential distribution of the shape measurement data in the diameter direction is obtained over the entire surface of the mirror-polished wafer at a certain rotation angle. At this time, the rotation angle can be an angle pitch greater than 0°, but it is preferably a certain angle within the range of 0.5 to 10°, and more preferably 1 to 5°. If it is within this range, it can be evaluated with higher accuracy.

[0045] Next, the differential distributions of the shape measurement data in all the obtained diameter directions are compared, and then the diameter direction of the differential distribution including the maximum differential value can be determined as the slicing direction of the mirror-polished wafer.

[0046] (Step of obtaining xy grid data)

[0047] When the slicing direction of the mirror-polished wafer to be evaluated can be determined, such as Figure 4 As shown in (a), on the mirror-polished wafer, orthogonal coordinates are set with the determined slicing direction and the direction orthogonal to the slicing direction as the coordinate axes. Next, the shape measurement data is differentiated in the direction parallel to the slicing direction over the entire surface of the wafer to obtain a differential distribution in a single direction (slicing direction).

[0048] In more detail, when the slice cutting direction is set to the y direction and the direction orthogonal to the slice cutting direction is set to the x direction, the shape measurement data in the y direction is first-order or second-order differentiated at a certain interval in the x direction at a certain spacing, forming an xy grid composed of a certain interval in the x direction and a certain interval in the y direction, and obtaining xy grid data. The size of the xy grid can be arbitrarily set within the range of about 0.1mm to 10mm, the certain intervals in the x direction and the y direction are preferably in the range of 0.5 to 2mm, and the spacing of the points for differentiation in the y direction is preferably in the range of 2 to 10mm. If it is such a range, the accuracy of the evaluation can be made higher. In addition, in order to evaluate the differential distribution of the shape measurement data of the wafer with higher accuracy, the grid spacing in the x direction and the y direction is preferably smaller than the differential spacing, and is most preferably set to about 1mm. In addition, the calculation of the differential value is preferably performed by second-order differentiation. The accuracy of evaluation and judgment can be made higher.

[0049] (Process for judging whether there is a possibility of defects)

[0050] Then, if Figure 4As shown in (b), in the y direction of the mirror-polished wafer, a middle region including the center of the mirror-polished wafer, and an upper end region and a lower end region that are further outward than the middle region are set, and the maximum differential value in the middle region of the mirror-polished wafer and the maximum differential value in the upper end region and the lower end region of the mirror-polished wafer are obtained based on the obtained xy grid data. The reason for setting the middle region and the upper end region and the lower end region in this way is that the fluctuations in the middle period of cutting when the cutting length is long and the cutting is relatively stable are different with respect to the cutting start and end periods when the cutting length changes during slicing. Therefore, even if the differential value is the same, the influence on the residual film during the device manufacturing process, such as CMP, will be different depending on whether the differential value exists in the middle region of the wafer or in the upper end region and the lower end region. Compared with setting the specification uniquely for the grid data of the entire surface of the wafer, by dividing the region into the middle region corresponding to the cutting middle period, the upper end region and the lower end region corresponding to the cutting start and end periods, the judgment accuracy is improved. In addition, in the case of a wafer with a diameter of 300 mm, the middle region can be set as a region with a width of about 200 mm in the y direction (i.e., ±100 mm in the y direction based on the straight line in the x direction passing through the center of the wafer) centered on the straight line in the y direction passing through the center of the wafer. The upper end region and the lower end region are preferably set as regions other than the middle region, that is, regions from both ends of the wafer in the y direction (the ends of the wafer on the straight line in the y direction passing through the center of the wafer) to the inner side (y direction) of the wafer (refer to Figure 4 (b)).

[0051] Next, based on the maximum differential values ​​between the middle area and the upper and lower end areas, determine whether there is a possibility of defects in the device manufacturing process. As a judgment method at this time, it can be judged based on parameters such as whether the maximum differential value in each area is within the predetermined specification value, or whether the ratio (Error%) of all grid data in the entire wafer surface to the number of grid data exceeding a certain threshold (Threshold value) is within the predetermined specification value. As a defect in the device manufacturing process, it is preferred to use, for example, residual film anomalies in the CMP process of device manufacturing as an indicator. In addition, the specification value set in the parameter used in the judgment can be set to a value that can effectively perform sorting according to the required shape from the user.

[0052] (Process of sorting mirror-polished wafers into qualified products)

[0053] After determining whether there is a possibility of defects in the device manufacturing process of the mirror-polished wafer as described above, the mirror-polished wafers that are determined to have no possibility of defects can be effectively sorted as qualified products. In addition, by using the mirror-polished wafers sorted as qualified products to manufacture devices, defects in the device manufacturing process of the subsequent process, especially residual film defects in the CMP process, can be effectively suppressed. In addition, according to the evaluation method and sorting method of the semiconductor wafer of the present invention, in addition to the CMP process, wafers that may cause errors in the device pattern can also be sorted out in advance in the photolithography process and removed.

[0054] Example

[0055] Hereinafter, the present invention will be described in detail with reference to Examples, but the present invention is not limited thereto.

[0056] 44 silicon wafers (PW) with a diameter of 300 mm were prepared as mirror-polished wafers for evaluation in the embodiments and comparative examples. The silicon wafers were selected from silicon wafers consisting of multiple lots for the same user. In addition, the 44 wafers included wire saw broken wire products and non-broken wire products with different residual film abnormality generation rates in order to confirm the effect of the evaluation method for semiconductor wafers of the present invention. For such wafers, the specification judgment results generated by the nano-morphology processed by a single Gaussian filter (comparative example) and the specification judgment results of the maximum differential values ​​of the middle area, the upper end area and the lower end area of ​​the second-order differential value in the slicing cutting direction were compared (embodiment).

[0057] First, a flatness measuring machine (WaferSight series manufactured by KLA) was used as a wafer shape measuring machine to obtain shape measurement data in the thickness direction of all wafers. The Examples and Comparative Examples were evaluated using this shape measurement data.

[0058] (Comparative Example)

[0059] The semiconductor wafer is evaluated based on the nanotopography value, and the presence or absence of defects in the device manufacturing process is judged. Specifically, the shape measurement data in the thickness direction of the wafer obtained using the above-mentioned flatness measuring machine is filtered through a single Gaussian filter (25mm circular window) to obtain the nanotopography value. As a judgment condition for whether defects have occurred in the device manufacturing process, the nanotopography value = 38nm is set as the threshold, and the nanotopography value > 38nm is judged as the possibility of defects.

[0060] (Example)

[0061] According to the semiconductor wafer evaluation method of the present invention, the wafer slicing direction is determined, and the xy grid data is obtained, and the maximum differential values ​​of the middle area, the upper end area, and the lower end area of ​​the wafer are respectively calculated. Specifically, the shape measurement data of the wafer thickness direction obtained by the above-mentioned flatness measuring machine is used to perform a second-order differential on the shape distribution of the wafer in the diameter direction at a differential interval of 10 mm, and the differential distribution of the shape measurement data in the diameter direction is obtained. This process is performed on the entire surface of the wafer at a rotation angle of 1°, and the second-order differential distribution data of the entire surface is obtained. Then, among all the second-order differential distribution data, the diameter direction of the distribution containing the maximum differential value is determined as the slicing direction of the wafer.

[0062] The cutting direction determined in this way is set as the y direction of the xy orthogonal coordinate system, the direction orthogonal to the cutting direction is set as the x direction, the grid spacing between the x direction and the y direction is set to 1 mm, and the differential spacing in the y direction is set to 10 mm. The shape measurement data in the y direction is subjected to second-order differentiation at a certain interval to obtain xy grid data.

[0063] Afterwards, in the y direction set for the wafer, the range of ±100mm (equivalent to a diameter of 50mm to 250mm) based on the straight line in the x direction passing through the center of the wafer is taken as the middle area, and the range farther outward than the middle area is taken as the upper end side area and the lower end side area to calculate the maximum differential value of each area.

[0064] As a condition for determining whether there is a possibility of a defect occurring in the device manufacturing process, the maximum differential value in the middle region is 5 nm / mm. 2 , the maximum differential value of the upper end area and the lower end area = 8nm / mm 2 That is, the maximum differential value in the middle area > 5nm / mm 2 , the maximum differential value of the upper end area and the lower end area> 8nm / mm 2 In other words, only when the maximum differential value of the middle region is ≤ 5nm / mm at the same time, the defect is judged to be likely to occur. 2 , the maximum differential value of the upper end area and the lower end area ≤ 8nm / mm 2 , it is judged that there is no possibility of defects.

[0065] exist Figure 5 The evaluation results of Examples and Comparative Examples are shown in FIG. Figure 5 (a) shows the evaluation results of each wafer based on the nanotopography value of the comparative example. Figure 5 (b) and (c) are the evaluation results of the embodiment. Figure 5(b) represents the maximum differential value of the second-order differential distribution data in the middle area of ​​the wafer. Figure 5 (c) represents the maximum differential value of the second-order differential distribution data in the upper end side area and the lower end side area of ​​the wafer. Figure 5 (a) to (c) show the threshold values ​​used for the respective judgments.

[0066] In the comparative example, the judgment based on the nanomorphology is Figure 5 As shown in (a), among the total of 44 wafers, there were 6 wafers (non-broken wire products and samples with no residual film abnormalities) that were expected to be qualified but were judged to be unqualified due to excess judgment (hereinafter referred to as "excess judgment wafers"), and 12 wafers (non-broken wire products and samples with residual film abnormalities) that were expected to be unqualified but were judged to be qualified due to undersize judgment (hereinafter referred to as "undersize judgment" wafers). The excess judgment rate was 13.6% and the undersize judgment rate was 27.3%.

[0067] On the other hand, in the judgment of the embodiment, as shown in (b) and (c) of Figure 5, the number of excess judgment wafers was reduced to 2, and the number of undersized judgment wafers was reduced to 2, and the excess judgment rate and undersized judgment rate were both improved to 4.5%.

[0068] Thus, in the comparative example of evaluation and sorting based on nano-morphology, many wafers that were originally expected to be qualified but were judged as unqualified due to excess judgment or wafers that were expected to be unqualified but were judged as qualified due to undersize judgment were generated. In the evaluation and sorting performed by the evaluation method of the present invention, both the excess judgment and the undersize judgment were improved, and it was confirmed that wafers with undulating shapes can be sorted more effectively than the evaluation and sorting based on nano-morphology. Thus, it can be said that the evaluation method of the semiconductor wafer of the present invention for detecting undulating shapes can sort wafers that may form residual film abnormalities with higher accuracy than the existing evaluation method, i.e., evaluation and sorting based on nano-morphology.

[0069] The present invention is not limited to the above-described embodiments. The above-described embodiments are illustrative, and any scheme having substantially the same structure and achieving the same function and effect as the technical concept described in the claims of the present invention is included in the technical scope of the present invention.

Claims

1. A method for evaluating a semiconductor wafer, characterized in that: Using mirror-polished wafers as semiconductor wafers, and including the following processes: Measuring the shape of the entire surface of the mirror-polished wafer in the thickness direction by a wafer shape measuring machine to obtain shape measurement data; The following steps are performed over the entire surface of the mirror-polished wafer at regular rotation angle intervals: shape measurement data in a diameter direction are extracted from shape measurement data of the entire surface of the mirror-polished wafer; first-order or second-order differentiation is performed on the extracted shape measurement data in the diameter direction at points at regular intervals to obtain differential distribution of the shape measurement data in the diameter direction; then, all the obtained differential distributions of the shape measurement data in the diameter direction are compared, and the diameter direction of the differential distribution containing the maximum differential value is determined as the slicing direction of the mirror-polished wafer; Setting a determined slice cutting direction and a direction perpendicular to the determined slice cutting direction as orthogonal coordinates of coordinate axes, when the determined slice cutting direction is set as the y direction and the direction perpendicular to the determined slice cutting direction is set as the x direction, performing first-order or second-order differentiation of shape measurement data in the y direction at a certain interval in the x direction, forming an xy grid based on the certain intervals in the x direction and the certain intervals in the y direction, and obtaining xy grid data; In the y direction of the mirror-polished wafer, a middle region including the center of the mirror-polished wafer, and an upper end region and a lower end region which are further outward than the middle region are set, and a maximum differential value in the middle region of the mirror-polished wafer and a maximum differential value in the upper end region and the lower end region of the mirror-polished wafer are obtained based on the obtained xy grid data; as well as Whether or not there is a possibility of a defect occurring in a device manufacturing process is determined based on the maximum differential values ​​of the intermediate region and the upper end region and the lower end region.

2. The semiconductor wafer evaluation method according to claim 1, characterized in that: The extraction of the shape measurement data in the diameter direction and the acquisition of the differential distribution are performed at a certain rotation angle at intervals of 0.5 to 10 degrees.

3. The semiconductor wafer evaluation method according to claim 1, characterized in that: The certain intervals in the x direction and the y direction in the xy grid are set to 0.5 to 2 mm.

4. The semiconductor wafer evaluation method according to claim 2, characterized in that: The certain intervals in the x direction and the y direction in the xy grid are set to 0.5 to 2 mm.

5. The semiconductor wafer evaluation method according to claim 1, wherein: The constant pitch for differentiation in the y direction in the xy grid is set to 2 to 10 mm.

6. The semiconductor wafer evaluation method according to claim 2, characterized in that: The constant pitch for differentiation in the y direction in the xy grid is set to 2 to 10 mm.

7. The semiconductor wafer evaluation method according to claim 3, characterized in that: The constant pitch for differentiation in the y direction in the xy grid is set to 2 to 10 mm.

8. The semiconductor wafer evaluation method according to claim 4, characterized in that: The constant pitch for differentiation in the y direction in the xy grid is set to 2 to 10 mm.

9. The semiconductor wafer evaluation method according to claim 1, characterized in that: As the wafer shape measuring machine, a flatness shape measuring machine or a nano-shape shape measuring machine is used.

10. The semiconductor wafer evaluation method according to claim 1, characterized in that: The defect in the device manufacturing process is defined as residual film abnormality.

11. A method for sorting semiconductor wafers, characterized in that: It also has the following processes: The mirror-polished wafers judged by the semiconductor wafer evaluation method according to any one of claims 1 to 10 as having no possibility of occurrence of defects are sorted as non-defective products.

12. A method for manufacturing a device, characterized in that: Devices are manufactured using the mirror-polished wafers sorted as acceptable products by the semiconductor wafer sorting method according to claim 11.

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