Underfill film for semiconductor package and method of manufacturing semiconductor package using the same

By using a bottom filler film with a specific adhesive layer, the semiconductor packaging process is simplified, solving the space consumption and air gap problems in flip chip packaging, and improving the reliability and production efficiency of the package.

CN114664750BActive Publication Date: 2025-10-21DOOSAN CORP
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Patent Information

Application Number
CN202110982614.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-12-23
Filing Date
2021-08-25
Publication Date
2025-10-21
Estimated Expiration
2041-08-25

AI Technical Summary

Technical Problem

In existing flip chip packaging technology, the bottom filling process of resin filling leads to space consumption and air gaps or pores, which affect the reliability and production efficiency of the package. Furthermore, wafer-level packaging technology is difficult to simplify the semiconductor packaging process.

Method used

An underfill film comprising a substrate and an adhesive layer is used. The adhesive layer has a melt viscosity of 300 to 1000 Pa·s at 150 to 160°C and an initial temperature of 145 ± 5°C on a differential scanning calorimeter (DSC). This film is used for semiconductor packaging in a chip layout manner, simplifying chip transfer and bonding processes.

Benefits of technology

It automates the semiconductor packaging process, reduces material loss and downtime, improves production efficiency, and enhances the connection reliability of the package.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a bottom filling film for semiconductor package and a manufacturing method of semiconductor package using the same, and more particularly to a bottom filling film for semiconductor package and a manufacturing method of semiconductor package using the same, in which a bonding layer having a predetermined range of melt viscosity and onset temperature (Onset Temp.) is included, so that a packaging process is simplified, production efficiency is improved, and connection reliability of a package is improved. The bottom filling film for semiconductor package includes a substrate, and a bonding layer disposed on one side of the substrate, having a melt viscosity of 300 to 1000 Pa.s at 150 to 160℃, and an onset temperature of 145±5℃ on a differential scanning calorimeter (DSC).
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Description

Technical Field

[0001] The present invention relates to an underfill film for a semiconductor package and a method for manufacturing a semiconductor package using the same. Specifically, the present invention relates to an underfill film for a semiconductor package that utilizes a chip layout method to simplify the semiconductor chip transfer and bonding process, improve production efficiency, and improve the reliability of the package, and a method for manufacturing a semiconductor package using the same. Background Art

[0002] In recent years, as electronic devices have become smaller and more densely packed, a flip-chip package manufacturing method that can mount semiconductor elements in a minimal area has attracted attention.

[0003] When manufacturing flip-chip packages, underfill is placed between the semiconductor chip and the package substrate. The underfill not only protects the package structure from external influences such as mechanical shock and corrosion at the joints, but also improves the reliability of the package by minimizing stress caused by the difference in thermal expansion coefficients between the chip and the substrate.

[0004] This type of underfill is formed by filling the space between the semiconductor chip and the package substrate with liquid underfill resin using a device such as a needle after a solder reflow process, followed by curing. However, the liquid underfill resin filling process requires uniform underfill resin throughout the entire empty space between the semiconductor chip and the package substrate. Therefore, not only must there be sufficient space for the needle to move along the side of the semiconductor chip in a certain trajectory, but also sufficient space for its placement. This results in space consumption, hindering the miniaturization of flip-chip products. Furthermore, the liquid underfill resin filling process creates air gaps or voids in the underfill due to differences in the diffusion rate of the liquid underfill resin between the printed circuit board's circuit pattern and bonding pads, as well as the semiconductor chip's solder. These air gaps or voids not only reduce the underfill's performance but also contribute to long-term moisture penetration, reducing the reliability of the package.

[0005] On the other hand, in recent years, there has been an increasing interest in wafer-level package technology to cope with the trend of miniaturization of semiconductor components. Unlike the conventional method of packaging semiconductor chips cut from a wafer one by one, wafer-level package technology is a semiconductor packaging technology that completes the assembly of chips on the wafer before they are separated. If this semiconductor packaging technology is applied, the semiconductor assembly process such as wiring connection and plastic packaging will be shortened, thereby achieving cost reduction by simplifying the process.

[0006] Currently, semiconductor packaging involves separate steps for transferring semiconductor chips, bonding the transferred semiconductor chips to the package substrate, and reflowing at high temperatures. Consequently, there are limitations in streamlining the packaging process and improving production efficiency without compromising physical properties. Therefore, there is an urgent need to develop new bonding materials and semiconductor package manufacturing processes that can simplify the semiconductor packaging process and improve package reliability by utilizing wafer-level packaging technology. Summary of the Invention

[0007] Issues to be addressed

[0008] The inventors have recognized that by utilizing a chip placement method in which semiconductor chips are individually picked up and horizontally transferred to a support of a bonding device and then aligned at a predetermined position and then performing a reflow process, the semiconductor packaging process can be automated. Compared to existing technologies, this can reduce material loss and downtime, simplify the packaging process, and effectively improve production efficiency.

[0009] Therefore, the technical problem of the present invention is to provide an underfill film for a semiconductor package, which is suitable for a chip layout method that can simplify the transfer and bonding processes during semiconductor packaging and can improve connection reliability.

[0010] Furthermore, another technical problem of the present invention is to provide a method for manufacturing a semiconductor package, which utilizes the above-mentioned underfill film to simplify the lamination process and improve production efficiency while achieving excellent connection reliability.

[0011] Other objects and advantages of the present invention will be further clearly illustrated by the following detailed description of the invention and the scope of the claims.

[0012] Solutions to Problems

[0013] To achieve the above technical problems, the present invention provides an underfill film for a semiconductor package, comprising a substrate; and an adhesive layer disposed on one side of the substrate, having a melt viscosity of 300 to 1000 Pa.s at 150 to 160°C and an onset temperature (onset temperature) of 145±5°C on a differential scanning calorimeter (DSC).

[0014] According to an embodiment of the present invention, the underfill film may be used in a chip placement method, wherein the semiconductor chip attached with the adhesive layer is picked up and attached to a package substrate supported by a bonding stage.

[0015] According to one embodiment of the present invention, the initial temperature of the adhesive layer can be substantially the same as the preheating temperature (Ts) of the laminating station. Here, "substantially the same" means that the difference between the initial temperature of the adhesive layer and the preheating temperature (Ts) of the laminating station is 0°C or higher and 5°C or lower.

[0016] According to an embodiment of the present invention, the thickness of the adhesive layer may be in a range of 80 to 120% of the distance between the semiconductor chip and the package substrate.

[0017] According to one embodiment of the present invention, the peak temperature of the adhesive layer on a differential scanning calorimeter (DSC) is 165±5° C., and the difference between the onset temperature and the peak temperature may be 25±5° C.

[0018] According to one embodiment of the present invention, the above-mentioned adhesive layer can be a cured or semi-cured product of an adhesive resin composition, and the above-mentioned adhesive resin composition includes (a) an epoxy resin containing a liquid epoxy resin, a phenoxy resin and a multifunctional epoxy resin; (b) an anhydride-based curing agent; (c) a nitrogen (N)-containing heterocyclic compound; and (d) a filler.

[0019] According to one embodiment of the present invention, the mixing ratio of the multifunctional epoxy resin, the phenoxy resin, and the liquid epoxy resin may be 4:3 to 4:2 to 3 by weight.

[0020] According to one embodiment of the present invention, the content of the anhydride curing agent may be in a range of 0.3 to 1.0 anhydride equivalents based on 1 equivalent of the epoxy resin.

[0021] According to one embodiment of the present invention, based on 1 equivalent of the acid anhydride curing agent, the content of the nitrogen-containing heterocyclic compound may be greater than 0.005 equivalents and less than 0.02 equivalents.

[0022] In addition, the present invention provides a method for manufacturing a semiconductor package, which includes: (i) a step of attaching the adhesive layer of the above-mentioned bottom filling film to the bumps of a semiconductor chip having bumps; (ii) a step of picking up the bumps of the semiconductor chip to which the above-mentioned adhesive layer is attached and aligning them on the bonding pads of a package substrate supported on a bonding table; (iii) a step of placing the aligned semiconductor chip and the package substrate into a pressurized chamber oven; (iv) a step of melting the bumps of the above-mentioned semiconductor chip to connect the semiconductor chip to the package substrate; and (v) a step of curing the adhesive layer arranged between the semiconductor chip and the package substrate after the above-mentioned connection.

[0023] According to an embodiment of the present invention, the picking and alignment in step (ii) are implemented by chip layout.

[0024] According to an embodiment of the present invention, the lamination stage in step (ii) may be preheated to a set temperature (Ts) substantially the same as the starting temperature of the adhesive layer of the underfill film.

[0025] According to one embodiment of the present invention, the alignment between the bump and the bonding pad in the above step (ii) can be implemented by pressing at a bonding table temperature of 130 to 150° C., a placement machine head at room temperature (RT), 10 to 200 N, and 1 to 5 seconds.

[0026] According to one embodiment of the present invention, in the step (iv) above, after the step of melting the bumps, the void area ratio in the adhesive layer may be less than 1.0%.

[0027] According to one embodiment of the present invention, the curing temperature of the adhesive layer in step (v) may be in the range of 160 to 250°C.

[0028] Effects of the Invention

[0029] According to one embodiment of the present invention, by providing an adhesive layer with a melt viscosity and onset temperature adjusted to a predetermined range and employing a chip layout method, the semiconductor chip transfer and bonding processes are simplified and automated, thereby enabling mass production and improving package connection reliability.

[0030] Therefore, the underfill film of the present invention can be effectively used also in semiconductor devices and their manufacturing processes in the related art.

[0031] The effects of the present invention are not limited to the above-exemplified contents, and include more various effects in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 1 is a cross-sectional view showing the structure of an underfill film for a semiconductor package according to a first embodiment of the present invention.

[0033] Figure 2 1 is a cross-sectional view showing the structure of an underfill film for a semiconductor package according to a second embodiment of the present invention.

[0034] Figures 3 to 6 These are cross-sectional views for schematically illustrating each step of the method for manufacturing a semiconductor package of the present invention.

[0035] Figure 7 This is a top view photograph of a semiconductor package using the underfill film of Example 1.

[0036] Figure 8 This is a cross-sectional photograph of a semiconductor package using the underfill film of Example 1.

[0037] Explanation of symbols

[0038] 10A, 10B: bottom fill film

[0039] 11: Base material

[0040] 12: Adhesive layer

[0041] 13: Second substrate

[0042] 20: Semiconductor chips

[0043] 21: Bump

[0044] 30: Package substrate

[0045] 31: Fitting pad DETAILED DESCRIPTION

[0046] The present invention is described in detail below. The embodiments of the present invention are provided for a more complete description to those skilled in the art. The following embodiments can be modified into various other forms, and the scope of the present invention is not limited by the following embodiments. Throughout this specification, the same reference numerals refer to the same structures.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used in this specification may be used in accordance with the meanings commonly understood by those skilled in the art to which the present invention belongs. In addition, terms defined in commonly used dictionaries should not be interpreted ideally or excessively unless otherwise explicitly defined.

[0048] Furthermore, the sizes and thicknesses of various components shown in the drawings are arbitrarily illustrated for ease of explanation and are not intended to limit the present invention. The thicknesses of various layers and regions are exaggerated in the drawings to accurately illustrate them. Furthermore, the thicknesses of some layers and regions are exaggerated in the drawings for ease of explanation.

[0049] In addition, throughout the specification, when it is indicated that a certain part "includes" a certain constituent element, unless there is a special record to the contrary, its meaning is that it may further include other constituent elements, rather than excluding other constituent elements. In addition, throughout the specification, the meaning of "on..." includes not only the situation of being located above or below the object part, but also the situation of having other parts in between, and it is not located at the top based on the direction of gravity. In addition, in the specification of this application, the terms "first", "second", etc. do not indicate any order or importance, but are used to distinguish constituent elements from each other. In addition, when it is recorded that a certain constituent element is "coupled", "combined" or "connected" to another constituent element, it includes not only the situation that the constituent element is directly coupled, coupled or connected to the other constituent element, but also the situation that they are "coupled", "combined" or "connected" through other constituent elements existing between the constituent element and the other constituent element.

[0050] Throughout this specification, the term "top view" means viewing the target portion from above, and the term "cross section" means viewing the target portion vertically from the side.

[0051] <Underfill film for semiconductor package>

[0052] Figure 1 1 is a cross-sectional view schematically showing an underfill film for a semiconductor package according to a first embodiment of the present invention. Figure 2 This is a cross-sectional view schematically showing an underfill film for a semiconductor package according to a second embodiment of the present invention.

[0053] The underfill films 10A and 10B of the present invention are non-conductive adhesive films for relieving stress applied to the connection between the bumps of the semiconductor chip and the bonding pads of the package substrate during semiconductor packaging. Specifically, they have physical properties suitable for chip placement.

[0054] like Figure 1 and Figure 2 As shown, the bottom filling film 10A, 10B includes a substrate 11 and an adhesive layer 12 disposed on one side of the substrate. Optionally, another substrate (hereinafter referred to as "second substrate") 13 disposed on the other side of the adhesive layer may be further included (see Figure 2 ).

[0055] Below, refer to Figure 1 An underfill film 10A for a semiconductor package according to a first embodiment of the present invention will be described.

[0056] substrate

[0057] In the underfill film of the present invention, the base material 11 is a portion that supports the adhesive layer and protects the surface of the adhesive layer, and is peeled off and removed when the underfill film is used.

[0058] As the base material 11 , any plastic film generally known in the art and capable of being peeled can be used without limitation. Release paper can also be used.

[0059] As the non-limiting example of spendable plastic film, there are polyester films such as polyethylene terephthalate (PET), polybutylene terephthalate, polyethylene naphthalate, polyethylene film, polypropylene film, cellophane, diacetyl cellulose film, triacetyl cellulose film, acetyl cellulose butyrate film, polyvinyl chloride film, polyvinylidene chloride film, polyvinyl alcohol film, ethylene-vinyl acetate copolymer film, polystyrene film, polycarbonate film, polymethylpentene film, polysulfone film, polyetheretherketone film, polyethersulfone film, polyetherimide film, polyimide film, fluororesin film, polyamide film, acrylic resin film, norbornene resin film, cycloolefin resin film etc. Such plastic film can be transparent or translucent, or can be colored or not colored. As an example, substrate 11 can be polyethylene terephthalate (PET). As another example, substrate 11 can be polyimide (PI).

[0060] Such a plastic film may be provided with a release layer. The release layer facilitates separation of the substrate 11 from the adhesive layer 12 while maintaining the adhesive layer's shape and without damaging the adhesive layer. The release layer may be a generally used film-like release material.

[0061] The composition of the release agent used in the release layer is not particularly limited, and common release agent compositions known in the art can be used. As non-limiting examples, epoxy-based release agents, release agents composed of fluororesins, silicone-based release agents, alkyd resin-based release agents, water-soluble polymers, etc. can be cited. In addition, as needed, powdered fillers such as silicon, silicon dioxide, etc. can be included as components of the release layer. In this case, the powder filler in the form of particles can be mixed with two types of powder fillers. In this case, their average particle size can be appropriately selected considering the surface roughness formed. In addition, the thickness of the release layer can be appropriately adjusted within the usual range known in the art. In addition, the method for forming the release layer is not particularly limited, and known methods such as hot pressing, hot roller lamination, extrusion lamination, coating of a coating liquid, drying, etc. can be adopted.

[0062] The thickness of the substrate 11 is not particularly limited and can be adjusted within a typical range known in the art. For example, it can be approximately 25 to 150 μm, specifically approximately 30 to 100 μm, and more specifically approximately 30 to 50 μm. Furthermore, the release force of the substrate 11 is not particularly limited and can be, for example, approximately 1 to 500 gf / inch, specifically approximately 10 to 100 gf / inch.

[0063] Adhesive layer

[0064] In the bottom filling film of the present invention, the adhesive layer 12 is arranged on one surface of the substrate 11, which can adhere the semiconductor chip to the packaging substrate when the semiconductor chip and the packaging substrate are aligned during semiconductor packaging, and as an underfill, it can redistribute the stress and deformation generated by the difference in thermal expansion coefficient between the semiconductor chip and the packaging substrate.

[0065] The adhesive layer 12 of the present invention is in a semi-cured state and has a minimum melt viscosity of 1000 Pa.s or less at about 150 to 160°C. Such an adhesive layer 12 is arranged between a semiconductor chip with a bump and a package substrate with a bonding pad during packaging, and is pressed together under the conditions of a bonding table temperature of 130 to 150°C, a die bonder head at room temperature, 10 to 200N, and 1 to 5 seconds. At this time, the bonding table and the die bonder head in the die bonder that actually perform the bonding are applied at a predetermined temperature, while the die bonder head is at room temperature. Therefore, this is different from the prior art that used a die bonder that had to apply a high temperature.

[0066] Specifically, the adhesive layer 12 of the present invention has a minimum melt viscosity of approximately 1000 Pa.s or less at approximately 150 to 160°C, specifically 100 to 900 Pa.s, and more specifically approximately 300 to 600 Pa.s. Therefore, it easily melts and exhibits fluidity even during compression bonding under predetermined conditions (e.g., approximately 150°C, 75 to 200 N, and 1 to 3 seconds). Therefore, when pre-bonding the bumps of the semiconductor chip to the bonding pads of the package substrate, the adhesive layer 12 located between the bumps of the semiconductor chip and the bonding pads of the package substrate easily melts and fills the void space between the bumps and the bonding pads, thereby improving connection reliability. In particular, due to the high fluidity of the adhesive layer 12, it can also fill tiny void spaces with fine pitches.

[0067] Furthermore, the adhesive layer 12 of the present invention not only acts as an underfill but also as a flux. Unlike conventional methods, this eliminates the need for applying a separate flux or washing flux to the bonding pads. Consequently, voids caused by flux residue or residual flux washing solvents are eliminated. Thus, the adhesive layer of the present invention provides excellent gap-filling performance, minimizing void generation.

[0068] In particular, because the underfill film of the present invention utilizes a chip placement method in which a semiconductor chip with an adhesive layer attached is picked up, horizontally moved, aligned, and attached to a package substrate supported by a bonding stage, it is necessary to adjust the physical properties of the adhesive layer 12 to suit this method. For example, if the onset temperature (OnsetTemp.) of the adhesive layer 12 is controlled to be substantially the same as the preheat temperature (Ts) of the bonding stage, stable adhesion can be achieved even when a pressure bonding process, such as the pre-bonding process described below, is performed under predetermined conditions. This simplifies the semiconductor chip transfer and bonding processes, thereby improving production efficiency.

[0069] According to another specific example, the onset temperature (Onset Temperature) of the above-mentioned adhesive layer 12 on a differential scanning calorimeter (DSC) can be about 145±5°C, specifically 143 to 147°C. Here, the onset temperature is the starting point at which the adhesive layer 12 begins to partially solidify. Its specific meaning is that in order to act as a flux, the anhydride group of the acid dianhydride curing agent present in the semi-cured adhesive layer opens the ring to form a carboxyl group and undergoes a curing reaction. In this way, by accurately controlling the onset temperature (Onset Temp.) of the adhesive layer 12 that begins to solidify to be the same as the preheating temperature (Ts) of the bonding station for achieving package bonding, it can be suitable for the chip layout method.

[0070] Furthermore, the peak temperature of the adhesive layer 12 can be 165±5°C, and the temperature difference (ΔT) between the onset temperature and the peak temperature can be 25±5°C. Peak temperature refers to the highest peak temperature in the DSC chart. When the adhesive layer 12 has these onset and peak temperature characteristics, it not only ensures optimal physical properties depending on the chip layout, but also exhibits stable curing characteristics at high temperatures.

[0071] The thickness of the adhesive layer 12 is adjusted in consideration of the minimum melt viscosity of the adhesive layer, etc. For example, the thickness of the adhesive layer 12 may be 80 to 120% of the spacing between the semiconductor chip and the package substrate (eg, 100%).

[0072] The adhesive layer 12 of the present invention is not particularly limited in its components and composition, as long as it satisfies the aforementioned melt viscosity (MV) and onset temperature (Onset Temp.) physical properties. Such an adhesive layer 12 can be composed of a cured or semi-cured adhesive resin composition. Specific examples of such adhesive resin compositions include (a) an epoxy resin comprising a liquid epoxy resin, a phenoxy resin, and a multifunctional epoxy resin, (b) an acid anhydride curing agent, (c) a nitrogen (N)-containing heterocyclic compound, and (d) a filler.

[0073] More specifically, in the present invention, as the main resin component constituting the adhesive layer 12 , at least three types including a liquid epoxy resin, a phenoxy resin, and a multifunctional epoxy resin are mixed and used, and their mixing ratio is adjusted to a predetermined range.

[0074] Among the at least three epoxy resins, the liquid epoxy resin is a thermosetting resin that is liquid at 25±5° C. Such a liquid epoxy resin can impart adhesion and curability to the adhesive resin composition and can impart uniform curing to the cured adhesive layer.

[0075] Non-limiting examples of usable liquid epoxy resins include liquid bisphenol A epoxy resin, liquid bisphenol F epoxy resin, liquid naphthalene epoxy resin, liquid aminophenol epoxy resin, liquid hydrogenated bisphenol epoxy resin, liquid alicyclic epoxy resin, liquid alcohol ether epoxy resin, liquid cycloaliphatic epoxy resin, liquid fluorene epoxy resin, and liquid silicone epoxy resin. Among them, liquid bisphenol A epoxy resin, liquid bisphenol F epoxy resin, and liquid naphthalene epoxy resin are particularly suitable from the perspectives of adhesion, curability, durability, and heat resistance. These can be used alone or in combination of two or more. Specifically, as liquid epoxy resin products, there are bisphenol F-type epoxy resin (product name: YDF8170) manufactured by Nippon Steel Chemical, bisphenol A-type epoxy resin (product name: EXA-850CRP) manufactured by DIC, bisphenol F-type epoxy resin (product name: YDF870GS) manufactured by Nippon Steel Chemical, naphthalene-type epoxy resin (product name: HP4032D) manufactured by DIC, aminophenol-type epoxy resin (grades: JER630, JER630LSD) manufactured by Mitsubishi Chemical, siloxane-based epoxy resin (product name: TSL9906) manufactured by Momentive High-Tech, 1,4-cyclohexanedimethanol diglycidyl ether (product name: ZX1658GS) manufactured by Nippon Steel Chemical Co., Ltd., but are not limited to these.

[0076] Phenoxy resin is a thermoplastic polymer containing an epoxy group at at least one terminal end. The epoxy group in the molecule has a very small equivalent weight compared to the molecular weight, so while it participates in curing, it also imparts fluidity at high temperatures. This phenoxy resin allows the adhesive layer of the present invention to be formed into a film shape in a semi-cured (B-stage) state at room temperature (approximately 25±5°C).

[0077] The phenoxy resin that can be used is not particularly limited as long as it is a polymer containing a phenoxy group in the polymer chain and an epoxy group at at least one terminal.

[0078] For example, the phenoxy resin may be a compound represented by the following Chemical Formula 1, but is not particularly limited thereto.

[0079] [Chemical Formula 1]

[0080]

[0081] In the above chemical formula 1,

[0082] a and b are integers from 1 to 4,

[0083] Multiple R1 and multiple R2 are the same or different from each other, and are independently selected from hydrogen, halogen, C1-C 10 Alkyl, C3~C 20 Cycloalkyl, C5~C 20The group consisting of aryl and nitro, specifically, each independently selected from hydrogen, halogen, C1 to C5 alkyl, C3 to C 10 Cycloalkyl, C5~C 10 A group consisting of an aryl group and a nitro group;

[0084] R3 to R8 are the same as or different from each other and are independently hydrogen or hydroxy, wherein at least one of R3 to R8 is hydroxy;

[0085] X1 is a single bond or C1~C 10 The alkylene group is specifically a single bond or a C1 to C5 alkylene group,

[0086] Y1 and Y2 are the same as or different from each other and are independently hydrogen, hydroxyl or epoxy, wherein at least one of Y1 and Y2 is epoxy,

[0087] n is an integer from 30 to 400.

[0088] The multifunctional epoxy resin is an epoxy resin containing at least two epoxy groups. Such a multifunctional epoxy resin imparts electrical insulation, heat resistance, chemical stability, strength (toughness), and moldability to the adhesive layer.

[0089] The usable multifunctional epoxy resin is not particularly limited as long as it contains two or more, specifically 2 to 5 epoxy groups per molecule (monomer). Non-limiting examples of multifunctional epoxy resins include epoxy resins obtained by epoxidizing a condensate of phenol or an alkylphenol with hydroxybenzaldehyde, phenol novolac epoxy resins, cresol novolac epoxy resins, phenol aralkyl epoxy resins, biphenyl epoxy resins, bisphenol A epoxy resins, bisphenol F epoxy resins, linear aliphatic epoxy resins, alicyclic epoxy resins, heterocyclic epoxy resins, spiro ring-containing epoxy resins, XYLOK epoxy resins, multifunctional epoxy resins, phenol novolac epoxy resins, bisphenol A / bisphenol F / bisphenol AD ​​novolac epoxy resins, bisphenol A / bisphenol F / bisphenol AD ​​glycidyl ether epoxy resins, bishydroxybiphenyl epoxy resins, dicyclopentadiene epoxy resins, and naphthalene epoxy resins. Among these, multifunctional epoxy resins that are non-liquid at 25±5°C are preferred. Here, the term "non-liquid at 25±5°C" refers to epoxy resins that are semi-solid or solid at 25±5°C, and also includes epoxy resins that are close to solid.

[0090] The content ratio of at least three epoxy resins constituting the above-mentioned adhesive layer 12, such as liquid epoxy resin, phenoxy resin and multifunctional epoxy resin, is preferably adjusted to a predetermined range in consideration of adhesion and filling properties. For example, the usage ratio (mixing ratio) of the multifunctional epoxy resin, phenoxy resin and liquid epoxy resin can be 4:3 to 4:2 to 3 by weight, specifically 4:3 to 3.5:2 to 2.5 by weight. When the above-mentioned epoxy resin mixing ratio is met, by controlling the minimum melt viscosity and the starting temperature (Onset Temp.) of the beginning of solidification to a predetermined range, the connection reliability of the package can be ensured by improving adhesion and filling properties, and since it is suitable for the chip layout method, the production efficiency can be improved by simplifying the semiconductor chip transfer and bonding process.

[0091] The adhesive resin composition constituting the adhesive layer 12 of the present invention contains an acid anhydride curing agent. The acid anhydride curing agent can cure at least one of liquid epoxy resin, phenoxy resin, and multifunctional epoxy resin, and can exhibit flux properties.

[0092] Non-limiting examples of usable acid anhydride curing agents include tetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, hexahydrophthalic anhydride, trialkyltetrahydrophthalic anhydride, methylcyclohexene dicarboxylic anhydride, phthalic anhydride, maleic anhydride, pyromellitic anhydride, etc., which can be used alone or in combination of two or more.

[0093] The content of the anhydride curing agent is not particularly limited and can be appropriately adjusted within a range known in the art. For example, based on 1 equivalent of the epoxy resin, the content of the anhydride curing agent can be in the range of 0.3 to 1.0 anhydride equivalents, specifically 0.4 to 0.7 equivalents.

[0094] In addition to the above-mentioned acid anhydride curing agents, the adhesive resin composition of the present invention may further contain one or more curing agents known in the art as components for curing epoxy resins. For example, there are aromatic amine curing agents such as m-phenylenediamine, diaminodiphenylmethane, and diaminodiphenylsulfone; aliphatic amine curing agents such as diethylenetriamine and triethylenetetramine; phenolic curing agents such as phenol aralkyl-type phenolic resins, phenol novolac-type phenolic resins, XYLOK-type phenolic resins, cresol novolac-type phenolic resins, naphthol-type phenolic resins, terpene-type phenolic resins, multifunctional phenolic resins, dicyclopentadiene-type phenolic resins, naphthalene-type phenolic resins, and novolac-type phenolic resins synthesized from bisphenol A and resol resins; and latent curing agents such as dicyandiamide. These curing agents may be used alone or in combination of two or more.

[0095] The adhesive resin composition constituting the adhesive layer 12 of the present invention contains a nitrogen (N)-containing heterocyclic compound. The N-containing heterocyclic compound is a curing catalyst that accelerates curing, thereby regulating the curing rate and ensuring the high-temperature stability of the adhesive layer.

[0096] Such a nitrogen (N)-containing heterocyclic compound may be one or more selected from the group consisting of a compound represented by the following Chemical Formula 2 and a compound represented by the following Chemical Formula 3.

[0097] [Chemical Formula 2]

[0098]

[0099] [Chemical Formula 3]

[0100]

[0101] In the above chemical formulas 2 and 3,

[0102] n1 is 1 or 2,

[0103] n2 is an integer from 0 to 2,

[0104] X1 to X6 are the same as or different from each other and are each independently N or C(R1), wherein at least one of X1 to X6 is N,

[0105] Y1 to Y6 are the same as or different from each other and are each independently N(R2) or C(R3)(R4), wherein at least one of Y1 to Y6 is N(R2),

[0106] In this case, a plurality of C(R1)s are the same or different from each other, a plurality of N(R2)s are the same or different from each other, a plurality of C(R3)(R4)s are the same or different from each other,

[0107] R1, R2, R3 and R4 are each independently selected from hydrogen, deuterium (D), halogen, cyano, nitro, C1-C 20 Alkyl, C2~C 20 Alkenyl and C2~C 20 A group consisting of alkynyl groups.

[0108] Specifically, in the above Chemical Formula 2, 1 to 2 of X1 to X6 may be N, and the rest may be C(R1).

[0109] In addition, in the above Chemical Formula 3, one or two of Y1 to Y6 may be N(R2), and the rest may be C(R3)(R4).

[0110] In addition, in the above chemical formulas 2 and 3, R1, R2, R3 and R4 can be independently selected from hydrogen, deuterium (D), halogen, cyano, nitro, C1-C12 Alkyl, C2~C 12 Alkenyl and C2~C 12 A group consisting of alkynyl groups.

[0111] Examples of the compound represented by Chemical Formula 2 include, but are not limited to, pyrazine-based compounds, pyridine-based compounds, and imidazole-based compounds. Specifically, a non-limiting example of the compound represented by Chemical Formula 2 is the compound represented by the following Chemical Formula 2a.

[0112] [Chemical Formula 2a]

[0113]

[0114] Examples of the compound represented by Chemical Formula 3 include, but are not limited to, piperazine-based compounds. Specifically, non-limiting examples of the compound represented by Chemical Formula 3 include the compound represented by the following Chemical Formula 3a and the compound represented by the following Chemical Formula 3b.

[0115] [Chemical Formula 3a]

[0116]

[0117] [Chemical Formula 3b]

[0118]

[0119] As an example, the N-containing heterocyclic compound may include one or more compounds selected from the group consisting of pyrazine-based compounds, pyridine-based compounds, and piperazine-based compounds.

[0120] In the adhesive resin composition of the present invention, the content of the N-containing heterocyclic compound is preferably adjusted based on the type and content of the anhydride curing agent used. For example, the content of the nitrogen-containing heterocyclic compound can be 0.005 equivalents or more and less than 0.02 equivalents, specifically 0.01 to 0.015 equivalents, based on 1 equivalent of the anhydride curing agent.

[0121] The adhesive resin composition forming the adhesive layer 12 of the present invention contains a common filler known in the art. The filler can not only adjust the melt viscosity by exhibiting thixotropic properties, but also improve adhesion and reduce the thermal expansion coefficient.

[0122] Such fillers can be organic fillers or inorganic fillers. Specifically, inorganic fillers include metal components such as gold powder, silver powder, copper powder, and nickel powder; non-metal components such as aluminum oxide, iridium hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, silicon dioxide, boron nitride, titanium dioxide, glass, iron oxide, and ceramics; and organic fillers include, but are not limited to, carbon, rubber-based fillers, and polymer-based fillers. These can be used alone or in combination of two or more.

[0123] The shape and size of the filler are not particularly limited. For example, the filler may be square or spherical, and the average particle size may be in the range of approximately 10 to 100 nm. If the average particle size of the filler is within this range, the mechanical properties of the cured product can be further improved. As an example, the filler may be silica having an average particle size of approximately 10 to 100 nm.

[0124] The amount of such filler is not particularly limited. For example, it can be an amount equal to or greater than the total weight of the adhesive resin composition (e.g., based on solids content) to 100% by weight. Specifically, it can be approximately 10 to 50 parts by weight, and more specifically, 20 to 40 parts by weight, based on the total weight of the epoxy resin (e.g., 100 parts by weight). When the filler content is within this numerical range, an adhesive layer having a low coefficient of thermal expansion (CTE) is formed, thereby minimizing the difference in CTE between the substrate and the semiconductor element and minimizing warpage or cracking.

[0125] According to a specific example of the present invention, with respect to the adhesive resin composition forming the adhesive layer 12, based on the total weight of the above-mentioned composition (for example, 100 parts by weight), the content of the epoxy resin (that is, the overall content after the multifunctional epoxy resin, phenoxy resin and liquid epoxy resin are added together) can be in the range of about 40 to 60 weight % based on the total weight of the resin composition, the content of the anhydride curing agent can be in the range of about 10 to 20 weight % based on the total weight of the resin composition, and the content of the N-containing heterocyclic compound can be in the range of about 0.1 to 0.5 weight % based on the total weight of the resin composition. In addition, a solvent that satisfies the remainder of the total weight of the above-mentioned composition can be included. Here, the solvent is not particularly limited as long as it satisfies the remainder of 100 parts by weight of the above-mentioned composition, for example, it can be 30 to 60 parts by weight, specifically 30 to 50 parts by weight. At this time, the usage ratio (mixing ratio) between the multifunctional epoxy resin, phenoxy resin and liquid epoxy resin that constitute the overall epoxy resin can be 4:3 to 4:2 to 3 weight ratios.

[0126] The solvent is not particularly limited as long as it has excellent miscibility with the epoxy resin and can uniformly disperse or stably dissolve the epoxy resin. Examples of such solvents include water, organic solvents, and mixed solvents thereof. Non-limiting examples include alcohol solvents such as methyl alcohol, ethyl alcohol, isopropyl alcohol, and butyl alcohol; ether solvents such as methyl cellosolve, ethyl cellosolve, butyl cellosolve, propylene glycol monomethyl ether, propylene glycol monoethyl ether, and cellosolve acetate; ketone solvents such as methyl ethyl ketone, cyclohexanone, acetone, diacetone alcohol, and esters such as methyl acetate and ethyl acetate; ester solvents such as methyl acetate and ethyl acetate; halogenated hydrocarbon solvents such as chloroform, dichloromethane, and tetrachloroethane; and dimethyl sulfoxide, ethylene glycol, glycerol, sorbitol, formamide, N-methylformamide, N,N-dimethylformamide, acetamide, N-methylacetamide, N-dimethylacetamide, N,N-dimethylformamide, tetrahydrofuran, N-methyl-2-pyrrolidone, nitromethane, and acetonitrile. These may be used alone or in combination of two or more.

[0127] The adhesive layer 12 of the present invention, having the above-described composition, is not only easy to handle and exhibits excellent adhesive strength, but also exhibits a minimum melt viscosity of approximately 1000 Pa.s or less at temperatures between approximately 150°C and 160°C. This minimizes void formation and provides excellent fillability, thereby enhancing connection reliability. Furthermore, since the adhesive layer's onset temperature (Onset Temp.) is aligned with the preheating temperature (Ts) of the lamination stage, it is compatible with chip layout methods, enabling easy semiconductor packaging.

[0128] As long as the inherent characteristics of the above-mentioned adhesive layer are not damaged, the adhesive resin composition of the present invention can optionally further include common additives well known in the art according to the purpose of use and the use environment of the above-mentioned composition. For example, there are solvents such as acetone, methyl ethyl ketone, toluene, ethyl acetate, tackifiers, coupling agents, antistatic agents, adhesion enhancers, wettability enhancers, leveling enhancers, etc., but are not limited thereto. The content of such additives is not particularly limited and can be used according to the common scope known in the art. For example, based on the total amount of the above-mentioned resin combination, it can be about 0.01 to 10 weight %.

[0129] The adhesive resin composition can be produced by methods generally known in the art. For example, a liquid epoxy resin, a phenoxy resin, a multifunctional epoxy resin, an anhydride curing agent, an N-containing heterocyclic compound, a filler, and optional additives can be mixed and stirred at room temperature to a suitably elevated temperature using a mixing device such as a ball mill, a bead mill, a three-roll mill, a basket mill, a dyno mill, or a planetary mill to produce the adhesive resin composition.

[0130] The underfill film of the present invention can be produced by conventional methods known in the art. For example, the underfill film can be produced by diluting the adhesive resin composition obtained by the above method with an organic solvent capable of dilution as needed to an appropriate concentration for easy film production, applying the resulting composition onto a substrate, and drying the resulting composition.

[0131] The coating and drying method is not particularly limited as long as a coating film can be formed by bar coating, gravure coating, notch roll coating, reverse roll coating, roll knife coating, die coating, lip coating, or the like.

[0132] The underfill film of the present invention, constructed as described above, has a low minimum melt viscosity, minimizing voids during pre-lamination between the semiconductor chip and the package substrate. Its excellent fillability improves package connection reliability and allows for application at fine pitches. Furthermore, the chip layout method employed simplifies the semiconductor chip transfer and lamination processes, enabling mass reflow.

[0133] The following, Figure 2 An underfill film 10B according to a second embodiment of the present invention will be described.

[0134] like Figure 2 As shown, the bottom filling film 10B of the present invention may include a substrate (hereinafter referred to as "first substrate") 11; an adhesive layer 12 arranged on one side of the above-mentioned substrate; and another substrate (hereinafter referred to as "second substrate") 13 arranged on the other side of the above-mentioned adhesive layer 12.

[0135] The first base material 11 and the adhesive layer 12 that can be used in the present invention are the same as those described in the base material and the adhesive layer section of the first embodiment, and therefore their description is omitted.

[0136] In the present invention, the second base material 13 is a portion disposed on the other side of the adhesive layer 13 to support the adhesive layer and protect the surface of the adhesive layer. Since the second base material 13 is removable, it is removed by peeling when the film is used.

[0137] Such a second base material 13 may be the same as or different from the first base material. The description of the example of the second base material is the same as that described in the base material section of the first embodiment and is therefore omitted.

[0138] <Method for Manufacturing a Semiconductor Package>

[0139] Another embodiment of the present invention provides methods for manufacturing various semiconductor packages using the underfill films 10A and 10B.

[0140] In particular, the adhesive layer of the underfill films 10A and 10B not only has a minimum melt viscosity of approximately 1000 Pa.s or less at approximately 150-160°C, but also has an onset temperature (onset temp.) that is substantially the same as the preheating temperature of the bonding station. Therefore, even when pressure bonding (pre-bonding) is performed under predetermined conditions, the adhesive layer readily maintains fluidity, seamlessly filling the gap between the semiconductor chip and the package substrate. This improves the connection reliability of the semiconductor package. Therefore, the present invention utilizes the underfill film to simplify the semiconductor package manufacturing process, improve production efficiency, and manufacture a semiconductor package with excellent connection reliability.

[0141] In particular, conventional semiconductor packaging requires applying specific high temperatures and high pressures to the bonding stage and die bonder head, respectively, for bonding. In contrast, the present invention utilizes an underfill film adjusted to the aforementioned physical properties, enabling complete semiconductor packaging without applying additional high temperatures to the die bonder head. This simplifies the manufacturing process and reduces costs, improving productivity. Furthermore, since electrical connections are made with minimal gaps during the subsequent reflow process, the reliability of the package can be improved.

[0142] The following describes a method for manufacturing a semiconductor package according to one embodiment of the present invention. However, the semiconductor package is not limited to the following method and can be manufactured without limitation using conventional methods known in the art. The steps of each process can be modified or selectively combined as needed.

[0143] According to one embodiment of the manufacturing method of the above-mentioned semiconductor package, it may include: (i) a step of attaching the adhesive layer of the above-mentioned bottom filling film to the bumps of the semiconductor chip having bumps ("step S100"); (ii) a step of picking up the bumps of the semiconductor chip to which the above-mentioned adhesive layer is attached and aligning them on the bonding pads of the package substrate supported on the bonding table ("step S200"); (iii) a step of putting the aligned semiconductor chip and the package substrate into a pressurized chamber oven ("step S300"); (iv) a step of melting the bumps of the above-mentioned semiconductor chip to connect the semiconductor chip to the package substrate ("step S400"); and (v) a step of curing the adhesive layer arranged between the semiconductor chip and the package substrate after the above-mentioned connection ("step S500").

[0144] Below, refer to Figures 3 to 6 The manufacturing method of the semiconductor package of the present invention is divided into different process steps for description as follows.

[0145] (a) Step of placing an adhesive layer on a semiconductor chip

[0146] like Figure 3 As shown, the adhesive layer 12 of the underfill films 10A and 10B is placed on the bumps 21 of the semiconductor chip 20 having the bumps 21 (hereinafter referred to as "step S100").

[0147] Generally, terminals (pads) (not shown) for connecting internal electronic circuits to the outside are formed along the edge of the semiconductor chip 20 , and one or two rows of pads may be formed along the center of the chip as needed.

[0148] Each of the terminals of the semiconductor chip is provided with a bump 21. The bump serves as an external terminal for connecting the substrate and the semiconductor chip during packaging, and includes a solder bump or an Au bump.

[0149] In the present invention, Figure 3As shown, after the base materials 11 and 13 are separated from the bottom filling films 10A and 10B, only the adhesive layer 12 is arranged on the bump 21 side of the semiconductor chip. At this time, the semiconductor chip 20 with the bump 21 can be pressed and laminated on the adhesive layer 12 at a pressure of about 30 to 100N. In addition, if necessary, the semiconductor chip 20 can be pressed and laminated at a temperature lower than the onset temperature of the adhesive layer, such as 50 to 150°C. As a result, the adhesive layer is pressed and bonded to the bump of the semiconductor chip in a semi-cured state (B stage). At this time, the adhesive layer can not only play the role of bottom filling, but also play the role of flux. Therefore, unlike the past, the present invention does not need to use flux to wash the bump.

[0150] (b) Alignment step between semiconductor chip and substrate

[0151] The semiconductor chip 20 to which the adhesive layer 12 is pressure-bonded in the above-mentioned step S100 is aligned on the package substrate 30 (hereinafter referred to as “step S200 ”).

[0152] Specifically, in the present invention, a chip placement method is applied as a process of transferring a semiconductor chip and aligning and attaching the transferred semiconductor chip to a package substrate supported by a bonding stage.

[0153] At this time, the lamination table on which the package substrate is placed is preferably preheated to a set temperature (Ts) substantially equal to the onset temperature (Temp.) of the adhesive layer of the underfill film. For example, the preheating temperature (Ts) of the lamination table can be 145±5°C.

[0154] The package substrate 30 supported by the bonding stage can be any conventional substrate known in the art. For example, a substrate having a circuit pattern (not shown) formed on at least one side thereof, such as a printed circuit board (PCB), can be used. Such a package substrate 30 has bonding pads 31 formed in areas corresponding to the locations of the bumps 21 of the semiconductor chip 20.

[0155] In the present invention, Figure 4As shown, semiconductor chips 20 are mounted on package substrate 30, with bumps 21 formed on the semiconductor chips 20 arranged on bonding pads 31. Specifically, the bumps 21 of the semiconductor chips 20 are pressed against the bonding pads 31 of the package substrate 30 under conditions of a bonding stage temperature of approximately 130-150°C, a die bonding machine head at room temperature (RT), a force of 10-200 N, and 1-5 seconds, thereby pre-bonding the package substrate 30 and the semiconductor chips 20. At this time, the adhesive layer 12 disposed between the semiconductor chips 20 and the package substrate 30 flows due to its low minimum melt viscosity, as described above.

[0156] On the other hand, in the present invention, the adhesive layer 12 contains a component that can function as a flux. Therefore, unlike conventional methods, it is not necessary to apply flux to the bonding pads 31 of the package substrate 30 before step S200. Therefore, in the present invention, the flux application and flux cleaning steps for the bonding pads can be omitted.

[0157] (c) Void Removal Step

[0158] The semiconductor chip and the package substrate aligned in step S200 are placed in a pressure chamber oven (PCO) under predetermined conditions (hereinafter referred to as "step S300").

[0159] The conditions of the pressurized oven are not particularly limited. For example, voids can be removed in an oven at a temperature of about 100 to 200° C., specifically about 110 to 150° C.

[0160] (d) Bump Melting Step

[0161] like Figure 5 As shown, the bumps 21 of the semiconductor chip 20 are melted to electrically and mechanically connect the semiconductor chip 20 and the package substrate 30 (hereinafter referred to as "step S400").

[0162] In the step of reflowing the bumps, the bumps are melted to electrically and mechanically connect the semiconductor chip 20 and the package substrate 30 .

[0163] At this time, the adhesive layer 12 disposed between the semiconductor chip 20 and the package substrate 30 also melts, so that the void area ratio in the adhesive layer becomes smaller. For example, after the reflow process, the void area ratio in the adhesive layer 12 is 2 This can be less than 1%. Thus, the connection reliability of the semiconductor package manufactured according to the present invention can be further improved.

[0164] (e) Adhesive layer curing step

[0165] like Figure 6 As shown, the adhesive layer 12 disposed between the semiconductor chip 20 and the package substrate 30 connected in the above-mentioned step S300 is cured (hereinafter referred to as "step S500").

[0166] The adhesive layer 12 of the present invention has an initial temperature of about 145±5°C, so step S400 can be performed at a temperature higher than the initial temperature, such as above about 160°C, specifically 160 to 250°C.

[0167] The curing time of the adhesive layer can be appropriately adjusted according to the curing temperature, and can be, for example, about 0.5 to 3 hours.

[0168] Then, as needed, subsequent processes known in the art may be performed. For example, the package substrate may be cut into unit substrates for singulation. In this case, the process of completely cutting the package substrate in the form of a printed circuit board into package units can be performed using conventional processes known in the art, such as saw blades or laser cutting.

[0169] Hereinafter, the present invention will be described in detail with reference to Examples. However, the following Examples and Experimental Examples are merely examples of one embodiment of the present invention, and the scope of the present invention is not limited to the following Examples and Experimental Examples.

[0170] [Example 1]

[0171] 1-1. Production of Adhesive Resin Composition

[0172] The adhesive resin composition of Example 1 was prepared by mixing the components according to the composition listed in Table 1 below. The content of each component listed in Table 1 is in parts by weight (weight ratio). Specifically, the filler content is based on 100 parts by weight of the epoxy resin. Furthermore, the curing agent content is based on 1 equivalent of epoxy groups, and the catalyst content is based on 1 equivalent of the curing agent used.

[0173] 1-2. Manufacturing of Underfill Film

[0174] Each adhesive resin composition prepared in Example 1-1 was die-coated on one surface of a PET release film (thickness: 38 μm), and then dried to form an adhesive layer (thickness: 18 μm), thereby producing a non-conductive adhesive film.

[0175] [Table 1]

[0176]

[0177] [Experimental Example 1: Physical Property Evaluation]

[0178] The physical properties of the underfill film produced in Example 1 were measured as follows, and the measurement results are shown in Table 1 above.

[0179] 1) Onset Temperature

[0180] The onset temperature of the adhesive layer of the underfill film was measured using a differential scanning calorimetry (DSC).

[0181] 2) Melt Viscosity

[0182] The viscosity of the adhesive layer of the underfill film was measured while the temperature was increased from 50° C. to 300° C. at a rate of 10° C. per minute using a rheometer.

[0183] [Experimental Example 2: Packaging Evaluation]

[0184] After semiconductor packaging was performed according to a chip layout method using the underfill film produced in Example 1, the bonded cross-sections after packaging were evaluated.

[0185] Figure 7 This is a top-down photograph of the adhesive layer after pre-bonding of the semiconductor chip's bumps to the package substrate's bonding pads and placement in a pressurized chamber oven (PCO). It can be seen that the void area within the adhesive layer decreases dramatically after PCO.

[0186] also, Figure 8 This is a cross-sectional photograph of the underfill film after the adhesive layer has been cured following the reflow process.

[0187] The experimental results confirm that the underfill film of the present invention can stably bond the bumps of the semiconductor chip and the bonding pads of the package substrate not only after curing but also in the pre-bonded state (see the following Figure 8 ).

Claims

1. An underfill film for a semiconductor package, comprising: substrate; and An adhesive layer is disposed on one side of the substrate, has a melt viscosity of 300 to 1000 Pa.s at 150 to 160° C., and an onset temperature of 145±5° C. on a differential scanning calorimeter (DSC). The bottom filling film is used in a chip layout method, wherein the semiconductor chip with the adhesive layer attached thereto is picked up and attached to a package substrate supported by a bonding stage. The picked-up semiconductor chip is attached to the package substrate under the conditions of a preheating temperature Ts of the bonding stage substantially equal to the starting temperature of the adhesive layer and a placement head at room temperature. The adhesive layer is a cured or semi-cured adhesive resin composition, wherein the adhesive resin composition comprises: (a) at least three epoxy resins including a liquid epoxy resin, a phenoxy resin, and a multifunctional epoxy resin; (b) an acid anhydride curing agent; (c) a nitrogen-containing heterocyclic compound; and (d) a filler. The mixing ratio of the multifunctional epoxy resin, the phenoxy resin and the liquid epoxy resin is 4:3 to 4:2 to 3 by weight. 2 . The underfill film for a semiconductor package according to claim 1 , wherein a thickness of the adhesive layer is in a range of 80 to 120% of a distance between the semiconductor chip and the package substrate.

3. The underfill film for a semiconductor package according to claim 1, The peak temperature of the adhesive layer on the differential scanning calorimeter DSC is 165±5°C, The difference between the onset temperature and the peak apex temperature is 25±5°C. 4 . The underfill film for a semiconductor package according to claim 1 , wherein the content of the anhydride curing agent is in a range of 0.3 to 1.0 anhydride equivalents based on 1 equivalent of the epoxy resin. 5 . The underfill film for a semiconductor package according to claim 1 , wherein the content of the nitrogen-containing heterocyclic compound is 0.005 equivalents or more and less than 0.02 equivalents based on 1 equivalent of the acid anhydride-based curing agent.

6. A method for manufacturing a semiconductor package, comprising: (i) a step of attaching an adhesive layer of the underfill film according to any one of claims 1 to 5 to the bumps of a semiconductor chip having bumps; (ii) picking up the bumps of the semiconductor chip to which the adhesive layer is attached and aligning them on bonding pads of a package substrate supported on a bonding stage; (iii) placing the aligned semiconductor chip and package substrate into a pressurized oven; (iv) melting the bumps of the semiconductor chip to connect the semiconductor chip to the package substrate; as well as (v) curing the adhesive layer disposed between the connected semiconductor chip and the package substrate, The lamination stage in the step (ii) is preheated to a set temperature Ts that is substantially the same as the starting temperature of the adhesive layer of the underfill film. 7 . The method for manufacturing a semiconductor package according to claim 6 , wherein the picking up and aligning in step (ii) are performed by chip layout.

8. The method for manufacturing a semiconductor package according to claim 6, wherein the alignment between the bump and the bonding pad in step (ii) is implemented by pressing at a bonding table temperature of 130 to 150°C, a placement machine head at room temperature, 10 to 200 N, and 1 to 5 seconds. 9 . The method for manufacturing a semiconductor package according to claim 6 , wherein in the step (iv), after the step of melting the bumps, the void area ratio in the adhesive layer is 1.0% or less. 10 . The method for manufacturing a semiconductor package according to claim 6 , wherein the curing temperature of the adhesive layer in step (v) is in the range of 160 to 250° C.

Citation Information

Patent Citations

  • Adhesive film for joining semiconductor, and manufacturing method of semiconductor device

    JP2016201418A