Spin storage cell and memory

Abstract

The application provides a spin storage unit, comprising: a spin-orbit moment providing layer; a first bias layer formed on the spin-orbit moment providing layer; the first bias layer is used for providing a first bias magnetic field; a second bias layer formed on the first bias layer; the second bias layer is used for providing a second bias magnetic field; a magnetic tunnel junction stack structure formed on the second bias layer; the magnetization directions of a free layer and a reference layer of the magnetic tunnel junction stack structure are perpendicular to the magnetization directions of the first bias layer and the second bias layer. The application can make the bias magnetic field have two different states through the change of the magnetization direction of the first bias layer, and the bias magnetic fields in the two states are respectively used for reducing read-write power consumption and improving non-volatility of STT-MRAM.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more particularly to a spin memory cell and a memory. Background Technology

[0002] Spin-transmitted torque magnetoresistive random access memory (STT-MRAM) is a novel type of memory characterized by high speed, low power consumption, and non-volatility. However, current STT-MRAMs inherently face a challenge: balancing speed, power consumption, and non-volatility. Higher non-volatility in STT-MRAM results in longer data retention times and less interference during data reading, but simultaneously, it increases the flip-flop current required for writing and raises power consumption. Therefore, optimizing both power consumption and non-volatility simultaneously requires improving STT efficiency and reducing the damping factor.

[0003] In the process of realizing this invention, the inventors discovered that there are at least the following technical problems in the prior art: the power consumption and storage stability of the STT-MRAM in the prior art are difficult to balance. Summary of the Invention

[0004] The spin memory cell and memory provided by the present invention can make the bias magnetic field have two different states by changing the magnetization direction of the first bias layer. The bias magnetic field in the two states is used to reduce read and write power consumption and improve non-volatility of STT-MRAM, respectively.

[0005] In a first aspect, the present invention provides a spin memory cell, comprising:

[0006] Spin orbital moments provide layers;

[0007] A first bias layer is formed on the spin orbital moment providing layer; the first bias layer is used to provide a first bias magnetic field;

[0008] A second bias layer is formed on the first bias layer; the second bias layer is used to provide a second bias magnetic field;

[0009] A magnetic tunneling stacked structure is formed on the second bias layer;

[0010] The magnetization directions of the free layer and reference layer of the magnetic tunneling stacked structure are perpendicular to the magnetization directions of the first bias layer and the second bias layer.

[0011] Optionally, an isolation layer is further provided between the first bias layer and the second bias layer, the isolation layer being used to reduce the coupling strength between the first bias layer and the second bias layer.

[0012] Optionally, a coupling layer is further provided between the first bias layer and the second bias layer, the coupling layer being used to form ferromagnetic coupling or antiferromagnetic coupling between the first bias layer and the second bias layer.

[0013] Optionally, the tunneling stack structure further includes an insertion layer between itself and the second bias layer, the insertion layer being used to reduce the coupling between the free layer of the magnetic tunneling stack structure and the second bias layer.

[0014] Optionally, the number of magnetic tunneling stacked structures is one or more.

[0015] Optionally, the material of the spin orbital moment providing layer is a heavy metal or a topological insulator material, wherein the heavy metal includes one or more of W, Pt, Ta, Ir, Au, Cu or Cr.

[0016] Optionally, electrodes are formed on the magnetic tunneling stack structure, and the electrodes are electrically connected to a read / write current source. The electrodes are used to output read / write current to the magnetic tunneling stack structure.

[0017] Optionally, the first bias layer and the second bias layer are shaped to emphasize anisotropy.

[0018] Optionally, the materials of the first bias layer and the second bias layer are materials with in-plane uniaxial anisotropy.

[0019] In a second aspect, the present invention also provides a spin memory, comprising:

[0020] A memory cell array, comprising a plurality of spin memory cells as described in any one of the preceding claims;

[0021] A mode-switching current source is electrically connected to the spin-orbit moment of the plurality of spin memory cells, and the mode-switching current source is used to provide multiple currents to enable the first bias layer to switch between multiple states.

[0022] Optionally, it also includes a read / write monitoring circuit, which is controlled and connected to the mode switching current source. The read / write monitoring circuit is used to detect the read / write status of the multiple spin memory cells and control the output current of the mode switching current source according to the read / write status of the spin memory cells.

[0023] In the technical solution provided by this invention, a first bias layer and a second bias layer are used to provide a bias magnetic field. When the magnetization directions of the first bias layer and the second bias layer are parallel, the bias magnetic fields of the first bias layer and the second bias layer are superimposed, thereby producing a strong bias effect, which improves the flip-flop efficiency of the magnetic tunneling stack structure and helps to reduce read / write power consumption. When the magnetization directions of the first bias layer and the second bias layer are antiparallel, the bias magnetic fields of the first bias layer and the second bias layer cancel each other out, and the total bias magnetic field is close to 0. At this time, the magnetic tunneling stack structure can have good non-volatility. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of a spin memory cell according to an embodiment of the present invention;

[0025] Figure 2 for Figure 1 Top view;

[0026] Figure 3 This is a schematic diagram showing the first bias layer and the second bias layer of a spin memory cell in an embodiment of the present invention being antiparallel.

[0027] Figure 4 This is a schematic diagram showing the first bias layer and the second bias layer of a spin memory cell in an embodiment of the present invention being parallel.

[0028] Figure 5 This is a schematic diagram of adding an isolation layer between the first bias layer and the second bias layer of a spin memory cell according to an embodiment of the present invention;

[0029] Figure 6 This is a schematic diagram of adding a coupling layer between the first bias layer and the second bias layer of a spin memory cell according to an embodiment of the present invention;

[0030] Figure 7 This is a schematic diagram of a spin memory cell with multiple magnetic tunnel junction stacked on a bias layer according to an embodiment of the present invention;

[0031] Figure 8 This is a schematic diagram of a spin memory setting mode switching current source according to an embodiment of the present invention;

[0032] Figure 9 This is a schematic diagram of a spin memory setting mode switching circuit according to an embodiment of the present invention. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] This invention provides a spin memory cell, such as... Figure 1-2 As shown, it includes:

[0035] Spin orbital moment provides layer 100;

[0036] In some embodiments, the bottommost layer is a spin-orbit moment providing layer 100, used to generate a spin-orbit moment effect when current passes through it; typically, the spin-orbit moment providing layer 100 uses a heavy metal as the forming material. In a preferred embodiment, the material of the spin-orbit moment providing layer 100 is a heavy metal or a topological insulator material, wherein the heavy metal includes one or more of W, Pt, Ta, Ir, Au, Cu, or Cr.

[0037] A first bias layer 200 is formed on the spin orbital moment providing layer 100; the first bias layer 200 is used to provide a first bias magnetic field;

[0038] A second bias layer 300 is formed on the first bias layer 200; the second bias layer 300 is used to provide a second bias magnetic field;

[0039] In some embodiments, above the spin orbital moment layer are a magnetic bias layer 1 and a bias layer 2, the two bias layers being elliptical in shape, which can generate stray fields along the major axis of the ellipse to form a bias field.

[0040] A magnetic tunneling stacked structure is formed on the second bias layer 300;

[0041] In some embodiments, the magnetic tunnel junction (MTJ) stacked structure comprises, from bottom to top, a free layer 510, a barrier layer 520, and a fixed layer 530. Different magnetization methods between the free layer 510 and the fixed layer 530 allow for different resistances, thus enabling data recording. In some preferred embodiments, the MTJ stacked structure typically includes a free layer 510, a fixed layer 530 that is a magnetic layer composed of common magnetic materials used in MTJs, such as Co, Fe, Ni, and their alloys, and a barrier layer 520 composed of magnesium oxide, aluminum oxide, and other common barrier layer materials. The diameter of the MTJ can be less than, equal to, or greater than the short axis length of the bias layer.

[0042] The magnetization directions of the free layer 510 and the reference layer of the magnetic tunneling stacked structure are perpendicular to the magnetization directions of the first bias layer 200 and the second bias layer 300.

[0043] In this embodiment, an external magnetic field is first used to set the magnetization direction of the first bias layer 200 and the second bias layer 300 to horizontal to the left. When the current direction in the spin orbit moment providing layer 100 is in the direction of flowing into the paper (e.g. Figure 3 As shown, bias layer 1 is subjected to spin orbital moment, and its magnetization direction is horizontal to the right. The second bias layer 300 is not subjected to spin orbital moment, and its exchange interaction with the first bias layer 200 is weak, so it remains unchanged. At this time, for the free layer 510, the bias fields generated by the two bias layers are in opposite directions, and the superposition is small, which basically does not affect the magnetization direction and stability of the free layer 510. At this time, it is in "data saving mode". After the function is set, the electrode 600 and the spin orbital moment providing layer are used as two ports for reading current (mainly for reading function) to read the data of the free layer 510.

[0044] When the spin orbital moment provides current in layer 100 in the direction of outflow from the paper (e.g.) Figure 4 As shown), the first bias layer 200 is subjected to a spin orbital moment, and its magnetization direction is horizontally to the left. The magnetization direction of the second bias layer 300 remains unchanged, also horizontally to the left. At this time, for the free layer 510, the bias fields generated by the two bias layers are in the same direction. After superposition, the magnetization direction of the free layer 510 is tilted, as shown. Figure 4 As shown, the stability of the free layer 510 decreases, and the STT flip current decreases. At this time, it is in "low power mode", which is beneficial to reduce power consumption when writing data. After the function is set up, the electrode 600 and the spin orbital moment providing layer serve as two ports for read and write current (mainly for write function and read function in frequent read and write) to read and write data in the free layer 510.

[0045] In some alternative embodiments, an isolation layer 700 is further provided between the first bias layer 200 and the second bias layer 300, the isolation layer 700 being used to reduce the coupling strength between the first bias layer 200 and the second bias layer 300. For example... Figure 5As shown, an additional isolation layer 700 is added between the first bias layer 200 and the second bias layer 300. This reduces the exchange coupling between the bias layers, and the size of the bias field can be adjusted by changing the thickness of the isolation layer 700. In this embodiment, the isolation layer 700 reduces the coupling between the first bias layer 200 and the second bias layer 300, so the first bias layer 200 and the second bias layer 300 basically do not affect each other. Therefore, the technical solution in this embodiment finds a balance between data non-volatility and reduced read / write power consumption, achieving both good non-volatility and low read / write power consumption.

[0046] As an optional implementation, a coupling layer 800 is further provided between the first bias layer 200 and the second bias layer 300, the coupling layer 800 being used to form ferromagnetic coupling or antiferromagnetic coupling between the first bias layer 200 and the second bias layer 300. For example... Figure 6 As shown, a coupling layer 800 is disposed between the first bias layer 200 and the second bias layer 300. This coupling layer can provide ferromagnetic coupling, enhancing the ferromagnetic coupling between the two bias layers and making the bias layers more stable in "low power" mode. The coupling layer 800 can also provide antiferromagnetic coupling, enhancing the antiferromagnetic coupling between the two bias layers, thus making it more stable in "data retention" mode. The materials of the coupling layer 800 include common coupling layer materials such as Ru, Ir, Ta, Mo, and W, as well as their alloys.

[0047] As an optional implementation, continue as follows Figure 1 As shown, the tunneling stack structure also includes an insertion layer 400 between itself and the second bias layer 300. The insertion layer 400 reduces the coupling between the free layer 510 and the second bias layer 300. It primarily reduces the exchange coupling between the second bias layer 300 and the free layer 510, and can also reduce damage to the second bias layer 300 during processing. The insertion layer 400 is typically a dielectric material and a portion of a metal with weak coupling capabilities.

[0048] As an optional implementation, the number of magnetic tunneling stacked structures is one or more. For example... Figure 7 As shown, a large bias layer was fabricated, and multiple MTJs were fabricated on the same bias layer. This can reduce the process flow, process multiple devices at the same time, and realize block function switching by using the same bias layer.

[0049] As an optional implementation, an electrode 600 is formed on the magnetic tunneling junction stack structure. The electrode 600 is electrically connected to a read / write current source and is used to output read / write current to the magnetic tunneling junction stack structure. When the first bias layer 200 and the second bias layer 300 are antiparallel, the electrode 600 and the spin-orbit moment generation layer serve as two ports for the read current (primarily for read function) to read data from the free layer 510. When the first bias layer 200 and the second bias layer 300 are parallel, the electrode 600 and the spin-orbit moment generation layer serve as two ports for the read / write current (primarily for write function and read function in frequent read / write operations) to read and write data from the free layer 510.

[0050] As an optional implementation, the first bias layer 200 and the second bias layer 300 are shaped to emphasize anisotropy. For example, the bias layer can be elliptical, rectangular, or other shapes with emphasizing anisotropy. As another optional implementation, the bias layer is made of a material with in-plane uniaxial anisotropy. When the bias layer exhibits strong magnetocrystalline anisotropy, thus producing in-plane uniaxial anisotropy, the shape can also include a circle. The bias layer can be composed of common magnetic materials or materials such as ferrimagnetic insulators.

[0051] This invention also provides a spin memory, such as... Figure 8 As shown, it includes:

[0052] A memory cell array comprising a plurality of spin memory cells as described in any of the above;

[0053] The mode switching current source 910 is electrically connected to the spin orbit moment providing layer 100 of the plurality of spin memory cells. The mode switching current source 910 is used to provide multiple currents to enable the first bias layer 200 to switch between multiple states.

[0054] like Figure 8 As shown, the two columns of cells on the left (cells 930) require frequent writes, while the two columns of cells on the right (cells 920) do not require frequent writes. In this case, the circuit can preset them to a low-power mode. Similarly, when the two columns of cells on the right require frequent writes, the circuit can preset them to a low-power mode. Therefore, the circuit can be used to set the array to a low-power mode. For different applications, the same array can be preset to different modes as needed, providing a certain degree of flexibility.

[0055] As an optional implementation, a read / write monitoring circuit 940 is also included, which is controlled and connected to the mode switching current source 910. The read / write monitoring circuit 940 is used to detect the read / write status of the plurality of spin memory cells and control the output current of the mode switching current source 910 according to the read / write status of the spin memory cells. Figure 9 As shown, the implementation method is as follows: When application functions change, the initial array mode setting often does not match the array mode required by the application. At this time, the low-power, data-saving mode cells are not closely integrated with the application. A monitoring circuit 940 can be added to the external circuit to monitor the read / write status of each cell. When data writing is detected in a cell, the circuit controls the cell to be set to low-power mode (cell 920). The read / write status is then monitored. If a write process occurs within a certain storage time, the mode remains unchanged; otherwise, it switches to data-saving mode (cell 930). After a certain period, an "adaptive" array is formed, where the storage cell mode is more closely related to the actual application requirements, improving mode switching efficiency and effectively reducing power consumption.

[0056] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A spin memory cell, characterized in that, include: Spin orbital moments provide layers; A first bias layer is formed on the spin orbital moment providing layer; The first bias layer is used to provide a first bias magnetic field; A second bias layer is formed on the first bias layer; The second bias layer is used to provide a second bias magnetic field; A magnetic tunneling stacked structure is formed on the second bias layer; The magnetization directions of the free layer and the reference layer of the magnetic tunneling stacked structure are perpendicular to the magnetization directions of the first bias layer and the second bias layer; Specifically, when the magnetization directions of the first bias layer and the second bias layer are parallel, the bias magnetic fields of the first bias layer and the second bias layer are superimposed to improve the flipping efficiency of the magnetic tunneling stack structure; when the magnetization directions of the first bias layer and the second bias layer are antiparallel, the bias magnetic fields of the first bias layer and the second bias layer cancel each other out, and the total bias magnetic field is close to 0 to enhance the non-volatility of the magnetic tunneling stack structure.

2. The spin memory cell according to claim 1, characterized in that, An isolation layer is further provided between the first bias layer and the second bias layer, the isolation layer being used to reduce the coupling strength between the first bias layer and the second bias layer.

3. The spin memory cell according to claim 1, characterized in that, A coupling layer is further provided between the first bias layer and the second bias layer, the coupling layer being used to form ferromagnetic coupling or antiferromagnetic coupling between the first bias layer and the second bias layer.

4. The spin memory cell according to claim 1, characterized in that, An insertion layer is also provided between the magnetic tunneling stack structure and the second bias layer. The insertion layer is used to reduce the coupling between the free layer of the magnetic tunneling stack structure and the second bias layer.

5. The spin memory cell according to claim 1, characterized in that, The number of magnetic tunnel stacked structures is one or more.

6. The spin memory cell according to claim 1, characterized in that, The material of the spin orbital moment providing layer is a heavy metal or a topological insulator. The heavy metals include one or more of W, Pt, Ta, Ir, Au, Cu, or Cr.

7. The spin memory cell according to claim 1, characterized in that, Electrodes are formed on the magnetic tunneling stack structure, and the electrodes are electrically connected to a read / write current source. The electrodes are used to output read / write current to the magnetic tunneling stack structure.

8. The spin memory cell according to claim 1, characterized in that, The first bias layer and the second bias layer are shaped to emphasize anisotropy.

9. The spin memory cell according to claim 1, characterized in that, The first bias layer and the second bias layer are made of materials with in-plane uniaxial anisotropy.

10. A spin memory, characterized in that, include: A memory cell array comprising a plurality of spin memory cells as described in any one of claims 1-9; A mode-switching current source is electrically connected to the spin-orbit moment of the plurality of spin memory cells, and the mode-switching current source is used to provide multiple currents to enable the first bias layer to switch between multiple states.

11. The spin memory according to claim 10, characterized in that, It also includes a read / write monitoring circuit, which is connected to the mode switching current source for control. The read / write monitoring circuit is used to detect the read / write status of the multiple spin memory cells and control the output current of the mode switching current source according to the read / write status of the spin memory cells.

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