Storage device and preparation method, reading and writing method, storage chip, electronic device

Abstract

An embodiment of the present application provides a storage device, a preparation method, a reading and writing method, a storage chip, and an electronic device, which relate to the field of storage technology and are used to solve the problem that the number of storage states in a spin-orbit torque-magnetic random access memory increases while the storage state change range remains unchanged. The storage device includes: a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction that are sequentially stacked. The first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer. The first free layer and the second free layer are disposed on two opposite surfaces of the spin-orbit coupling layer.

Description

Technical Field

[0001] The present application relates to the field of storage technologies, and in particular, to a storage device, a preparation method, a reading and writing method, a storage chip, and an electronic device. Background Art

[0002] Spin orbit torque - magnetic random access memory (SOT - MRAM) has become a research hotspot in the fields of spintronics and magnetic information storage due to its relatively fast writing speed, low writing current, and good compatibility.

[0003] In current SOT - MRAM, since there are only changes between high and low resistance states, a binary reading and writing method is usually adopted, resulting in a relatively low storage density of SOT - MRAM. To increase the storage states of SOT - MRAM and thus improve its storage density, those skilled in the art have proposed a type of SOT - MRAM. As Figure 1 shown, the SOT - MRAM includes a spin orbit coupling (SOC) layer 20 and a magnetic tunneling junction (MTJ) 30 disposed on the SOC 20. The MTJ 30 contains doped ions with a gradient change in concentration. During the preparation process, first, the SOC 20 with spin - orbit coupling effect is grown on a substrate, and then the MTJ 30 is grown. Subsequently, a mask layer is formed in a partial region of the MTJ 30, and then ion implantation is performed, so that ions are implanted into the region of the MTJ 30 not covered by the mask. Then, thermal annealing is carried out, such that a small amount of doped ions also diffuse into the region of the MTJ 30 where no doped ions are implanted. In this way, in the plane where the SOC 20 is located and perpendicular to the current direction, the doped ions in the MTJ 30 have a gradient change in concentration.

[0004] Based on Figure 1 the shown SOT - MRAM, due to the concentration gradient of the MTJ 30, the deflection directions after magnetization are also different, thereby causing a symmetry break in the direction perpendicular to the current direction. Specifically, when a current is passed through the SOC 20, without applying an external magnetic field, the magnetoresistance outputs linearly with multiple states along with the current, realizing multi - state storage.

[0005] However, Figure 1The shown SOT-MRAM has a relatively complex manufacturing process, and it is difficult to implement the instrument and process for doping ions with a specific orientation in MTJ30. Moreover, after doping MTJ30 with a specific orientation, although multi-state storage can be achieved, the resistance change range of MTJ30 (that is, the difference or ratio between the highest resistance and the lowest resistance of MTJ30) is still the same as that of MTJ30 in the SOT-MRAM with only high and low resistance states, and a higher resistance change range cannot be obtained. With an increase in the number of storage states while the resistance change range remains unchanged (for example, the resistance change range is 1000 - 2500 Ω. Previously, 1000 Ω corresponded to one storage state and 2500 Ω corresponded to one storage state. Now, 1000 Ω corresponds to one storage state, 1750 Ω corresponds to one storage state, and 2500 Ω corresponds to one storage state), the resistance value differences corresponding to each storage state become smaller, thus affecting the accuracy of reading and writing in the SOT-MRAM. Summary of the Invention

[0006] The embodiments of the present application provide a storage device, a manufacturing method, a reading and writing method, a storage chip, and an electronic device, which are used to solve the problem that in the SOT-MRAM, the number of storage states increases while the change range of the storage states remains unchanged.

[0007] To achieve the above object, the present application adopts the following technical solutions:

[0008] In the first aspect of the embodiments of the present application, a storage device is provided, including: a first magnetic tunnel junction, a spin orbit coupling layer, and a second magnetic tunnel junction that are stacked in sequence; the first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer; the first free layer and the second free layer are disposed on two opposite surfaces of the spin orbit coupling layer. The storage device provided by the embodiments of the present application has three storage states: a low resistance state, a medium resistance state, and a high resistance state. In traditional storage devices, when the magnetization directions of the fixed layer and the free layer are parallel, it is a low resistance state, and when the magnetization directions of the fixed layer and the free layer are antiparallel, it is a high resistance state, with only two storage states. Therefore, the storage device provided by the embodiments of the present application can increase the number of storage states, achieve multi-state storage, and improve the storage density of the storage device.

[0009] Optionally, the first magnetic tunnel junction and the second magnetic tunnel junction have the same structure. In this way, the first magnetic tunnel junction and the second magnetic tunnel junction can be fabricated using the same process, which simplifies the manufacturing process.

[0010] Optionally, the first magnetic tunnel junction further includes a first tunneling layer and a first fixed layer that are stacked in sequence on the first free layer. The structure is simple.

[0011] Optionally, the second magnetic tunnel junction further includes a second tunneling layer and a second fixed layer that are stacked in sequence on the second free layer. The structure is simple.

[0012] Optionally, the memory device further includes a first electrode and a second electrode; the first electrode and the second electrode are coupled to opposite sides of the spin-orbit coupling layer.

[0013] Optionally, the memory device further includes a third electrode and a fourth electrode; the third electrode is coupled to the first fixed layer of the first magnetic tunnel junction, and the fourth electrode is coupled to the second fixed layer of the second magnetic tunnel junction.

[0014] Optionally, the second electrode, the third electrode, and the fourth electrode are respectively coupled to a reference ground terminal.

[0015] In a second aspect of the embodiments of the present application, a memory chip is provided, including the memory device according to any one of the first aspect. The memory chip provided by the embodiments of the present application includes a memory device, and its beneficial effects are the same as those of the memory device, which will not be elaborated here.

[0016] Optionally, the memory chip further includes a differential amplifier; a first input terminal of the differential amplifier is coupled to the third electrode of the memory device, and a second input terminal of the differential amplifier is coupled to the fourth electrode of the memory device. By using the differential amplifier to amplify the difference between the first current output from the third electrode and the second current output from the fourth electrode with a fixed gain and then output, the output currents in different resistance states can have higher distinguishability, so as to more accurately obtain the resistance state corresponding to the read instruction and achieve more accurate data reading.

[0017] Optionally, the first input terminal of the differential amplifier is coupled to a plurality of third electrodes, and the second input terminal of the differential amplifier is coupled to a plurality of fourth electrodes; the memory chip further includes a time-division reading control circuit; the time-division reading control circuit is coupled to the memory device and is used to send a time-division reading instruction to the memory device, so that the plurality of third electrodes transmit signals to the first input terminal of the differential amplifier in a time-division manner, and the plurality of fourth electrodes transmit signals to the second input terminal of the differential amplifier in a time-division manner. In this way, the number of differential amplifiers can be reduced, and the area of the memory chip can be reduced.

[0018] In a third aspect of the embodiments of the present application, a method for manufacturing a memory device is provided, including: forming a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction that are sequentially stacked on a substrate; wherein, the first magnetic tunnel junction includes a first free layer; the second magnetic tunnel junction includes a second free layer; the first free layer and the second free layer are disposed on two opposite surfaces of the spin-orbit coupling layer. When forming the memory device in the embodiments of the present application, there is no need to perform related doping processes, the process is simple, and the manufacturing efficiency is high.

[0019] Optionally, a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction are formed in a stacked manner on a substrate, including: forming a first fixed film on the substrate; forming a first tunneling film on a surface of the first fixed film away from the substrate; forming a first free film on a surface of the first tunneling film away from the first fixed film; forming a spin-orbit coupling film on a surface of the first free film away from the first tunneling film; forming a second free film on a surface of the spin-orbit coupling film away from the first free film; forming a second tunneling film on a surface of the second free film away from the spin-orbit coupling film; forming a second fixed film on a surface of the second tunneling film away from the second free film; patterning the first fixed film, the first tunneling film, the first free film, the spin-orbit coupling film, the second free film, the second tunneling film, and the second fixed film by a patterning process to form a first magnetic tunnel junction composed of a first fixed layer, a first tunneling layer, and a first free layer stacked in sequence, a spin-orbit coupling layer, and a second magnetic tunnel junction composed of a second free layer, a second tunneling layer, and a second fixed layer stacked in sequence.

[0020] By first forming the first fixed film, the first tunneling film, the first free film, the spin-orbit coupling film, the second free film, the second tunneling film, and the second fixed film, and then patterning the above-mentioned film layers by a patterning process to form a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction, the process is mature, the process steps are few, and the preparation efficiency is high. In addition, the sizes of the prepared first magnetic tunnel junction, spin-orbit coupling layer, and second magnetic tunnel junction are equal, which can reduce the occupied area of the storage device.

[0021] In a fourth aspect of the embodiments of the present application, a method for reading a storage device is provided. The storage device includes a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction stacked in sequence; the method for reading the storage device includes: applying a voltage signal to the spin-orbit coupling layer; reading an output current of the spin-orbit coupling layer; and obtaining data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the spin-orbit coupling layer.

[0022] Since the magnitude of the output current of the spin-orbit coupling layer changes with the magnetization directions of the first free layer in the first magnetic tunnel junction and the second free layer in the second magnetic tunnel junction. And each resistance state has the magnetization directions of the first free layer and the second free layer corresponding to the resistance state. Therefore, by detecting the output current of the spin-orbit coupling layer, the magnetization directions of the first free layer and the second free layer can be determined, and further, it can be determined which resistance state among the high resistance state, the medium resistance state, or the low resistance state the read instruction of the storage device needs to read, so as to obtain the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction. The principle is simple and it is easy to realize multi-resistance state data reading.

[0023] Optionally, obtaining the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the spin-orbit coupling layer includes: when I out = I in + I ish , reading the low resistance state; when I out = I in + 1 / 2I ish , reading the medium resistance state; when I out = I in , reading the high resistance state; where I out is the output current, I in is the in-plane current generated after applying a voltage signal to the spin-orbit coupling layer, and I ish is the inverse spin Hall current generated by the inverse spin Hall effect after applying a voltage signal to the spin-orbit coupling layer.

[0024] In a fifth aspect of the embodiments of the present application, a method for reading a storage device is provided. The storage device includes a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction stacked in sequence; the method for reading the storage device includes: applying a voltage signal to the spin-orbit coupling layer; reading the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction; and obtaining the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction.

[0025] By using a differential amplifier to amplify the difference between the first current output by the first magnetic tunnel junction and the second current output by the second magnetic tunnel junction with a fixed gain and then outputting it, the output currents in different resistance states can have higher distinguishability, so as to more accurately obtain the resistance state corresponding to the read instruction and achieve more accurate data reading.

[0026] Optionally, obtaining the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction includes: I out ' is the difference between the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction; when I out '> 0, reading the low resistance state; when I out ' = 0, reading the medium resistance state; when I out '< 0, reading the high resistance state. This can reduce the data processing amount.

[0027] In a sixth aspect of the embodiments of the present application, a method for writing to a storage device is provided. The storage device includes a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction that are stacked in sequence. The method for writing to the storage device includes: applying voltage signals to at least one of the first magnetic tunnel junction and the second magnetic tunnel junction and to the spin-orbit coupling layer respectively; the voltage signals are used to change the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction so as to write corresponding data to the storage device.

[0028] For the storage device provided by the embodiments of the present application, since the first spin coupling layer 40 has two resistance states, namely a low resistance state and a high resistance state, and the second spin coupling layer 50 also has two resistance states, namely a low resistance state and a high resistance state, after mixing and combining, the storage device 100 will have three states, namely a low resistance state, a medium resistance state, and a high resistance state. Compared with a conventional storage device that forms a low resistance state and a high resistance state according to the parallel or antiparallel of the free layer and the fixed layer, the storage device provided by the embodiments of the present application can achieve multi-state storage. In addition, the span of the magnitudes of the three output currents of the spin-orbit coupling layer is relatively large, and the span from the low resistance state to the high resistance state is also relatively large, thereby increasing the value range of the resistance states. When the value range of the resistance states increases, the difference between the resistance states can be increased, thereby increasing the distinguishability between the resistance states and improving the accuracy of reading and writing. Furthermore, for the storage device 100 provided by the embodiments of the present application, under the combined action of the spin-orbit torque and the spin-transfer torque effect, the mutual transformation between the resistance states is completed to complete the data writing work, and the working efficiency is high.

[0029] Optionally, applying voltage signals to at least one of the first magnetic tunnel junction and the second magnetic tunnel junction and to the spin-orbit coupling layer respectively includes: applying voltage signals to one of the first magnetic tunnel junction and the second magnetic tunnel junction and to the spin-orbit coupling layer respectively; the voltage signals are used to change the resistance state of one of the first magnetic tunnel junction and the second magnetic tunnel junction so as to change the resistance state of the storage device and write data corresponding to the resistance state of the storage device to the storage device.

[0030] Optionally, applying voltage signals to at least one of the first magnetic tunnel junction and the second magnetic tunnel junction and to the spin-orbit coupling layer respectively includes: applying voltage signals to the first magnetic tunnel junction, the second magnetic tunnel junction, and the spin-orbit coupling layer respectively; the voltage signals are used to change the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction so as to change the resistance state of the storage device and write data corresponding to the resistance state of the storage device to the storage device.

[0031] Optionally, applying voltage signals to the first magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying a positive voltage signal to the spin-orbit coupling layer and applying a positive voltage signal to the first magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the first magnetic tunnel junction, the magnetization direction of the first free layer is flipped to be away from the spin-orbit coupling layer, the first magnetic tunnel junction becomes a high-resistance state, and the storage device changes from a medium-resistance state to a high-resistance state, and writing the data corresponding to the high-resistance state to the storage device.

[0032] Optionally, applying voltage signals to the first magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying a negative voltage signal to the spin-orbit coupling layer and applying a negative voltage signal to the first magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the first magnetic tunnel junction, the magnetization direction of the first free layer is flipped to face the spin-orbit coupling layer, the first magnetic tunnel junction becomes a low-resistance state, and the storage device changes from a high-resistance state to a medium-resistance state, and writing the data corresponding to the medium-resistance state to the storage device.

[0033] Optionally, applying voltage signals to the first magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying a negative voltage signal to the spin-orbit coupling layer and applying a negative voltage signal to the first magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the first magnetic tunnel junction, the magnetization direction of the first free layer is flipped to face the spin-orbit coupling layer, the first magnetic tunnel junction becomes a low-resistance state, and the storage device changes from a medium-resistance state to a low-resistance state, and writing the data corresponding to the low-resistance state to the storage device.

[0034] Optionally, applying voltage signals to the first magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying a positive voltage signal to the spin-orbit coupling layer and applying a positive voltage signal to the first magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the first magnetic tunnel junction, the magnetization direction of the first free layer is flipped to be away from the spin-orbit coupling layer, the first magnetic tunnel junction becomes a high-resistance state, and the storage device changes from a low-resistance state to a medium-resistance state, and writing the data corresponding to the medium-resistance state to the storage device.

[0035] Optionally, applying voltage signals to the second magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying a negative voltage signal to the spin-orbit coupling layer and applying a positive voltage signal to the second magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the second magnetic tunnel junction, the magnetization direction of the second free layer is flipped to face the spin-orbit coupling layer, the second magnetic tunnel junction becomes a high-resistance state, and the storage device changes from a medium-resistance state to a low-resistance state, and writing the data corresponding to the low-resistance state to the storage device.

[0036] Optionally, applying voltage signals to the second magnetic tunnel junction and the spin-orbit coupling layer respectively includes: according to a write instruction, applying a positive voltage signal to the spin-orbit coupling layer and a negative voltage signal to the second magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the second magnetic tunnel junction, the magnetization direction of the second free layer is flipped to be away from the spin-orbit coupling layer, the second magnetic tunnel junction becomes a low-resistance state, and the memory device changes from the low-resistance state to a medium-resistance state, and writing data corresponding to the medium-resistance state to the memory device.

[0037] Optionally, applying voltage signals to the second magnetic tunnel junction and the spin-orbit coupling layer respectively includes: according to a write instruction, applying a positive voltage signal to the spin-orbit coupling layer and a negative voltage signal to the second magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the second magnetic tunnel junction, the magnetization direction of the second free layer is flipped to be away from the spin-orbit coupling layer, the second magnetic tunnel junction becomes a low-resistance state, and the memory device changes from the medium-resistance state to a high-resistance state, and writing data corresponding to the high-resistance state to the memory device.

[0038] Optionally, applying voltage signals to the second magnetic tunnel junction and the spin-orbit coupling layer respectively includes: according to a write instruction, applying a negative voltage signal to the spin-orbit coupling layer and a positive voltage signal to the second magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the second magnetic tunnel junction, the magnetization direction of the second free layer is flipped to face the spin-orbit coupling layer, the second magnetic tunnel junction becomes a high-resistance state, and the memory device changes from the high-resistance state to a medium-resistance state, and writing data corresponding to the medium-resistance state to the memory device.

[0039] Optionally, applying voltage signals to the spin-orbit coupling layer, the first magnetic tunnel junction and the second magnetic tunnel junction respectively includes: applying a positive voltage signal to the spin-orbit coupling layer, a positive voltage signal to the first magnetic tunnel junction, and a negative voltage signal to the second magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the first magnetic tunnel junction, the magnetization direction of the first free layer is flipped to be away from the spin-orbit coupling layer, and the first magnetic tunnel junction becomes a high-resistance state; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the second magnetic tunnel junction, the magnetization direction of the second free layer is flipped to be away from the spin-orbit coupling layer, and the second magnetic tunnel junction becomes a low-resistance state; the memory device changes from the low-resistance state to a high-resistance state, and writing data corresponding to the high-resistance state to the memory device.

[0040] Optionally, applying voltage signals to the spin-orbit coupling layer, the first magnetic tunnel junction, and the second magnetic tunnel junction respectively includes: applying a negative voltage signal to the spin-orbit coupling layer, applying a negative voltage signal to the first magnetic tunnel junction, and applying a positive voltage signal to the second magnetic tunnel junction; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the first magnetic tunnel junction, the magnetization direction of the first free layer is flipped towards the spin-orbit coupling layer, and the first magnetic tunnel junction becomes a low-resistance state; so that under the action of the spin-orbit torque effect of the spin-orbit coupling layer and the spin-transfer torque effect of the second magnetic tunnel junction, the magnetization direction of the second free layer is flipped towards the spin-orbit coupling layer, and the second magnetic tunnel junction becomes a high-resistance state; the storage device changes from a high-resistance state to a low-resistance state, and writes the data corresponding to the low-resistance state to the storage device.

[0041] In the seventh aspect of the embodiments of the present application, an electronic device is provided, including the storage chip provided in the second aspect.

[0042] The beneficial effects of the electronic device provided by the embodiments of the present application are the same as those of the above storage chip, and will not be elaborated here.

[0043] Optionally, the electronic device further includes a circuit board; the storage chip is coupled to the circuit board.

[0044] In the eighth aspect of the embodiments of the present application, a computer-readable storage medium is provided, including computer instructions, when the computer instructions run on an electronic device, enabling the electronic device to execute the reading method according to any one of the fourth aspect or the fifth aspect or execute the writing method according to any one of the sixth aspect.

[0045] In the ninth aspect of the embodiments of the present application, a computer program product is provided, when the computer program product runs on a computer, enabling the computer to execute the reading method according to any one of the fourth aspect or the fifth aspect or execute the writing method according to any one of the sixth aspect. Description of the Drawings

[0046] Figure 1 A schematic structural diagram of a storage device provided by the related art;

[0047] Figure 2 A schematic structural diagram of an electronic device provided by the embodiments of the present application;

[0048] Figure 3 A schematic structural diagram of a storage device provided by the embodiments of the present application;

[0049] Figure 4a A schematic diagram of the storage state of a storage device provided by the embodiments of the present application;

[0050] Figure 4bSchematic diagram of the storage state of another storage device provided by an embodiment of the present application;

[0051] Figure 4c Schematic diagram of the storage state of yet another storage device provided by an embodiment of the present application;

[0052] Figure 4d Schematic diagram of the storage state of yet another storage device provided by an embodiment of the present application;

[0053] Figure 5a Flow chart of a method for manufacturing a storage device provided by an embodiment of the present application;

[0054] Figure 5b Schematic diagram of the manufacturing process of a storage device provided by an embodiment of the present application;

[0055] Figure 6a Flow chart of another method for manufacturing a storage device provided by an embodiment of the present application;

[0056] Figure 6b Schematic diagram of another manufacturing process of a storage device provided by an embodiment of the present application;

[0057] Figure 7a Schematic diagram of the structure of another storage device provided by an embodiment of the present application;

[0058] Figure 7b Schematic diagram of the structure of yet another storage device provided by an embodiment of the present application;

[0059] Figure 8 Flow chart of a method for reading a storage device provided by an embodiment of the present application;

[0060] Figure 9a Schematic diagram of the reading principle of a storage device provided by an embodiment of the present application;

[0061] Figure 9b Schematic diagram of another reading principle of a storage device provided by an embodiment of the present application;

[0062] Figure 9c Schematic diagram of yet another reading principle of a storage device provided by an embodiment of the present application;

[0063] Figure 10 Flow chart of a method for writing a storage device provided by an embodiment of the present application;

[0064] Figure 11a Schematic diagram of the writing principle of a storage device provided by an embodiment of the present application;

[0065] Figure 11b Schematic diagram of another writing principle of a storage device provided by an embodiment of the present application;

[0066] Figure 12a Schematic diagram of the writing principle of another storage device provided by an embodiment of the present application;

[0067] Figure 12b Schematic diagram of the writing principle of another storage device provided by an embodiment of the present application;

[0068] Figure 13a Schematic diagram of the writing principle of another storage device provided by an embodiment of the present application;

[0069] Figure 13b Schematic diagram of the writing principle of another storage device provided by an embodiment of the present application;

[0070] Figure 14 Flowchart of another method for reading a storage device provided by an embodiment of the present application;

[0071] Figure 15 Equivalent circuit diagram of a storage device provided by an embodiment of the present application;

[0072] Figure 16 Schematic diagram of the reading principle of another storage device provided by an embodiment of the present application;

[0073] Figure 17 Schematic diagram of the reading principle of another storage device provided by an embodiment of the present application;

[0074] Figure 18 Schematic diagram of the reading principle of another storage device provided by an embodiment of the present application;

[0075] Figure 19 Schematic diagram of the reading principle of another storage device provided by an embodiment of the present application;

[0076] Figure 20 Schematic diagram of the structure of a storage chip provided by an embodiment of the present application;

[0077] Figure 21 Schematic diagram of the structure of another storage chip provided by an embodiment of the present application. Detailed implementation manners

[0078] Next, the technical solutions in the embodiments of the present application will be described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments.

[0079] Hereinafter, terms such as "first", "second", etc. are only used for convenience of description and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features. In the description of this application, unless otherwise specified, the meaning of "a plurality" is two or more.

[0080] In addition, in the embodiments of this application, orientation terms such as "upper", "lower", "left", "right", etc. may include but are not limited to being defined relative to the schematic placement of components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification and may change correspondingly according to the change in the orientation of the components placed in the drawings.

[0081] In this application, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" may be a fixed connection, a detachable connection, or integrated; it may be directly connected or indirectly connected through an intermediate medium. In addition, the term "coupling" may be a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0082] The embodiments of this application provide an electronic device. The electronic device may include a mobile phone, a tablet computer (pad), a television, intelligent wearable products (such as intelligent watches, intelligent bracelets), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, small household appliances for charging (such as soybean milk machines, floor cleaning robots), drones, and other electronic products. The embodiments of this application do not impose special restrictions on the specific forms of the above-mentioned electronic devices.

[0083] Taking a mobile phone as an example of any of the above-mentioned electronic devices, as Figure 2 shown, the electronic device 01 may include a middle frame 11, a rear shell 12, and a display screen 13. The middle frame 11 includes a carrier plate 110 for carrying the display screen 13 and a frame 111 surrounding the carrier plate 110 for one week. The electronic device 01 may include a circuit board 120 disposed on the surface of the carrier plate 110 facing the rear shell 12. The circuit board 120 is, for example, a printed circuit board (PCB). The electronic device 01 further includes some electronic components 121 disposed on the circuit board 120. The electronic components 121 are, for example, storage chips. The rear shell 12 is connected to the middle frame 11, which can prevent the performance of the circuit board 120 and the electronic components 121 from being affected by external moisture and dust.

[0084] Among them, the storage chip includes a storage device and a peripheral circuit for reading and writing the storage device.

[0085] An embodiment of the present application provides a storage device. As Figure 3 shown, the storage device 100 includes: a first magnetic tunneling junction (MTJ) 40, a spin orbit coupling layer (SOC) 20, and a second magnetic tunneling junction 50 that are stacked in sequence.

[0086] The structure of the first magnetic tunneling junction 40, in a possible embodiment, as Figure 3 shown, the first magnetic tunneling junction 40 includes a first free layer 41, a first tunneling layer 42, and a first fixed layer 43 that are stacked in sequence.

[0087] Regarding the structure of the first free layer 41, in order to simplify the manufacturing process, in a possible embodiment, the first free layer 41 is a single-layer film structure.

[0088] In another possible embodiment, the first free layer 41 is a stacked structure composed of multiple film layers.

[0089] Among them, the materials and thicknesses of the multiple film layers can be the same or different.

[0090] By designing the first free layer 41 as a stacked structure composed of multiple film layers, the coercivity of the first free layer 41 can be reduced, making the first free layer 41 easier to flip.

[0091] Considering that the thickness design of the first free layer 41 will affect its magnetization direction and coercivity magnitude, in some embodiments, the thickness of the first free layer 41 is 2 - 40 nm. For example, the thickness of the first free layer 41 is 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm.

[0092] Regarding the material constituting the first free layer 41, for example, it can be a ferromagnetic material (FM) with perpendicular magnetic anisotropy. Among them, as long as it can be magnetized to the saturation state under a very small magnetic field, the magnetic susceptibility > 0, and its value is greater than the order of 10 - 10E6. And after the magnetic field disappears, the magnetized state can still be maintained (i.e., the so-called spontaneous magnetization phenomenon), such materials are called ferromagnetic materials.

[0093] In a possible embodiment, the materials of the respective film layers of the first free layer 41 include Co (cobalt), Mn (manganese), Si (silicon), Fe (iron), B (boron), Al (aluminum), Ge (germanium), Te (tellurium), Cr (chromium), O (oxygen), Ni (nickel), Pt (platinum), etc. For example, the materials of the respective film layers of the first free layer 41 are Co 2 MnSi (cobalt manganese silicon), CoFeB (cobalt iron boron), Co 2 FeAl (cobalt iron aluminum), Fe 3 GeTe 2 (iron germanium tellurium), CrGeTe 3 (chromium germanium tellurium), CrSiTe 3 (chromium silicon tellurium), CrTe 2 (chromium telluride), Cr 2 Te 3 (dichromium tritelluride), CoFe (cobalt iron), NiFe (nickel iron), FePt (iron platinum), Fe 3 O 4 (iron oxide), Fe, Co, Pt, etc.

[0094] Regarding the material forming the first tunneling layer 42, for example, it can be a metal oxide having tunneling characteristics. In a possible embodiment, the material of the first tunneling layer 42 is an oxide or a multi-element oxide combination of elements such as Mg (magnesium), Al, etc. For example, the material of the first tunneling layer 42 is MgO (magnesium oxide), Al 2 O 3 (aluminum oxide), MgAl 2 O 4 (magnesium aluminum oxide), etc.

[0095] It is sufficient that the first tunneling layer 42 forms a tunneling barrier layer (or is understood to have a quantum tunneling effect). However, if the thickness of the first tunneling layer 42 is too thin, it will affect the lifespan of the first tunneling layer. If the thickness of the first tunneling layer 42 is too thick, the voltage required for device writing will be too high, and power consumption cannot be reduced.

[0096] In some embodiments, the thickness of the first tunneling layer 42 is 0.8 - 5 nm. For example, the thickness of the first tunneling layer 42 is 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm.

[0097] Regarding the first fixed layer 43, reference can be made to the relevant description of the first free layer 41 above, and details will not be elaborated here. Of course, it can be understood that the coercivity of the first fixed layer 43 can be made greater than that of the first free layer 41 by adjusting the composition and ratio of the film layers and the thickness of the film layers.

[0098] Such as Figure 3As shown, the spin-orbit coupling layer 20 and the first magnetic tunnel junction 40 are stacked, and the spin-orbit coupling layer 20 is located on the side of the first free layer 41 away from the first tunneling layer 42.

[0099] Regarding the structure of the spin-orbit coupling layer 20, in order to simplify the manufacturing process, in one possible embodiment, the spin-orbit coupling layer 20 is a single-layer film structure.

[0100] In another possible embodiment, the spin-orbit coupling layer 20 is a stacked structure composed of multiple film layers.

[0101] Among them, the materials of the multiple film layers can be the same or different.

[0102] By designing the spin-orbit coupling layer 20 as a stacked structure composed of multiple film layers, a stronger spin Hall effect can be formed in the spin-orbit coupling layer 20, and the write current can be reduced.

[0103] Considering that the thickness of the spin-orbit coupling layer 20 will affect its efficiency in flipping the magnetization directions of the first free layer 41 and the second free layer, as well as the growth quality of the spin-orbit coupling layer 20 during the thin film growth process. In some embodiments, the thickness of the spin-orbit coupling layer 20 is 2 - 30 nm. For example, the thickness of the spin-orbit coupling layer 20 is 10 nm, 15 nm, 20 nm, 25 nm.

[0104] Regarding the material constituting the spin-orbit coupling layer 20, for example, it can be a material with strong spin-orbit coupling performance. In one possible embodiment, the material of the spin-orbit coupling layer 20 includes Ta (tantalum), P (phosphorus), W (tungsten), Bi (bismuth), Te (tellurium), Se (selenium), Sb (antimony), Sr (strontium), Ir (iridium), O, C (carbon), Zr (zirconium), etc. For example, the material of the spin-orbit coupling layer 20 is a heavy metal single substance, oxide, graphene, topological insulator. Exemplarily, the material of the spin-orbit coupling layer 20 is Ta, P, W, Bi 2 Te 3 (bismuth telluride), Bi 2 Se 3 (bismuth selenide), BiSbTeSe 2 (BSTS), Sr 2 IrO 4 (iridium tin oxide), ZrBi 2 (zirconium bismuthide), etc.

[0105] The structure of the second magnetic tunnel junction 50, in one possible embodiment, as Figure 3 shown, the second magnetic tunnel junction 50 includes a second free layer 51, a second tunneling layer 52, and a second fixed layer 53 stacked in sequence.

[0106] Among them, as Figure 3 shown, the second free layer 51 is disposed on the spin-orbit coupling layer 20. That is, the first free layer 41 and the second free layer 51 are disposed on two opposite surfaces of the spin-orbit coupling layer 20.

[0107] The material and structure of the second free layer 51 may be the same as those of the first free layer 41 described above. For details, reference may be made to the description of the first free layer 41 above, which will not be elaborated here.

[0108] Similarly, the material and structure of the second tunneling layer 52 may be the same as those of the first tunneling layer 42 described above. For details, reference may be made to the description of the first tunneling layer 42 above, which will not be elaborated here.

[0109] Similarly, the material and structure of the second fixed layer 53 may be the same as those of the first fixed layer 43 described above. For details, reference may be made to the description of the first fixed layer 43 above, which will not be elaborated here.

[0110] It should be noted that the thickness of the second free layer 51 may be the same as or different from that of the first free layer 41. The thickness of the second tunneling layer 52 may be the same as or different from that of the first tunneling layer 42. The thickness of the second fixed layer 53 may be the same as or different from that of the first fixed layer 43.

[0111] The performance of the memory device 100 (such as read / write time, read / write power consumption, etc.) can be regulated by adjusting the thicknesses of the respective film layers of the first magnetic tunnel junction 40, the second magnetic tunnel junction 50, and the spin-orbit coupling layer 20.

[0112] Based on Figure 3 the memory device 100 shown, the principles of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 are the same. Taking the first magnetic tunnel junction 40 as an example, the first magnetic tunnel junction 40 adjusts the magnetization directions of the first free layer 41 and the first fixed layer 43 to be parallel or antiparallel based on the spin transfer torque (STT) effect.

[0113] Among them, in a magnetic tunnel junction, when current flows from one magnetic layer (fixed layer) to another weaker magnetic layer (free layer), it first obtains the spin angular momentum in the same direction as the magnetization direction of the fixed layer. When this spin-polarized current diffuses into the free layer, it interacts with the magnetization of the free layer, resulting in the transfer of the transverse component of the spin-polarized current. Due to the conservation of angular momentum, the transferred transverse component will act on the free layer in the form of a torque, forcing its magnetization direction to approach that of the fixed layer. This torque is called the spin transfer torque.

[0114] The spin-orbit coupling layer 20 induces the magnetization directions of the first free layer 41 and the second free layer 51 to flip based on the spin orbit torque (SOT) effect.

[0115] Among them, the spin orbit torque refers to using the spin current induced by the charge current of the spin-orbit coupling layer 20 to generate a spin transfer torque based on the spin-orbit coupling effect, thereby inducing the magnetization direction of the magnetic metal material of the free layer to flip. Spin-orbit coupling refers to the interaction of a particle due to its spin and orbital motion in a quantum mechanical system.

[0116] In the memory device 100 provided by the embodiments of the present application, under the combined action of the first magnetic tunnel junction 40, the second magnetic tunnel junction 50, and the spin-orbit coupling layer 20, by adjusting the magnetization directions of the first free layer 41 and the second free layer 42, the resistance states of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 are adjusted, thereby adjusting the corresponding memory state of the memory device 100.

[0117] As Figure 4a shown, when the magnetization direction of the first free layer 41 is upward and the magnetization direction of the second free layer 51 is downward, that is, when the magnetization directions of the first free layer 41 and the second free layer 51 are opposite, the spin-down spin carriers in the spin-orbit coupling layer 20 are rebounded because they are opposite to the magnetization direction of the first free layer 41, and the spin-up spin carriers in the spin-orbit coupling layer 20 are rebounded because they are opposite to the magnetization direction of the second free layer 51. That is to say, the spin direction of the spin current in the spin-orbit coupling layer 20 will have a state that is opposite to the magnetization directions of both the first free layer 41 and the second free layer 51. In this way, the inverse spin Hall effect (ISH) will occur, and all the spin carriers will be rebounded back to the spin-orbit coupling layer 20, and the spin-orbit coupling layer 20 obtains an additional inverse spin Hall current I ish , corresponding to the high current state of the memory device 100, that is, corresponding to the low resistance state of the memory device 100.

[0118] The inverse spin Hall effect refers to the conversion of a spin current flipped in the vertical direction into a charge current parallel to the existing current direction without the action of an external magnetic field, macroscopically reflecting the charge current characteristics.

[0119] As Figure 4bAs shown, when the magnetization direction of the first free layer 41 is upward and the magnetization direction of the second free layer 51 is also upward, that is, when the magnetization directions of the first free layer 41 and the second free layer 51 are the same, the spin-down spin carriers in the spin-orbit coupling layer 20 are rebounded because they are opposite to the magnetization direction of the first free layer 41, and the spin-up spin carriers in the spin-orbit coupling layer 20 diffuse into the second free layer 51 because they are the same as the magnetization direction of the second free layer 51. That is to say, the spin direction of the spin current in the spin-orbit coupling layer 20 will be in a state opposite to the magnetization direction of the first free layer 41 and the same as the magnetization direction of the second free layer 51. In this way, the inverse spin Hall effect will occur, and half of the spin carriers are rebounded back to the spin-orbit coupling layer 20, and the spin-orbit coupling layer 20 obtains a small additional current 1 / 2I ish , corresponding to the medium current state of the memory device 100, that is, corresponding to the medium resistance state of the memory device 100.

[0120] As Figure 4c shown, when the magnetization direction of the first free layer 41 is downward and the magnetization direction of the second free layer 51 is also downward, that is, when the magnetization directions of the first free layer 41 and the second free layer 51 are the same, the spin-up spin carriers in the spin-orbit coupling layer 20 are rebounded because they are opposite to the magnetization direction of the second free layer 51, and the spin-down spin carriers in the spin-orbit coupling layer 20 diffuse into the first free layer 41 because they are the same as the magnetization direction of the first free layer 41. That is to say, the spin direction of the spin current in the spin-orbit coupling layer 20 will be in a state the same as the magnetization direction of the first free layer 41 and opposite to the magnetization direction of the second free layer 51. In this way, the inverse spin Hall effect will occur, and half of the spin carriers are rebounded back to the spin-orbit coupling layer 20, and the spin-orbit coupling layer 20 obtains a small additional current 1 / 2I ish , corresponding to the medium current state of the memory device 100, that is, corresponding to the medium resistance state of the memory device 100.

[0121] Hereinafter, for the sake of convenience of description, only Figure 4b shown, with the magnetization direction of the first free layer 41 being upward and the magnetization direction of the second free layer 51 also being upward as an example, the medium resistance state of the memory device 100 will be described.

[0122] As Figure 4dAs shown, when the magnetization direction of the first free layer 41 is downward and the magnetization direction of the second free layer 51 is upward, that is, when the magnetization directions of the first free layer 41 and the second free layer 51 are opposite, the spin-down spin carriers in the spin-orbit coupling layer 20 diffuse into the first free layer 41 because they have the same direction as the magnetization direction of the first free layer 41, and the spin-up spin carriers in the spin-orbit coupling layer 20 diffuse into the second free layer 51 because they have the same direction as the magnetization direction of the second free layer 51. That is to say, the spin direction of the spin current in the spin-orbit coupling layer 20 will be in a state where it is in the same direction as both the magnetization direction of the first free layer 41 and the magnetization direction of the second free layer 51. In this way, the inverse spin Hall effect will not occur, corresponding to the low-current state of the memory device 100, that is, corresponding to the high-resistance state of the memory device 100.

[0123] Based on this, the memory device 100 provided by the embodiments of the present application will have three storage states: a low-resistance state, a medium-resistance state, and a high-resistance state. In traditional memory devices, when the magnetization directions of the fixed layer and the free layer are parallel, it is in a low-resistance state, and when the magnetization directions of the fixed layer and the free layer are antiparallel, it is in a high-resistance state, with only two storage states. Therefore, the memory device 100 provided by the embodiments of the present application can increase the storage states, achieve multi-state storage, and improve the storage density of the memory device 100.

[0124] Regarding the method of forming the first magnetic tunnel junction 40, the spin-orbit coupling layer 20, and the second magnetic tunnel junction 50 that are sequentially stacked as shown in Figure 3 In a possible embodiment, as shown in Figure 5a the manufacturing method of the memory device 100 includes:

[0125] S10, as shown in Figure 5b a first fixed thin film 431 is formed on the substrate.

[0126] Among them, the substrate can be a glass substrate, or a Si or SiO 2 (silicon oxide) substrate.

[0127] For example, the first fixed thin film 431 can be formed by a magnetron sputtering process, a chemical vapor deposition process, an electron beam evaporation process, a thermal evaporation process, etc.

[0128] The thickness of the first fixed thin film 431 can be, for example, 2 - 10 nm, and the material of the first fixed thin film 431 can be, for example, CoFeB.

[0129] S20, as shown in Figure 5b a first tunneling thin film 421 is formed on the surface of the first fixed thin film 431 away from the substrate.

[0130] Similarly, processes such as magnetron sputtering, chemical vapor deposition, electron beam evaporation, and thermal evaporation can be used to form the first tunneling thin film 421.

[0131] The thickness of the first tunneling thin film 421 can be, for example, 0.8 - 5 nm, and the material of the first tunneling thin film 421 can be, for example, MgO.

[0132] S30, as Figure 5b shown, a first free thin film 411 is formed on the surface of the first tunneling thin film 421 away from the first fixed thin film 431.

[0133] Similarly, processes such as magnetron sputtering, chemical vapor deposition, electron beam evaporation, and thermal evaporation can be used to form the first free thin film 411.

[0134] The thickness of the first free thin film 411 can be, for example, 2 - 10 nm, and the material of the first free thin film 411 can be, for example, CoFeB.

[0135] S40, as Figure 5b shown, a spin - orbit coupling thin film 21 is formed on the surface of the first free thin film 411 away from the first tunneling thin film 421.

[0136] Similarly, processes such as magnetron sputtering, chemical vapor deposition, electron beam evaporation, and thermal evaporation can be used to form the spin - orbit coupling thin film 21.

[0137] The thickness of the spin - orbit coupling thin film 21 can be, for example, 2 - 20 nm, and the material of the spin - orbit coupling thin film 21 can be, for example, Ta.

[0138] S50, as Figure 5b shown, a second free thin film 511 is formed on the surface of the spin - orbit coupling thin film 21 away from the first free thin film 411.

[0139] Similarly, processes such as magnetron sputtering, chemical vapor deposition, electron beam evaporation, and thermal evaporation can be used to form the second free thin film 511.

[0140] The thickness of the second free thin film 511 can be, for example, 2 - 10 nm, and the material of the second free thin film 511 can be, for example, CoFeB.

[0141] S60, as Figure 5b shown, a second tunneling thin film 521 is formed on the surface of the second free thin film 511 away from the spin - orbit coupling thin film 21.

[0142] Similarly, processes such as magnetron sputtering, chemical vapor deposition, electron beam evaporation, and thermal evaporation can be used to form the second tunneling thin film 521.

[0143] The thickness of the second tunneling film 521 can be, for example, 0.8 - 5 nm, and the material of the second tunneling film 521 can be, for example, MgO.

[0144] S70. As Figure 5b shown, a second fixed film 531 is formed on the surface of the second tunneling film 521 away from the second free film 511.

[0145] Similarly, the second fixed film 531 can be formed by using processes such as magnetron sputtering process, chemical vapor deposition process, electron beam evaporation process, thermal evaporation process, etc.

[0146] The thickness of the second fixed film 531 can be, for example, 2 - 10 nm, and the material of the second fixed film 531 can be, for example, CoFeB.

[0147] S80. As Figure 5b shown, a patterning process is used to pattern the first fixed film 431, the first tunneling film 421, the first free film 411, the spin - orbit coupling film 21, the second free film 511, the second tunneling film 521, and the second fixed film 531 to form a first magnetic tunnel junction 40 composed of a first fixed layer 43, a first tunneling layer 42, and a first free layer 41 stacked in sequence, a spin - orbit coupling layer 20, and a second magnetic tunnel junction 50 composed of a second free layer 51, a second tunneling layer 52, and a second fixed layer 53 stacked in sequence.

[0148] Among them, the patterning process can be, for example, a lithography process (which may include processes such as exposure, development, etching, etc.). In the embodiment of the present application, by first forming the first fixed film 411, the first tunneling film 421, the first free film 431, the spin - orbit coupling film 21, the second free film 511, the second tunneling film 521, and the second fixed film 531, and then using a patterning process to pattern the above - mentioned film layers to form the first magnetic tunnel junction 40, the spin - orbit coupling layer 20, and the second magnetic tunnel junction 50, the process is mature. There is no need to perform related doping processes, the process is simple, and the preparation efficiency is high.

[0149] In addition, the sizes of the prepared first magnetic tunnel junction 40, spin - orbit coupling layer 20, and second magnetic tunnel junction 50 are equal, which can reduce the occupied area of the storage device 100.

[0150] Regarding the method for forming the first magnetic tunnel junction 40, the spin - orbit coupling layer 20, and the second magnetic tunnel junction 50 stacked in sequence as Figure 3 shown, in another possible embodiment, as Figure 6a shown, the preparation method of the storage device 100 includes:

[0151] S1. As Figure 5bAs shown, a first fixed thin film 431 is formed on a substrate, and the first fixed thin film 431 is patterned by a patterning process to form a first fixed layer 43.

[0152] S2. As Figure 5b shown, a first tunneling thin film 421 is formed on the surface of the first fixed layer 43 away from the substrate, and the first tunneling thin film 421 is patterned by a patterning process to form a first tunneling layer 42.

[0153] S3. As Figure 5b shown, a first free thin film 411 is formed on the surface of the first tunneling layer 42 away from the first fixed layer 43, and the first free thin film 411 is patterned by a patterning process to form a first free layer 41.

[0154] Among them, the first fixed layer 43, the first tunneling layer 42, and the first free layer 41 arranged in layers constitute a first magnetic tunnel junction 40.

[0155] S4. As Figure 6b shown, a spin-orbit coupling thin film 21 is formed on the surface of the first free layer 41 away from the first tunneling layer 42, and the spin-orbit coupling thin film 21 is patterned by a patterning process to form a spin-orbit coupling layer 20.

[0156] S5. As Figure 6b shown, a second free thin film 511 is formed on the surface of the spin-orbit coupling layer 20 away from the first free layer 41, and the second free thin film 511 is patterned by a patterning process to form a second free layer 51.

[0157] S6. As Figure 6b shown, a second tunneling thin film 521 is formed on the surface of the second free layer 51 away from the spin-orbit coupling layer 20, and the second tunneling thin film 521 is patterned by a patterning process to form a second tunneling layer 52.

[0158] S7. As Figure 6b shown, a second fixed thin film 531 is formed on the surface of the second tunneling layer 52 away from the second free layer 51, and the second fixed thin film 531 is patterned by a patterning process to form a second fixed layer 53.

[0159] Among them, the second fixed layer 53, the second tunneling layer 52, and the second free layer 51 arranged in layers constitute a second magnetic tunnel junction 50.

[0160] Figure 6b For the formation process, materials, and thickness of each film layer in Figure 5b reference can be made to the above description of

[0161] In the embodiments of the present application, the above-mentioned memory device 100 is formed through a film-forming process and a patterning process, and the process is mature. There is no need to perform related doping processes, the process is simple, and the preparation efficiency is high.

[0162] In a possible embodiment, the structures of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 are the same.

[0163] It can be understood that the same structure of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 means that the materials, thicknesses, etc. of the first free layer 41 in the first magnetic tunnel junction 40 and the second free layer 51 in the second magnetic tunnel junction 50 are the same. The materials, thicknesses, etc. of the first tunneling layer 42 in the first magnetic tunnel junction 40 and the second tunneling layer 52 in the second magnetic tunnel junction 50 are the same. The materials, thicknesses, etc. of the first fixed layer 43 in the first magnetic tunnel junction 40 and the second fixed layer 53 in the second magnetic tunnel junction 50 are the same. That is to say, the resistance of the first magnetic tunnel junction 40 is equal to the resistance of the second magnetic tunnel junction 50.

[0164] In this way, the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 can be prepared by the same process, which can simplify the preparation process.

[0165] On the basis of the structure shown in Figure 3 In a possible embodiment, as shown in Figure 7a the memory device 100 further includes a first electrode 61 and a second electrode 62. The first electrode 61 and the second electrode 62 are coupled to opposite sides of the spin-orbit coupling layer 20.

[0166] Among them, the materials and structures of the first electrode 61 and the second electrode 62 are not limited, as long as they can conduct electrical signals to the spin-orbit coupling layer 20.

[0167] In a possible embodiment, as shown in Figure 7a the memory device 100 further includes a third electrode 63 and a fourth electrode 64. The third electrode 63 is coupled to the first fixed layer 43 of the first magnetic tunnel junction 40, and the fourth electrode 64 is coupled to the second fixed layer 53 of the second magnetic tunnel junction 50.

[0168] In a possible embodiment, as shown in Figure 7b the second electrode 62, the third electrode 63, and the fourth electrode 64 are respectively coupled to the reference ground terminal.

[0169] Hereinafter, several detailed embodiments will be used to illustrate the reading and writing methods of the memory device 100 provided in the embodiments of the present application.

[0170] Embodiment 1

[0171] As shown in Figure 8As shown, the reading method of the storage device 100 in the embodiment of the present application includes:

[0172] S100. Obtain a read instruction of the storage device.

[0173] Among them, the read instruction refers to a machine instruction obtained by a control circuit connected to the storage device 100 in the storage chip. For example, the read instruction includes instructions corresponding to displaying characters, displaying pictures, playing audio and video, running application programs, etc., and the acquisition path includes instructions generated corresponding to actions such as single-clicking the mouse, finger tapping, pressing a physical button, etc.

[0174] S200. Apply a voltage signal to the spin-orbit coupling layer 20 according to the read instruction.

[0175] That is to say, according to the read instruction, a voltage signal is applied to the first electrode 61. After the voltage signal enters the spin-orbit coupling layer 20, an in-plane current I will be formed in the spin-orbit coupling layer 20 in .

[0176] S300. Read the output current I of the spin-orbit coupling layer 20 out .

[0177] After the spin-orbit coupling layer 20 forms the in-plane current I in , under the action of the spin Hall effect (SHE), a spin current will be generated. Whether the spin carriers in the spin current will generate an inverse spin Hall current I due to the inverse spin Hall effect ish is related to the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 and the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50. That is to say, the magnitude of the output current I of the spin-orbit coupling layer 20 out is related to the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 and the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50.

[0178] The spin Hall effect refers to the fact that electrons with different spin directions flip along a direction perpendicular to the current without the action of an external magnetic field, thereby generating a spin current in the vertical direction.

[0179] For example, the output current I of the spin-orbit coupling layer 20 is read on the first electrode 61 and the second electrode 62 located on both sides of the spin-orbit coupling layer 20 out .

[0180] S400. Obtain the data stored in the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 according to the output current I of the spin-orbit coupling layer 20 out

[0181] Due to the output current I of the spin-orbit coupling layer 20 out The magnitude thereof will change with the magnetization directions of the first free layer 41 in the first magnetic tunnel junction 40 and the second free layer 51 in the second magnetic tunnel junction 50. Each resistance state has a magnetization direction of the first free layer 41 and a magnetization direction of the second free layer 51 corresponding to that resistance state.

[0182] Therefore, by detecting the output current I of the spin-orbit coupling layer 20 out , the magnetization directions of the first free layer 41 and the second free layer 51 can be determined, and further, it can be determined which resistance state among the high resistance state, the medium resistance state, or the low resistance state the storage device 100 is in, so as to obtain the data stored in the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50.

[0183] In a possible embodiment, step S400 includes:

[0184] In the case of I out = I in + I ish , read the low resistance state.

[0185] After the voltage signal enters the spin-orbit coupling layer 20, an in-plane current I in will be formed in the spin-orbit coupling layer 20. In the case of I out = I in + I ish , it indicates that the inverse spin Hall effect is generated in the spin-orbit coupling layer 20, forming an additional inverse spin Hall current I ish . That is to say, as shown in Figure 9a , the spin direction of the spin current in the spin-orbit coupling layer 20 is opposite to both the magnetization direction of the first free layer 41 and the magnetization direction of the second free layer 51. The spin-down spin carriers in the spin-orbit coupling layer 20 are rebounded at the interface between the first free layer 41 and the spin-orbit coupling layer 20 due to the opposite magnetization direction to the first free layer 41. The spin-up spin carriers in the spin-orbit coupling layer 20 are rebounded at the interface between the second free layer 51 and the spin-orbit coupling layer 20 due to the opposite magnetization direction to the second free layer 51. At this time, the storage device 100 is in the low resistance state as shown in Figure 4a , so as to read the low resistance state.

[0186] In the case of I out = I in + 1 / 2I ish , read the medium resistance state.

[0187] After the voltage signal enters the spin-orbit coupling layer 20, an in-plane current I in will be formed in the spin-orbit coupling layer 20. In the case of I out= I in + 1 / 2I ish In the case of, it indicates that the inverse spin Hall effect is generated in the spin-orbit coupling layer 20, forming a smaller additional current 1 / 2I ish . That is to say, as Figure 9b shown, the spin direction of the spin current in the spin-orbit coupling layer 20 is opposite to the magnetization direction of the first free layer 41 and the same as the magnetization direction of the second free layer 51. The spin-down spin carriers in the spin-orbit coupling layer 20 are rebounded at the interface between the first free layer 41 and the spin-orbit coupling layer 20 due to the opposite direction to the magnetization direction of the first free layer 41. The spin-up spin carriers in the spin-orbit coupling layer 20 diffuse into the second free layer 51 due to the same direction as the magnetization direction of the second free layer 51. At this time, the storage device 100 is in the medium resistance state as shown in Figure 4b shown, so as to read the medium resistance state.

[0188] When I out = I in , the high resistance state is read.

[0189] After the voltage signal enters the spin-orbit coupling layer 20, an in-plane current I in will be formed in the spin-orbit coupling layer 20. In the case of I out = I in , it indicates that the inverse spin Hall effect is not generated in the spin-orbit coupling layer 20, and the inverse spin Hall current I ish is not formed. That is to say, as Figure 9c shown, the spin direction of the spin current in the spin-orbit coupling layer 20 is the same as the magnetization directions of both the first free layer 41 and the second free layer 51. The spin-down spin carriers in the spin-orbit coupling layer 20 diffuse into the first free layer 41 due to the same direction as the magnetization direction of the first free layer 41, and the spin-up spin carriers in the spin-orbit coupling layer 20 diffuse into the second free layer 51 due to the same direction as the magnetization direction of the second free layer 51. At this time, the storage device 100 is in the high resistance state as shown in Figure 4d shown, so as to read the high resistance state.

[0190] Among them, for example, the low resistance state can be marked as 0 in the computer machine language, the medium resistance state can be marked as 1 in the computer machine language, and the high resistance state can be marked as 2 in the computer machine language, corresponding to the ternary "0", "1" and "2" in the computer machine language. Reading the "0", "1" and "2" languages corresponding to the output current I out from the storage device 100 completes the reading operation of the storage device 100. Of course, this is just an example here and is not subject to any limitation.

[0191] Embodiment 2

[0192] AsFigure 10 As shown in Figure 10 , the writing method of the storage device 100 in the embodiment of the present application includes:

[0193] S1000. Obtain a write instruction for the storage device.

[0194] Among them, the write instruction refers to a machine instruction obtained by a control circuit connected to the storage device 100. Exemplarily, the write instruction includes instructions corresponding to typing characters, pasting pictures, downloading application programs, etc. The acquisition path exemplarily includes instructions generated correspondingly by writing using a keyboard, clicking with a mouse, tapping with a finger, etc. This embodiment does not limit this.

[0195] S2000. According to the write instruction, apply voltage signals to at least one of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 and the spin-orbit coupling layer 20 respectively; the voltage signals are used to change the resistance states of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 to write corresponding data to the storage device 100.

[0196] In some embodiments, step S2000 includes: applying voltage signals to the first magnetic tunnel junction 40 and the spin-orbit coupling layer 20 respectively.

[0197] The voltage signals are used to change the resistance state of the first magnetic tunnel junction 40 to change the resistance state of the storage device 100 and write data corresponding to the resistance state of the storage device 100 to the storage device 100.

[0198] Apply a voltage signal to the spin-orbit coupling layer 20, and an in-plane current I is generated in the spin-orbit coupling layer 20 in , generating a spin-orbit torque. Apply a voltage signal to the third electrode 63 of the first magnetic tunnel junction 40, and a current flowing from the first fixed layer 43 to the first free layer 41 will be formed in the first magnetic tunnel junction 40, so that the first magnetic tunnel junction 40 generates a spin-transfer torque. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the first free layer 41 is controlled to flip.

[0199] According to needs, by adjusting the application of a positive voltage signal or a negative voltage signal to the spin-orbit coupling layer 20, the direction of the spin-orbit torque of the spin-orbit coupling layer 20 can be adjusted. By adjusting the application of a positive voltage signal or a negative voltage signal to the third electrode 63, the direction of the spin-transfer torque can be adjusted. Thus, it can be determined that the magnetization direction of the first free layer 41 flips away from or towards the spin-orbit coupling layer 20. To change the resistance state of the first magnetic tunnel junction 40, thereby changing the resistance state of the storage device 100, and further writing data corresponding to the resistance state of the storage device 100 to the storage device 100.

[0200] Optionally, as Figure 11aAs shown, according to the write instruction, a positive voltage signal is applied to the spin-orbit coupling layer 20, and a positive voltage signal is applied to the first magnetic tunnel junction 40. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the first magnetic tunnel junction 40, the magnetization direction of the first free layer 41 is flipped to be away from the spin-orbit coupling layer 20, the first magnetic tunnel junction 40 becomes a high-resistance state, and the memory device 100 changes from a medium-resistance state to a high-resistance state, and data corresponding to the high-resistance state is written into the memory device 100.

[0201] When it is necessary to write a high-resistance state, such as Figure 4d As shown, the magnetization directions of both the first free layer 41 and the second free layer 51 need to be away from the spin-orbit coupling layer 20. When the memory state currently memorized by the memory device 100 is a medium-resistance state, such as Figure 4b As shown, the magnetization direction of the first free layer 41 is toward the spin-orbit coupling layer 20, and the magnetization direction of the second free layer 51 is away from the spin-orbit coupling layer 20. Therefore, it is necessary to flip the magnetization direction of the first free layer 41 from being toward the spin-orbit coupling layer 20 to being away from the spin-orbit coupling layer 20.

[0202] Based on this, as Figure 11a As shown, a positive voltage signal is applied to the spin-orbit coupling layer 20, and a positive in-plane current I in is generated in the spin-orbit coupling layer 20, generating a spin-orbit torque away from the spin-orbit coupling layer 20. A positive voltage signal is applied to the first magnetic tunnel junction 40, and a positive first spin-polarized current I 40 is generated in the first magnetic tunnel junction 40, generating a spin-transfer torque that is anti-parallel to the magnetization direction of the first fixed layer 43. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the first free layer 41 is controlled to flip to be away from the spin-orbit coupling layer 20. That is, the magnetization direction of the first free layer 41 is controlled to flip to be anti-parallel (or understood as relative) to the first fixed layer 43. Thus, the memory state of the memory device 100 is in the high-resistance state as Figure 4d shown.

[0203] That is, a positive voltage signal is applied to the spin-orbit coupling layer 20 to generate a positive in-plane current I in . A positive voltage signal is applied to the first magnetic tunnel junction 40 to generate a positive first spin-polarized current I 40 , and the memory device 100 can be changed from a medium-resistance state to a high-resistance state.

[0204] Optionally, such as Figure 11bAs shown, according to the write instruction, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a negative voltage signal is applied to the first magnetic tunnel junction 40. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the first magnetic tunnel junction 40, the magnetization direction of the first free layer 41 is flipped to face the spin-orbit coupling layer 20, the first magnetic tunnel junction 40 becomes a low-resistance state, and the memory device 100 changes from a high-resistance state to a medium-resistance state, and data corresponding to the medium-resistance state is written into the memory device 100.

[0205] When it is necessary to write the medium-resistance state, such as Figure 4b as shown, the magnetization direction of the first free layer 41 needs to face the spin-orbit coupling layer 20, and the magnetization direction of the second free layer 51 needs to face away from the spin-orbit coupling layer 20. When the memory state currently memorized by the memory device 100 is a high-resistance state, such as Figure 4d as shown, the magnetization directions of both the first free layer 41 and the second free layer 51 face away from the spin-orbit coupling layer 20. Therefore, it is necessary to flip the magnetization direction of the first free layer 41 from facing away from the spin-orbit coupling layer 20 to facing the spin-orbit coupling layer 20.

[0206] Based on this, as Figure 11b shown, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a negative in-plane current -I is generated in the spin-orbit coupling layer 20 in , generating a spin-orbit torque facing the spin-orbit coupling layer 20. A negative voltage signal is applied to the first magnetic tunnel junction 40, and a negative first spin-polarized current -I is generated in the first magnetic tunnel junction 40 40 , generating a spin-transfer torque parallel to the magnetization direction of the first fixed layer 43. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the first free layer 41 is controlled to flip to face the spin-orbit coupling layer 20. That is, the magnetization direction of the first free layer 41 is controlled to flip to be parallel (or understood as the same) as the first fixed layer 43. Thus, the memory state of the memory device 100 is in the medium-resistance state as Figure 4b shown.

[0207] That is, a negative voltage signal is applied to the spin-orbit coupling layer 20, generating a negative in-plane current -I in . A negative voltage signal is applied to the first magnetic tunnel junction 40, generating a negative first spin-polarized current -I 40 , and the memory device 100 can be changed from a high-resistance state to a medium-resistance state.

[0208] In some other embodiments, step S2000 includes: applying voltage signals to the second magnetic tunnel junction 50 and the spin-orbit coupling layer 20 respectively.

[0209] The voltage signal is used to change the resistance state of the second magnetic tunnel junction 50, so as to change the resistance state of the memory device 100 and write data corresponding to the resistance state of the memory device 100 into the memory device 100.

[0210] A voltage signal is applied to the spin-orbit coupling layer 20, and an in-plane current I is generated in the spin-orbit coupling layer 20 in , generating a spin-orbit torque. A voltage signal is applied to the fourth electrode 64 of the second magnetic tunnel junction 50, and a current flowing from the first fixed layer 53 to the second free layer 51 is formed in the second magnetic tunnel junction 50, so that the second magnetic tunnel junction 50 generates a spin-transfer torque. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the second free layer 51 is controlled to flip.

[0211] As needed, by adjusting the application of a positive voltage signal or a negative voltage signal to the spin-orbit coupling layer 20, the direction of the spin-orbit torque of the spin-orbit coupling layer 20 can be adjusted. By adjusting the application of a positive voltage signal or a negative voltage signal to the fourth electrode 64, the direction of the spin-transfer torque can be adjusted. Thus, it can be determined whether to control the magnetization direction of the second free layer 51 to flip away from or towards the spin-orbit coupling layer 20.

[0212] Optionally, as Figure 12a shown, according to the write instruction, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a positive voltage signal is applied to the second magnetic tunnel junction 50. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the second magnetic tunnel junction 50, the magnetization direction of the second free layer 42 is flipped towards the spin-orbit coupling layer 20, and the second magnetic tunnel junction 50 becomes a high-resistance state, and the memory device 100 changes from a medium-resistance state to a low-resistance state, and data corresponding to the low-resistance state is written into the memory device 100.

[0213] When it is necessary to write a low-resistance state, as Figure 4a shown, the magnetization directions of both the first free layer 41 and the second free layer 51 need to be towards the spin-orbit coupling layer 20. When the memory state currently memorized by the memory device 100 is a medium-resistance state, as Figure 4b shown, the magnetization direction of the first free layer 41 is towards the spin-orbit coupling layer 20, and the magnetization direction of the second free layer 51 is away from the spin-orbit coupling layer 20. Therefore, it is necessary to flip the magnetization direction of the second free layer 51 from away from the spin-orbit coupling layer 20 to towards the spin-orbit coupling layer 20.

[0214] Based on this, as Figure 12a shown, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a negative in-plane current -I is generated in the spin-orbit coupling layer 20 in, a spin - orbit torque towards the spin - orbit coupling layer 20 is generated. A positive voltage signal is applied to the second magnetic tunnel junction 50, and a positive second spin - polarized current I is generated within the second magnetic tunnel junction 50 50 , and a spin - transfer torque anti - parallel to the magnetization direction of the second fixed layer 53 is generated. Under the combined action of the spin - orbit torque effect and the spin - transfer torque effect, the magnetization direction of the second free layer 51 is controlled to flip towards the spin - orbit coupling layer 20. That is, the magnetization direction of the second free layer 51 is controlled to flip to be anti - parallel (or understood as opposite) to the second fixed layer 53. Thus, the storage state of the storage device 100 is in the low - resistance state as Figure 4a shown

[0215] That is, a negative voltage signal is applied to the spin - orbit coupling layer 20, and a negative in - plane current -I is generated in . A positive voltage signal is applied to the second magnetic tunnel junction 50, and a positive second spin - polarized current I is generated 50 , and it can be realized that the storage device 100 is changed from the medium - resistance state to the low - resistance state

[0216] Optionally, as Figure 12b shown, according to the write instruction, a positive voltage signal is applied to the spin - orbit coupling layer 20, and a negative voltage signal is applied to the second magnetic tunnel junction 50. Under the action of the spin - orbit torque effect of the spin - orbit coupling layer 20 and the spin - transfer torque effect of the second magnetic tunnel junction 50, the magnetization direction of the second free layer 42 is flipped away from the spin - orbit coupling layer 20, the second magnetic tunnel junction 50 becomes the low - resistance state, the storage device 100 is changed from the low - resistance state to the medium - resistance state, and data corresponding to the medium - resistance state is written into the storage device 100

[0217] When it is necessary to write the medium - resistance state, as Figure 4b shown, the magnetization direction of the first free layer 41 needs to be towards the spin - orbit coupling layer 20, and the magnetization direction of the second free layer 51 needs to be away from the spin - orbit coupling layer 20. When the storage state currently memorized by the storage device 100 is the low - resistance state, as Figure 4a shown, the magnetization directions of both the first free layer 41 and the second free layer 51 are towards the spin - orbit coupling layer 20. Therefore, it is necessary to flip the magnetization direction of the second free layer 51 from towards the spin - orbit coupling layer 20 to away from the spin - orbit coupling layer 20

[0218] Based on this, as Figure 12b shown, a positive voltage signal is applied to the spin - orbit coupling layer 20, and a positive in - plane current I is generated within the spin - orbit coupling layer 20 in , and a spin - orbit torque away from the spin - orbit coupling layer 20 is generated. A negative voltage signal is applied to the second magnetic tunnel junction 50, and a negative second spin - polarized current -I is generated within the second magnetic tunnel junction 50 50, a spin-transfer torque parallel to the magnetization direction of the second fixed layer 53 is generated. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the second free layer 51 is controlled to flip away from the spin-orbit coupling layer 20. That is, the magnetization direction of the second free layer 51 is controlled to flip to be parallel (or understood as the same) as the second fixed layer 53. Thus, the storage state of the storage device 100 is in a medium resistance state as shown in Figure 4b shown.

[0219] That is, a positive voltage signal is applied to the spin-orbit coupling layer 20 to generate a positive in-plane current I in . A negative voltage signal is applied to the second magnetic tunnel junction 50 to generate a negative second spin-polarized current -I 50 , and the storage device 100 can be changed from a low resistance state to a medium resistance state.

[0220] In some other embodiments, step S2000 includes: applying voltage signals to the first magnetic tunnel junction 40, the second magnetic tunnel junction 50, and the spin-orbit coupling layer 20 respectively; the voltage signals are used to change the resistance states of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 to change the resistance state of the storage device 100, and writing data corresponding to the resistance state of the storage device 100 into the storage device 100.

[0221] A voltage signal is applied to the spin-orbit coupling layer 20, and an in-plane current I in is generated in the spin-orbit coupling layer 20, generating a spin-orbit torque. A voltage signal is applied to the third electrode 63 of the first magnetic tunnel junction 40, and a current flowing from the first fixed layer 43 to the first free layer 41 is formed in the first magnetic tunnel junction 40, so that the first magnetic tunnel junction 40 generates a spin-transfer torque. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the first free layer 41 is controlled to flip.

[0222] According to needs, by adjusting the application of a positive voltage signal or a negative voltage signal to the spin-orbit coupling layer 20, the direction of the spin-orbit torque of the spin-orbit coupling layer 20 can be adjusted. By adjusting the application of a positive voltage signal or a negative voltage signal to the third electrode 63, the direction of the spin-transfer torque can be adjusted. Thus, it can be determined that the magnetization direction of the first free layer 41 flips away from the spin-orbit coupling layer 20 or towards the spin-orbit coupling layer 20.

[0223] At the same time, a voltage signal is applied to the fourth electrode 64 of the second magnetic tunnel junction 50, and a current flowing from the first fixed layer 53 to the second free layer 51 is formed in the second magnetic tunnel junction 50, so that the second magnetic tunnel junction 50 generates a spin-transfer torque. Under the combined action of the spin-orbit torque effect and the spin-transfer torque effect, the magnetization direction of the second free layer 51 is controlled to flip.

[0224] As needed, by adjusting the application of a positive voltage signal or a negative voltage signal to the spin-orbit coupling layer 20, the direction of the spin-orbit torque of the spin-orbit coupling layer 20 can be adjusted. By adjusting the application of a positive voltage signal or a negative voltage signal to the fourth electrode 64, the direction of the spin-transfer torque can be adjusted. Thus, it is possible to determine to control the magnetization direction of the second free layer 51 to flip away from or towards the spin-orbit coupling layer 20.

[0225] Optionally, as Figure 12a shown, according to the write instruction, a positive voltage signal is applied to the spin-orbit coupling layer 20, a positive voltage signal is applied to the first magnetic tunnel junction 40, and a negative voltage signal is applied to the second magnetic tunnel junction 50. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the first magnetic tunnel junction 40, the magnetization direction of the first free layer 41 is flipped away from the spin-orbit coupling layer 20, and the first magnetic tunnel junction 40 becomes a high-resistance state. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the second magnetic tunnel junction 50, the magnetization direction of the second free layer 42 is flipped away from the spin-orbit coupling layer 20, and the second magnetic tunnel junction 50 becomes a low-resistance state; the memory device 100 changes from the low-resistance state to the high-resistance state, and data corresponding to the high-resistance state is written to the memory device 100.

[0226] When it is necessary to write a high-resistance state, as Figure 4d shown, the magnetization directions of both the first free layer 41 and the second free layer 51 need to be away from the spin-orbit coupling layer 20. When the memory state currently memorized by the memory device 100 is the low-resistance state, as Figure 4a shown, the magnetization directions of both the first free layer 41 and the second free layer 51 are towards the spin-orbit coupling layer 20. Therefore, it is necessary to flip the magnetization direction of the first free layer 41 from towards the spin-orbit coupling layer 20 to away from the spin-orbit coupling layer 20, and flip the magnetization direction of the second free layer 51 from towards the spin-orbit coupling layer 20 to away from the spin-orbit coupling layer 20.

[0227] Based on this, as Figure 13a shown, a positive voltage signal is applied to the spin-orbit coupling layer 20, and a positive in-plane current I in is generated in the spin-orbit coupling layer 20, generating a spin-orbit torque away from the spin-orbit coupling layer 20. A positive voltage signal is applied to the first magnetic tunnel junction 40, and a positive first spin-polarized current I 40, a spin transfer torque opposite to the magnetization direction of the first fixed layer 43 is generated. Under the combined action of the spin-orbit torque and the spin transfer torque effect, the magnetization direction of the first free layer 41 is controlled to flip away from the spin-orbit coupling layer 20. That is, the magnetization direction of the first free layer 41 is controlled to flip to be antiparallel (or understood as opposite) to the first fixed layer 43.

[0228] Meanwhile, a negative voltage signal is applied to the second magnetic tunnel junction 50, and a negative second spin-polarized current -I is generated in the second magnetic tunnel junction 50 50 , a spin transfer torque parallel to the magnetization direction of the second fixed layer 53 is generated. Under the combined action of the spin-orbit torque and the spin transfer torque effect, the magnetization direction of the second free layer 51 is controlled to flip away from the spin-orbit coupling layer 20. That is, the magnetization direction of the second free layer 51 is controlled to flip to be parallel (or understood as the same) to the second fixed layer 53. Thus, the storage state of the storage device 10 is in a high-resistance state as Figure 4d shown.

[0229] That is, a positive voltage signal is applied to the spin-orbit coupling layer 20 to generate a positive in-plane current I in . A positive voltage signal is applied to the first magnetic tunnel junction 40 to generate a positive first spin-polarized current I 40 , a negative voltage signal is applied to the second magnetic tunnel junction 50 to generate a negative second spin-polarized current -I 50 , and the storage device 100 can be changed from a low-resistance state to a high-resistance state.

[0230] Optionally, as Figure 13b shown, according to the write instruction, a negative voltage signal is applied to the spin-orbit coupling layer 20, a negative voltage signal is applied to the first magnetic tunnel junction 40, and a positive voltage signal is applied to the second magnetic tunnel junction 50. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin transfer torque effect of the first magnetic tunnel junction 40, the magnetization direction of the first free layer 41 is controlled to flip towards the spin-orbit coupling layer 20, and the first magnetic tunnel junction 40 becomes a low-resistance state. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin transfer torque effect of the second magnetic tunnel junction 50, the magnetization direction of the second free layer 42 is controlled to flip towards the spin-orbit coupling layer 20, and the second magnetic tunnel junction 50 becomes a high-resistance state; the storage device 100 changes from a high-resistance state to a low-resistance state, and data corresponding to the low-resistance state is written to the storage device 100.

[0231] When it is necessary to write a low-resistance state, as Figure 4a shown, the magnetization directions of both the first free layer 41 and the second free layer 51 need to be towards the spin-orbit coupling layer 20. In the case where the storage state currently memorized by the storage device 100 is a high-resistance state, as Figure 4dAs shown, the magnetization directions of both the first free layer 41 and the second free layer 51 are away from the spin-orbit coupling layer 20. Therefore, it is necessary to reverse the magnetization direction of the first free layer 41 from away from the spin-orbit coupling layer 20 to towards the spin-orbit coupling layer 20, and reverse the magnetization direction of the second free layer 51 from away from the spin-orbit coupling layer 20 to towards the spin-orbit coupling layer 20.

[0232] Based on this, as Figure 13b shown, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a negative in-plane current -I is generated within the spin-orbit coupling layer 20 in , generating a spin-orbit torque towards the spin-orbit coupling layer 20. A negative voltage signal is applied to the first magnetic tunnel junction 40, and a negative first spin-polarized current -I 40 is generated within the first magnetic tunnel junction 40, generating a spin-transfer torque parallel to the magnetization direction of the first fixed layer 43. Under the combined action of the spin-orbit torque and the spin-transfer torque effect, the magnetization direction of the first free layer 41 is controlled to reverse to towards the spin-orbit coupling layer 20. That is, the magnetization direction of the first free layer 41 is controlled to reverse to be parallel (or understood as the same) as the first fixed layer 43.

[0233] Meanwhile, a positive voltage signal is applied to the second magnetic tunnel junction 50, and a positive second spin-polarized current I 50 is generated within the second magnetic tunnel junction 50, generating a spin-transfer torque anti-parallel to the magnetization direction of the second fixed layer 53. Under the combined action of the spin-orbit torque and the spin-transfer torque effect, the magnetization direction of the second free layer 51 is controlled to reverse to towards the spin-orbit coupling layer 20. That is, the magnetization direction of the second free layer 51 is controlled to reverse to be anti-parallel (or understood as opposite) to the second fixed layer 53. Thereby, the storage state of the memory device 100 is in the low-resistance state as Figure 4a shown.

[0234] That is, a negative voltage signal is applied to the spin-orbit coupling layer 20, generating a negative in-plane current -I in . A negative voltage signal is applied to the first magnetic tunnel junction 40, generating a negative first spin-polarized current -I 40 , and a positive voltage signal is applied to the second magnetic tunnel junction 50, generating a positive second spin-polarized current I 50 , which can realize changing the memory device 100 from the high-resistance state to the low-resistance state.

[0235] That is to say, the writing principle of the storage device 100 provided by the embodiments of the present application is as follows: when it is necessary to flip the magnetization direction of the first free layer 41 or the magnetization direction of the second free layer 51 away from the spin-orbit coupling layer 20, a positive voltage signal is applied to the spin-orbit coupling layer 20. Similarly, when it is necessary to flip the magnetization direction of the first free layer 41 or the magnetization direction of the second free layer 51 towards the spin-orbit coupling layer 20, a negative voltage signal is applied to the spin-orbit coupling layer 20.

[0236] Meanwhile, when it is necessary to flip the magnetization direction of the first free layer 41 away from the spin-orbit coupling layer 20, a positive voltage signal is applied to the third electrode 63 of the first magnetic tunnel junction 40. Similarly, when it is necessary to flip the magnetization direction of the first free layer 41 towards the spin-orbit coupling layer 20, a negative voltage signal is applied to the third electrode 63 of the first magnetic tunnel junction 40.

[0237] When it is necessary to flip the magnetization direction of the second free layer 51 away from the spin-orbit coupling layer 20, a negative voltage signal is applied to the fourth electrode 64 of the second magnetic tunnel junction 50. Similarly, when it is necessary to flip the magnetization direction of the second free layer 51 towards the spin-orbit coupling layer 20, a positive voltage signal is applied to the fourth electrode 64 of the second magnetic tunnel junction 50.

[0238] It should be noted that when the above description is made for the writing method of the storage device 100 provided by the embodiments of the present application, it is only when the storage device 100 is in the medium resistance state, and the magnetization directions of the first free layer 41 and the second free layer 51 are as Figure 4b shown as an example. If when the storage device 100 is in the medium resistance state, the magnetization directions of the first free layer 41 and the second free layer 51 are as Figure 4c shown, then the above principle can be used to control the corresponding flipping of their magnetization directions.

[0239] For example, according to the write instruction, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a negative voltage signal is applied to the first magnetic tunnel junction 40. Under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin transfer torque effect of the first magnetic tunnel junction 40, the magnetization direction of the first free layer 41 is flipped towards the spin-orbit coupling layer 20, the first magnetic tunnel junction 40 becomes a low resistance state, the storage device 100 changes from the medium resistance state to the low resistance state, and the data corresponding to the low resistance state is written to the storage device 100.

[0240] According to the write instruction, a positive voltage signal is applied to the spin-orbit coupling layer 20, and a positive voltage signal is applied to the first magnetic tunnel junction 40; under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the first magnetic tunnel junction 40, the magnetization direction of the first free layer 41 is flipped to be away from the spin-orbit coupling layer 20, the first magnetic tunnel junction 40 becomes a high-resistance state, the storage device 100 changes from a low-resistance state to a medium-resistance state, and data corresponding to the medium-resistance state is written to the storage device 100.

[0241] According to the write instruction, a positive voltage signal is applied to the spin-orbit coupling layer 20, and a negative voltage signal is applied to the second magnetic tunnel junction 50; under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the second magnetic tunnel junction 50, the magnetization direction of the second free layer 51 is flipped to be away from the spin-orbit coupling layer 20, the second magnetic tunnel junction 50 becomes a low-resistance state, the storage device 100 changes from a medium-resistance state to a high-resistance state, and data corresponding to the high-resistance state is written to the storage device 100.

[0242] According to the write instruction, a negative voltage signal is applied to the spin-orbit coupling layer 20, and a positive voltage signal is applied to the second magnetic tunnel junction 50; under the action of the spin-orbit torque effect of the spin-orbit coupling layer 20 and the spin-transfer torque effect of the second magnetic tunnel junction 50, the magnetization direction of the second free layer 51 is flipped to face the spin-orbit coupling layer 20, the second magnetic tunnel junction 50 becomes a high-resistance state, the storage device 100 changes from a high-resistance state to a medium-resistance state, and data corresponding to the medium-resistance state is written to the storage device 100.

[0243] Writing from the low-resistance state to the high-resistance state and writing from the high-resistance state to the low-resistance state are the same as above.

[0244] Among them, for example, the low-resistance state can be marked as 0 in the computer machine language, the medium-resistance state can be marked as 1 in the computer machine language, and the high-resistance state can be marked as 2 in the computer machine language, so as to correspond to the ternary "0", "1", and "2" in the computer machine language. Storing the "0", "1", and "2" languages corresponding to the resistance states into the storage device 100 completes the write operation of the storage device 100. Of course, this is only an illustration here and is not limited in any way.

[0245] For the storage device 100 provided in the embodiment of the present application, since the first spin coupling layer 40 has two resistance states, namely the low-resistance state and the high-resistance state, and the second spin coupling layer 50 also has two resistance states, namely the low-resistance state and the high-resistance state, after mixing and combining, the storage device 100 will have three states: the low-resistance state, the medium-resistance state, and the high-resistance state. Compared with the conventional storage device that forms the low-resistance state and the high-resistance state according to the parallel or antiparallel of the free layer and the fixed layer, the storage device 100 provided in the embodiment of the present application can achieve multi-state storage.

[0246] In addition, since the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 are respectively disposed on both sides of the spin-orbit coupling layer 20 in the storage device 100, which is equivalent to two resistors connected in parallel, the maximum resistance is doubled, increasing the maximum resistance of the storage device 100. Correspondingly, the span from the low resistance state to the high resistance state is relatively large, thereby increasing the value range of the resistance states. When the value range of the resistance states increases, the difference between the resistance states can be increased, thereby increasing the distinguishability between the resistance states and improving the accuracy of multi-state storage reading and writing. For example, in the related art, the value range of the resistance state is 1000 - 2500 Ω. Divided into three resistance states, they can be 1000 Ω, 1750 Ω, and 2500 Ω, respectively corresponding to one resistance state, with a difference of 750 Ω between adjacent resistance states. If the value range of the resistance state is 1000 - 5000 Ω, divided into three resistance states, they can be 1000 Ω, 2500 Ω, and 5000 Ω, respectively corresponding to one resistance state, with a difference of 2500 Ω between adjacent resistance states, and the resistance state distinguishability is significantly increased.

[0247] Furthermore, the storage device 100 provided by the embodiment of the present application completes the mutual transformation between resistance states under the combined action of the spin-orbit torque and the spin-transfer torque effect to complete the data writing operation, with high working efficiency.

[0248] Embodiment III

[0249] As Figure 14 shown, the reading method of the storage device 100 in the embodiment of the present application includes:

[0250] S10000. Obtain a reading instruction of the storage device.

[0251] S20000. Apply a voltage signal to the spin-orbit coupling layer 20 according to the reading instruction.

[0252] That is to say, according to the reading instruction, a voltage signal is applied to the first electrode 61. After the voltage signal enters the spin-orbit coupling layer 20, an in-plane current I in is formed in the spin-orbit coupling layer 20. in The spin-down spin carriers in the in-plane current I

[0253] flow to the third electrode 63 through the first magnetic tunnel junction 40, and the spin-up spin carriers flow to the fourth electrode 64 through the second magnetic tunnel junction 50. The principle of the magnetic tunnel junction is as follows: The magnetic tunnel junction is composed of three layers: a magnetic layer (fixed layer) / a non-ferromagnetic layer (tunneling layer) / a magnetic layer (free layer). The coercive force of the fixed layer is relatively large and it is not easy to flip. The coercive force of the free layer is relatively small and it is easy to flip. When the magnetization directions of the free layer and the fixed layer are parallel, the resistance of the entire magnetic tunnel junction is relatively small. When the magnetization directions of the free layer and the fixed layer are anti-parallel, the resistance of the entire magnetic tunnel junction is relatively large.

[0254] Based on this, when the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 is parallel to the magnetization direction of the first fixed layer 43, the first magnetic tunnel junction 40 is in a low resistance state, R 40 = R 40↑↑ . When the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 is antiparallel to the magnetization direction of the first fixed layer 43, the first magnetic tunnel junction 40 is in a high resistance state, R 40 = R 40↑↓ . R 40↑↑ < R 40↑↓ .

[0255] Similarly, when the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50 is parallel to the magnetization direction of the second fixed layer 53, the second magnetic tunnel junction 50 is in a low resistance state, R 50 = R 50↑↑ . When the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50 is antiparallel to the magnetization direction of the second fixed layer 53, the second magnetic tunnel junction 50 is in a high resistance state, R 50 = R 50↑↓ . R 50↑↑ < R 50↑↓ .

[0256] At this time, the storage device 100 can be simplified to the structure as shown in Figure 15 . Figure 15 The structure of the storage device 100 in the upper figure in can be simplified to Figure 15 the circuit structure in the lower figure in

[0257] S30000. Read the output current I 40 ' of the first magnetic tunnel junction 40 and the output current I 50 ' of the second magnetic tunnel junction 50.

[0258] S40000. Obtain the data stored in the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 according to the output current I 40 ' of the first magnetic tunnel junction 40 and the output current I 50 ' of the second magnetic tunnel junction 50. By way of example, according to the difference I 40 ' between the output current I 50 ' of the first magnetic tunnel junction 40 and the output current I out ' of the second magnetic tunnel junction 50, obtain the resistance state corresponding to the difference I 40 ' between the storage device 100 and the output current I 50 ' of the first magnetic tunnel junction 40 and the output current I out ' of the second magnetic tunnel junction 50. One I out ' corresponds to one resistance state, and the resistance state can be determined according to I out'Differentiate the resistance states to read the corresponding resistance states.

[0259] For example, Figure 16 as shown, I out ' = I 40 ' - I 50 ' = V / R 40↑↑ - V / R 50↑↑ = A. Then when the output current I out ' of the differential amplifier 70 is A, it can be known that the first magnetic tunnel junction 40 is in the low resistance state, and the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 is parallel to the magnetization direction of the first fixed layer 43. The second magnetic tunnel junction is also in the low resistance state, and the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50 is parallel to the magnetization direction of the second fixed layer 53. It indicates that the state of the storage device 100 is the medium resistance state as shown in Figure 4b Read the medium resistance state.

[0260] Similarly, as shown in Figure 17 I out ' = V / R 40↑↓ - V / R 50↑↓ = B. Then when the output current I out ' of the differential amplifier 70 is B, it can be known that the first magnetic tunnel junction 40 is in the high resistance state, and the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 is anti-parallel to the magnetization direction of the first fixed layer 43. The second magnetic tunnel junction is also in the high resistance state, and the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50 is anti-parallel to the magnetization direction of the second fixed layer 53. It indicates that the state of the storage device 100 is the medium resistance state as shown in Figure 4c Read the medium resistance state.

[0261] Similarly, as shown in Figure 18 I out ' = V / R 40↑↓ - V / R 50↑↑ = C. Then when the output current I out ' of the differential amplifier 70 is C, it can be known that the first magnetic tunnel junction 40 is in the high resistance state, and the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 is anti-parallel to the magnetization direction of the first fixed layer 43. The second magnetic tunnel junction is in the low resistance state, and the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50 is parallel to the magnetization direction of the second fixed layer 53. It indicates that the state of the storage device 100 is the high resistance state as shown in Figure 4d Read the high resistance state.

[0262] Similarly, as shown in Figure 19 I out ' = V / R 40↑↑ - V / R 50↑↓= D, then when the output current I of the differential amplifier 70 is detected out ' is D, it can be known that the first magnetic tunnel junction 40 is in the low-resistance state, and the magnetization direction of the first free layer 41 in the first magnetic tunnel junction 40 is parallel to the magnetization direction of the first fixed layer 43. The second magnetic tunnel junction is in the high-resistance state, and the magnetization direction of the second free layer 51 in the second magnetic tunnel junction 50 is antiparallel to the magnetization direction of the second fixed layer 53. It indicates that the state of the storage device 100 is as Figure 4a shown in the low-resistance state, and the low-resistance state is read.

[0263] When the structures of the first magnetic tunnel junction 40 and the second magnetic tunnel junction 50 are the same, the resistance of the first magnetic tunnel junction 40 in the low-resistance state is equal to the resistance of the second magnetic tunnel junction 50 in the low-resistance state. That is, R 40↑↑ = R 50↑↑ . At this time, V / R 40↑↑ = V / R 50↑↑ . The resistance of the first magnetic tunnel junction 40 in the high-resistance state is equal to the resistance of the second magnetic tunnel junction 50 in the high-resistance state. That is, R 40↑↓ = R 50↑↓ . At this time, V / R 40↑↓ = V / R 50↑↓ . In this case, the above A = B = 0. V / R 40↑↓ < V / R 50↑↑ , the above C < 0. V / R 40↑↑ > V / R 50↑↓ , the above D > 0.

[0264] Based on this, in some embodiments, when I out ' = 0, the medium-resistance state is read.

[0265] When I out ' = 0, I out ' = I 40 ' - I 50 ' = V / R 40 - V / R 50 = 0, indicating that V / R 40 = V / R 50 . At this time, as Figure 16 and Figure 17 shown, the state of the memory is as Figure 4b and Figure 4c shown in the medium-resistance state, and the medium-resistance state is read.

[0266] It can be understood that affected by factors such as process errors and application environments, at this time, the output current I out ' of the differential amplifier 70 may be approximately equal to 0. That is to say, the output current I outI' = 0 ± ε. ε is the error and can be set according to the experiment.

[0267] When I out '< 0, the high impedance state is read.

[0268] When I out '< 0, I out ' = I 40 ' - I 50 ' = V / R 40 - V / R 50 < 0. This indicates that V / R 40 < V / R 50 . At this time, as Figure 18 shown, the state of the memory is the high impedance state as Figure 4d shown, and the high impedance state is read.

[0269] When I out '> 0, the low impedance state is read.

[0270] When I out '> 0, I out ' = I 40 ' - I 50 ' = V / R 40 - V / R 50 > 0. This indicates that V / R 40 > V / R 50 . At this time, as Figure 19 shown, the state of the storage device 100 is the low impedance state as Figure 4a shown, and the low impedance state is read.

[0271] In this way, only three output currents I out ' need to be judged and processed, which can reduce the amount of data processing.

[0272] Based on this, in some embodiments, as Figure 20 shown, the peripheral circuit coupled to the storage device 100 includes a differential amplifier 70.

[0273] The first input terminal i1 of the differential amplifier 70 is coupled to the third electrode 63, and the second input terminal i2 of the differential amplifier 70 is coupled to the fourth electrode 64. The first input terminal i1 of a differential amplifier 70 is coupled to a third electrode 63, and the second input terminal i2 of the differential amplifier 70 is coupled to a fourth electrode 64.

[0274] It should be noted that Figure 20Taking the first input terminal i1 of the differential amplifier 70 as the positive input terminal and the second input terminal i2 of the differential amplifier 70 as the negative input terminal as an example for illustration. Of course, the first input terminal i1 of the differential amplifier 70 can also be the negative input terminal, and the second input terminal i2 of the differential amplifier 70 can also be the positive input terminal. As long as the first input terminal i1 and the second input terminal i2 are positive and negative input terminals to each other.

[0275] If the first input terminal i1 of the differential amplifier 70 is the positive input terminal, the second input terminal i2 of the differential amplifier 70 is the negative input terminal, the result output by the output terminal o of the differential amplifier 70 is the output current I 40 ' of the first magnetic tunnel junction 40 and the output current I 50 ' of the second magnetic tunnel junction 50. If the first input terminal i1 of the differential amplifier 70 is the negative input terminal and the second input terminal i2 of the differential amplifier 70 is the positive input terminal, the result output by the output terminal o of the differential amplifier 70 is the opposite number of the difference between the output current I 40 ' of the first magnetic tunnel junction 40 and the output current I 50 ' of the second magnetic tunnel junction 50.

[0276] For the convenience of description below, in the embodiments of the present application, taking the first input terminal i1 of the differential amplifier 70 as the positive input terminal and the second input terminal i2 of the differential amplifier 70 as the negative input terminal as an example for illustration.

[0277] The differential amplifier 70 receives the first current I 40 ' = V / R 40 received by the first input terminal i1, and the differential amplifier 70 receives the second current I 50 ' = V / R 50 received by the second input terminal i2. V is the voltage applied to the spin-orbit coupling layer 20.

[0278] The differential amplifier 70 differentially reads the current input to the first input terminal i1 (the output current I 40 ' of the first magnetic tunnel junction 40) and the current input to the second input terminal i2 (the output current I 50 ' of the second magnetic tunnel junction 50), and outputs from the output terminal o. The output current of the differential amplifier 70 is equal to the difference I 40 " = I 50 ' between the output current I out ' of the first magnetic tunnel junction 40 and the output current I out ' of the second magnetic tunnel junction 50, that is, I 40 ' = I 50 ' - I 40 '. That is, the differential amplifier 70 is used to obtain the output current I 50'Difference I out '.

[0279] By using the differential amplifier 70 to amplify the output current I of the first magnetic tunnel junction 40 40 ' and the output current I of the second magnetic tunnel junction 50 50 ' and outputting it with a fixed gain, the output current I out ' in different resistance states can have higher distinguishability, so as to more accurately obtain the resistance state corresponding to the read instruction and achieve higher-accuracy data reading.

[0280] In some other embodiments, as Figure 21 shown, the first input terminal i1 of the differential amplifier 70 is coupled to the third electrode 63, and the second input terminal i2 of the differential amplifier 70 is coupled to the fourth electrode 64. The first input terminal i1 of one differential amplifier 70 is coupled to multiple third electrodes 63, and the second input terminal i2 of the differential amplifier 70 is coupled to multiple fourth electrodes 64.

[0281] In this case, the peripheral circuit coupled to the storage device 100 further includes a time-division read control circuit 80. The time-division read control circuit 80 is coupled to the storage device 100 and is used to send a time-division read instruction to the storage device 100, so that multiple third electrodes 63 transmit signals to the first input terminal i1 of the differential amplifier 70 in a time-division manner, and multiple fourth electrodes 64 transmit signals to the second input terminal i2 of the differential amplifier 70 in a time-division manner.

[0282] The differential amplifier 70 processes the current input to the first input terminal i1 (the output current I of the first magnetic tunnel junction 40 40 ') and the current input to the second input terminal i2 (the output current I of the second magnetic tunnel junction 50 50 ') in the same process as described above regarding Figure 20 , except that the storage device 100, according to the instruction of the time-division read control circuit 80, only one of the multiple third electrodes 63 transmits a signal to the first input terminal i1 of the differential amplifier 70 at the same moment, and multiple fourth electrodes 64 transmit signals to the second input terminal i2 of the differential amplifier 70 in a time-division manner.

[0283] It can be understood that at the same moment, the third electrode 63 and the fourth electrode 64 that transmit signals to the first input terminal i1 and the second input terminal i2 of the differential amplifier 70 are located on both sides of the same spin-orbit coupling layer 20.

[0284] The storage device 100 provided by the embodiments of the present application can reduce the number of differential amplifiers 70, thereby reducing the area of the storage device 100.

[0285] An embodiment of the present application further provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions run on an electronic device, the electronic device is caused to execute the above-related method steps to implement the reading method or the writing method in the above embodiment.

[0286] An embodiment of the present application further provides a computer program product. When the computer program product runs on a computer, the computer is caused to execute the above-related steps to implement the reading method or the writing method executed by the electronic device in the above embodiment.

[0287] It should be noted that the high, medium, and low mentioned in the embodiments of the present application are relative to the result values and there are no specific size limitations.

[0288] As described above, the above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A storage device, It is characterized in that include: A first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction are sequentially stacked; The first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer; The first free layer and the second free layer are disposed on two opposite surfaces of the spin-orbit coupling layer; The first free layer has a magnetization direction facing toward or away from the spin-orbit coupling layer, and the second free layer has a magnetization direction facing toward or away from the spin-orbit coupling layer; When the magnetization direction of the first free layer is toward the spin-orbit coupling layer and the magnetization direction of the second free layer is toward the spin-orbit coupling layer, the memory device is in a low resistance state; When the magnetization direction of the first free layer is toward the spin-orbit coupling layer and the magnetization direction of the second free layer is away from the spin-orbit coupling layer, or when the magnetization direction of the first free layer is away from the spin-orbit coupling layer and the magnetization direction of the second free layer is toward the spin-orbit coupling layer, the memory device is in a neutral resistance state; When the magnetization direction of the first free layer is away from the spin-orbit coupling layer and the magnetization direction of the second free layer is away from the spin-orbit coupling layer, the memory device is in a high resistance state.

2. The memory device according to claim 1, It is characterized in that The first magnetic tunnel junction and the second magnetic tunnel junction have the same structure.

3. The memory device according to claim 1, It is characterized in that The first magnetic tunnel junction further includes a first tunneling layer and a first fixed layer sequentially stacked on the first free layer; and / or, The second magnetic tunnel junction further includes a second tunnel layer and a second fixed layer sequentially stacked on the second free layer.

4. The memory device according to any one of claims 1 to 3, It is characterized in that The memory device further includes a first electrode and a second electrode; The first electrode and the second electrode are coupled to two opposite sides of the spin-orbit coupling layer.

5. The memory device according to claim 4, It is characterized in that The memory device further includes a third electrode and a fourth electrode; The third electrode is coupled to the first fixed layer of the first magnetic tunnel junction, and the fourth electrode is coupled to the second fixed layer of the second magnetic tunnel junction.

6. The memory device according to claim 5, It is characterized in that The second electrode, the third electrode and the fourth electrode are respectively coupled to a reference ground terminal.

7. A memory chip, It is characterized in that A storage device comprising any one of claims 1 to 6.

8. The memory chip according to claim 7, It is characterized in that The memory chip also includes a differential amplifier; The first input terminal of the differential amplifier is coupled to the third electrode of the memory device, and the second input terminal of the differential amplifier is coupled to the fourth electrode of the memory device.

9. The memory chip according to claim 8, It is characterized in that The first input terminal of the differential amplifier is coupled to a plurality of third electrodes, and the second input terminal of the differential amplifier is coupled to a plurality of fourth electrodes; The memory chip also includes a time-sharing reading control circuit; The time-sharing reading control circuit is coupled to the storage device and is used to send a time-sharing reading instruction to the storage device so that the multiple third electrodes transmit signals to the first input terminal of the differential amplifier in a time-sharing manner, and the multiple fourth electrodes transmit signals to the second input terminal of the differential amplifier in a time-sharing manner.

10. A method for preparing a memory device, It is characterized in that include: Forming a first magnetic tunnel junction, a spin-orbit coupling layer and a second magnetic tunnel junction which are sequentially stacked on a substrate; Wherein, the first magnetic tunnel junction includes a first free layer; the second magnetic tunnel junction includes a second free layer; the first free layer and the second free layer are arranged on two opposite surfaces of the spin-orbit coupling layer; The first free layer has a magnetization direction facing toward or away from the spin-orbit coupling layer, and the second free layer has a magnetization direction facing toward or away from the spin-orbit coupling layer; When the magnetization direction of the first free layer is toward the spin-orbit coupling layer and the magnetization direction of the second free layer is toward the spin-orbit coupling layer, the memory device is in a low resistance state; When the magnetization direction of the first free layer is toward the spin-orbit coupling layer and the magnetization direction of the second free layer is away from the spin-orbit coupling layer, or when the magnetization direction of the first free layer is away from the spin-orbit coupling layer and the magnetization direction of the second free layer is toward the spin-orbit coupling layer, the memory device is in a neutral resistance state; When the magnetization direction of the first free layer is away from the spin-orbit coupling layer and the magnetization direction of the second free layer is away from the spin-orbit coupling layer, the memory device is in a high resistance state.

11. The method for preparing a memory device according to claim 10, It is characterized in that The method of forming a first magnetic tunnel junction, a spin-orbit coupling layer and a second magnetic tunnel junction which are sequentially stacked on a substrate comprises: forming a first fixed film on the substrate; forming a first tunneling film on a surface of the first fixed film away from the substrate; forming a first free film on a surface of the first tunneling film away from the first fixed film; forming a spin-orbit coupling film on a surface of the first free film away from the first tunneling film; forming a second free film on a surface of the spin-orbit coupling film away from the first free film; forming a second tunneling film on a surface of the second free film away from the spin-orbit coupling film; forming a second fixed film on a surface of the second tunneling film away from the second free film; The first fixed film, the first tunneling film, the first free film, the spin-orbit coupling film, the second free film, the second tunneling film, and the second fixed film are patterned by a patterning process to form the first magnetic tunnel junction composed of a first fixed layer, a first tunneling layer, and a first free layer stacked in sequence, the spin-orbit coupling layer, and the second magnetic tunnel junction composed of a second free layer, a second tunneling layer, and a second fixed layer stacked in sequence.

12. A method for reading a storage device, characterized in that, the storage device includes a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction stacked in sequence; the first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer; the first free layer and the second free layer are disposed on two opposite surfaces of the spin-orbit coupling layer; the first free layer has a magnetization direction towards or away from the spin-orbit coupling layer, and the second free layer has a magnetization direction towards or away from the spin-orbit coupling layer; when the magnetization direction of the first free layer faces the spin-orbit coupling layer and the magnetization direction of the second free layer faces the spin-orbit coupling layer, the storage device is in a low-resistance state; when the magnetization direction of the first free layer faces the spin-orbit coupling layer and the magnetization direction of the second free layer faces away from the spin-orbit coupling layer, or when the magnetization direction of the first free layer faces away from the spin-orbit coupling layer and the magnetization direction of the second free layer faces the spin-orbit coupling layer, the storage device is in a medium-resistance state; when the magnetization direction of the first free layer faces away from the spin-orbit coupling layer and the magnetization direction of the second free layer faces away from the spin-orbit coupling layer, the storage device is in a high-resistance state; the method for reading the storage device includes: applying a voltage signal to the spin-orbit coupling layer; reading the output current of the spin-orbit coupling layer; obtaining data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the spin-orbit coupling layer.

13. The method for reading a storage device according to claim 12, characterized in that, the obtaining data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the spin-orbit coupling layer includes: In the case of I out = I in + I ish the low-resistance state is read In the case of I out = I in + 1 / 2I ish the medium resistance state is read When at I out = I in the high impedance state is read; Among them, I out is the output current of the spin-orbit coupling layer; I in is the in-plane current generated after applying a voltage signal to the spin-orbit coupling layer; I ish is the inverse spin Hall current generated by the inverse spin Hall effect after applying a voltage signal to the spin-orbit coupling layer.

14. A method for reading a storage device, characterized in that, the storage device includes a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction stacked in sequence; the first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer; the first free layer and the second free layer are disposed on two opposite surfaces of the spin-orbit coupling layer; the first free layer has a magnetization direction towards or away from the spin-orbit coupling layer, and the second free layer has a magnetization direction towards or away from the spin-orbit coupling layer; When the magnetization direction of the first free layer faces the spin-orbit coupling layer and the magnetization direction of the second free layer faces the spin-orbit coupling layer, the storage device is in a low-resistance state; When the magnetization direction of the first free layer faces the spin-orbit coupling layer and the magnetization direction of the second free layer faces away from the spin-orbit coupling layer, or when the magnetization direction of the first free layer faces away from the spin-orbit coupling layer and the magnetization direction of the second free layer faces the spin-orbit coupling layer, the storage device is in a medium-resistance state; When the magnetization direction of the first free layer faces away from the spin-orbit coupling layer and the magnetization direction of the second free layer faces away from the spin-orbit coupling layer, the storage device is in a high-resistance state; The reading method of the storage device includes: Applying a voltage signal to the spin-orbit coupling layer; Reading the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction; Obtaining the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction.

15. The reading method of the storage device according to claim 14, wherein, the obtaining the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction according to the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction includes: When I out '> 0, read the low-resistance state; When I out ' = 0, read the mid-resistance state; When in I out ' < 0, read the high impedance state; I out ' is the difference between the output current of the first magnetic tunnel junction and the output current of the second magnetic tunnel junction.

16. A writing method of a storage device, wherein, the storage device includes a first magnetic tunnel junction, a spin-orbit coupling layer, and a second magnetic tunnel junction which are sequentially stacked; the first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer; the first free layer and the second free layer are disposed on two opposite surfaces of the spin-orbit coupling layer; the first free layer has a magnetization direction facing or facing away from the spin-orbit coupling layer, and the second free layer has a magnetization direction facing or facing away from the spin-orbit coupling layer; When the magnetization direction of the first free layer faces the spin-orbit coupling layer and the magnetization direction of the second free layer faces the spin-orbit coupling layer, the storage device is in a low-resistance state; When the magnetization direction of the first free layer faces the spin-orbit coupling layer and the magnetization direction of the second free layer faces away from the spin-orbit coupling layer, or when the magnetization direction of the first free layer faces away from the spin-orbit coupling layer and the magnetization direction of the second free layer faces the spin-orbit coupling layer, the storage device is in a medium-resistance state; When the magnetization direction of the first free layer faces away from the spin-orbit coupling layer and the magnetization direction of the second free layer faces away from the spin-orbit coupling layer, the storage device is in a high-resistance state; The writing method of the storage device includes: Applying voltage signals to at least one of the first magnetic tunnel junction and the second magnetic tunnel junction and the spin-orbit coupling layer respectively; The voltage signal is used to change the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction so as to write corresponding data into the storage device.

17. The writing method of the storage device according to claim 16, wherein, applying voltage signals to at least one of the first magnetic tunnel junction and the second magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying voltage signals to one of the first magnetic tunnel junction and the second magnetic tunnel junction and the spin-orbit coupling layer respectively; the voltage signal is used to change the resistance state of one of the first magnetic tunnel junction and the second magnetic tunnel junction so as to change the resistance state of the storage device and write data corresponding to the resistance state of the storage device into the storage device.

18. The writing method of the storage device according to claim 16, wherein, applying voltage signals to at least one of the first magnetic tunnel junction and the second magnetic tunnel junction and the spin-orbit coupling layer respectively includes: applying voltage signals to the first magnetic tunnel junction, the second magnetic tunnel junction and the spin-orbit coupling layer respectively; the voltage signal is used to change the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction so as to change the resistance state of the storage device and write data corresponding to the resistance state of the storage device into the storage device.

19. An electronic device, wherein, it includes the storage chip according to any one of claims 7-9.

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