Simulate the register reset method in real environment
By using register models and randomization methods in the chip verification platform to simulate the random state switching of the chip, the problem of inaccurate verification methods in the existing technology is solved, real environment simulation verification of DUT is realized, and the accuracy of verification results is ensured.
Patent Information
- Application Number
- CN202210418235.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-21
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2042-04-21
AI Technical Summary
In the prior art, the chip verification method is inaccurate and cannot simulate the situation where the chip switches from an unknown random state to another working mode in the actual use environment, resulting in inaccurate verification results, which may lead to the chip being unable to work normally after chipping.
By creating sequence incentives in the verification platform, using the handle of the register model to call the get_registers method to collect registers, call the randomize() method to randomize the register field value, disrupt the order in the register queue, and update the register value in the DUT, simulating the random state switching of the chip in the real environment.
The real environment simulation verification of DUT is realized, which avoids the chip chip failure caused by inaccurate verification methods in the prior art, and ensures the accuracy of the verification results.
Smart Images
Figure CN114706783B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip verification technology, and in particular to a register resetting method in a simulated real environment. Background Art
[0002] The process of building a verification platform to verify the DUT includes: 1. Power on, 2. Reset, 3. Configure registers to set its working mode, 4. Run test cases to complete the target test content, 5. Wait for the simulation to end and check the results. After resetting the DUT (Device Under Test), the registers in it must be configured to set its working mode. However, sometimes after testing a working mode, it is necessary to reconfigure its registers to make it work in another working mode, and then run the corresponding test cases in another mode to verify the DUT. At this time, the general practice is to reset and then reconfigure its target mode registers, and randomly test other registers. In short, it is to repeat the above process continuously, configure the DUT registers to make it work in different modes, to verify whether its functions are correct in different modes. If it is correct, continue to configure the registers to verify the next working mode. If it is not correct, debug the problem, determine whether it is a problem with the DUT or the verification platform, and then fix the problem.
[0003] In the prior art, because the chip generally does not reset itself and then configure the working mode in the actual use environment, but directly modifies the working mode during normal operation, that is, we cannot reset the DUT first and then configure its working mode. This is because it makes the DUT always start another working mode in a known state, while in the actual environment, the chip switches from an unknown random state to another working mode. Therefore, the method of resetting first and then reconfiguring the working mode will lead to inaccurate verification results, because it does not simulate the most realistic use environment, which is prone to unexpected problems, and ultimately causes the chip to fail to work properly after tape-out. Summary of the invention
[0004] According to an embodiment of the present invention, a register resetting method in a simulated real environment is provided, comprising the following steps:
[0005] Build a verification platform;
[0006] Power on and reset the DUT of the verification platform;
[0007] Creating a sequence stimulus in the verification platform for reconfiguring a first register of the verification platform;
[0008] Send execution random_sequence to perform random instruction execution test.
[0009] Furthermore, a sequence stimulus is created in the verification platform to reconfigure the registers of the verification platform, which includes the following sub-steps:
[0010] Use the handle of the register model of the verification platform to call the built-in get_registers method of the register model to collect several first registers in the register model into a queue and obtain the queue model_regs;
[0011] Call the randomize() method of SystemVerilog language to randomly set the field values of several first registers;
[0012] Call the shuffle() method of the queue model_regs to disrupt the order of several first registers;
[0013] Call the update() method of the first register to update the value of the second register in the DUT.
[0014] Furthermore, when the randomize() method is called to randomly set the field values of several first registers, a random constraint may be set at the same time to fix some field values of the several first registers.
[0015] Furthermore, the first register is reconfigured multiple times in one test case before sending the random_sequence for execution.
[0016] According to the register resetting method simulating a real environment in an embodiment of the present invention, the real use environment of the chip is simulated to verify the DUT, which solves the problem of subsequent chip tape-out failure caused by inaccurate verification methods in the prior art.
[0017] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the technology as claimed. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 The schematic diagram of the verification process of the prior art;
[0019] Figure 2 A schematic diagram of a verification process of a register reset method simulating a real environment according to an embodiment of the present invention;
[0020] Figure 3 It is a flowchart of a register resetting method simulating a real environment according to an embodiment of the present invention;
[0021] Figure 4 for Figure 3 Flowchart of sub-steps of step S3 in FIG. DETAILED DESCRIPTION
[0022] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings to further illustrate the present invention.
[0023] First, combine Figures 2~4 A register resetting method in a simulated real environment according to an embodiment of the present invention is described for chip verification, which has a wide range of application scenarios.
[0024] like Figures 2~4 As shown, the register resetting method in a simulated real environment according to an embodiment of the present invention comprises the following steps:
[0025] In S1, Figure 2~3 As shown, build a verification platform, preferably a UVM (Universal Verification Methodology) verification platform;
[0026] In S2, if Figure 2~3 As shown, the DUT of the verification platform is powered on and reset;
[0027] In S3, such as Figure 2~3 As shown, a sequence stimulus is created in the verification platform to reconfigure the first register of the verification platform;
[0028] In S4, Figure 2~3 As shown, random_sequence is sent for execution to perform a random instruction execution test.
[0029] Furthermore, before sending and executing the random_sequence, the first register is reconfigured multiple times in one test case, and the register value configured each time is different.
[0030] Furthermore, a sequence stimulus is created in the verification platform to reconfigure the registers of the verification platform, which includes the following sub-steps:
[0031] In S31, if Figures 2~4 As shown, the handle of the register model of the verification platform is used to call the built-in get_registers method of the register model to collect several first registers in the register model in a queue, and obtain the queue model_regs. The get_registers method is a built-in method provided for the register model in the UVM verification methodology, and is used to obtain all the registers contained in the register model.
[0032] In S32, if Figures 2~4 As shown, the randomize() method of the SystemVerilog language is called to randomly set the field values of several first registers. The randomize() method is a built-in method of SystemVerilog, which is used to randomize the domain segment of the register, that is, the value of the field. In addition, SystemVerilog is usually used as a development programming language for digital chip design and verification;
[0033] In S33, Figures 2~4 As shown, the shuffle() method of the queue model_regs is called to disrupt the order of several first registers. The shuffle() method is built into the queue model_regs by SystemVerilog and is used to disrupt the position order of the elements in the queue.
[0034] In S34, Figures 2~4 As shown, the update() method of the first register is called to update the value of the second register in the DUT.
[0035] Furthermore, when calling the randomize() method to randomly set the field values of several first registers, random constraints can be set at the same time to fix some field values of several first registers, so as to facilitate the verification personnel to manually configure the registers with clear configuration order or numerical requirements or other special requirements in the DUT design document, and the configuration order and numerical values of the remaining registers are set randomly. The verification personnel repeats the above verification process multiple times to collide with situations that may cause the DUT to malfunction, so as to verify the DUT as comprehensively as possible.
[0036] like Figure 1 As shown in the figure, after the reset, the DUT will return to a known state, and then the register configuration and stimulus are applied for simulation verification. Therefore, it cannot simulate the most realistic environment, which may easily cause hidden dangers to the final chip tape-out. Figure 2As shown, we can consider not resetting it and directly configuring its registers so that it works in a random state to simulate the real environment. To achieve this, we need to make comprehensive use of the interface methods provided by UVM and SystemVerilog. First, collect the registers into a queue. We can call the get_registers() method through the register model handle to implement it; secondly, randomly set the register field value. We can call the randomize() method and combine it with random constraints to implement it; then shuffle the order of registers in the register queue. We can implement it by calling the shuffle() method of the array; next, randomly update the value of the register in the DUT in the shuffled order. We can implement it by calling the update() method of the register; finally, repeatedly configure the registers and apply random excitation to fully simulate and verify the DUT.
[0037] Above, refer to Figures 2~4 The present invention describes a register resetting method in a simulated real environment according to an embodiment of the present invention, which simulates the real use environment of the chip to verify the DUT, thereby avoiding the problem of later chip tape-out failure caused by inaccurate verification methods in the prior art.
[0038] It should be noted that, in this specification, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprises..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0039] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the present invention. After reading the above content, it will be apparent to those skilled in the art that various modifications and substitutions of the present invention will occur. Therefore, the protection scope of the present invention should be limited by the appended claims.
Claims
1. A register reset method simulating a real environment, characterized in that: The following steps are included: Build a verification platform; Powering on and resetting the DUT of the verification platform; Creating a sequence stimulus in the verification platform for reconfiguring a first register of the verification platform; Send execution random_sequence to perform random instruction execution test; Creating a sequence stimulus in the verification platform for reconfiguring registers of the verification platform includes the following sub-steps: Using the handle of the register model of the verification platform, calling the get_registers method built into the register model to collect a plurality of first registers in the register model into a queue, and obtaining the queue model_regs; Calling the randomize() method of the SystemVerilog language to randomly set the field values of the plurality of first registers; Calling the shuffle() method of the queue model_regs to disrupt the order of the plurality of first registers; Calling the update() method of the first register to update the value of the second register in the DUT; When calling the randomize() method to randomly set the field values of the plurality of first registers, a random constraint may be set to fix some field values of the plurality of first registers; The first register is reconfigured multiple times in a test case before sending and executing the random_sequence.