Display module, display panel, preparation method therefor, and to-be-cut mother board

Abstract

The present disclosure provides a display module, a display panel, a preparation method thereof, and a to-be-cut mother board. The to-be-cut mother board comprises a substrate, a wiring structure arranged on one side of the substrate, and a plurality of signal lines arranged in parallel in the part of the wiring structure located in the pad area. The pad area comprises a first area and a second area in the extension direction of the signal lines, the first area is located between the second area and the display area, the part of the signal lines located in the first area can be connected with an external circuit board, and the part of the signal lines located in the second area comprises a plurality of line segments arranged in insulation in the extension direction of the signal lines. The present disclosure can solve the problem of dark line defects.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display module, a display panel and its preparation method, and a motherboard to be cut. Background Technology

[0002] With economic development, display panels are being used more and more widely in people's lives. A display panel mainly consists of a light-emitting structure. This structure includes two electrodes arranged opposite each other and a light-emitting layer located between the two electrodes. The two electrodes are electrically connected to a power source to supply power to the light-emitting layer. However, existing display panels suffer from dark line defects. Summary of the Invention

[0003] The purpose of this disclosure is to provide a display module, a display panel, a method for manufacturing the same, and a motherboard to be cut, which can solve the problem of poor dark lines.

[0004] According to one aspect of this disclosure, a motherboard to be cut is provided, the motherboard to be cut including a display area and a peripheral area, the peripheral area surrounding the display area, the peripheral area including a pad area and a cutting area, the pad area being located between the cutting area and the display area, the motherboard to be cut comprising:

[0005] Substrate;

[0006] A trace structure is disposed on one side of the substrate, and the portion of the trace structure located in the pad area includes multiple signal lines arranged in parallel; the pad area includes a first region and a second region in the extension direction of the signal lines, the first region being located between the second region and the display area; the portion of the signal lines located in the first region can be bonded to an external circuit board; the portion of the signal lines located in the second region includes multiple insulated line segments in the extension direction of the signal lines.

[0007] Furthermore, the second region is provided with one or more strip grooves, which penetrate the wiring structure in the depth direction of the strip grooves. The strip grooves have different extension directions from the signal lines and are arranged to intersect the signal lines, so that the signal lines are divided into a plurality of spaced-apart segments.

[0008] Furthermore, the mother plate to be cut includes:

[0009] Insulating adhesive is used to fill the strip groove.

[0010] Furthermore, the insulating adhesive is a photosensitive adhesive or a heat-sensitive adhesive.

[0011] Furthermore, the groove extends into the substrate in the depth direction of the groove.

[0012] Furthermore, the cutting area is adjacent to the second area; the width of the portion of the signal line located in the first area is greater than the width of the portion of the signal line located in the second area; the distance between the boundary line between the first area and the second area and the strip groove is greater than the distance between the strip groove and the boundary line between the second area and the cutting area.

[0013] Furthermore, the distance between the boundary line between the first region and the second region and the strip groove is greater than 145 μm, and the distance between the strip groove and the boundary line between the second region and the cutting area is 45 μm-105 μm.

[0014] Furthermore, the extending direction of the strip is perpendicular to the extending direction of the signal line.

[0015] Furthermore, there are multiple pad areas, which are spaced apart in a direction perpendicular to the extension direction of the signal line;

[0016] One of the strip slots is arranged to intersect with the signal lines in at least two of the pad areas; or, one of the strip slots is arranged to intersect with the signal lines in only one of the pad areas.

[0017] Furthermore, the number of the strip slots is multiple, and at least two of the strip slots are spaced apart in the extension direction of the signal line.

[0018] Furthermore, the mother plate to be cut includes:

[0019] A first insulating layer is disposed on the substrate, and the wiring structure is disposed on the side of the first insulating layer away from the substrate;

[0020] A second insulating layer is disposed on the side of the trace structure away from the substrate. The second insulating layer has a window through which a portion of the signal line located in the second region is exposed.

[0021] Furthermore, the motherboard to be cut also includes a thin-film transistor, the thin-film transistor comprising:

[0022] An active layer is disposed on the substrate;

[0023] A first gate insulating layer is disposed on the substrate and covers the active layer;

[0024] The first gate electrode layer is disposed on the side of the first gate insulating layer away from the substrate;

[0025] A second gate insulating layer covers the first gate electrode layer and the first gate insulating layer;

[0026] The second gate electrode layer is disposed on the side of the second gate insulating layer away from the substrate;

[0027] An interlayer insulating layer covers the second gate electrode layer and the second gate insulating layer;

[0028] The first source / drain electrode layer is disposed on the side of the interlayer insulating layer away from the substrate and is connected to the active layer;

[0029] A first planarization layer covers the first source / drain electrode layer and the interlayer insulating layer;

[0030] The signal line includes a first solder pad, and the first source / drain electrode layer is disposed in the same layer as the first solder pad.

[0031] Furthermore, the signal line also includes a second solder pad and a third solder pad, wherein the second solder pad is disposed in the same layer as the second gate electrode layer, the third solder pad is disposed in the same layer as the first gate electrode layer, the first solder pad is connected to the second solder pad, and the second solder pad is connected to the third solder pad.

[0032] According to one aspect of this disclosure, a method for manufacturing a display panel is provided, comprising:

[0033] Provide the aforementioned motherboard to be cut;

[0034] The motherboard to be cut is cut along the cutting area to form the display panel.

[0035] According to one aspect of this disclosure, a display panel is provided, the display panel being manufactured by the method described above.

[0036] According to one aspect of this disclosure, a display module is provided, comprising:

[0037] The aforementioned display panel;

[0038] An external circuit board is bonded to the portion of the signal line located in the first region.

[0039] The display module, display panel, and their manufacturing method disclosed herein, as well as the motherboard to be cut, can avoid short circuit defects in the portion of the signal line located in the first region after cutting and carbonization because the portion of the signal line located in the second region includes multiple insulated segments in the extension direction of the signal line. This solves the problem of dark line defects caused by short circuit defects in the signal line. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of signal lines in related technologies.

[0041] Figure 2This is a schematic diagram of the mother plate to be cut according to an embodiment of this disclosure.

[0042] Figures 3-6 This is a schematic cross-sectional view of the mother plate to be cut according to an embodiment of this disclosure.

[0043] Figure 7 This is a schematic diagram of the signal lines according to an embodiment of the present disclosure.

[0044] Figure 8 yes Figure 2 A schematic diagram of the AA section of the structure shown.

[0045] Figures 9-12 This is a schematic diagram of a display module according to an embodiment of the present disclosure.

[0046] Figures 13-14 This is a cross-sectional schematic diagram of the display module according to an embodiment of the present disclosure.

[0047] Explanation of reference numerals in the attached figures: 1. Substrate; 2. First insulating layer; 3. Wiring structure; 4. Second insulating layer; 5. Window; 6. Strip groove; 7. Insulating adhesive; 8. Conductive adhesive; 9. Lead; 10. Base; 11. Backing adhesive; 12. Protective adhesive; 13. Positive adhesive; 14. Active layer; 15. First gate insulating layer; 16. First gate electrode layer; 17. Second gate insulating layer; 18. Second gate electrode layer; 19. Interlayer insulating layer; 20. First source / drain electrode layer; 21. First planarization layer; 22. 23. Second source / drain electrode layer; 24. Second planarization layer; 25. First electrode; 26. Light-emitting layer; 27. Second electrode; 28. Pixel defining layer; 29. ​​Signal line; 200. First solder pad; 201. Second solder pad; 202. Third solder pad; 203. Carbide; 200. Fan-out area; 201. Pad area; 202. Second area; 300. Cut-out area; 400. Display area; 500. Peripheral area; 600. External circuit board; 700. Connecting circuit board. Detailed Implementation

[0048] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses consistent with some aspects of this disclosure as detailed in the appended claims.

[0049] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. Unless otherwise defined, the technical or scientific terms used in this disclosure should be understood in their ordinary sense by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure and the claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “a” or “one,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. “A plurality” or “several” indicates two or more. Unless otherwise stated, the terms “front,” “rear,” “lower,” and / or “upper,” and similar terms are for ease of description only and are not limited to a location or spatial orientation. The terms “comprising,” “including,” and similar terms mean that the elements or objects preceding “comprising,” encompass the elements or objects listed following “comprising,” and their equivalents, and do not exclude other elements or objects. The terms “connected,” “linked,” and similar terms are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect. The singular forms “a,” “the,” and “the” used in this disclosure and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0050] In related technologies, display panels can be formed by laser cutting a motherboard. The motherboard includes a substrate and multiple signal lines located on the substrate. For example... Figure 1 As shown, when there is organic matter in the substrate, the laser used for cutting will burn the substrate to form carbide 29. This carbide 29 is conductive and can overlap between two signal lines 28, causing short circuit defects in the signal lines 28, which in turn easily leads to dark line defects.

[0051] This disclosure provides a mother plate to be cut. For example... Figure 2 , Figure 3 as well as Figure 7 As shown, the motherboard to be cut may include a display area 400 and a peripheral area 500. The peripheral area 500 may surround the display area 400. The peripheral area 500 may include a pad area 200, a fan-out area 100, and a cutting area 300. The pad area 200 may be spaced apart from the display area 400. The fan-out area 100 may be located between the pad area 200 and the display area 400. The pad area 200 may be located between the cutting area 300 and the display area 400. The motherboard to be cut may include a substrate 1 and a wiring structure 3, wherein:

[0052] The trace structure 3 is disposed on one side of the substrate 1, and the portion of the trace structure 3 located in the pad area 200 includes a plurality of parallel signal lines 28. The pad area 200 includes a first region 201 and a second region 202 in the extension direction of the signal lines 28. The first region 201 is located between the second region 202 and the display area 400. The portion of the signal lines 28 located in the first region 201 can be bonded to an external circuit board 600. The portion of the signal lines 28 located in the second region 202 includes a plurality of insulated line segments in the extension direction of the signal lines 28.

[0053] In the motherboard to be cut according to the present invention, since the portion of the signal line 28 located in the second region 202 includes multiple insulated segments in the extension direction of the signal line 28, it is possible to avoid short circuit failure in the portion of the signal line 28 located in the first region 201 after cutting and carbonization, thereby solving the problem of dark wire defects caused by short circuit failure of the signal line 28.

[0054] The following is a detailed description of each part of the mother plate to be cut according to the embodiments of this disclosure:

[0055] like Figure 3 As shown, the substrate 1 can be a rigid substrate. This rigid substrate can be a glass substrate or a PMMA (Polymethyl methacrylate) substrate, etc. Alternatively, the substrate 1 can be a flexible substrate. This flexible substrate can be a PET (Polyethylene terephthalate) substrate, a PEN (Polyethylene naphthalate dimethyl methacrylate) substrate, or a PI (Polyimide) substrate. Furthermore, the substrate 1 may contain organic materials.

[0056] like Figure 3 As shown, the wiring structure 3 is disposed on one side of the substrate 1. The motherboard to be cut in this disclosure may further include a first insulating layer 2 and a second insulating layer 4. The first insulating layer 2 may be disposed on the substrate 1, and the wiring structure 3 may be disposed on the side of the first insulating layer 2 facing away from the substrate 1. The second insulating layer 4 may be disposed on the side of the wiring structure 3 facing away from the substrate 1.

[0057] like Figure 3 and Figure 7As shown, a portion of the trace structure 3 can be located in the pad area 200, and the portion of the trace structure 3 in the pad area 200 includes multiple signal lines 28 arranged in parallel. The pad area 200 may include a first region 201 and a second region 202 in the extension direction of the signal lines 28. The extension direction of the signal lines 28 may be perpendicular to the thickness direction of the substrate 1. The first region 201 is located between the second region 202 and the display area 400. The boundary line between the first region 201 and the second region 202 may be perpendicular to the extension direction of the signal lines 28. The signal lines 28 are provided in both the first region 201 and the second region 202. The width of the portion of the signal lines 28 in the first region 201 is greater than the width of the portion of the signal lines 28 in the second region 202, and the portion of the signal lines 28 in the first region 201 can be bonded to the external circuit board 600. The second insulating layer 4 may be provided with a window 5, through which the portion of the signal line 28 located in the second region 202 can be exposed, so as to facilitate the bonding and connection of the signal line 28 to the external circuit board 600.

[0058] like Figure 2 and Figure 3 As shown, the second region 202 may have one or more slots 6. In the depth direction of the slot 6, the slot 6 penetrates the wiring structure 3, that is, the slot 6 penetrates the signal line 28. The depth direction of the slot 6 may be the same as the thickness direction of the substrate 1. Taking a motherboard to be cut including a first insulating layer 2 and a second insulating layer 4 as an example, in the depth direction of the slot 6, the slot 6 sequentially penetrates the second insulating layer 4, the wiring structure 3, and the first insulating layer 2. Further, in the depth direction of the slot 6, the slot 6 extends into the substrate 1. For example, the distance between the surface of the first insulating layer 2 facing away from the second insulating layer 4 and the surface of the second insulating layer 4 facing away from the first insulating layer 2 is 2μm-3μm, such as 2μm, 2.4μm, 2.5μm, 2.8μm, 3μm, etc.; the depth of the slot 6 can be 3μm-6μm, such as 3μm, 4μm, 5μm, 6μm, etc. The width of the groove 6 can be 10μm-40μm, for example, 10μm, 14μm, 25μm, 40μm, etc. The extension direction of the groove 6 can be perpendicular to the thickness direction of the substrate 1. The extension direction of the groove 6 can be different from the extension direction of the signal line 28, and the groove 6 can intersect with the signal line 28 to divide the signal line 28 into multiple spaced segments, thereby dividing the signal line 28 into multiple insulated segments. For example, the extension direction of the groove 6 can be perpendicular to the extension direction of the signal line 28. In other embodiments of this disclosure, at least a portion of the groove 6 can be curved, for example, an S-shaped curve.

[0059] like Figure 9 and Figure 10As shown, there can be multiple pad areas 200. These multiple pad areas 200 are spaced apart in a direction perpendicular to the extension direction of the signal lines 28. In one embodiment of this disclosure, a strip groove 6 intersects with the signal lines 28 in at least two pad areas 200. Further, a strip groove 6 intersects with the signal lines 28 in all pad areas 200, meaning that a strip groove 6 sequentially passes through all pad areas 200. Taking multiple strip grooves 6 as an example, each strip groove 6 intersects with the signal lines 28 in all pad areas 200, and at least two of the multiple strip grooves 6 are spaced apart in the extension direction of the signal lines 28. The spaced-apart strip grooves 6 can be arranged in parallel.

[0060] In another embodiment of this disclosure, such as Figure 11 and Figure 12 As shown, a slot 6 intersects only with a signal line 28 in one pad area 200, and each signal line 28 in each pad area 200 can intersect with one or more slots 6. Taking the intersection of a signal line 28 in a pad area 200 with multiple slots 6 as an example, at least two slots 6 are spaced apart in the extension direction of the signal line 28. The spaced-apart slots 6 can be arranged in parallel.

[0061] like Figure 4 As shown, the motherboard to be cut in this disclosure may also include insulating adhesive 7. This insulating adhesive 7 can fill the strip groove 6. The insulating adhesive 7 can be a photosensitive adhesive, such as Tuffy adhesive. Of course, the insulating adhesive 7 can also be a heat-sensitive adhesive, etc. The insulating adhesive 7 has low viscosity and good penetration performance, allowing it to quickly penetrate and diffuse after application to fill the strip groove 6. Figure 5 As shown, taking the bottom of the groove 6 extending into the substrate 1 and the substrate 1 including organic matter as an example, when the groove 6 is formed by laser cutting process, the substrate 1 will be burned by laser to form conductive carbide 29. The insulating adhesive 7 can wrap the carbide 29 and play the role of electrical isolation; at the same time, it can also prevent the formation and extension of cracks.

[0062] like Figure 6As shown, the cutting area 300 is located on the side of the second region 202 away from the first region 201, and the cutting area 300 is adjacent to the second region 202. The distance L1 between the boundary line between the first region 201 and the second region 202 and the strip groove 6 is greater than the distance L2 between the strip groove 6 and the cutting area 300. This arrangement can reduce the impact of the insulating adhesive 7 filled in the strip groove 6 on the bonding of the external circuit board 600. The distance L1 between the boundary line between the first region 201 and the second region 202 and the strip groove 6 can be greater than 145μm, for example, 150μm, 160μm, 170μm, 180μm, 2000μm, etc. The distance L2 between the strip groove 6 and the cutting area 300 can be 45μm-105μm, for example, 45μm, 50μm, 60μm, 70μm, 80μm, 90μm, 100μm, 105μm. The distance L2 between the groove 6 and the cutting area 300 can be the distance between the dividing line of the cutting area 300 and the second area 202 and the groove 6. After the motherboard to be cut is cut along the dividing line between the cutting area 300 and the second area 202, the end of the signal line 28 located in the second area 202 away from the first area 201 can form a cutting surface. The distance between the groove 6 and the cutting surface is the distance L2 between the groove 6 and the cutting area 300 mentioned above.

[0063] It should be noted that the distance between the strip groove 6 and other objects described in this disclosure can be the distance between the center line of the strip groove 6 and other objects. The center line of the strip groove 6 is located between the two walls of the strip groove 6, and the center line of the strip groove 6 extends in the extension direction of the strip groove 6. When there are multiple strip grooves 6, the "distance between the strip groove 6 and other objects" described in this disclosure can be "the distance between the strip groove 6 closest to the first region 201 among the multiple strip grooves 6 and other objects".

[0064] like Figure 8As shown, a thin-film transistor (TFT) can be disposed on the substrate 1. This TFT can be a top-gate TFT, but it can also be a bottom-gate TFT. Taking a top-gate TFT as an example, the TFT may include an active layer 14, a first gate insulating layer 15, a first gate electrode layer 16, a second gate insulating layer 17, a second gate electrode layer 18, an interlayer insulating layer 19, a first source / drain electrode layer 20, a first planarization layer 21, and a second source / drain electrode layer 22. The active layer 14 can be disposed on the substrate 1. The first gate insulating layer 15 can be disposed on the substrate 1 and cover the active layer 14. The first gate electrode layer 16 can be disposed on the side of the first gate insulating layer 15 away from the substrate 1. The second gate insulating layer 17 can be disposed on the first gate insulating layer 15 and cover the first gate electrode layer 16. The second gate electrode layer 18 can be disposed on the side of the second gate insulating layer 17 away from the substrate 1. The interlayer insulating layer 19 can be disposed on the second gate insulating layer 17 and cover the second gate electrode layer 18. The first source / drain electrode layer 20 may be disposed on the interlayer insulating layer 19 and connected to the active layer 14 via vias passing through the interlayer insulating layer 19, the first gate insulating layer 15, and the second gate insulating layer 17. The first planarization layer 21 may cover the first source / drain electrode layer 20 and the interlayer insulating layer 19. The second source / drain electrode layer 22 may be disposed on the first planarization layer 21 and electrically connected to the first source / drain electrode layer 20 of the thin-film transistor via vias passing through the first planarization layer 21. The motherboard to be cut in this disclosure may further include a second planarization layer 23. The second planarization layer 23 may cover the second source / drain electrode layer 22.

[0065] like Figure 8 As shown, the signal line 28 may include a first solder pad 281. The first source / drain electrode layer 20 may be disposed in the same layer as the first solder pad 281. The aforementioned second insulating layer 4 may be disposed in the same layer as the first planarization layer 21. The signal line 28 may also include a second solder pad 282 and a third solder pad 283. The second solder pad 282 may be disposed in the same layer as the second gate electrode layer 18. The third solder pad 283 may be disposed in the same layer as the first gate electrode layer 16. The first solder pad 281 may be connected to the second solder pad 282, and the second solder pad 282 may be connected to the third solder pad 283. The first insulating layer 2 may be composed of a first gate insulating layer 15, and the second insulating layer 4 may be composed of a second gate insulating layer 17, an interlayer insulating layer 19, and a first planarization layer 21, but this disclosure is not limited thereto.

[0066] like Figure 8As shown, the motherboard to be cut in this embodiment may further include a light-emitting structure. This light-emitting structure may be disposed on the side of the driving transistor facing away from the substrate 1. The light-emitting structure may include a first electrode 24 and a second electrode 26 disposed opposite to each other, and a light-emitting layer 25 located between the first electrode 24 and the second electrode 26. The light-emitting layer 25 may be an organic electroluminescent layer, or it may be a quantum dot light-emitting layer; this embodiment does not specifically limit this. The first electrode 24 may be an anode, and the second electrode 26 may be a cathode, but this disclosure is not limited thereto. The first electrode 24 may be disposed on the side of the second planarization layer 23 facing away from the substrate 1, and electrically connected to the second source / drain electrode layer 22 via a via passing through the second planarization layer 23. The motherboard to be cut in this disclosure may further include a pixel defining layer 27. The pixel defining layer 27 covers the second planarization layer 23 and the first electrode 24. The pixel defining layer 27 has pixel openings exposing the first electrode 24. The light-emitting layer 25 of the light-emitting structure may be disposed on the side of the first electrode 24 facing away from the substrate 1. The second electrode 26 of the light-emitting structure is disposed on the side of the light-emitting layer 25 facing away from the substrate 1. The display panel of this disclosure may further include an encapsulation layer. The encapsulation layer may cover the light-emitting structure. The encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. The first inorganic encapsulation layer and the second inorganic encapsulation layer are disposed opposite to each other, and the organic encapsulation layer covers the space between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

[0067] This disclosure also provides a method for manufacturing a display panel. The method may include: providing a mother plate to be cut as described in any of the above embodiments; and cutting the mother plate along a cutting area 300 to form a display panel. The cutting line may be the boundary line between the cutting area 300 and the first region 201, but this disclosure does not impose any special limitations on this.

[0068] This disclosure also provides a display panel. This display panel can be manufactured using the display panel manufacturing method described above.

[0069] This disclosure also provides a display module. For example... Figure 9 , Figure 10 , Figure 13 as well as Figure 14As shown, the display module may include an external circuit board 600 and the aforementioned display panel. The external circuit board 600 can be bonded to the portion of the signal line 28 located in the first region 201. The external circuit board 600 may include a substrate 10 and pins 9. The substrate 10 may be a flexible substrate, such as a PI substrate. The material of the pins 9 may be copper, etc. The pins 9 can be bonded to the signal line 28 using conductive adhesive 8 (ACF adhesive). In addition, a protective adhesive 12 (SR) may be provided on the side of the pins 9 facing away from the substrate 10. In this case, a portion of the pins 9 is not covered by the protective adhesive 12 to facilitate bonding. Taking the number of pad areas 200 as an example, the signal line 28 of each pad area 200 can be bonded to one external circuit board 600, and multiple external circuit boards 600 can also be connected to each other through a connecting circuit board 700. Furthermore, the display module may also include a positive adhesive 13 and a back adhesive 11. The positive adhesive 13 is bonded to the end of the external circuit board 600 near the display area 400 and covers the aforementioned conductive adhesive 8, pins 9, and the second insulating layer 4. The aforementioned protective adhesive 12, positive adhesive 13, and back adhesive 11 can be insulating materials. This display module can be a mobile phone display module or a computer display module, and of course, it can also be a television display module, etc.

[0070] The motherboard to be cut, the method for preparing the display panel, the display panel, and the display module provided in this disclosure belong to the same inventive concept. The descriptions of related details and beneficial effects can be found in each other and will not be repeated here.

[0071] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above with reference to a preferred embodiment, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A mother panel to be cut, comprising a display area and a peripheral area, the peripheral area surrounding the display area, the peripheral area comprising a pad area and a cut area, the pad area being located between the cut area and the display area, characterized in that, The to-be-cut mother board comprises: a substrate; a wiring structure arranged on one side of the substrate, and a part of the wiring structure located in the pad area comprises a plurality of signal lines arranged in parallel; the pad area comprises a first area and a second area in the extension direction of the signal lines, the first area is located between the second area and the display area, a part of the signal lines located in the first area can be connected to an external circuit board by binding, and a part of the signal lines located in the second area is divided into a plurality of line segments arranged in insulation by a strip-shaped groove intersecting with the extension direction of the signal lines in the extension direction of the signal lines; insulating glue filled in the strip-shaped groove; wherein, the distance between the boundary line between the first area and the second area and the strip-shaped groove is greater than the distance between the boundary line between the strip-shaped groove and the second area and the cutting area, the cutting area is adjacent to the second area, and the width of the part of the signal lines located in the first area is greater than the width of the part of the signal lines located in the second area.

2. The mother board to be cut according to claim 1, characterized in that The second area is provided with one or more strip-shaped grooves, and the strip-shaped groove extends through the wiring structure in the depth direction of the strip-shaped groove.

3. The mother board to be cut according to claim 1, characterized in that, The insulating glue is photosensitive glue or heat-sensitive glue.

4. The mother board to be cut according to claim 2, characterized in that, The strip-shaped groove extends into the substrate in the depth direction of the strip-shaped groove.

5. The mother board to be cut according to claim 4, characterized in that The distance between the boundary line between the first area and the second area and the strip-shaped groove is greater than 145 μm, and the distance between the boundary line between the strip-shaped groove and the second area and the cutting area is 45 μm-105 μm.

6. The mother board to be cut according to claim 2, characterized in that, The extension direction of the strip-shaped groove is perpendicular to the extension direction of the signal lines.

7. The mother board to be cut according to claim 2, characterized in that, The number of the pad areas is multiple, and the multiple pad areas are distributed at intervals in the direction perpendicular to the extension direction of the signal lines. One strip-shaped groove is arranged to intersect with the signal lines in at least two pad areas, or one strip-shaped groove is arranged to intersect with the signal lines in only one pad area.

8. The mother board to be cut according to claim 2, characterized in that, The number of the strip-shaped grooves is multiple, and at least two strip-shaped grooves are arranged at intervals in the extension direction of the signal lines.

9. The mother board to be cut according to claim 1, characterized in that, The to-be-cut mother board comprises: a first insulating layer arranged on the substrate, and the wiring structure is arranged on the side of the first insulating layer away from the substrate; a second insulating layer arranged on the side of the wiring structure away from the substrate, and the second insulating layer is provided with a window, and the part of the signal lines located in the second area is exposed through the window.

10. The mother board to be cut according to claim 1, characterized in that, The to-be-cut mother board further comprises a thin film transistor, and the thin film transistor comprises: an active layer arranged on the substrate; a first gate insulating layer arranged on the substrate and covering the active layer; a first gate electrode layer arranged on the side of the first gate insulating layer away from the substrate; a second gate insulating layer covering the first gate electrode layer and the first gate insulating layer; a second gate electrode layer arranged on the side of the second gate insulating layer away from the substrate; an interlayer insulating layer covering the second gate electrode layer and the second gate insulating layer; a first source-drain electrode layer arranged on the side of the interlayer insulating layer away from the substrate and connected with the active layer; a first planarization layer covering the first source-drain electrode layer and the interlayer insulating layer; The signal line comprises a first solder pad, and the first source-drain electrode layer is arranged in the same layer as the first solder pad.

11. The mother board to be cut according to claim 10, characterized in that The signal line further comprises a second solder pad and a third solder pad, the second solder pad is arranged in the same layer as the second gate electrode layer, the third solder pad is arranged in the same layer as the first gate electrode layer, the first solder pad is connected with the second solder pad, and the second solder pad is connected with the third solder pad.

12. A method for manufacturing a display panel, characterized by, The method comprises the following steps: providing a to-be-cut mother board according to any one of claims 1-11; cutting the to-be-cut mother board along the cutting area to form the display panel.

13. A display panel, characterized by The display panel is prepared by the preparation method of the display panel according to claim 12.

14. A display module, characterized by The method comprises the following steps: the display panel according to claim 13; an external circuit board is connected with the part of the signal line located in the first area.

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