A thermal resistance measurement circuit and method for heterojunction semiconductor devices

Abstract

The present invention discloses a thermal resistance measurement circuit for a heterojunction semiconductor device and a method thereof, wherein the circuit includes a signal generation module, a driving module, a device to be tested, a controllable load module, a constant temperature device, a data acquisition module and a power supply module. The rate of change of the drain electrode current of the heterojunction semiconductor device with time in the thermally stable working state is extracted as a reference for the junction temperature, so as to calculate the thermal resistance value of the heterojunction semiconductor device in the thermally stable working state. The controllable load module can be adjusted to switch the circuit between a normal working mode and a measurement mode. The normal working mode is used to put the device to be tested in a thermally stable working state; the measurement mode is used to extract the rate of change of the drain electrode current of the device to be tested to calculate the thermal resistance.

Description

Technical Field

[0001] The present invention mainly relates to the reliability circuit and measurement field of high-voltage power semiconductor devices, and in particular to a measurement circuit and a measurement method for the thermal resistance of a heterojunction semiconductor device. Background Art

[0002] As the third-generation semiconductor materials emerge in the field of electronic power technology with their excellent performance, heterojunction semiconductor devices have received more and more attention. Among them, wide bandgap heterojunction semiconductor materials have demonstrated sufficient competitiveness in the fields of switching power supplies and power control with their excellent performance such as breakdown voltage and electron mobility. However, compared with its own advantages, the thermal conductivity of wide bandgap heterojunction semiconductor devices has become its own disadvantage. Studies have shown that most of the failures of power devices are related to heat. In order to improve the thermal design of heterojunction semiconductor devices, reduce the operating temperature, and improve thermal reliability and economy, it is first necessary to accurately measure the thermal resistance of heterojunction semiconductors during operation, that is, the temperature difference generated on the heat conductor.

[0003] According to the definition formula of thermal resistance, To accurately measure the thermal resistance of heterojunction semiconductor devices, it is necessary to accurately measure the input power of the device, the package case temperature of the device when it is working, and the junction temperature of the device when it is working. Generally speaking, the input power of the device and the package case temperature of the device when it is working are relatively easy and accurate to measure, but the junction temperature of the device when it is working normally is difficult to obtain. Summary of the invention

[0004] Technical problem: The present invention is a solution to the above-mentioned problem, and provides a thermal resistance test circuit and method for heterojunction semiconductor devices. The method has high precision and is easy to operate. It is suitable for testing the junction temperature and thermal resistance of heterojunction semiconductor devices during normal operation. It is an important means for analyzing the thermal degradation mechanism of devices and provides theoretical support for improving the thermal reliability of devices.

[0005] Technical solution: The measurement circuit of the thermal resistance of the heterojunction semiconductor device of the present invention comprises a signal generating module, a constant temperature device, a first driving module, a second driving module, a device to be measured, a controllable load module, a data acquisition module and a power supply module; wherein, the output end of the signal generating module is respectively connected to the input end of the first driving module and the second driving module, the output end of the first driving module is connected to the device to be measured located in the constant temperature device, the output end of the second driving module is connected to the controllable load module to input a pulse signal to the device to be measured and the controllable load module, the output end of the controllable load module is connected to the device to be measured, and the circuit is switched between a normal working mode and a measurement mode by regulating the controllable load module, wherein the normal working mode is used to make the device in a thermally stable working state, and the measurement mode is used to extract the junction temperature sensitive parameters of the device; the data acquisition module collects the output signal of the device to be measured and extracts the rate of change of the drain electrode current of the device to be measured, and the power supply module supplies power to the measurement circuit.

[0006] The controllable load module adopts an FPGA development board including an input port and three output ports. The input port is used to receive two instructions of normal working mode / measurement mode. The first output port is connected to a capacitive element, and the second output port is connected to a first inductive element, a second inductive element and a switch element. The first output port and the second output port are used to change the circuit connection, and the third output port is used to control a signal generating module so that the circuit can switch between the normal working mode and the measurement mode.

[0007] In the measurement mode, the first inductive element in the controllable load module is respectively connected to the second output port, the switch element and one end of the second inductive element, and the other ends of the second inductive element and the switch element are respectively connected to the resistive element, and the inductance value and the resistance value are adjustable.

[0008] In the normal working mode, the first inductive element and the capacitive element in the controllable load module are respectively connected to the source and the drain of the device under test, the other end of the first inductive element is respectively connected to the switch element, the second inductive element and the second output port, the resistive element is connected to the switch element and the second inductive element, and the other end of the capacitive element is connected to the first output port, and the inductance value, the resistance value and the capacitance value are adjustable.

[0009] The method for measuring the thermal resistance of a heterojunction semiconductor device of the present invention includes two groups of measurements, wherein the first group includes regulating a controllable load module so that the circuit is in a measurement mode, placing the device to be tested in a constant temperature module, raising the temperature at a temperature interval of 1 degree Celsius within a range of -50°C to 200°C, extracting a rate of change of the drain electrode current of the device to be tested each time the temperature is raised and after the temperature is stabilized, fitting all the extracted measurement values ​​as a junction temperature reference curve of the device to be tested; the second group includes regulating the controllable load module so that the circuit is in a normal working mode, immediately regulating the controllable load module after the device to be tested is thermally stable, extracting a rate of change of the drain electrode current of the device to be tested in this state as a junction temperature sensitive parameter, reading a temperature corresponding to the junction temperature sensitive parameter on the above-mentioned junction temperature reference curve, i.e., the junction temperature of the device to be tested when the device to be tested is thermally stable, and calculating the thermal resistance using a thermal resistance calculation method.

[0010] The thermal resistance is calculated by the thermal resistance calculation method, and is: Where R θJX It represents the total thermal resistance from the internal junction of the device to the external environment, T X The temperature of the reference point defined for thermal resistance, T J is the junction temperature of the device under test in the thermally stable working state, V and I are the average voltage and average current of the device under test when it is turned on, and D is the duty cycle of the pulse test signal.

[0011] The measuring method specifically comprises the following steps:

[0012] Step 1: Place the device under test into the constant temperature module and set the temperature to -50°C;

[0013] Step 2: Switch the circuit to the measurement mode, increase the temperature with an accuracy of 1°C, and input a set of double pulse test waveforms every time the temperature of the device under test is increased by 1°C and stabilized;

[0014] Step 3, fitting the change rate of the drain electrode current of the device under test at the second pulse rising edge collected by the data acquisition module each time into a di / dt-temperature curve;

[0015] Step 4: After the device under test is completely cooled, the circuit is switched to a normal working mode to make the device under test work in a thermally stable state;

[0016] Step 5, switch the circuit to the measurement mode, input a set of double pulse test waveforms, and the data acquisition module extracts the drain current change rate when the second pulse rising edge arrives when the device under test is in a thermally stable working state as a junction temperature sensitive parameter;

[0017] Step six, reading the temperature value corresponding to the junction temperature sensitive parameter in the above di / dt-temperature curve, and using the temperature value as the junction temperature when the device under test is thermally stable to calculate the thermal resistance.

[0018] Beneficial effects: The present invention has the following advantages:

[0019] The load in the present invention is controllable, so that the circuit can be quickly and flexibly switched between the normal working mode and the measuring mode.

[0020] When the device is working normally, the drain current is given by the formula D (t) = g m [V G (t)-V TH ]determine, where g m is the device transconductance, V G is the gate voltage, V TH is the device threshold voltage. The current mainstream method is to characterize the thermal resistance of the device during normal operation by the size of the drain current. It can be seen from the formula that the value of the drain electrode current is not only related to the operating temperature of the device, but also to the threshold voltage of the device itself. When the temperature changes, the threshold voltage of the device itself will also change. In order to improve the accuracy and reliability of the measurement results and reduce the impact of the threshold voltage change during the test process, in this test method, the current change rate di / dt of the single switch of the device under test in a thermally stable state is used as the junction temperature sensitive parameter to analyze and obtain the thermal impedance parameters of the device under test. Among them, Where τ=R G [C GS +C GD (V DS )],R G is the gate resistance, C GS is the capacitance between the gate electrode and the source electrode, C GD It is the capacitance between the gate electrode and the drain electrode. These parameters are not sensitive to temperature. The junction temperature sensitive parameter in the present invention is the rate of change of the drain electrode current of the device to be tested. Since the device mobility mainly changes only with the change of temperature, the rate of change of the measured current can accurately and intuitively reflect the change of temperature.

[0021] The double pulse method used in the present invention can measure the change rate of the drain electrode current of the device under test more accurately.

[0022] In the present invention, due to the connection of the capacitive element in the circuit, the device to be tested operates in the ZVS mode, thereby reducing the switching power consumption of the device during normal operation, saving energy and protecting the environment, and reducing the error when extracting junction temperature sensitive parameters.

[0023] The controllable load module in the present invention can make the device to be tested in the system work in a continuous pulse mode, which is consistent with the working state of the device in actual application, so that the test result is more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic block diagram of a measuring circuit of the present invention;

[0025] Figure 2 It is a schematic diagram of the measuring method of the present invention;

[0026] Figure 3 is a schematic diagram of a controllable load module of the present invention;

[0027] Figure 4 is an embodiment of the measuring circuit of the present invention;

[0028] Figure 5 is a circuit diagram of an embodiment of a measuring circuit of the present invention;

[0029] Figure 6 is a waveform diagram of each node in the normal working mode of the embodiment;

[0030] Figure 7 is a waveform diagram of drain electrode current in the test mode of the embodiment.

[0031] The figure includes: a signal generating module 1, a constant temperature device 2, a first driving module 3A, a second driving module 3B, a device under test 4, a power module 5, a controllable load module 6, and a data acquisition module 7. DETAILED DESCRIPTION

[0032] To facilitate understanding of the invention, the present invention will be described more fully below with reference to the relevant drawings. Figure 1 This is a block diagram of the measurement circuit system of the present invention. Figure 2 This is a block diagram of the measurement method of the present invention. Figure 3 is a schematic diagram of a controllable load module of the present invention, Figure 4 A preferred embodiment of the present invention is given in Figure 5 The specific circuit diagram of the embodiment is given. The present invention can also be implemented in many different forms and is not limited to the embodiments described herein. The purpose of the embodiments proposed herein is to make the disclosure of the present invention more thorough and comprehensive.

[0033] In a first aspect, the present invention provides a thermal resistance measurement circuit for a heterojunction semiconductor device, the circuit comprising a signal generating module, a constant temperature device, a first driving module, a first driving module, a device to be tested, a power supply module, a controllable load module and a data acquisition module.

[0034] The controllable load module includes a first inductive element, a second inductive element, a switch element, a capacitive element, a resistive element and an FPGA development board. By writing software code, the connection between the capacitive element and the inductive element in the controllable load module is switched through the FPGA development board, and the signal generating module is controlled to switch the circuit between the normal working mode and the measurement mode.

[0035] The measurement mode includes: the signal generation module sends a set of double-pulse measurement waveforms to the first drive module, and does not send waveforms to the second drive module. At this time, the drain electrode of the device under test in the system is connected to the data acquisition card and the positive pole of the DC power supply, the source electrode is connected to the first inductive element, the other end of the first inductive element is simultaneously connected to the switch element and the second inductive element, the other end of the second inductive element is connected to the resistive element, the other end of the resistive element is connected to the switch element and the negative pole of the DC power supply, and the capacitive element is not connected to the circuit. When the function signal generator inputs a set of double-pulse measurement waveforms to the first drive module, the data acquisition card can collect the rate of change di / dt of the drain electrode current of the device under test when the second pulse rises;

[0036] The normal working mode includes: the signal generating module sends continuous pulse waveforms with high levels not appearing at the same time to the first driving module and the second driving module respectively. At this time, the drain electrode of the device under test in the system is connected to the data acquisition card, the positive electrode of the DC power supply and the capacitive element, wherein the data acquisition card is not working, the source electrode of the device under test is connected to the first inductive element, the other end of the first inductive element is simultaneously connected to the capacitive element, the second inductive element and the switch element, the other end of the second inductive element is connected to the resistive element, and the resistive element is connected to the switch element and the negative electrode of the DC power supply.

[0037] The constant temperature device includes a constant temperature control box, which is used to provide a stable ambient temperature for the device under test, ensuring that each increase in ambient temperature in the measurement mode is accurate and constant.

[0038] The data acquisition module is used to extract the change rate of the drain electrode current of the device under test, and can obtain the change rate di / dt of the drain electrode current of the device under test over time by acquiring the change of the voltage across a small resistor connected in series with the drain electrode of the device under test.

[0039] In a second aspect, the present invention provides a method for testing thermal resistance of a heterojunction semiconductor device, which is applied to a thermal resistance measurement circuit of a heterojunction semiconductor power device described in any one of the first aspects, and the method comprises:

[0040] Set the temperature of the temperature control box to -50°C, adjust the adjustable load module to put the system in measurement mode, increase the temperature in the constant temperature control box at intervals of 1°C with a temperature accuracy of 1°C, and each time the temperature of the device under test is increased and stabilized, control the signal generator through the FPGA development board to input a double pulse test signal to the first drive module. Measure and record the rate of change di / dt of the current of the drain electrode of the device under test over time when the second pulse rising edge arrives to turn on the device after each temperature increase, and draw a di / dt-temperature curve with each measurement value as the ordinate and the temperature as the abscissa; after the device is completely cooled, adjust the controllable load module to put the system in normal working mode, and control the signal generation module through the FPGA development board to input continuous high-level pulse signals to the first drive module 3A and the second drive module 3B respectively, so that the device under test can work normally. After the device under test works in the thermal stability mode, immediately adjust the controllable load module to switch the system to the measurement mode, control the signal generation module, input a set of double-pulse test signals to the first drive module 3A, and use the data acquisition module to measure the rate of change di / dt of the current of the drain electrode of the device under test over time at the second pulse rising edge as the junction temperature sensitive parameter. Read the abscissa temperature corresponding to the same value of the junction temperature sensitive parameter on the above di / dt-temperature curve, and this temperature is the junction temperature when the device under test is working normally and thermally stable. Substituting into the thermal resistance calculation formula, the thermal resistance value of the device under test when it is working thermally stable can be calculated.

[0041] The measurement circuit of the thermal resistance of the heterojunction semiconductor device of the present invention comprises: a signal generating module 1 for starting the whole system, a thermostat 2 for controlling the ambient temperature of the device under test, a first driving module 3A for driving the device under test, a second driving module 3B for driving the switch element in the controllable load module 6, a device under test 4, a power module 5, a controllable load module 6, and a data acquisition module 7. One end of the controllable load module 6 is connected to the drain electrode of the device under test, and the other end is connected to the source electrode of the device under test. The detection point of the data acquisition module is selected at the drain electrode of the device under test, that is, the rate of change of the current of the drain electrode of the device under test over time is measured and extracted.

[0042] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0043] The controllable load module includes an FPGA development board, a first inductor L1, a second inductor L2, a capacitor C, a resistor R and a switch element switch. The controllable load module can be regulated by the input end to switch the system between a normal working mode and a measurement mode. Wherein, the measurement mode includes: inputting a measurement mode instruction to the input end of the FPGA development board, the FPGA development board controls the output ports 1st OUTPUT and 2ed OUTPUT, and selectively disconnecting the connection between the capacitor C and the first inductor L1, and controlling the waveform PWML_IN_A sent by the function signal generator through the output port 3rd OUTPUT while not sending the waveform PWML_IN_B, PWML_IN_A is a set of double pulse measurement waveforms, and the duty cycle is adjustable. At this time, the drain electrode of the device to be tested in the system is connected to the data acquisition card and the positive pole of the DC power supply, the source electrode is connected to the first inductor L1, the other end of the first inductor L1 is simultaneously connected to the drain electrode of the switch element Switch and the second inductor L2, one end of the resistor R is connected to the second inductor L2, and the other end is connected to the negative pole of the power supply. The data acquisition card can collect the change rate of the drain electrode current of the device under test di / dt when the second pulse of PWML_IN_A rises and output it through the output port; the normal working mode includes: inputting the normal working mode instruction to the input of the FPGA development board, the FPGA development board controls the output ports 1st OUTPUT and 2ed OUTPUT, selects to connect the capacitor C and the first inductor L1, and controls the function signal generator through the output port 3rd OUTPUT to send out continuous waveforms PWML_IN_A and PWML_IN_B, which are used to control the switch of the device under test DUT and the switch element Switch, so that the high levels of the two pulse waveforms of PWML_IN_A and PWML_IN_B do not appear at the same time. At this time, the drain electrode of the device under test DUT in the system is connected to the data acquisition card, and the data acquisition card does not work. The source electrode is connected to the capacitor C and the first inductor L1, and the other end of the capacitor C is connected to the drain electrode of the device under test DUT. The connection method of the remaining electronic components is the same as the measurement mode. Due to the connection of capacitor C in the circuit, the system resonates when the device under test DUT is turned off and the switching device is turned on. Therefore, when the device under test is turned on, the drain electrode voltage is zero, and the loss of the entire system is greatly reduced.

[0044] Set the temperature of the temperature control box to -50°C, adjust the adjustable load module to put the system in measurement mode, increase the temperature in the constant temperature control box at intervals of 1°C with a temperature accuracy of 1°C, and each time the temperature of the device under test is increased and stabilized, control the signal generator through the FPGA development board to input a double pulse test signal to the first drive module. Measure and record the rate of change di / dt of the current of the drain electrode of the device under test over time when the second pulse rising edge arrives to turn on the device after each temperature increase, and draw a di / dt-temperature curve with each measurement value as the ordinate and the temperature as the abscissa; after the device is completely cooled, adjust the controllable load module to put the system in normal working mode, and control the signal generation module through the FPGA development board to input continuous high-level pulse signals to the first drive module 3A and the second drive module 3B respectively, so that the device under test can work normally. After the device under test works in the thermal stability mode, immediately adjust the controllable load module to switch the system to the measurement mode, control the signal generation module, input a set of double-pulse test signals to the first drive module 3A, and use the data acquisition module to measure the rate of change di / dt of the current of the drain electrode of the device under test over time at the second pulse rising edge as the junction temperature sensitive parameter. Read the abscissa temperature corresponding to the same value of the junction temperature sensitive parameter on the above di / dt-temperature curve, and this temperature is the junction temperature when the device under test is working normally and thermally stable. Substituting into the thermal resistance calculation formula, the thermal resistance value of the device under test when it is working thermally stable can be calculated.

[0045] Figure 5 As shown, the device under test is placed in a constant temperature device, and the drain electrode of the device under test is connected to a data acquisition card.

[0046] Figure 6 The circuit shown is in normal working mode and each node waveform diagram, channel 1 is the waveform diagram of the drain electrode voltage of the device under test, channel 2 is the waveform diagram of the gate electrode voltage of the device under test, and channel 3 is the waveform diagram of the voltage received by the switch element.

[0047] Figure 7 When the circuit shown is in measurement mode, the data acquisition card collects the change of the drain electrode current of the device under test over time.

Claims

1. A measurement circuit for thermal resistance of a heterojunction semiconductor device, characterized in that: The measuring circuit comprises a signal generating module (1), a thermostat (2), a first driving module (3A), a second driving module (3B), a device to be measured (4), a controllable load module (6), a data acquisition module (7) and a power supply module (5); wherein the output end of the signal generating module (1) is respectively connected to the input ends of the first driving module (3A) and the second driving module (3B), the output end of the first driving module (3A) is connected to the device to be measured (4) located in the thermostat (2), and the output end of the second driving module (3B) is connected to the controllable load The module (6) inputs pulse signals to the device under test and the controllable load module, the output end of the controllable load module (6) receives the device under test (4), and the circuit is switched between a normal working mode and a measurement mode by regulating the controllable load module, wherein the normal working mode is used to put the device under test in a thermally stable working state, and the measurement mode is used to extract the junction temperature sensitive parameters of the device under test; the data acquisition module (7) acquires the output signal of the device under test (4) and extracts the rate of change of the drain electrode current of the device under test, and the power supply module (5) supplies power to the measurement circuit; The controllable load module adopts an FPGA development board including an input port and three output ports. The input port is used to receive two instructions of normal working mode / measurement mode. The first output port is connected to a capacitive element, and the second output port is connected to a first inductive element, a second inductive element and a switch element. The first output port and the second output port are used to change the circuit connection, and the third output port is used to control a signal generating module so that the circuit can switch between the normal working mode and the measurement mode.

2. The thermal resistance measurement circuit of a heterojunction semiconductor device according to claim 1, characterized in that: In the measurement mode, the first inductive element in the controllable load module is respectively connected to the second output port, the switch element and one end of the second inductive element, and the other ends of the second inductive element and the switch element are respectively connected to the resistive element, and the inductance value and the resistance value are adjustable.

3. The thermal resistance measurement circuit of a heterojunction semiconductor device according to claim 1, characterized in that: In the normal working mode, the first inductive element and the capacitive element in the controllable load module are respectively connected to the source and the drain of the device under test, the other end of the first inductive element is respectively connected to the switch element, the second inductive element and the second output port, the resistive element is connected to the switch element and the second inductive element, and the other end of the capacitive element is connected to the first output port, and the inductance value, the resistance value and the capacitance value are adjustable.

4. A method for measuring the thermal resistance of a heterojunction semiconductor device of a circuit as claimed in claim 1, characterized in that: The measurement method includes two groups of measurements, wherein the first group includes regulating a controllable load module so that the circuit is in a measurement mode, placing the device to be tested in a constant temperature module, raising the temperature at intervals of 1 degree Celsius within a range of -50°C to 200°C, extracting a rate of change of the drain electrode current of the device to be tested each time the temperature is raised and after the temperature is stabilized, fitting all the extracted measurement values ​​as a junction temperature reference curve of the device to be tested; the second group includes regulating the controllable load module so that the circuit is in a normal working mode, immediately regulating the controllable load module after the device to be tested is thermally stable, and putting the circuit in a measurement mode, extracting a rate of change of the drain electrode current of the device to be tested in this state as a junction temperature sensitive parameter, reading out a temperature corresponding to the junction temperature sensitive parameter on the above-mentioned junction temperature reference curve, i.e., the junction temperature of the device to be tested when it is thermally stable, and calculating the thermal resistance using a thermal resistance calculation method.

5. The method for measuring thermal resistance of a heterojunction semiconductor device according to claim 4, characterized in that: The thermal resistance is calculated by the thermal resistance calculation method, and is: Where R θJX It represents the total thermal resistance from the internal junction of the device to the external environment, T X The temperature of the reference point defined for thermal resistance, T J is the junction temperature of the device under test in the thermally stable working state, V and I are the average voltage and average current of the device under test when it is turned on, and D is the duty cycle of the pulse test signal.

6. The method for measuring thermal resistance of a heterojunction semiconductor device according to claim 4, characterized in that: The measuring method specifically comprises the following steps: Step 1: Place the device under test into the constant temperature module and set the temperature to -50°C; Step 2: Switch the circuit to the measurement mode, increase the temperature with an accuracy of 1°C, and input a set of double pulse test waveforms every time the temperature of the device under test is increased by 1°C and stabilized; Step 3, fitting the change rate of the drain electrode current of the device under test at the second pulse rising edge collected by the data acquisition module each time into a di / dt-temperature curve; Step 4: After the device under test is completely cooled, the circuit is switched to a normal working mode to make the device under test work in a thermally stable state; Step 5, switch the circuit to the measurement mode, input a set of double pulse test waveforms, and the data acquisition module extracts the drain current change rate when the second pulse rising edge arrives when the device under test is in a thermally stable working state as a junction temperature sensitive parameter; Step six, reading the temperature value corresponding to the junction temperature sensitive parameter in the above di / dt-temperature curve, and using the temperature value as the junction temperature when the device under test is thermally stable to calculate the thermal resistance.

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