A circuit of a memristor-based VFL-RELU spiking neuron

Abstract

The present invention discloses a circuit of a VFL-RELU spiking neuron based on a memristor, belonging to the technical field of integrated circuit design. A circuit of a VFL-RELU spiking neuron based on a memristor includes: a BDW threshold memristor, a capacitor, and a metal-oxide-semiconductor field-effect transistor (MOSFET). The BDW threshold memristor has different bilateral windows. Taking the gate voltage of the MOSFET as the input voltage and the drain of the transistor MOSFET as the output, the capacitor is charged. When the voltage on the capacitor is less than the holding voltage (Vh) of the BDW threshold memristor, the BDW threshold memristor becomes a high-resistance state, the voltage division of the BDW threshold memristor becomes larger, and the capacitor is recharged. The MOSFET includes a P-type MOSFET and an N-type MOSFET, and the input voltage can tune the output pulse frequency. The spiking neuron circuit provided by the present invention solves the problem of circuit design of an efficient spiking neuron through the selection of the memristor and the addition of a bias voltage, and the circuit is simple.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit design, and particularly relates to a circuit of a VFL-RELU pulsed neuron based on a memristor. Background Art

[0002] The memristor was first theoretically derived by Professor Leon.O.Chua of the University of California, Berkeley in 1971. In 2008, HP Labs first manufactured a real physical memristor. A memristor is a dynamic component. When an external voltage is applied to it, the memristance will increase or decrease with the direction of the applied voltage. Therefore, it is a suitable choice to use the memristance of the memristor to represent the strength and weakness of the synaptic connection weights in a neural network.

[0003] Artificial Neural Network (ANN) has been a research hotspot in the field of artificial intelligence since the 1980s. It is an operation model established based on the characteristics of Biological Neural Network (BNN), with powerful computing capabilities and can be realized by means of information technology. A large artificial neural network can solve problems in pattern recognition, signal processing, associative memory, etc.

[0004] Different from the neurons in an artificial neural network, pulsed neurons are responsible for integrating the input pulsed signals and outputting new pulsed signals to transmit information. Their working form mimics biological neurons, and the signal processing process is reflected in the change of the membrane potential (Vmem). The basic function of a pulsed neuron can be abstracted as Leaky Integrate-and-Fire (LIF), and it is also the most widely used bionic pulsed neuron model in neuromorphic computing. The LIF model describes the change of the neuron membrane potential in two processes: a membrane potential threshold is set artificially. When the membrane potential is lower than the threshold, the pulsed neuron exhibits a leaky integration function and can be described by a first-order differential equation; once the membrane potential is higher than the threshold, the pulsed neuron immediately emits a pulse and resets the membrane potential. However, the existing pulsed neural networks are difficult to solve the encoding problem of level signals and cannot perform efficient negative value encoding. Summary of the Invention

[0005] The purpose of the present invention is to provide a circuit of a VFL-RELU pulsed neuron based on a memristor.

[0006] The purpose of the present invention can be achieved by the following technical solutions:

[0007] A circuit of a memristor-based VFL-RELU pulsed neuron, comprising: a BDW threshold memristor, a capacitor, and a metal-oxide-semiconductor field-effect transistor MOSFET.

[0008] The BDW threshold memristor has different bilateral windows. The BDW threshold memristor is connected in parallel with the capacitor and then connected in series with the metal-oxide-semiconductor field-effect transistor MOSFET. The gate voltage of the metal-oxide-semiconductor field-effect transistor MOSFET is used as the input voltage, and the drain of the transistor MOSFET is used as the output. The capacitor is charged. When the voltage on the capacitor is less than the holding voltage (Vh) of the BDW threshold memristor, the BDW threshold memristor becomes a high-resistance state, the voltage division of the BDW threshold memristor becomes larger, and the capacitor is recharged. The semiconductor field-effect transistor MOSFET includes a P-type MOSFET and an N-type MOSFET. The input voltage can tune the output pulse frequency. Adding the P-type MOSFET satisfies that when the input voltage is negative, the emission of the pulse is tuned. When the input voltage is negative, the N-type MOSFET is turned off and presents an ultra-high resistance state, and the P-type MOSFET is turned on. Similarly, when the input voltage is positive, the P-type MOSFET is turned off and presents an ultra-high resistance state, and the N-type MOSFET is turned on. The VFL-ReLU pulsed neuron coding is realized by means of time-division multiplexing. When the input is positive, the positive pull-up voltage VDD is used. At this time, the forward window of the memristor is used to realize the forward coding of the VFL-ReLU pulsed neuron. When the input is negative, the negative pull-up voltage VDD is used. At this time, the negative window of the BDW threshold memristor is used to realize the negative coding of the VFL-ReLU pulsed neuron.

[0009] Further, since the initial high-resistance state resistance of the memristor is large, the voltage VDD needs to be pulled up to charge both ends of the capacitor during charging. When the voltage on the memristor capacitor is greater than the threshold transition voltage (Vth) of the memristor, the memristor changes to a low-resistance state, the voltage division of the memristor becomes smaller, and the capacitor discharges.

[0010] Further, a suitable bias voltage is applied to balance the turn-on voltage of the MOSFET.

[0011] Further, the frequency of the forward coding is greater than the frequency of the negative coding.

[0012] Advantages of the present invention:

[0013] (1) The pulsed neuron circuit provided by the present invention solves the encoding problem of level signals through the series-parallel combination of a memristor, a capacitor, and a MOSFET; realizes a VFL-ReLU pulsed neuron;

[0014] (2) The pulsed neuron circuit provided by the present invention solves the problem of circuit design of efficient pulsed neurons and has a simple circuit by the selection of memristors and the addition of bias voltages. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present invention will be further described below with reference to the accompanying drawings.

[0016] Figure 1 is the input-output characteristic curve of L-ReLU in the present invention;

[0017] Figure 2 is the Iv characteristic curve of the BDW threshold memristor in the present invention;

[0018] Figure 3 is the positive input coding circuit diagram in the present invention;

[0019] Figure 4 is the total coding circuit diagram of vector frequency L-ReLU (VFL-ReLU) in the present invention;

[0020] Figure 5 is the time-division multiplexing schematic diagram in the present invention;

[0021] Figure 6 is the input-output characteristic curve of VFL-ReLU in the present invention;

[0022] Figure 7 is the schematic diagram of the forward input and response of the circuit in the present invention;

[0023] Figure 8 is the schematic diagram of the negative input and response of the circuit in the present invention;

[0024] Figure 9 is the final input-output characteristic curve of VFL-ReLU of the circuit in the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0026] As Figures 1 to 8 shown, a circuit of a VFL-RELU pulsed neuron based on a memristor includes: a BDW threshold memristor, a capacitor, and a metal-oxide-semiconductor field-effect transistor MOSFET.

[0027] The BDW threshold memristor has different windows on both sides. The BDW threshold memristor is connected in parallel with a capacitor and then connected in series with the metal-oxide-semiconductor field-effect transistor MOSFET. The gate voltage of the MOSFET is used as the input voltage, and the drain of the transistor MOSFET is used as the output to charge the capacitor. When the voltage on the capacitor is less than the holding voltage (Vh) of the BDW threshold memristor, the BDW threshold memristor becomes a high-resistance state, the voltage division of the BDW threshold memristor becomes larger, and the capacitor is recharged. The semiconductor field-effect transistor MOSFET includes a P-type MOSFET and an N-type MOSFET. The input voltage can tune the output pulse frequency. Adding the P-type MOSFET satisfies the emission of the tuning pulse when the input voltage is negative. When the input voltage is negative, the N-type MOSFET is turned off and presents an ultra-high resistance state, and the P-type MOSFET is turned on. Similarly, when the input voltage is positive, the P-type MOSFET is turned off and presents an ultra-high resistance state, and the N-type MOSFET is turned on. The VFL-ReLU pulse neuron coding is realized by time-division multiplexing. When the input is positive, the positive pull-up voltage VDD is used. At this time, the forward window of the memristor is used to realize the forward coding of the VFL-ReLU pulse neuron. When the input is negative, the negative pull-up voltage VDD is used. At this time, the negative window of the BDW threshold memristor is used to realize the negative coding of the VFL-ReLU pulse neuron.

[0028] Further, since the initial high-resistance state resistance of the memristor is large, the voltage VDD needs to be pulled up to charge both ends of the capacitor during charging. When the voltage on the memristor capacitor is greater than the threshold transition voltage (Vth) of the memristor, the memristor changes to a low-resistance state, the voltage division of the memristor becomes smaller, and the capacitor discharges.

[0029] Further, since the N-type and P-type MSOFETs are connected in parallel, the branch where the N-type MOSFET is located can be regarded as an open circuit at this time. In addition, since the MOSFET has a certain turn-on voltage, when the input voltage is small, coding cannot be performed. Therefore, a suitable bias voltage is applied to balance the turn-on voltage of the MOSFET.

[0030] Further, specifically as Figure 6 shown, since the forward window of the pulse neuron is larger than the negative window, the frequency of the forward coding is greater than the frequency of the negative coding, that is, f(VF) = max(ax, x) is realized, where 0 < a < 1.

[0031] As shown in FIGS. 7-9, in a specific example, when the input voltage is from 0 to 2V, as Figure 7 shown, the output pulse amplitude is positive and the frequency of the output pulse increases as the input voltage increases. As Figure 8As shown, when the input voltage is from 0 to -2V, the amplitude of the output pulse is negative and as the input voltage increases, the frequency of the output pulse increases. The graph is as shown in Figure 8 . The final input-output characteristics are as shown in Figure 9 .

[0032] In the description of this specification, the descriptions referring to the terms "one embodiment", "example", "specific example", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in a suitable manner in any one or more embodiments or examples.

[0033] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and the descriptions in the specification only illustrate the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed.

Claims

1. A circuit of a memristor-based VFL-RELU pulsed neuron, characterized in that, Including: BDW threshold memristor, capacitor, metal-oxide-semiconductor field-effect transistor (MOSFET); The BDW threshold memristor has different bilateral windows. The BDW threshold memristor is connected in parallel with the capacitor and then connected in series with the metal-oxide-semiconductor field-effect transistor (MOSFET). The gate voltage of the metal-oxide-semiconductor field-effect transistor (MOSFET) is used as the input voltage, and the drain of the transistor (MOSFET) is used as the output. The capacitor is charged. When the voltage on the capacitor is less than the holding voltage (Vh) of the BDW threshold memristor, the BDW threshold memristor becomes a high-resistance state, the voltage division of the BDW threshold memristor becomes larger, and the capacitor is recharged. The semiconductor field-effect transistor (MOSFET) includes a P-type MOSFET and an N-type MOSFET. The input voltage can tune the output pulse frequency. Adding the P-type MOSFET satisfies that when the input voltage is negative, the emission of the tuned pulse is achieved. When the input voltage is negative, the N-type MOSFET is turned off and presents an ultra-high resistance state, and the P-type MOSFET is turned on. Similarly, when the input voltage is positive, the P-type MOSFET is turned off and presents an ultra-high resistance state, and the N-type MOSFET is turned on. The VFL-ReLU pulse neuron coding is realized by means of time-division multiplexing. When the input is positive, the positive pull-up voltage VDD is used. At this time, the forward window of the memristor is used to realize the forward coding of the VFL-ReLU pulse neuron. When the input is negative, the negative pull-up voltage VDD is used. At this time, the negative window of the BDW threshold memristor is used to realize the negative coding of the VFL-ReLU pulse neuron.

2. The circuit of a memristor-based VFL-RELU spiking neuron according to claim 1, characterized in that, Pull up the voltage VDD to charge both ends of the capacitor. When the voltage on the memristor capacitor is greater than the threshold transition voltage (Vth) of the memristor, the memristor changes to a low-resistance state, the voltage division of the memristor becomes smaller, and the capacitor discharges.

3. The circuit of a memristor-based VFL-RELU pulsed neuron according to claim 1, wherein Balance the turn-on voltage of the metal-oxide-semiconductor field-effect transistor (MOSFET) by applying a bias voltage.

4. The circuit of a VFL-RELU pulsed neuron based on a memristor according to claim 1, characterized in that, The frequency of the forward coding is greater than the frequency of the negative coding.

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