A DBC substrate for reducing thermal warping

Abstract

The present invention discloses a DBC substrate for reducing thermal warping, belonging to the technical field of power semiconductors. It sequentially includes from top to bottom: a top copper layer, an insulating ceramic layer, and a bottom copper layer; a plurality of component welding areas arranged side by side are provided on the top copper layer, and an insulating gap is provided between adjacent component welding areas; a load reduction groove area is provided on the bottom copper layer, the load reduction groove area coincides with the vertical center line of the insulating gap, and the width of the load reduction groove area is not less than the width of the insulating gap; a plurality of load reduction grooves distributed in an array are provided in the load reduction groove area. By providing the load reduction grooves distributed in an array, the present invention changes the bending degree of the bottom copper layer in this area, can reduce the warping deformation caused by the different material thermal expansion coefficients of the insulating ceramic layer and the bottom copper layer when the DBC substrate is heated; can weaken the original concentrated stress and improve the thermal cycle life of the substrate.

Description

Technical Field

[0001] The present invention belongs to the technical field of power semiconductors, and more specifically, relates to a DBC substrate for reducing thermal warping. Background Art

[0002] As a core power electronic device, power semiconductor devices have been widely used in many fields such as power systems, rail transit, industrial manufacturing equipment, household appliances, and military defense, and are constantly developing towards high power, miniaturization, integration, and multi-function, which also puts forward higher requirements for the performance of packaging substrates. With the increase in power density, the operating temperature of power modules rises significantly, and it is challenging to improve their reliability and fatigue life.

[0003] Direct bonded copper (hereinafter referred to as DBC) is a very important power electronic packaging material. It has excellent thermal conductivity, high adhesion strength between metal and ceramic, good electrical insulation performance, high current-carrying capacity, excellent solder resistance, and can be etched into various circuit patterns. It is usually used as the mechanical support and bottom heat dissipation path of power semiconductor modules. The fatigue life of DBC can determine the life of the entire power module, so its applicability and reliability for packaging integration are crucial. During high-temperature and low-temperature cycling operation, the DBC substrate expands due to heat. That is, due to the different thermal expansion coefficients of ceramic and copper, the interface between the copper layer and the ceramic layer bends due to the mismatch in expansion size, and the local stress concentration is different, resulting in delamination and fracture phenomena, reducing the reliability and life of power semiconductor devices.

[0004] Currently, in the prior art, there is no corresponding technical solution to solve the problem of warping deformation of the DBC substrate after heating. Summary of the Invention

[0005] In view of the defects and improvement requirements of the prior art, the present invention provides a DBC substrate for reducing thermal warping, aiming to reduce the degree of warping deformation of the DBC substrate after heating and improve the thermal cycle life of the DBC substrate.

[0006] To achieve the above object, according to one aspect of the present invention, there is provided a DBC substrate for reducing thermal warping, which sequentially includes from top to bottom: a top copper layer, an insulating ceramic layer, and a bottom copper layer; a plurality of component welding areas arranged side by side are provided on the top copper layer, an insulating gap is provided between adjacent component welding areas, a load-reducing groove area is provided on the bottom copper layer, the load-reducing groove area coincides with the vertical center line of the insulating gap, and the width of the load-reducing groove area is not less than the width of the insulating gap; a plurality of load-reducing grooves arranged in an array are provided in the load-reducing groove area.

[0007] Further, when the width of the unloading groove area is greater than the width of the insulation gap, the center of the unloading groove is located on the edge line of the corresponding area of the insulation gap in the bottom copper layer.

[0008] Further, the unloading groove is a spherical pit.

[0009] Further, there are two component welding areas, which are symmetric about the central axis of the top copper layer.

[0010] Further, the width D of the insulation gap is 0.8 - 1.2 mm.

[0011] Further, the diameter of the spherical pit is 0.2 mm - D / 2 mm, and the shortest distance between the outer circumferences of adjacent spherical pits is 0.2 mm - D mm.

[0012] Further, the top copper layer and the bottom copper layer are stacked in the middle of the surface of the insulating ceramic layer.

[0013] Further, the surfaces of the top copper layer and the bottom copper layer are nickel-plated.

[0014] Further, the material of the insulating ceramic layer is aluminum nitride, aluminum oxide, silicon nitride or beryllium oxide.

[0015] Further, the thickness of the top copper layer is 0.1 mm - 0.3 mm; the thickness of the insulating ceramic layer is 0.38 mm - 0.65 mm; the thickness of the bottom copper layer is 0.1 mm - 0.3 mm.

[0016] Generally speaking, through the above technical solutions conceived by the present invention, the following beneficial effects can be achieved:

[0017] (1) By opening an unloading groove area on the bottom copper in the present invention, a plurality of unloading grooves are arranged in an array in this area, changing the bending degree of the bottom copper layer in this area, making the anti-bowing degrees of the upper and lower surfaces of the bottom copper layer similar, reducing the warping deformation of the DBC substrate caused by the different material thermal expansion coefficients of the insulating ceramic layer and the bottom copper layer when heated; at the same time, the setting of the unloading groove leaves a buffer space when the bottom copper layer deforms due to heat, weakening the original concentrated stress, thereby improving the thermal cycle life of the substrate.

[0018] (2) Preferably, the center of the unloading groove is located on the edge line of the corresponding area of the insulation gap in the bottom copper layer, which can ensure that components will not be placed on the top copper layer corresponding to the area where the unloading groove is located, and thus will not reduce the heat dissipation performance of the DBC substrate.

[0019] (3) Preferably, when the unloading groove is a spherical pit, it is the easiest to implement in terms of technology and has a low cost; at the same time, experiments further show that the setting of the spherical pit ensures the continuity of the bottom copper layer, basically does not change the mechanical strength of the bottom copper layer as a mechanical support, and can maintain the structural thermal resistance.

[0020] (4) Preferably, nickel is plated on the surfaces of the top copper layer and the bottom copper layer to enhance the oxidation resistance of the copper layer surfaces.

[0021] All in all, the present invention can reduce the degree of warping deformation of the DBC substrate after heating, improve the thermal cycle life of the DBC substrate, and at the same time can maintain the structural thermal resistance and mechanical strength. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic structural diagram of the DBC substrate provided by the present invention.

[0023] Figure 2 It is a schematic structural diagram of the top copper layer of the DBC substrate provided by the present invention.

[0024] Figure 3 It is a front view of the top copper layer of the DBC substrate provided by the present invention.

[0025] Figure 4 It is a front view of the bottom copper layer of the DBC substrate provided by the present invention.

[0026] Figure 5 It is a stress diagram of a conventional DBC substrate.

[0027] Figure 6 It is a stress diagram of the DBC substrate provided in the embodiment of the present invention.

[0028] Figure 7 It is a warping simulation experiment diagram of a conventional DBC substrate.

[0029] Figure 8 It is a warping simulation experiment diagram of the DBC substrate provided in the embodiment of the present invention.

[0030] Figure 9 It is a force-deformation curve diagram of the DBC substrate provided in the embodiment of the present invention and a conventional DBC substrate.

[0031] In all the drawings, the same reference numerals are used to represent the same elements or structures, where:

[0032] 1 - top copper layer, 2 - component welding area, 3 - insulation gap, 4 - insulation ceramic layer, 5 - bottom copper layer, 6 - spherical pit. DETAILED DESCRIPTION OF THE INVENTION

[0033] In order to make the objectives, technical solutions and advantages of the present invention more clear and understandable, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0034] As shown in Figure 1 , the DBC substrate structure provided by the present invention mainly includes, from top to bottom: a top copper layer 1, an insulating ceramic layer 4, and a bottom copper layer 5. A plurality of juxtaposed component welding areas are provided on the top copper layer 1 for electrical isolation inside the power module and the formation of circuits; an insulating gap 3 is provided between adjacent component welding areas; a load reduction groove area is provided on the bottom copper layer 5, and the load reduction groove area coincides with the vertical center line of the insulating gap 3, and the width of the load reduction groove area is not less than the width of the insulating gap; a plurality of load reduction grooves arranged in an array are provided in the load reduction groove area.

[0035] Preferably, when the width of the load reduction groove area is greater than the width of the insulating gap, the center of the load reduction groove is located on the edge line of the corresponding area of the insulating gap on the bottom copper layer. The center of the load reduction groove is located on the edge line of the corresponding area of the insulating gap on the bottom copper layer.

[0036] Preferably, as shown in Figure 2 and Figure 3 , there are two component welding areas provided on the top copper layer 1, and the two component welding areas 2 are symmetric about the central axis of the top copper layer 1.

[0037] Preferably, the load reduction groove is a sunken spherical pit 6, and the center position of the sphere corresponds to the edge line of the insulating gap on the top copper layer, that is, the center of the spherical pit is located on the edge line of the corresponding area of the insulating gap on the bottom copper layer.

[0038] Preferably, the top copper layer 1 and the bottom copper layer 5 are high-conductivity oxygen-free copper foils, and the surfaces of the copper layers are nickel-plated to enhance the surface antioxidant property.

[0039] Specifically, the top copper layer 1 and the bottom copper layer 5 are stacked in the middle area on the surface of the insulating ceramic layer 4. The thickness of the top copper layer is selected according to the current rating of the power device, and the preferred thickness range is 0.1 mm - 0.3 mm.

[0040] Preferably, the top copper layer 1 forms two component soldering areas by etching. Specifically, the surface circuit is formed by chemical or laser etching methods. The width D of the insulation gap between the two component soldering areas is 0.8 - 1.2 mm. It is specifically determined according to the voltage difference between the soldering components on the top copper layer. For example, if the voltage difference between the two component soldering areas is below 200 V, D is recommended to be 0.8 mm; if the voltage difference is between 200 - 1000 V, D is recommended to be 1 mm; if the voltage difference is between 1000 - 1500 V, D is recommended to be 1.2 mm.

[0041] In this embodiment, the unloading groove is a sunken spherical pit, and the size of the spherical pit and the spacing between two adjacent spherical pits are adjusted according to the width D of the insulation gap. Preferably, the value range of the diameter of each spherical pit is 0.2 mm - D / 2 mm, and the value range of the shortest distance between the outer circumferences of two adjacent spherical pits is 0.2 mm - D mm.

[0042] Preferably, the insulating ceramic layer 4 is made of one of aluminum nitride, alumina, silicon nitride or beryllium oxide. A layer of copper foil is coated on each of the upper and lower surfaces of the insulating ceramic layer 4, and it is heated to 1065 °C in an oxygen-containing nitrogen atmosphere to form an oxygen-containing eutectic liquid of copper, which infiltrates the directly contacted copper foil and ceramic interface. At the same time, the composite oxide formed by the chemical reaction acts as the solder for eutectic brazing, thereby realizing the firm bonding of the insulating ceramic layer and the copper-clad layer (i.e., the top copper layer 1 and the bottom copper layer 5). The value range of the thickness of the insulating ceramic layer is 0.38 mm - 0.65 mm. On the premise of meeting the insulation withstanding voltage requirements, the thinner the ceramic layer is selected, the more beneficial it is to the heat dissipation of the power device.

[0043] By opening an unloading groove area on the bottom copper, a plurality of unloading grooves distributed in an array are arranged in this area. The unloading groove area coincides with the vertical center line of the insulation gap, and the width of the unloading groove area is not less than the width of the insulation gap. A plurality of unloading grooves distributed in an array are opened in the unloading groove area, changing the bending degree of the bottom copper layer in this area, making the upward bowing degrees of the upper and lower surfaces of the bottom copper layer similar, reducing the warping deformation caused by the different material thermal expansion coefficients of the insulating ceramic layer and the bottom copper layer when the DBC substrate is heated; leaving a buffer space when the bottom copper layer deforms due to heat, weakening the original concentrated stress, thereby improving the thermal cycle life of the substrate. When the width of the unloading groove area is greater than the width of the insulation gap, the center of the unloading groove is located on the edge line of the corresponding area of the insulation gap on the bottom copper layer, and when the width of the unloading groove area is less than the width of the insulation gap, it can be ensured that no components will be placed on the top copper layer corresponding to the area where the unloading groove is located, that is, the unloading groove will not be located below the components, so the heat dissipation performance of the DBC substrate will not be reduced.

[0044] Such as Figure 4As shown, the thickness of the bottom copper layer 5 ranges from 0.1 mm to 0.3 mm, and the specific thickness is comprehensively considered in combination with material costs and structural strength.

[0045] In this embodiment, taking the insulation gap width D between two component welding areas as 1 mm, the ceramic material is alumina with high thermal conductivity for heat dissipation, and the ceramic thickness is taken as 0.38 mm as an example for experiments.

[0046] Taking the example that two component welding areas are provided on the top copper layer 1, as Figure 1 shown, for the traditional DBC substrate, the thermal stress at point a on the top copper layer is greater than that at point b. Among them, point a represents the point on the edge line of the insulation gap between two component welding areas; point b represents the outer edge line of the outermost component welding area, or the edge line on the side far from the insulation gap between two component welding areas. In this embodiment, through the design of the ball pits, the bending that can be inhibited by the bottom copper layer is reduced, the bending degree of the entire DBC substrate is alleviated, and thus the positive stress concentration at point a on the top copper layer is reduced. As Figure 5 、 Figure 6 shown in the stress distribution diagram, on the traditional DBC substrate, the range of thermal stress at point a where the top copper layer is stressed is less than 370 MPa; through the array of ball pits designed by the present invention, the range of thermal stress at point a on the top copper layer becomes less than 260 MPa, that is, the thermal stress at point a is significantly reduced. That is, by opening a plurality of ball pits distributed in an array on the bottom copper layer of the present invention, and the centers of the ball pits are located on the edge line of the corresponding area of the insulation gap on the bottom copper layer, the stress value at the maximum stress point (i.e., point a) of the DBC substrate after the design of the ball pits is significantly reduced compared with the traditional DBC substrate.

[0047] As Figure 7 、 Figure 8 shown in the results of the warping experiment, the warping degree (Z direction / length) of the DBC substrate provided by the present invention is reduced from 1 / 1000 to 0.5 / 1000, that is, the ball pit pattern design reduces the degree of warping deformation. The direction perpendicular to the surface of the DBC substrate is defined as the Z direction.

[0048] At the same time, through experiments, it is found that taking the traditional DBC substrate as a control group, under the temperature cycle experiment of -55° - 175°, after the array of ball pits is designed, the thermal cycle life of the sample is increased by about 50%, and the life is increased from an average of 100 times to an average of 150 times compared with the sample without ball pits.

[0049] After the power chip is welded to the DBC substrate, heat dissipation is carried out through the connection between the copper layer at the bottom of the substrate and the heat sink. In order to reduce the contact thermal resistance between the power module and the heat sink, thermal grease is usually applied between the heat sink and the bottom plate of the module. In this embodiment, thermal grease with a thermal conductivity of 1 W / K is applied to the copper layer at the bottom of the DBC and connected to the heat sink for heat dissipation. Compared with the sample without ball pits, the thermal resistance reduction after designing ball pits on the bottom copper layer is less than 1%. As Figure 9 shown, one is the stress-deformation curve of the bottom copper layer without ball pits, and the other is the stress-deformation curve of the bottom copper layer with designed ball pits. It can be seen from the experiment that the stress-deformation curve of the DBC substrate with ball pits is slightly lower (less than 1%), and the failure forces of the two are almost the same, that is, designing ball pits basically does not change the mechanical strength of the bottom copper layer as a mechanical support. That is, this design of the present invention can maintain the structural thermal resistance, ensure the continuity of the bottom copper layer, and ensure the mechanical strength of the bottom copper layer as a mechanical support.

[0050] Those skilled in the art can easily understand that the above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A DBC substrate for reducing thermal warping, comprising, from top to bottom in sequence: Top copper layer (1), insulating ceramic layer (4) and bottom copper layer (5); a plurality of component soldering areas arranged side by side are formed on the top copper layer (1), and an insulating gap (3) is provided between adjacent component soldering areas. It is characterized in that a load-reducing groove area is arranged on the bottom copper layer (5), the load-reducing groove area coincides with the vertical center line of the insulating gap, and the width of the load-reducing groove area is not less than the width of the insulating gap; a plurality of load-reducing grooves distributed in an array are formed in the load-reducing groove area; the load-reducing grooves are spherical pits.

2. The DBC substrate according to claim 1, wherein When the width of the load-reducing groove area is greater than the width of the insulating gap, the center of the load-reducing groove is located on the edge line of the corresponding area of the insulating gap on the bottom copper layer.

3. The DBC substrate according to claim 1, wherein There are two component soldering areas, and they are symmetrical about the central axis of the top copper layer.

4. The DBC substrate according to claim 3, wherein The width D of the insulating gap is 0.8 - 1.2 mm.

5. The DBC substrate according to claim 4, wherein The diameter of the spherical pit is 0.2 mm - D / 2 mm, and the shortest distance between the outer circumferences of adjacent spherical pits is 0.2 mm - D mm.

6. The DBC substrate according to claim 5, wherein, The top copper layer (1) and the bottom copper layer (5) are stacked in the middle of the surface of the insulating ceramic layer (4).

7. The DBC substrate according to claim 6, characterized in that, The surfaces of the top copper layer (1) and the bottom copper layer (5) are nickel-plated.

8. The DBC substrate according to claim 7, characterized in that, The material of the insulating ceramic layer is aluminum nitride, alumina, silicon nitride or beryllium oxide.

9. The DBC substrate according to any one of claims 1-8, characterized in that, The thickness of the top copper layer (1) is 0.1 mm - 0.3 mm; the thickness of the insulating ceramic layer (4) is 0.38 mm - 0.65 mm; the thickness of the bottom copper layer (5) is 0.1 mm - 0.3 mm.

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