Vision control device, vision defect detection equipment and vision control method

Abstract

The present application discloses a visual control device, a visual defect detection device and a visual control method. The visual control device of the present application can not only reduce the difficulty of assembling the light source module, the power module and the timing module, but also make the visual control device more flexible in expanding the light source module and the power module. Moreover, the real-time signal control and communication management of the visual control device are respectively realized through the FPGA control circuit and the communication management circuit, which effectively prevents the two sets of circuit signals from interfering with each other, and is conducive to improving the response speed of the visual control device and the compatibility when expanding the light source module. In addition, the timing module uses a communication bus and a trigger signal line to interact with at least one light source module and at least one power module respectively, which helps to meet the control requirements between multiple light source modules and power modules. In addition, the requirements for different visual control device functions in different application scenarios are met, and the change costs caused by changes in application scenarios are reduced.

Description

Technical Field

[0001] The present application relates to the technical field of machine vision defect detection, and in particular to a vision control device, a vision defect detection equipment and a vision control method. Background Art

[0002] Machine vision technology is currently widely used in industrial automation systems, with the main functions of identification, positioning, measurement and detection. In machine vision detection systems, one of the main applications is the detection of extremely small appearance defects of products, such as defect detection of 3C consumer electronics and semiconductor wafers. In this application, unlike identification, positioning and measurement, it requires the use of high-resolution cameras and highly balanced and high-brightness light sources to achieve the detection requirements of micron or nanometer-level defects; moreover, it also requires the use of stroboscopic control of light sources and cameras to achieve the purpose of imaging defects of multiple products at the same time in the production line.

[0003] However, as the types of defect detection increase and the application scenarios become more and more complex, a single intermediate controller can no longer meet the needs of flexible expansion and customization of the visual system, thereby increasing the cost of system changes caused by changes in application scenarios. For example, the appearance defect detection equipment of product A requires stroboscopic control of four cameras and eight light sources, while product B requires stroboscopic control of six cameras and twelve light sources. At this time, the appearance defect detection equipment based on product A cannot meet the detection requirements of product B, and the entire set of cameras, light sources, and control systems need to be upgraded again, which is costly and has low system upgrade efficiency, which is not conducive to efficient production. Summary of the invention

[0004] In view of this, the present application provides a visual control device, a visual defect detection equipment and a visual control method, which realize flexible configuration between different modules through detachable connectors, thereby reducing the cost of changing the visual system due to changes in application scenarios.

[0005] According to one aspect of the present application, there is provided a visual control device, comprising:

[0006] At least one light source module, a first connector is provided on a first housing of the at least one light source module, and the at least one light source module is used to drive a light source of the visual defect detection device to emit light;

[0007] Timing module, the timing module includes:

[0008] The second housing is provided with a second connector, and the second connector is connected to the first connector

[0009] Removable connection;

[0010] An FPGA control circuit is provided in the second housing, a first end of the FPGA control circuit is electrically connected to at least one light source module through a trigger signal line, a second end of the FPGA control circuit is electrically connected to an electromechanical system of a visual defect detection device, a third end of the FPGA control circuit is electrically connected to a visual sensor of the visual defect detection device, and the FPGA control circuit is used to output a trigger signal according to motion state information of the electromechanical system to control the operation of at least one light source module and the visual sensor;

[0011] A communication management circuit is provided in the second housing, a first end of the communication management circuit is electrically connected to at least one light source module through a light source communication bus, a second end of the communication management circuit is electrically connected to the FPGA control circuit, and the communication management circuit is used to configure the working parameters of at least one light source module and the visual sensor;

[0012] At least one power module, a third connector is provided on the third shell of at least one power module, the third connector is detachably connected to the second connector, a first end of at least one power module is electrically connected to the communication management circuit through a power communication bus, and a second end of at least one power module is electrically connected to at least one light source module and / or timing module through a power line.

[0013] Optionally, the visual control device further comprises:

[0014] At least one power module, at least one power module is provided with a second connector, the second connector is detachably connected to the third connector, and at least one power module is used to convert an AC signal into a DC signal to supply power to at least one light source module and a timing module.

[0015] Optionally, in the case where the visual control device includes a plurality of light source modules, the plurality of light source modules are connected in series via a first connector;

[0016] In the case where the vision control device includes a plurality of power modules, the plurality of power modules are connected in series via the third connector.

[0017] Optionally, the first connector, the second connector or the third connector includes:

[0018] a power cord port, to which a power cord is connected; and / or

[0019] A communication bus port connected to a light source communication bus or a power supply communication bus; and / or

[0020] Trigger signal line port, connected to the trigger signal line.

[0021] Optionally, the FPGA control circuit includes:

[0022] An FPGA processing circuit, configured to output a first trigger signal and a second trigger signal according to motion state information of the electromechanical system;

[0023] A multi-channel trigger signal circuit, wherein the first end of the multi-channel trigger signal circuit is electrically connected to the FPGA processing circuit, the second end of the multi-channel trigger signal circuit is electrically connected to the light source module via a trigger signal line, the third end of the multi-channel trigger signal circuit is electrically connected to the visual sensor, and the multi-channel trigger signal circuit is used to transmit the first trigger signal to the light source module and the second trigger signal to the visual sensor.

[0024] Optionally, the FPGA control circuit further includes:

[0025] A receiving circuit is electrically connected to the electromechanical system and the FPGA processing circuit, and the receiving circuit is used to receive and convert the signal sent by the electromechanical system of the visual defect detection device, and output the converted signal to the FPGA processing circuit;

[0026] The conversion circuit is electrically connected to the visual sensor and the third end of the multi-channel trigger signal circuit. The conversion circuit is used to receive and convert the signal sent by the FPGA processing circuit and output the converted signal to the visual sensor.

[0027] Optionally, the timing module further includes:

[0028] An AC / DC conversion circuit is connected to an AC power source, and the AC / DC conversion circuit is used to provide power to the timing module;

[0029] The light source power collection circuit is connected to the power line, and is used to determine the total power of at least one light source module.

[0030] Optionally, the communication management circuit includes:

[0031] A CPU processing circuit electrically connected to the FPGA control circuit;

[0032] An Ethernet circuit is electrically connected to the CPU processing circuit and the industrial computer of the visual defect detection device, and the Ethernet circuit is used to receive and convert signals sent by the industrial computer and output the converted signals to the CPU processing circuit;

[0033] A communication circuit, wherein a first end of the communication circuit is electrically connected to at least one power module via a light source communication bus, and a second end of the communication circuit is electrically connected to a CPU processing circuit;

[0034] A power management circuit, wherein a first end of the power management circuit is electrically connected to at least one power module via a power communication bus, and a second end of the communication circuit is electrically connected to a CPU processing circuit.

[0035] Optionally, the light source module includes:

[0036] A sub-communication circuit is provided in the first housing, the sub-communication circuit is electrically connected to the communication management circuit through the light source communication bus, and the sub-communication circuit is used to obtain the working parameters of the light source module, the working parameters including the target light source address and control parameters;

[0037] A channel selection circuit is provided in the first housing, a first end of the channel selection circuit is electrically connected to the sub-communication circuit, a second end of the channel selection circuit is electrically connected to the FPGA control circuit via a trigger signal line, and the channel selection circuit is used to extract a target trigger signal corresponding to the target light source address from the first trigger signal output by the FPGA control circuit;

[0038] A light source circuit is provided in the first housing, the light source circuit is electrically connected to the light source and the channel selection circuit, and the light source circuit is used to respond to the target trigger signal and output a voltage signal or a current signal according to the working parameters;

[0039] The first DC / DC conversion circuit is arranged in the first housing, and the first DC / DC conversion circuit is connected to the power line.

[0040] Optionally, the power module includes:

[0041] A power factor correction circuit is arranged in the third housing, and the power factor correction circuit is connected to the AC power supply through a power line;

[0042] A second DC / DC conversion circuit is disposed in the third housing, the second DC / DC conversion circuit is electrically connected to the power factor correction circuit and the power line, and the power factor correction circuit supplies power to the timing module and / or at least one light source module through the power line;

[0043] The digital management circuit is arranged in the third housing, a first end of the digital management circuit is electrically connected to the second DC / DC conversion circuit, and a second end of the digital management circuit is electrically connected to the communication management circuit through a power communication bus.

[0044] According to another aspect of the present application, there is provided a visual defect detection device, comprising:

[0045] at least one light source;

[0046] Vision sensors;

[0047] The visual control device mentioned above is electrically connected to at least one light source and a visual sensor;

[0048] An industrial computer electrically connected to a communication management circuit of the visual control device;

[0049] The electromechanical system is electrically connected to the FPGA control circuit of the visual control device.

[0050] According to another aspect of the present application, a visual control method is provided, comprising:

[0051] Acquire working parameters of at least one light source and a visual sensor, the working parameters including a target light source address and control parameters;

[0052] Generate a trigger signal according to the motion state information of the electromechanical system, wherein the trigger signal includes a first trigger signal and a second trigger signal, the first trigger signal is used to drive at least one light source to emit light, and the second trigger signal is used to drive the visual sensor to collect an image;

[0053] Controlling the operation of the visual sensor according to the control parameters and the second trigger signal;

[0054] At least one light source is controlled to operate according to the target light source address, the control parameters and the first trigger signal.

[0055] Optionally, controlling at least one light source to operate according to the target light source address, the control parameter and the first trigger signal includes:

[0056] Extracting the target trigger signal from the first trigger signal based on the presence of a target trigger signal corresponding to the address of the target light source in the first trigger signal;

[0057] According to the control parameters and the target trigger signal, the light source corresponding to the target light source address is controlled to work.

[0058] By means of the above technical solution, the visual control device includes at least one light source module, at least one power module and a timing module, wherein a first connector is provided on the first shell of each light source module, and a second connector is provided on the second shell of the timing module, and the mutual plug-in structure of the light source module and the timing module is realized through the first connector and the second connector. Similarly, a third connector is provided on the third shell of each power module, and the mutual plug-in structure of the power module and the timing module is realized through the second connector and the third connector. Thereby reducing the difficulty of assembling the light source module, the power module and the timing module, facilitating the upgrading of the number of light source modules and power modules, and making the visual control device more flexible in expanding the light source module and the power module. At the same time, the timing module is provided with an independent FPGA control circuit and a communication management circuit, and the real-time signal control and communication management of the visual control device are realized through the FPGA control circuit and the communication management circuit respectively, which effectively prevents the two sets of circuit signals from interfering with each other, and is conducive to improving the response speed of the visual control device and the compatibility when expanding the light source module. In addition, the timing module uses a communication bus (light source communication bus, power supply communication bus) and a trigger signal line to interact with at least one light source module and at least one power supply module respectively, which helps to meet the control requirements between multiple light source modules and power supply modules, and provides effective technical support for the flexible expansion of light source modules and power supply modules. Furthermore, the timing module adopts the characteristics of FPGA (Field Programmable Gate Array) technology with low power consumption, strong real-time parallel processing capability, and dynamic scrubbing, and flexibly and dynamically loads various control capabilities, which can more effectively utilize resources and improve the execution efficiency of the visual control device. In this way, the requirements for different visual control device functions in different application scenarios are met, and the change cost caused by changes in application scenarios is reduced.

[0059] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0061] Figure 1 A schematic diagram of the structure of a visual control device provided in an embodiment of the present application is shown;

[0062] Figure 2 One of the structural schematic diagrams of the visual defect detection device provided in the embodiment of the present application is shown;

[0063] Figure 3 The second structural schematic diagram of the visual defect detection device provided in the embodiment of the present application is shown;

[0064] Figure 4 The third structural schematic diagram of the visual defect detection device provided in the embodiment of the present application is shown;

[0065] Figure 5 A fourth structural schematic diagram of the visual defect detection device provided in an embodiment of the present application is shown;

[0066] Figure 6 A schematic diagram of the structure of a timing module provided in an embodiment of the present application is shown;

[0067] Figure 7 A flow chart of the visual control method provided in an embodiment of the present application is shown.

[0068] Reference numerals:

[0069] 11 timing module, 12 light source module, 13 power module, 14 trigger signal line, 21 light source, 22 electromechanical system, 23 visual sensor, 24 industrial computer, 25 address selection switch, 111 second connector, 112 FPGA control circuit, 113 communication management circuit, 114 AC / DC conversion circuit, 115 light source power acquisition circuit, 121 first connector, 122 light source circuit, 123 channel selection circuit, 124 sub-communication circuit, 125 first DC / DC conversion circuit, 126 trigger output circuit, 131 third connector, 132 digital management circuit, 133 second DC / DC conversion circuit, 13 4 power factor correction circuit, 151 light source communication bus, 152 power supply communication bus, 161 DC power line, 162 AC power line, 231 area array camera, 232 line array camera, 1121 FPGA processing circuit, 1122 multi-channel trigger signal circuit, 1123 receiving circuit, 1124 conversion circuit, 1131 CPU processing circuit, 1132 Ethernet circuit, 1133 communication circuit, 1134 power management circuit, 1171 timing backplane, 1172 timing mainboard, 11241 TTL conversion circuit, 11242 differential conversion circuit, 11231 isolation receiving circuit, 11232 differential receiving circuit. DETAILED DESCRIPTION

[0070] The present application will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict.

[0071] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be interpreted as limiting the present application.

[0072] Those skilled in the art will appreciate that, unless expressly stated, the singular forms "a", "an", "said" and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, or there may be intermediate elements. In addition, the "connection" or "connection" used herein may include wireless connection or wireless fusion. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.

[0073] Now, exemplary embodiments according to the present application will be described in more detail with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should not be interpreted as being limited to the embodiments set forth herein. It should be understood that these embodiments are provided to make the disclosure of the present application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0074] In this embodiment, a visual control device is provided, such as Figure 1 and Figure 2 As shown, the visual control device includes: a timing module 11, at least one light source module 12 and at least one power supply module 13.

[0075] Specifically, at least one light source module 12 is electrically connected to at least one light source 21 of the visual defect detection device in a one-to-one correspondence, and the light source module 12 is used to drive the light source 21 corresponding to the light source module 12 to emit light. A first connector 121 is provided on the first housing of each light source module 12, and a third connector 131 is provided on the third housing of each power module 13. The timing module 11 includes: a second housing, an FPGA control circuit 112, and a communication management circuit 113. A second connector 111 is provided on the second housing, and the second connector 111 can be detachably connected to the first connector 121 and the third connector 131. The FPGA control circuit 112 is provided in the second housing, and the first end of the FPGA control circuit 112 is electrically connected to at least one light source module 12 through a trigger signal line 14, and the second end of the FPGA control circuit 112 is electrically connected to the electromechanical system 22 of the visual defect detection device, and the third end of the FPGA control circuit 112 is electrically connected to the visual sensor 23 of the visual defect detection device, so as to receive the real-time signal of the electromechanical system 22 and the trigger signal output control function, and control the operation of at least one light source module 12 and the visual sensor 23 after logical processing. The communication management circuit 113 is arranged in the second housing, the first end of the communication management circuit 113 is electrically connected to at least one light source module 12 through the light source communication bus 151, the second end of the communication management circuit 113 is electrically connected to the FPGA control circuit 112, and the communication management circuit 113 communicates data with the industrial computer 24 to configure the working parameters of at least one light source module 12 and the visual sensor 23, thereby realizing the management and control functions of at least one light source module 12. The first end of at least one power module 13 is electrically connected to the communication management circuit 113 through the power communication bus 152, and the second end of at least one power module 13 is electrically connected to at least one light source module 12 and / or the timing module 11 through a power line, thereby supplying power to at least one light source module 12 and / or the timing module 11.

[0076] In this embodiment, on the one hand, the mutual plug-in structure of the light source module 12 and the timing module 11 is realized by the first connector 121 and the second connector 111, and the mutual plug-in structure of the power module 13 and the timing module 11 is realized by the third connector 131 and the second connector 111, thereby reducing the difficulty of assembling the light source module 12 and the timing module 11, facilitating the upgrading of the number of light source modules 12 and power supply modules 13, and making the visual control device more flexible in expanding the light source module 12 and the power supply module. On the other hand, the timing module 11 is provided with an independent FPGA control circuit 112 and a communication management circuit 113, and the real-time signal control and communication management of the visual control device are realized through the FPGA control circuit 112 and the communication management circuit 113, respectively, which effectively prevents the signals of the two groups of circuits 134 from interfering with each other, and is conducive to improving the response speed of the visual control device and the compatibility when the light source module 12 is expanded. The timing module 11 uses a communication bus (light source communication bus 151, power supply communication bus 152) and a trigger signal line 14 to interact with at least one light source module 12 and at least one power supply module 13, respectively, which helps to meet the control requirements between multiple light source modules 12 and power supply modules 13, and provides effective technical support for the flexible expansion of light source modules 12 and power supply modules 13. On the other hand, the timing module 11 adopts the characteristics of low power consumption, strong real-time parallel processing capability, and dynamic scrubbing of FPGA (Field Programmable Gate Array) technology, and flexibly and dynamically loads various control capabilities, which can more effectively utilize resources and improve the execution efficiency of the visual control device. In this way, the requirements for different visual control device functions in different application scenarios are met, and the change cost caused by changes in application scenarios is reduced.

[0077] It is understandable that the power lines include a DC power line 171 and an AC power line 172 to meet the power supply requirements of different devices.

[0078] Exemplarily, the data communication mode of the communication management circuit 113 includes but is not limited to: I2C (bidirectional two-wire synchronous serial), SPI (Serial Peripheral Interface) or RS232 (serial standard interface with identification number 232) and other intra-board communication modes.

[0079] Furthermore, if Figure 1 and Figure 4 As shown, when the visual control device includes a plurality of light source modules 12, the plurality of light source modules 12 are connected in series through the first connector 121, so as to realize the cascading of the plurality of light source modules 12 according to the required quantity, thereby achieving the driving function of the same or different light sources 21. Among them, the plurality of cascaded light source modules 12 can use the same or different internal driving circuits 134.

[0080] For example, Figure 5 As shown, the first light source module 12-a is provided with two second connectors 111, wherein one second connector 111 is connected to one side of the timing module 11, and the other second connector 111 is again superimposed and connected to the second light source module 12-b. Similarly, the second light source module 12-b is also provided with two second connectors 111, wherein one second connector 111 is connected to the second connector 111 of the first light source module 12-a, and the other second connector 111 is connected to a second connector 111 of the third light source module 12-c, and so on, a plurality of light source modules 12 can be cascaded. The number of light source modules 12 actually connected can be comprehensively determined based on the power that can be provided by the DC power line 161, the number of trigger signal paths provided by the trigger signal line 14, and the number of external communication slave modules that can be connected to the light source communication bus 151. The embodiment of the present application does not specifically limit the number of light source modules 12. Figure 5 Six light source modules 12 are cascaded, namely the first light source module 12-a, the second light source module 12-b, the third light source module 12-c, the fourth light source module 12-d, the fifth light source module 12-e and the sixth light source module 12-f. The above six light source modules are respectively connected to four light sources, that is, each light source module can drive four light sources for lighting.

[0081] It is understandable that if Figure 2 , Figure 3 and Figure 4 As shown, the DC power lines 161, the light source communication bus 151 and the trigger signal line 14 of all the combined and extended light source modules 12 are connected respectively. That is, the DC power lines 161 of all the combined and extended light source modules 12 are connected together, the light source communication bus 151 of all the combined and extended light source modules 12 are connected together, and the trigger signal lines 14 of all the combined and extended light source modules 12 are connected together.

[0082] Similarly, in the case where the visual control device includes a plurality of power modules 13, the plurality of power modules 13 are connected in series via the third connector 131, thereby realizing a cascade connection of the plurality of power modules 13 according to the required number. Figure 4 As shown, the first power module 13-a is connected to one side of the timing module 11 and the light source module 12, and the first power module 13-a can be stacked and connected to other power modules 13 (second power module 13-b) again, and so on, multiple power modules 13 can be cascaded. The number of power modules 13 actually connected can be determined according to the power required by the device, and the embodiment of the present application does not specifically limit the number of power modules 13.

[0083] It is understandable that if Figure 3 and Figure 4 As shown, the DC power lines 161, the light source communication bus 151 and the trigger signal line 14 of all the combined and extended power modules 13 are connected respectively. That is, the DC power lines 161 of all the combined and extended power modules 13 are connected together, the power communication bus 152 of all the combined and extended power modules 13 are connected together, and the trigger signal lines 14 of all the combined and extended power modules 13 are connected together.

[0084] In actual application scenarios, the first connector 121, the second connector 111 and the third connector 131 are all provided with at least one of a power line port, a communication bus port and a trigger signal line port. Among them, the power line port is connected to the DC power line 161 and the AC power line 162 in the visual control device. The communication bus port is connected to the light source communication bus 151 or the power supply communication bus 152 in the visual control device; the trigger signal line port is connected to the trigger signal line 14 in the visual control device. Therefore, when the connectors are connected to each other, not only the assembly function between the modules can be realized, but also signal transmission can be realized through the coupling between the connector ports. For example, Figure 1 and Figure 2 As shown, the second connector 111 on the light source module 12 and the first connector 121 on the timing module 11 corresponding to the second connector 111 are provided with three ports, namely, a power line port, a communication bus port, and a trigger signal line port, wherein the communication bus port is connected to the light source communication bus 151. The third connector 131 on the power module 13 and the first connector 121 on the timing module 11 corresponding to the third connector 131 are provided with two ports, namely, a power line port and a communication bus port, wherein the communication bus port is connected to the power communication bus 152.

[0085] For example, Figure 1 , Figure 2 , Figure 3 and Figure 6As shown, the first connector 121, the second connector 111 or the third connector 131 are plug-in connectors, one of the two connectors that cooperate with each other is a raised male connector, and the other end is a recessed female connector. Thus, the light source module 12 and the power module 13 are superimposed in a relatively simple raised and recessed plug-in and unplugging manner, without the need to design a huge integrated system at one time to meet the needs of various users, which is conducive to reducing the size of the visual control device and taking into account the convenience and cost of assembly. Specifically, one side of a light source module 12 is connected to one side of the timing module 11, and there is a raised second connector 111 on the side of the light source module 12, and there is a recessed first connector 121 on the side of the timing module 11 connected thereto, and the signal lines connected to the raised second connector 111 and the recessed first connector 121 include a DC power line 161, a light source communication bus 151, and a trigger signal line 14. One side of the power module 13 is connected to the other side of the timing module 11. The side of the power module 13 has a protruding third connector 131, and the other side of the timing module 11 connected thereto has a recessed first connector 121. The signal lines connected to the protruding third connector 131 and the recessed first connector 121 include a DC power line 161, an AC power line 162 and a power communication bus 152.

[0086] like Figure 3 As shown, according to an embodiment of the present application, it includes the features defined in any of the above embodiments, and further: the FPGA control circuit 112 includes: an FPGA processing circuit 1121 and a multi-channel trigger signal circuit 1122.

[0087] Specifically, the FPGA processing circuit 1121 is electrically connected to the electromechanical system 22 of the visual defect detection device, and the FPGA processing circuit 1121 is used to output the first trigger signal and the second trigger signal according to the motion state information of the electromechanical system 22. The first end of the multi-channel trigger signal circuit 1122 is electrically connected to the FPGA processing circuit 1121, the second end of the multi-channel trigger signal circuit 1122 is electrically connected to at least one light source module 12 through the trigger signal line 14, and the third end of the multi-channel trigger signal circuit 1122 is electrically connected to the visual sensor 23, wherein the multi-channel trigger signal circuit 1122 is used to transmit the first trigger signal to at least one light source module 12, so that at least one light source module 12 drives the light source 21 corresponding to the target light source address in the working parameters to emit light. The multi-channel trigger signal circuit 1122 is also used to transmit the second trigger signal to the visual sensor 23 to drive the visual sensor 23 to collect images.

[0088] In this embodiment, considering that the visual control device needs to immediately trigger the visual sensor 23 and the light source 21 to light up after the timing processing, that is, the visual control device has a high demand for fast response and low latency, generally at the microsecond level, therefore, the FPGA control circuit 112 used to process real-time signals in the visual control device uses a programmable logic device (FPGA), that is, a processing circuit with FPGA as the core. Based on the preset control logic, the FPGA processing circuit 1121 determines whether it is necessary to start the light source 21 and the visual sensor 23 according to the real-time motion state information of the electromechanical system 22, and generates a first trigger signal and a second trigger signal when the light source 21 and the visual sensor 23 need to be turned on, so as to control the light source 21 to light up and the visual sensor 23 to collect images. After the FPGA processing circuit 1121 provides the first trigger signal and the second trigger signal to the multi-channel trigger signal circuit 1122, the multi-channel trigger signal circuit 1122 divides the first trigger signal and the second trigger signal, and transmits them to the visual sensor and at least one light source module respectively. This enables the second trigger signal for driving the visual sensor 23 and the first trigger signal for driving the light source 21 to be flexibly switched, which helps to meet the ever-changing functional requirements of the visual control device, thereby improving the adaptability of the visual control device to different application scenarios and reducing the change costs caused by changes in application scenarios.

[0089] For example, Figure 3 As shown, the first trigger signal and the second trigger signal output by the FPGA processing circuit 1121 are provided to the multi-channel trigger signal circuit 1122 to drive the light source 21 and the visual sensor 23. For example, the FPGA processing circuit 1121 outputs a total of Z-channel trigger signals, wherein the X-channel trigger signal is provided to the trigger signal line 14 to drive the light source 21 through the light source module 12, and the remaining ZX-channel trigger signals are used to drive the visual sensor 23, wherein Z and X are natural numbers greater than 1, and X≤Z.

[0090] In actual application scenarios, the motion state information is used to reflect the motion state of the electromechanical system 22. The motion state information includes encoder signals, position sensor signals or PLC control signals, etc. The motion state includes a low-speed motion state, a uniform speed motion state or an accelerated motion state, etc.

[0091] Among some possible designs, such as Figure 3 As shown, the FPGA control circuit 112 also includes: a receiving circuit 1123 and a conversion circuit 1124.

[0092] Specifically, the receiving circuit 1123 is electrically connected to the electromechanical system 22 and the FPGA processing circuit 1121. The receiving circuit 1123 is used to receive and convert the signal sent by the electromechanical system 22 of the visual defect detection device, and output the converted signal to the FPGA processing circuit 1121. The conversion circuit 1124 is electrically connected to the visual sensor 23 and the third end of the multi-channel trigger signal circuit 1122. The conversion circuit 1124 is used to receive and convert the signal sent by the FPGA processing circuit 1121, and output the converted signal to the visual sensor 23.

[0093] In this embodiment, the real-time motion state information sent by the electromechanical system 22 is converted by the receiving circuit 1123 to convert the signals of different forms in the motion state information into signals that can be recognized by the FPGA processing circuit 1121, so that the FPGA processing circuit 1121 can perform signal processing. Similarly, the trigger signal output by the multi-channel trigger signal circuit 1122 is converted into a signal that can be recognized by the visual sensor 23 by the conversion circuit 1124, so that the visual sensor 23 can respond quickly. This improves the compatibility of the visual control device with signals of different forms, which helps to meet the needs of different application scenarios.

[0094] Exemplarily, the various signals output by the electromechanical system 22 may be differential input signals, OC gate signals, or TTL signals, etc. Meanwhile, the conversion circuit 1124 may output TTL level, differential output signals.

[0095] In actual application scenarios, such as Figure 2 As shown, the receiving circuit 1123 includes an isolation receiving circuit 11231 for receiving a PLC control signal and a differential receiving circuit 11232 for receiving an encoder signal, and both the encoder signal and the PLC control signal come from the electromechanical system 22. The visual sensor 23 includes a line array camera 232 and an area array camera 231. The conversion circuit 1124 includes a TTL conversion circuit 11241 and a differential conversion circuit 11242, wherein the TTL conversion circuit 11241 is used to output a signal to finally drive the area array camera 231, and the differential conversion circuit 11242 is used to output a signal to finally drive the line array camera 232.

[0096] Among them, after the encoder signal and the PLC control signal are input to the FPGA processing circuit 1121, the FPGA processing circuit 1121 outputs a first trigger signal to the light source module 12 to drive the light source 21 to illuminate through the multi-channel trigger signal circuit 1122 according to the requirements of the photo taking timing of the light source 21 and the visual sensor 23; and outputs a second trigger signal to the differential conversion circuit 11242, and then the differential conversion circuit 11242 outputs a differential trigger signal to control the linear array camera 232 to capture images; and outputs a TTL trigger signal through the TTL conversion circuit 11241 to trigger the area array camera 231 to capture images.

[0097] It should be noted that the number of line array cameras 232 and area array cameras 231 is not specifically limited in the embodiment of the present application. For example, the device is equipped with two line array cameras 232, one of which is arranged in bright field lighting and the other is arranged in dark field lighting. The trigger signal of one line array camera 232 includes a line trigger signal and a frame trigger signal. When the visual defect detection device is working, each line array phase can correspond to multiple light sources 21 for lighting, that is, the number of light sources 21 corresponding to each line array camera 232 needs to be set according to the shape and defect type of the object to be detected.

[0098] Furthermore, the number of images captured by each line array camera 232 needs to be determined according to the stroboscopic control method of the device. For example, a line array camera 232 is set with a fourth-order stroboscopic, that is, during the movement of the object, in order to ensure the clarity of each image, four lines of images need to be captured for each pixel of the object moving. After the entire object is captured, four clear images can be obtained by combining multiple lines of images, and each image can reflect a type of defect of the object being tested. Therefore, when an object passes through a station of the visual defect detection equipment, eight defect images of the object being tested can be obtained, including four bright field images and four dark field images.

[0099] It is understandable that, because the linear array camera 232 has a high photographing rate, the FPGA processing circuit 1121 needs to output a differential trigger signal through the differential conversion circuit 11242 to control the linear array camera 232 to take pictures, while the area array camera 231 takes pictures relatively slowly, and can use differential signals or directly use logic signals to take pictures.

[0100] like Figure 3 As shown, according to an embodiment of the present application, it includes the features defined in any of the above embodiments, and further: the timing module 11 also includes: an AC / DC conversion circuit 114 and a light source power collection circuit 115.

[0101] The AC / DC conversion circuit 114 is connected to the AC power supply and is used to output a DC signal to provide power for the timing module 11. The light source power collection circuit 115 is connected to the power line and is used to determine the total power of at least one of the light source modules 12.

[0102] In this embodiment, the power demand of the timing module 11 is fully considered. In order to improve the reliability of the timing module 11, an additional AC / DC conversion circuit 114 is provided to power the timing module 11, which can not only prevent the power module 13 from being insufficiently powered, but also separate the power lines of the light source module 12 and the timing module 11 if only the AC / DC conversion circuit 114 is used to power the timing module 11, thereby avoiding unstable power line voltage and ensuring the operation stability of the timing module 11. Furthermore, the timing module 11 is also provided with a light source power acquisition circuit 115, which can calculate the total power value flowing through all light source modules 12 by collecting the current value and voltage value on the DC power line 161, so that the user can monitor the operation of the equipment turntable.

[0103] like Figure 3 As shown, according to an embodiment of the present application, it includes the features defined in any of the above embodiments, and further: the communication management circuit 113 includes: a CPU processing circuit 1131, an Ethernet circuit 1132, a communication circuit 1133 and a power management circuit 1134.

[0104] The CPU processing circuit 1131 is electrically connected to the FPGA control circuit 112. The Ethernet circuit 1132 is electrically connected to the CPU processing circuit 1131 and the industrial computer 24 of the visual defect detection device. The Ethernet circuit 1132 is used to receive and convert signals sent by the industrial computer 24, and output the converted signals to the CPU processing circuit 1131. The first end of the communication circuit 1133 is electrically connected to the channel selection circuit 123 of at least one light source module 12 through the light source communication bus 151, and the second end of the communication circuit 1133 is electrically connected to the CPU processing circuit 1131. The first end of the power management circuit 1134 is electrically connected to at least one power module 13 through the power communication bus 152, and the second end of the communication circuit 1133 is electrically connected to the CPU processing circuit 1131.

[0105] In this embodiment, the CPU processing circuit 1131 is connected and communicated with the FPGA control circuit 112 to obtain the working parameters and send the working parameters to the FPGA control circuit 112. At the same time, the CPU processing circuit 1131 is also used to obtain the status information of the FPGA control circuit 112 to feed back the status information to the industrial computer 24. Further, the CPU processing circuit 1131 is connected to the Ethernet circuit 1132, that is, the CPU processing circuit 1131 communicates with the industrial computer 24 through the Ethernet circuit 1132, and the Ethernet circuit 1132 receives the control signal of the industrial computer 24, which is used to indicate the working parameters of the visual defect detection device. Then, based on the control signal, the CPU processing circuit 1131 communicates with at least one light source module 12 through the communication circuit 1133 and the light source communication bus 151, and communicates with at least one power module 13 through the power management circuit 1134 and the light source communication bus 151, thereby completing the communication, control and management functions of the device.

[0106] Furthermore, the CPU processing circuit 1131 communicates with at least one light source module 12 in a bus manner, that is, the light source communication bus 151 of at least one light source module 12 is connected together, so as to facilitate the cascading of the light source modules 12. The maximum number of light source modules 12 that can be connected is limited by the mode, load characteristics, transmission distance, etc. of the light source communication bus 151. Similarly, the CPU processing circuit 1131 communicates with at least one power supply module 13 in a bus manner, that is, the power supply communication bus 152 of at least one power supply module 13 is connected together, so as to facilitate the cascading of the power supply modules 13. The maximum number of power supply modules 13 that can be connected is limited by the mode, load characteristics, transmission distance, etc. of the power supply communication bus 152.

[0107] Exemplarily, the industrial computer 24 can be a computer or a microprocessor system, also called a host computer, and management software is running on the industrial computer 24. The communication bus in the visual control device includes a power communication bus 152 and a light source communication bus 151, and the communication bus can be an I2C bus, an RS485 bus, or a CAN bus. The CPU processing circuit 1131 can use an embedded processor. The communication method between the CPU processing circuit 1131 and the FPGA control circuit 112 can be an intra-board signal such as an I2C, RS232, or other communication methods.

[0108] It is worth mentioning that the CPU processing circuit 1131 can also choose to connect to a display interface, or an optical module interface, or a GigE interface to realize different functions of the visual defect detection device to meet the user's usage needs.

[0109] like Figure 3As shown, according to an embodiment of the present application, it includes the features defined in any of the above embodiments, and further: the light source module 12 includes: a light source circuit 122, a channel selection circuit 123, a sub-communication circuit 124 and a first DC / DC conversion circuit 125.

[0110] Specifically, the sub-communication circuit 124 is arranged in the first housing, and the sub-communication circuit 124 is electrically connected to the communication management circuit 113 through the light source communication bus 151. The sub-communication circuit 124 is used to communicate with the communication management circuit 113 to obtain the working parameters of the light source module 12, wherein the working parameters include the target light source address and the control parameters. The channel selection circuit 123 is arranged in the first housing, and the first end of the channel selection circuit 123 is electrically connected to the sub-communication circuit 124, and the second end of the channel selection circuit 123 is electrically connected to the FPGA control circuit 112 through the trigger signal line 14, and the channel selection circuit 123 is used to extract the target trigger signal corresponding to the target light source address from the first trigger signal output by the FPGA control circuit 112. The light source circuit 122 is arranged in the first housing, and the light source circuit 122 is electrically connected to the light source 21 and the channel selection circuit 123. The light source circuit 122 is used to respond to the target trigger signal and output a voltage signal or a current signal according to the working parameters to drive the light source 32 to emit light. The first DC / DC conversion circuit 125 is arranged in the first housing, and the first DC / DC conversion circuit is connected to the power line.

[0111] In this embodiment, the voltage conversion and voltage stabilization functions are completed by the first DC / DC conversion circuit 125, and then the DC voltage is output to other circuits in the light source module 12. The multi-channel trigger signal circuit 1122 outputs multiple first trigger signals, and one target light source address corresponds to at least one first trigger signal. The sub-communication circuit 124 receives the working parameters transmitted by the communication management circuit 113 through the light source communication bus 151, and provides the target light source address therein to the channel selection circuit 123. When the channel selection circuit 123 in the light source module 12 receives the multiple first trigger signals, the multiple first trigger signals are screened by the target light source address to determine whether the light source module 12 to which the channel selection circuit 123 belongs is the light source module that needs to work. In the case where there is a target trigger signal corresponding to the target light source address in the multi-channel first trigger signal, it means that the light source module 12 to which the channel selection circuit 123 belongs needs to work, then the target trigger signal related to the light source module 12 to which the channel selection circuit 123 belongs is extracted from the multi-channel first trigger signal, and provided to the light source circuit 122, and the light source circuit 122 outputs a voltage or current signal according to the obtained target trigger signal to drive the light source 21 to emit light. Thus, in the case of multiple light source modules 12 connected, the control of multiple cascade light source modules 12 is realized through the light source communication bus, the difficulty of internal wiring of the light source module 12 is simplified, and at the same time, the independent control of each light source module 12 is realized by using the channel selection circuit 123, providing effective technical support for the flexible expansion of the light source module 12.

[0112] It is understandable that the communication between the light source module 12 and the timing module 11 is connected together through the light source communication bus 151, and one light source module 12 or multiple light source modules 12 can be connected to the light source communication bus 151. Each light source module 12 will be connected to the trigger signal line 14 output by the multi-channel trigger signal circuit 1122, and the trigger signal output by the multi-channel trigger circuit 134 will all be provided to the cascaded light source modules 12 connected to the trigger signal line 14, and the trigger signal line 14 will provide a trigger signal to the channel selection circuit 123 in the light source module 12. Each cascaded light source module 12 will select the required several trigger signals from the trigger signal line 14 as useful signals as needed to drive the light source 21 connected to itself, and the unnecessary trigger signals will be ignored. Moreover, the connection between all light source modules 12 and the trigger signal line 14 is the same. When multiple light source modules 12 are superimposed and cascaded, the use of the same interface does not affect the work of the trigger light source 21, and when a certain trigger signal is used to trigger multiple light sources 21, the corresponding same trigger signal can be selected, which is convenient for control and is conducive to improving the efficiency of driving the light source 21.

[0113] Among some possible designs, such as Figure 3As shown, the light source module 12 also includes a trigger output circuit 126, which can be connected to an external light source or an external visual sensor. The trigger output circuit 126 is electrically connected to the channel selection circuit 123. The trigger output circuit 126 selects the trigger signal in the trigger signal line 14 and outputs it to the light source circuit 122 and the trigger output circuit 126, and the trigger output circuit 126 synchronously triggers the external light source or the external visual sensor. The trigger output circuit 126 is also electrically connected to the light source circuit 122 to facilitate setting the current value, working mode and other states of the light source circuit 122, and setting the delay, strobe and other working modes of the trigger output circuit 126.

[0114] In addition, the visual defect detection device is also provided with an address selection switch 25 so that the user can manually set the trigger signal selection through the address selection switch 25 .

[0115] like Figure 3 As shown, according to an embodiment of the present application, it includes the features defined in any of the above embodiments, and further: the power module 13 includes: a digital management circuit 132, a second DC / DC conversion circuit 133 and a power factor correction circuit 134.

[0116] Specifically, the power factor correction circuit 134 is disposed in the third housing and is electrically connected to the AC power supply through a power line. The power factor correction circuit 134 is used to perform power factor correction (PFC) to convert the AC signal into a DC signal. The second DC / DC conversion circuit 133 is disposed in the third housing. The second DC / DC conversion circuit 133 is electrically connected to the power factor correction circuit 134 and the power line. The second DC / DC conversion circuit 133 is used to be electrically connected to the timing module 11 and / or the light source module 12 through a DC power line 161. The digital management circuit 132 is disposed in the third housing. The first end of the digital management circuit 132 is electrically connected to the third end of the second DC / DC conversion circuit 133. The second end of the digital management circuit 132 is electrically connected to the power management circuit 1134 through the power communication bus 152.

[0117] In this embodiment, the AC power supply provides voltage to the power factor correction circuit 134. After the power factor correction circuit 134 performs power factor correction, it outputs a DC voltage signal to the second DC / DC conversion circuit 133. The second DC / DC conversion circuit 133 converts and stabilizes the voltage, and then outputs a DC voltage to the DC power line 161. The digital management circuit 132 is connected to the power management circuit 1134 in the timing module 11 through the power communication bus 152. The signals transmitted on the power communication bus 152 include but are not limited to parallel current sharing lines, communication buses, in-position lines, and address lines. The digital management circuit 132 is used to set the addresses of multiple power modules 13 connected in series. In addition, the digital management circuit 132 is also electrically connected to the second DC / DC conversion circuit 133 to respond to the signal configuration of the timing module 11 to share the current and obtain the working voltage and current values.

[0118] Furthermore, an indicator light is also provided on the third housing of the power module 13, and the indicator light is electrically connected to the digital management circuit 132, so that the user can know the working, standby, fault and other states of the power supply in time.

[0119] In some possible designs, considering the situation of multiple cascade power modules 13, in order to ensure the stability of the output voltage of the power module 13, the second DC / DC conversion circuit 133 can be connected to the power line through a parallel circuit.

[0120] According to an embodiment of the present application, it includes the features defined in any of the above embodiments, and further: the first shell, the second shell or the third shell includes a main board and a back board, the back board is used to set the connector, and the main board is used for the integrated circuit.

[0121] In a specific embodiment, Figure 1 and Figure 6 As shown, the timing module 11, the light source module 12, and the power module 13 are installed on the electrical installation rail, and the second housing of the timing module 11 has a timing backplane 1171 and a timing mainboard 1172. Among them, the timing mainboard 1172 is a circuit board for realizing the functions of the timing module 11, that is, the main functions of the timing module 11 are realized through the timing mainboard 1172. For example, the timing mainboard 1172 not only integrates the FPGA control circuit 112 and the communication management circuit 113, but also can be provided with the following connectors and signals, the Ethernet interface of the industrial computer 24, the interface of the AC input, the display interface, the visual sensor interface, the electromechanical system interface, etc., to meet the connection between the visual control device and other devices in the visual defect detection equipment. The main function of the timing backplane 1171 is to serve as an access board for the light source module 12 and the power module 13. The timing backplane 1171 is equipped with a first connector 121, and the connection between the timing backplane 1171 and the timing mainboard 1172 can be connected through a soft wire or an inter-board connector.

[0122] In some possible designs, the timing backplane 1171 and the timing mainboard 1172 may be combined to form an integrated circuit board.

[0123] In addition, when the timing backplane 1171 and the timing main board 1172 are assembled, one is in the horizontal direction and the other is in the vertical direction. The size of the timing backplane 1171 in the horizontal direction and the installation of the first connector 121 are more flexible and are not limited by the function of the timing main board 1172. The connection between the two boards can be connected by a flexible cable or an inter-board connector.

[0124] Similar to the timing backplane 1171 and the timing mainboard 1172 , the first housing of the light source module includes a light source backplane and a light source mainboard, and the third housing of the power module includes a power backplane and a power mainboard.

[0125] In this embodiment, a visual defect detection device is provided, such as Figure 2 , Figure 3 , Figure 4 and Figure 5As shown, the visual defect detection device includes: at least one light source 21, a visual sensor 23, a visual control device provided in the above embodiment, an industrial computer and an electromechanical system. Among them, the visual control device is electrically connected to at least one light source 21 and a visual sensor 23, the industrial computer is electrically connected to the communication management circuit of the visual control device; the electromechanical system is electrically connected to the FPGA control circuit of the visual control device. The visual control device includes: a timing module 11, at least one light source module 12 and at least one power module 13. A first connector 121 is provided on the first shell of at least one light source module 12, and at least one light source module 12 is used to drive the light source 21 of the visual defect detection device to emit light; the timing module 11 includes: a second shell, a second connector 111 is provided on the second shell, and the second connector 111 is detachably connected to the first connector 121. The FPGA control circuit 112 is provided in the second housing, the first end of the FPGA control circuit 112 is electrically connected to at least one light source module 12 through the trigger signal line 14, the second end of the FPGA control circuit 112 is electrically connected to the electromechanical system 22 of the visual defect detection device, the third end of the FPGA control circuit 112 is electrically connected to the visual sensor 23 of the visual defect detection device, and the FPGA control circuit 112 is used to output a trigger signal according to the motion state information of the electromechanical system 22 to control the operation of at least one light source module 12 and the visual sensor 23. The communication management circuit 113 is provided in the second housing, the first end of the communication management circuit 113 is electrically connected to at least one light source module 12 through the light source communication bus 151, the second end of the communication management circuit 113 is electrically connected to the FPGA control circuit 112, and the communication management circuit 113 is used to configure the operating parameters of at least one light source module 12 and the visual sensor 23. A third connector 131 is provided on the third shell of at least one power module 13, and the third connector 131 is detachably connected to the second connector 111. The first end of at least one power module 13 is electrically connected to the communication management circuit 113 through the power communication bus 152, and the second end of at least one power module 13 is electrically connected to at least one light source module 12 and / or the timing module 11 through a power line.

[0126] In this embodiment, on the one hand, the mutual plug-in structure of the light source module 12 and the timing module 11 is realized by the first connector 121 and the second connector 111, and the mutual plug-in structure of the power module 13 and the timing module 11 is realized by the third connector 131 and the second connector 111, thereby reducing the difficulty of assembling the light source module 12 and the timing module 11, facilitating the upgrading of the number of light source modules 12 and power supply modules 13, and making the visual control device more flexible in expanding the light source module 12 and the power supply module. On the other hand, the timing module 11 is provided with an independent FPGA control circuit 112 and a communication management circuit 113, and the real-time signal control and communication management of the visual control device are realized through the FPGA control circuit 112 and the communication management circuit 113, respectively, which effectively prevents the signals of the two groups of circuits 134 from interfering with each other, and is conducive to improving the response speed of the visual control device and the compatibility when the light source module 12 is expanded. The timing module 11 uses a communication bus (light source communication bus 151, power supply communication bus 152) and a trigger signal line 14 to interact with at least one light source module 12 and at least one power supply module 13, respectively, which helps to meet the control requirements between multiple light source modules 12 and power supply modules 13, and provides effective technical support for the flexible expansion of light source modules 12 and power supply modules 13. On the other hand, the timing module 11 adopts the characteristics of low power consumption, strong real-time parallel processing capability, and dynamic scrubbing of FPGA (Field Programmable Gate Array) technology, and flexibly and dynamically loads various control capabilities, which can more effectively utilize resources and improve the execution efficiency of the visual control device. In this way, the requirements for different visual control device functions in different application scenarios are met, and the change cost caused by changes in application scenarios is reduced.

[0127] Specifically, the electromechanical system 22 includes a mechanical motion system and an electric control system. The mechanical motion system is to ensure that the object moves at a uniform speed from the detection station, and the electric control system reflects the state of the mechanical motion system. For example, when the mechanical motion system is working in a uniform motion state, a differential signal of a certain frequency is output through the encoder. When the object reaches the predetermined position of the detection station, the sensor senses the object and outputs a signal to the PLC controller. Then the PLC controller outputs a PLC control signal to inform the FPGA control circuit 112 that the object has arrived, and outputs a corresponding level to trigger the FPGA control circuit 112 to start working. The industrial computer 24 can be a computer or a microprocessor system, also called a host computer, and the management software runs on the industrial computer 24.

[0128] For example, Figure 5As shown, the integrated control device (visual control device) of the visual defect detection equipment includes a timing module 11, six light source modules 12 and two power modules 13. The timing module 11 performs two-way communication with the industrial computer 24, receives the control information of the industrial computer 24 and uploads the working status signal of the device. The timing module 11 is externally connected to the AC input to provide the required energy and power to the device. The timing module 11 is externally connected to the electromechanical system 22 to receive the encoder signal and the PLC control signal. After the encoder signal and the PLC control signal are input to the timing module 11, the timing module 11 outputs the corresponding timing according to the requirements of the light source 21 and the visual sensor 23 for taking pictures, and drives the light source 21 to illuminate through the light source module 12, and drives the visual sensor 23 to take pictures.

[0129] One side of the timing module 11 is connected to the first light source module 12-a through the trigger signal line 14, the light source communication bus 151 and the DC power line 161, the second light source module 12-b is connected to the first light source module 12-a through the trigger signal line 14, the light source communication bus 151 and the DC power line 161, the third light source module 12-c is connected to the second light source module 12-b through the trigger signal line 14, the light source communication bus 151 and the DC power line 161, the fourth light source module 12-d is connected to the third light source module 12-c through the trigger signal line 14, the light source communication bus 151 and the DC power line 161, the fifth light source module 12-e is connected to the fourth light source module 12-d through the trigger signal line 14, the light source communication bus 151 and the DC power line 161, and the sixth light source module 12-f is connected to the fifth light source module 12-e through the trigger signal line 14, the light source communication bus 151 and the DC power line 161. The first light source module 12-a, the second light source module 12-b, the third light source module 12-c, the fourth light source module 12-d, the fifth light source module 12-e and the sixth light source module 12-f are connected to four light sources respectively, that is, each light source module 12 can drive four light sources to illuminate. The other side of the timing module 11 is connected to the first power module 13-a through a DC power line 161, a power communication bus 152 and an AC-DC power line 161, and the second power module 13-b is connected to the first power module 13-a through a DC power line 161, a power communication bus 152 and an AC-DC power line 161.

[0130] The working principle of visual defect detection equipment is as follows:

[0131] First, the host computer software is installed on the industrial computer 24, and the parameters of the integrated controller are set on the host computer software. These parameters include: setting the trigger effective edge (rising edge trigger, falling edge trigger) of the encoder signal, frequency multiplication and division parameters, delay parameters, pulse width or period parameters, etc.; setting the effective parameters (rising edge, falling edge, high level effective, low level effective) of the PLC control signal, setting the delay parameters, etc.; the path allocation information of the trigger signal of the timing module 11, for example, there are 24 trigger signals through the trigger signal line 14 to the light source module 12, and there are four trigger signals to the visual sensor 23. These four trigger signals include two row trigger signals and two frame trigger signals; the trigger effective signal of the first light source module 12-a, the second light source module 12-b, the third light source module 12-c, the fourth light source module 12-d, the fifth light source module 12-e, and the sixth light source module 12-f, this signal is to select four trigger signals from the trigger signal line 1414, and then use them as the trigger signal of the corresponding light source 21.

[0132] Secondly, the host computer sends the setting parameters to the timing module 11 through the Ethernet interface. After the communication management circuit 134 in the timing module 11 decomposes the parameters, it sets the working parameters of the light source module 12, the power module 13 and the FPGA processing circuit 1121 through the light source communication bus 151 and the power supply communication bus 152 and the internal communication line, so that the FPGA control circuit 112 of the timing module 11 will configure the timing state of the device according to the above parameters. When the timing module 11 receives the encoder signal and the PLC control signal, the visual control device outputs the corresponding timing to drive the light source 21 to illuminate and drive the visual sensor 23 to take pictures.

[0133] Those skilled in the art will understand that the structure of a visual defect detection device provided in this embodiment does not constitute a limitation on the visual defect detection device, and may include more or fewer components, or a combination of certain components, or different component arrangements.

[0134] In this embodiment, a visual control method for a visual defect detection device is provided. Figure 7 As shown, the method includes:

[0135] Step S301, obtaining working parameters of at least one light source and a visual sensor.

[0136] The working parameters include a target light source address and control parameters, and the control parameters include control parameters for the light source and control parameters for the visual sensor.

[0137] Step S302: generating a trigger signal according to the motion state information of the electromechanical system.

[0138] The trigger signal includes a first trigger signal and a second trigger signal, the first trigger signal is used to drive at least one light source to emit light, and the second trigger signal is used to drive the visual sensor to collect images.

[0139] Step S303, controlling the visual sensor to operate according to the control parameters and the second trigger signal.

[0140] Step S304: Control at least one light source to operate according to the target light source address, the control parameters and the first trigger signal.

[0141] In this embodiment, the working parameters of at least one light source and visual sensor set by the user are first obtained, so as to guide the visual defect detection device to control the light source and visual sensor to work through the working parameters. Then, according to the real-time motion state information of the electromechanical system, it is determined whether the light source and visual sensor need to work, and a trigger signal is generated if necessary. The visual sensor is triggered according to the second trigger signal to operate with the control parameters, and similarly, the light source corresponding to the target light source address is triggered according to the first trigger signal to operate with the control parameters. In this way, the visual defect detection device can respond to the actual scene in a timely manner, and flexibly control the light source and visual sensor, thereby enhancing the reliability of the visual defect detection device.

[0142] Furthermore, the above step 304 specifically includes:

[0143] Step 304 - 1 : extracting the target trigger signal from the first trigger signal based on the presence of a target trigger signal corresponding to the target light source address in the first trigger signal.

[0144] Step 304-2: According to the control parameters and the target trigger signal, the light source corresponding to the target light source address is controlled to operate.

[0145] In this embodiment, when the visual defect detection device includes multiple light sources, the first trigger signal is screened according to the target light source address indicated by the user, and the target trigger signal corresponding to the target light source address is extracted, that is, the trigger signal that can control the light source corresponding to the target light source address. Finally, the light source corresponding to the target light source address is triggered according to the target trigger signal to operate with the control parameters. Independent control of each light source is achieved to ensure the operating stability of the multi-cascade light source visual defect detection device.

[0146] In this application, the term "plurality" means two or more than two, unless otherwise clearly defined. The terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; "connected" can be a direct connection or an indirect connection through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0147] In the description of this specification, the description of the terms "one embodiment", "some embodiments", "specific embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0148] The above serial numbers of this application are only for description and do not represent the advantages and disadvantages of the implementation scenarios. The above disclosure is only a few specific implementation scenarios of this application, but this application is not limited to them, and any changes that can be thought of by technicians in this field should fall within the scope of protection of this application.

Claims

1. A visual control device, characterized in that: include: At least one light source module, a first connector being provided on a first housing of at least one of the light source modules, and at least one of the light source modules being used to drive a light source of a visual defect detection device to emit light; A timing module, the timing module comprising: a second housing, wherein a second connector is disposed on the second housing and the second connector is detachably connected to the first connector; An FPGA control circuit is provided in the second housing, a first end of the FPGA control circuit is electrically connected to at least one of the light source modules through a trigger signal line, a second end of the FPGA control circuit is electrically connected to the electromechanical system of the visual defect detection device, a third end of the FPGA control circuit is electrically connected to the visual sensor of the visual defect detection device, and The FPGA control circuit is used to output a trigger signal according to the motion state information of the electromechanical system. To control at least one of the light source modules and the visual sensor to work; A communication management circuit is provided in the second housing, a first end of the communication management circuit is electrically connected to at least one of the light source modules via a light source communication bus, a second end of the communication management circuit is electrically connected to the FPGA control circuit, and the communication management circuit is used to configure working parameters of at least one of the light source modules and the visual sensor; At least one power module, a third connector is provided on the third shell of at least one of the power modules, the third connector is detachably connected to the second connector, a first end of at least one of the power modules is electrically connected to the communication management circuit through a power communication bus, and a second end of at least one of the power modules is electrically connected to at least one of the light source modules and / or the timing module through a power line.

2. The visual control device according to claim 1, characterized in that: In the case where the visual control device includes a plurality of light source modules, the plurality of light source modules are connected in series via the first connector; In a case where the vision control device includes a plurality of power modules, the plurality of power modules are connected in series via the third connector.

3. The visual control device according to claim 1, characterized in that: The first connector, the second connector or the third connector comprises: a power cord port, connected to the power cord; and / or a communication bus port connected to the light source communication bus or the power supply communication bus; and / or The trigger signal line port is connected to the trigger signal line.

4. The visual control device according to any one of claims 1 to 3, characterized in that: The FPGA control circuit comprises: an FPGA processing circuit, configured to output a first trigger signal and a second trigger signal according to the motion state information of the electromechanical system; A multi-channel trigger signal circuit, wherein the first end of the multi-channel trigger signal circuit is electrically connected to the FPGA processing circuit, the second end of the multi-channel trigger signal circuit is electrically connected to the light source module via the trigger signal line, the third end of the multi-channel trigger signal circuit is electrically connected to the visual sensor, and the multi-channel trigger signal circuit is used to transmit the first trigger signal to at least one of the light source modules, and transmit the second trigger signal to the visual sensor.

5. The visual control device according to claim 4, characterized in that: The FPGA control circuit also includes: a receiving circuit, electrically connected to the electromechanical system and the FPGA processing circuit, the receiving circuit being used to receive and convert signals sent by the electromechanical system of the visual defect detection device, and output the converted signals to the FPGA processing circuit; A conversion circuit is electrically connected to the visual sensor and the third end of the multi-channel trigger signal circuit, and the conversion circuit is used to receive and convert the signal sent by the FPGA processing circuit, and output the converted signal to the visual sensor.

6. The visual control device according to claim 4, characterized in that: The timing module also includes: An AC / DC conversion circuit is connected to an AC power source, and the AC / DC conversion circuit is used to provide power for the timing module; A light source power collection circuit is connected to the power line, and the light source power collection circuit is used to determine the total power of at least one of the light source modules.

7. The visual control device according to claim 4, characterized in that: The communication management circuit comprises: A CPU processing circuit, electrically connected to the FPGA control circuit; An Ethernet circuit is electrically connected to the CPU processing circuit and the industrial computer of the visual defect detection device, and the Ethernet circuit is used to receive and convert the signal sent by the industrial computer and output the converted signal to the CPU processing circuit; a communication circuit, wherein a first end of the communication circuit is electrically connected to at least one of the power modules via the light source communication bus, and a second end of the communication circuit is electrically connected to the CPU processing circuit; A power management circuit, wherein a first end of the power management circuit is electrically connected to at least one of the power modules via the power communication bus, and a second end of the communication circuit is electrically connected to the CPU processing circuit.

8. The visual control device according to any one of claims 1 to 3, characterized in that: The light source module comprises: a sub-communication circuit, provided in the first housing, the sub-communication circuit being electrically connected to the communication management circuit via the light source communication bus, the sub-communication circuit being used to obtain operating parameters of the light source module, the operating parameters including a target light source address and control parameters; A channel selection circuit is provided in the first housing, a first end of the channel selection circuit is electrically connected to the sub-communication circuit, a second end of the channel selection circuit is electrically connected to the FPGA control circuit through the trigger signal line, and the channel selection circuit is used to extract a target trigger signal corresponding to the target light source address from the first trigger signal output by the FPGA control circuit; a light source circuit, disposed in the first housing, the light source circuit being electrically connected to the light source and the channel selection circuit, and the light source circuit being configured to output a voltage signal or a current signal according to the operating parameters in response to the target trigger signal; The first DC / DC conversion circuit is disposed in the first housing, and the first DC / DC conversion circuit is connected to the power line.

9. The visual control device according to any one of claims 1 to 3, characterized in that: The power module comprises: A power factor correction circuit is provided in the third housing, and the power factor correction circuit is connected to an AC power source through a power line; a second DC / DC conversion circuit, disposed in the third housing, the second DC / DC conversion circuit being electrically connected to the power factor correction circuit, the power factor correction circuit supplying power to the timing module and / or at least one of the light source modules through the power line; The digital management circuit is arranged in the third housing, a first end of the digital management circuit is electrically connected to the second DC / DC conversion circuit, and a second end of the digital management circuit is electrically connected to the communication management circuit through the power communication bus.

10. A visual defect detection device, characterized in that: include: at least one light source; Vision sensors; The visual control device according to any one of claims 1 to 9, electrically connected to the at least one light source and the visual sensor; An industrial computer electrically connected to the communication management circuit of the visual control device; The electromechanical system is electrically connected to the FPGA control circuit of the visual control device.

11. A visual control method for a visual defect detection device according to claim 10, characterized in that: include: Acquire operating parameters of the at least one light source and the visual sensor, wherein the operating parameters include a target light source address and control parameters; Generate a trigger signal according to the motion state information of the electromechanical system, wherein the trigger signal includes a first trigger signal and a second trigger signal, the first trigger signal is used to drive the at least one light source to emit light, and the second trigger signal is used to drive the visual sensor to collect an image; Controlling the visual sensor to work according to the control parameter and the second trigger signal; The at least one light source is controlled to operate according to the target light source address, the control parameter and the first trigger signal.

12. The visual control method according to claim 11, characterized in that: The step of controlling the at least one light source to operate according to the target light source address, the control parameter and the first trigger signal comprises: extracting the target trigger signal from the first trigger signal based on the presence of the target trigger signal corresponding to the target light source address in the first trigger signal; According to the control parameter and the target trigger signal, the light source corresponding to the target light source address is controlled to operate.

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