A waveform recognition method for ultrasonic scanning of laminated chip interface

Abstract

The present invention relates to the technical field of chip detection, and in particular to a waveform recognition method for ultrasonic scanning of a laminated chip interface, comprising the following steps: determining a packaging structure of a chip to be tested according to a packaging structure diagram of the laminated chip to be tested; making a decomposition scanning sample; immersing the decomposition scanning sample in water respectively, with the interface facing in the same direction as the laminated chip, using deionized water to remove bubbles on the surface of the decomposition scanning sample, performing an A-scan on the decomposition scanning sample and recording a corresponding A-scan reflection waveform; immersing the laminated chip in water, using deionized water to remove bubbles on the surface of the laminated chip, performing an A-scan on the laminated chip and recording an A-scan reflection waveform; making the A-scan reflection waveform of the interface area of ​​the decomposition scanning sample correspond to the A-scan reflection waveform of the laminated chip; the present invention is based on an ultrasonic scanning microscope and utilizes the idea of ​​decomposition scanning to achieve effective recognition of reflection waveforms of various interfaces of the laminated chip, thereby improving the ability to evaluate the interface quality of the laminated chip.

Description

Technical Field

[0001] The present invention relates to the technical field of chip detection, and in particular to a waveform recognition method for ultrasonic scanning of a stacked chip interface. Background Art

[0002] As chip manufacturing processes continue to shrink, the doubling effect of Moore's Law begins to slow down and Moore's Law becomes unsustainable. Therefore, chips are moving toward systematization, miniaturization, and integration. More and more chips use microsystem packaging technology, and stacked packaging is the most commonly used packaging form in microsystem packaging. At the same time, the complex packaging structure poses new challenges to chip detection technology.

[0003] Ultrasonic scanning technology is one of the non-destructive testing technologies widely used in the field of chip testing. The ultrasonic scanning microscope emits sound waves through the transducer, receives the reflected signal after being reflected by the chip under test, and forms an ultrasonic image and waveform after processing, which contains various structural and defect information of the chip under test. However, due to the large number of stacked layers and complex bonding materials of stacked chips, it is very difficult to identify ultrasonic images and waveforms.

[0004] After searching related patents, no waveform recognition method suitable for ultrasonic scanning of stacked chips has been found. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides a waveform recognition method for ultrasonic scanning of the interface of a stacked chip. The present invention is based on an ultrasonic scanning microscope and utilizes the idea of ​​decomposition scanning to achieve effective recognition of the reflected waveforms of each interface of the stacked chip, thereby improving the ability to evaluate the interface quality of the stacked chip.

[0006] The present invention is achieved through the following technical solutions:

[0007] A waveform recognition method for ultrasonic scanning of a stacked chip interface, using an ultrasonic microscope for detection, comprises the following steps:

[0008] 1) Determine the packaging structure of the chip to be tested according to the packaging structure diagram of the stacked chip to be tested;

[0009] 2) According to the stacked chip package structure to be tested, a decomposition scanning sample is prepared; wherein the decomposition scanning sample refers to an independent structure formed by an interface; that is, if the first interface of the stacked chip to be tested is an interface formed by a plastic encapsulation material and an upper surface of the first layer chip, then the first decomposition scanning sample is a package of the first layer chip and the plastic encapsulation material; the first interface refers to an interface that appears in order from top to bottom;

[0010] 3) immersing the first decomposed scanning sample in water, with the interface facing in the same direction as the laminated chip;

[0011] 4) using deionized water to remove bubbles on the surface of the first decomposition scanning sample;

[0012] 5) performing an A-scan on the first decomposed scanning sample, determining a waveform region of the first interface according to a reflection waveform of the A-scan, and recording the waveform of the region;

[0013] 6) Repeat steps 3), 4), and 5) to perform A-scan on the remaining decomposed scanning samples and record the waveform of the interface area;

[0014] 7) Immersing the laminated chip to be tested in water;

[0015] 8) Using deionized water to remove bubbles from the surface of the laminated chip;

[0016] 9) performing an A-scan on the laminated chip and recording a reflection waveform of the A-scan;

[0017] 10) The A-scan reflection waveform of the interface area of ​​the decomposed scanning sample is matched with the A-scan waveform of the stacked chip to assist in understanding the A-scan reflection waveform of the stacked chip and identify the reflection waveform corresponding to each interface of the stacked chip.

[0018] Preferably, according to the reflection waveforms after identification of each interface of the stacked chip in step 10), a C-scan is performed on each interface region in the stacked chip to obtain a corresponding ultrasonic scanning image.

[0019] Preferably, it is determined whether there are defects such as delamination and voids at the corresponding interface based on the C-scan image.

[0020] The beneficial effects of the present invention are:

[0021] The present invention relates to a waveform recognition method for ultrasonic scanning of a laminated chip interface. The present invention includes the following steps: determining the packaging structure of a chip to be tested according to a package structure diagram of the laminated chip to be tested; making a decomposition scanning sample; immersing the decomposition scanning sample in water respectively, with the interface facing in line with the laminated chip, using deionized water to remove bubbles on the surface of the decomposition scanning sample, performing an A-scan on the decomposition scanning sample and recording the corresponding A-scan reflection waveform; immersing the laminated chip in water, using deionized water to remove bubbles on the surface of the laminated chip, performing an A-scan on the laminated chip, and recording the A-scan reflection waveform; matching the A-scan reflection waveform of the interface area of ​​the decomposition scanning sample with the A-scan reflection waveform of the laminated chip, assisting in understanding the A-scan reflection waveform of the laminated chip, and identifying the reflection waveform corresponding to each interface of the laminated chip; performing a C-scan on each interface area in the laminated chip according to the identified reflection waveform and obtaining a corresponding ultrasonic scanning image; judging whether there are defects such as delamination and voids at the corresponding interface according to the ultrasonic scanning image. The invention is based on an ultrasonic scanning microscope and utilizes the idea of ​​decomposition scanning to achieve effective recognition of reflection waveforms of various interfaces of the stacked chip and improve the ability to evaluate the interface quality of the stacked chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 This is a diagram of the stacked chip packaging structure;

[0024] Figure 2 is a schematic diagram of the first decomposition sample;

[0025] Figure 3 is a schematic diagram of the second decomposition sample;

[0026] Figure 4 This is a schematic diagram of the third decomposition sample;

[0027] Figure 5 This is a schematic diagram of the fourth decomposition sample.

[0028] In the figure: 100 - first interface, 200 - second interface, 300 - third interface, 400 - fourth interface, 500 - fifth interface. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] Embodiment 1:

[0031] See also Figure 1 to Figure 5 As shown: The embodiment of the present invention specifically discloses a technical solution of a waveform recognition method for ultrasonic scanning of a stacked chip interface, and the specific steps thereof include:

[0032] Step S1: According to the structure diagram of the laminated chip package to be tested, Figure 1 As shown, it is determined that the stacked chip packaging form is wire bonding plastic packaging, including two layers of chips and two layers of adhesive, wherein the chip materials are all silicon wafers, and the adhesive materials are all the same type of insulating adhesive, with a total of 5 interfaces;

[0033] Step S2: Prepare the first decomposition scanning sample, such as Figure 2 As shown, the first interface 100 is the bonding surface between the molding compound and the silicon wafer;

[0034] Step S3: Prepare the second decomposition scanning sample, such as Figure 3 As shown, the second interface 200 is the bonding surface between the silicon wafer and the insulating adhesive, and the bottom layer is the transition plate, which only provides support;

[0035] Step S4: Prepare the third decomposition scanning sample, such as Figure 4 As shown, the third interface 300 is the bonding surface between the insulating adhesive and the silicon wafer;

[0036] Step S5: Prepare the fourth decomposition scanning sample, such as Figure 5 As shown, the fifth interface 500 is the bonding surface between the insulating glue and the substrate;

[0037] The fourth interface 400 is the bonding surface between the second silicon wafer and the second insulating adhesive layer, and the interface materials are completely the same, and the waveform can refer to the second interface 200, so no separate decomposition scanning sample is made.

[0038] Step S6: immerse the first decomposition scanning sample in water, with the interface facing the same direction as the laminated chip, use deionized water to remove bubbles on the surface of the first decomposition scanning sample, perform A-scan on the first decomposition scanning sample, determine the waveform area of ​​the first interface 100 according to the reflected waveform of the A-scan, and record the waveform of the area;

[0039] Step S7: repeating step S6, performing A-scan on the second, third, and fourth decomposed scanning samples, and recording the waveform of the interface area;

[0040] Step S8: Immerse the laminated chip to be tested in water, use deionized water to remove bubbles on the surface of the laminated chip, perform an A-scan on the laminated chip, and compare the A-scan reflection waveform of the interface area of ​​the decomposed scan sample recorded in steps S6 and S7 with the A-scan waveform of the laminated chip to assist in understanding the A-scan reflection waveform of the laminated chip and identify each interface of the laminated chip and the corresponding reflection waveform.

[0041] Furthermore, according to the interface waveforms distinguished in step S8, a C-scan is performed on each interface region in the stacked chip to obtain a corresponding ultrasonic scanning image.

[0042] Furthermore, it is determined based on the C-scan image whether there are defects such as delamination and voids on the corresponding interface.

[0043] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A waveform recognition method for ultrasonic scanning of a stacked chip interface, using an ultrasonic microscope for detection, characterized in that: The steps include: 1) Determine the packaging structure of the chip to be tested according to the packaging structure diagram of the stacked chip to be tested; 2) According to the stacked chip package structure to be tested, a decomposition scanning sample is prepared; wherein the decomposition scanning sample refers to an independent structure formed by an interface; that is, if the first interface of the stacked chip to be tested is an interface formed by a plastic encapsulation material and an upper surface of the first layer chip, then the first decomposition scanning sample is a package of the first layer chip and the plastic encapsulation material; the first interface refers to an interface that appears in order from top to bottom; 3) immersing the first decomposed scanning sample in water, with the interface facing in the same direction as the laminated chip; 4) using deionized water to remove bubbles on the surface of the first decomposition scanning sample; 5) performing an A-scan on the first decomposed scanning sample, determining a waveform region of the first interface according to a reflection waveform of the A-scan, and recording the waveform of the region; 6) Repeat steps 3), 4), and 5) to perform A-scan on the remaining decomposed scanning samples and record the waveform of the interface area; 7) Immersing the laminated chip to be tested in water; 8) Using deionized water to remove bubbles from the surface of the laminated chip; 9) performing an A-scan on the laminated chip and recording a reflection waveform of the A-scan; 10) The A-scan reflection waveform of the interface area of ​​the decomposed scanning sample is matched with the A-scan waveform of the stacked chip to assist in understanding the A-scan reflection waveform of the stacked chip and identify the reflection waveform corresponding to each interface of the stacked chip.

2. The waveform recognition method for ultrasonic scanning of a stacked chip interface according to claim 1, characterized in that: According to the reflected waveforms after the identification of each interface of the stacked chip in step 10), a C-scan is performed on each interface area in the stacked chip to obtain a corresponding ultrasonic scanning image.

3. The waveform recognition method for ultrasonic scanning of a stacked chip interface according to claim 2, characterized in that: It is determined based on the C-scan image whether there are delamination or void defects at the corresponding interface.

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