Method and device for verifying the impact of D3cold on enabling SSD HMB

Abstract

The present invention relates to a method and device for verifying the effect of D3cold on enabling SSDHMB. The method comprises: obtaining an enable HMB command and setting a first memory return field value; setting a power consumption status register in an SSD configuration space to cause the SSD to enter D3hot; powering off the SSD to cause the SSD to enter D3cold; repowering and initializing the SSD; obtaining an enable HMB command and setting a second memory return field value; performing read and write operations on the SSD; determining whether the read and write operations are successful; and if the read and write operations are successful, verification is passed. The present invention can verify the effect of entering and exiting D3cold on enabling the SSDHMB function. Testing does not require selecting a laptop, thereby improving testing efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of verifying the impact of D3cold on enabling SSD HMB, and in particular to a method and device for verifying the impact of D3cold on enabling SSD HMB. Background Art

[0002] The full name of HMB is: Host Memory Buffer. In the NVMe1.4 protocol, the system software needs to reserve a portion of memory space, and can tell the SSD the information of this memory space through the command to enable the HMB function. After that, the SSD can use this part of the system memory area, but the premise is that the SSD needs to support the HMB function and the host software supports the SSD to enable HMB. Most SSDs have onboard DRAM, which is mainly used to store a mapping table that shows the mapping relationship between logical addresses and physical addresses. As the capacity of the SSD increases, the DRAM required for the design also increases. The HMB function allows the SSD to use the memory area allocated by the host as its DRAM, thereby reducing costs.

[0003] Before enabling HMB, the host first reads the SSD's HMB-related information (such as the recommended cache size (Host Memory Buffer Preferred Size), the minimum supported cache size (Host Memory Buffer Minimum Size), the minimum supported cache descriptor entry (Host Memory Buffer Minimum DescriptorEntry Size), and the maximum supported cache descriptor entry (Host Memory Maximum DescriptorsEntries). The host then uses this information to allocate memory space based on its own requirements and informs the SSD of this memory space by sending a command to enable the HMB function. Some hosts have power-saving modes, such as consumer-grade laptops that prioritize battery life. These are generally controlled by system software. For example, if the computer is powered on but has not been used for a while, the operating system can configure it to enter sleep mode to save power. The primary way to save power when a laptop enters sleep mode is to minimize the power consumption of each component. For the SSD, one of the three major components, reducing its power consumption is crucial to improving battery life.

[0004] "D3" is a device power state defined by the PCIe protocol. D3 has two states, D3hot and D3cold. These states are primarily used by PCIe devices for energy conservation. D3cold, however, is the SSD's power-off state and is even more energy-efficient than D3hot. System software can set the power state register in the PCIe NVMe SSD's configuration space to first enter the D3hot state. The host then powers off the SSD, at which point the SSD enters D3cold. There are various ways to reduce SSD power consumption after a laptop enters sleep mode. Some methods involve placing the SSD in D3cold mode to reduce power consumption. Waking the laptop from sleep mode also means the SSD exits D3cold and returns to normal operation. If the laptop has enabled the SSD's HMB function and allocated a cache area to the SSD before entering sleep mode, since the SSD also enters the D3cold state after entering sleep mode, the host needs to resend the command to enable the HMB function to the SSD when waking up from sleep mode. Taking into account that the SSD's HMB function needs to be re-enabled every time it is woken up, and the HMB data needs to be reloaded each time it is enabled, it will reduce the system performance. Therefore, the command to enable the SSD HMB function also provides an MR (Memory Return) field. Setting the MR field value to "1" in the command tells the SSD to continue using the data in the cache area allocated before entering sleep mode. Therefore, when the host wakes up from sleep mode, it can send an enable HMB command with an MR field value of "1" to the SSD. In this way, the host does not need to reallocate the cache area, and the SSD does not need to repeatedly load the HMB data, avoiding the performance impact due to reallocation and reloading of HMB data.

[0005] The current method for verifying the impact of entering and exiting D3cold on enabling SSD HMB is to select a laptop computer that can put the SSD into D3cold mode after entering sleep mode, install an operating system that supports HMB, then set the system to enter sleep mode, and finally wake it up from sleep mode to observe whether the operating system has any abnormalities, such as blue screens, program freezes, system errors, etc. However, the above method has the following shortcomings: it is difficult to select laptop computers that meet the requirements, and because information such as whether the SSD will enter D3cold after the tested laptop enters sleep mode and whether the operating system supports enabling the SSD HMB function is generally not provided to the user, it is usually necessary to use a PCIe protocol analyzer to capture the data packets sent by the host to the SSD when entering sleep mode to confirm, which is not conducive to improving test efficiency. Summary of the Invention

[0006] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a method and apparatus for verifying the impact of D3cold on enabling SSD HMB.

[0007] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0008] In a first aspect, this embodiment provides a method for verifying the impact of D3cold on enabling SSD HMB, including the following steps:

[0009] Get the Enable HMB command and set the first memory return field value;

[0010] Set the power consumption status register in the SSD configuration space to make the SSD enter D3hot;

[0011] Power off the SSD to put it into D3cold.

[0012] Re-power on and initialize the SSD;

[0013] Get the Enable HMB command and set the second memory return field value;

[0014] Perform read and write operations on the SSD;

[0015] Determine whether the read and write operations are successful;

[0016] If the read and write operations are successful, the verification passes.

[0017] A further technical solution is: the value of the first memory return field is 0; the value of the second memory return field is 1.

[0018] Its further technical solution is: after the steps of obtaining the HMB enable command and setting the memory return to 0, it also includes: obtaining a command to query the HMB function status and confirming whether the HMB enablement is successful; if it is confirmed that the HMB enablement is successful, executing the setting of the power consumption status register in the SSD configuration space to enable the SSD to enter D3hot.

[0019] Its further technical solution is: after obtaining the HMB enable command and setting the memory return to 1 step, it also includes: obtaining a command to query the HMB function status and confirming whether the HMB enablement is successful; if it is confirmed that the HMB enablement is successful, executing the read and write operations on the SSD.

[0020] In a second aspect, this embodiment provides a device for verifying the effect of D3cold on enabling SSDHMB, comprising: a first acquisition and setting unit, a setting unit, a power-off unit, a power-on initialization unit, a second acquisition and setting unit, a read-write unit, a judgment unit, and a pass unit;

[0021] The first acquisition and setting unit is configured to acquire an enable HMB command and set a first memory return field value;

[0022] The setting unit is used to set the power consumption status register in the SSD configuration space so that the SSD enters D3hot;

[0023] The power-off unit is used to power off the SSD so that the SSD enters D3cold;

[0024] The power-on initialization unit is used to re-power on and initialize the SSD;

[0025] The second acquisition and setting unit is used to acquire the enable HMB command and set the second memory return field value;

[0026] The read / write unit is used to perform read and write operations on the SSD;

[0027] The judging unit is used to judge whether the read and write operations are successful;

[0028] The passing unit is used to verify that the read and write operations are successful.

[0029] A further technical solution is: the value of the first memory return field is 0; the value of the second memory return field is 1.

[0030] Its further technical solution is: it also includes: a first acquisition confirmation unit, used to obtain a command to query the HMB function status and confirm whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, the power consumption status register in the SSD configuration space is set to enable the SSD to enter D3hot.

[0031] Its further technical solution is: it also includes: a second acquisition confirmation unit, which is used to obtain a command to query the HMB function status and confirm whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, the read and write operations on the SSD are executed.

[0032] In a third aspect, this embodiment provides a computer device, comprising a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the method for verifying the impact of D3cold on enabling SSD HMB as described above is implemented.

[0033] In a fourth aspect, this embodiment provides a storage medium storing a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the method for verifying the impact of D3cold on enabling SSD HMB as described above can be implemented.

[0034] Compared with the prior art, the present invention has the following advantages: the influence of entering and exiting D3cold on enabling the SSD HMB function can be verified, and the test does not require the selection of a laptop computer, thereby improving the test efficiency and better meeting the needs.

[0035] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 A flowchart of a method for verifying the impact of D3cold on enabling SSD HMB, provided in an embodiment of the present invention;

[0038] Figure 2 A schematic block diagram of an apparatus for verifying the effect of D3cold on enabling SSD HMB, provided by an embodiment of the present invention;

[0039] Figure 3 A schematic block diagram of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0040] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0041] It will be understood that when used in this specification and the appended claims, the terms “comprises” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0042] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the present invention. As used in the specification and appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0043] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0044] See also Figure 1 In the specific embodiment shown, the present invention discloses a method for verifying the impact of D3cold on enabling SSD HMB, including the following steps:

[0045] The test environment of this test method is as follows:

[0046] Hardware Requirements: Tested Computer: A desktop computer with an ASUS Z590 motherboard. Note: This method requires a desktop computer, but the specific model is not mandatory. A desktop computer with an ASUS Z590 motherboard is preferred as the test computer. Tested SSD: An SSD that supports PCIe and NVMe protocols.

[0047] Software requirements: Operating system: Windows 10; Test software: Ulink DriveMaster 9NVMe; Test script: Custom-written DriveMaster test script.

[0048] S1, obtain the enable HMB command and set the first memory return field value;

[0049] Among them, the first memory return field value is 0, simulating the HMB command issued by the operating system after startup. Because the operating system enables SSD HMB to allocate cache space to the SSD for the first time, the first memory return field value is 0 (MR=0) at this time.

[0050] Among them, after step S1, it also includes: obtaining a command to query the HMB function status and confirming whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, executing the setting of the power consumption status register in the SSD configuration space to enable the SSD to enter D3hot; if it is confirmed that the HMB is not enabled successfully, the verification fails.

[0051] Specifically, confirmation refers to using the Ulink DriveMaster 9 NVMe software to edit the command to obtain the HMB status according to the NVMe protocol and send the command to the SSD.

[0052] The result of verification failure is that the SSD cannot normally respond to the read and write commands sent by the host.

[0053] S2, set the power consumption status register in the SSD configuration space to make the SSD enter D3hot;

[0054] Among them, setting refers to the position of the power consumption status register defined according to the NVMe protocol, and the value of the power consumption status register position is sent by editing the setting register command using the UlinkDriveMaster 9 NVMe software.

[0055] S3, power off the SSD to make it enter D3cold;

[0056] Among them, powering off the SSD to make the SSD enter D3cold is to simulate the operating system entering the sleep mode, because the SSD in the sleep mode is in D3cold at this time.

[0057] S4, re-power on and initialize the SSD;

[0058] S5, obtain the enable HMB command and set the second memory return field value;

[0059] Among them, after step S5, it also includes: obtaining a command to query the HMB function status and confirming whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, executing the read and write operations on the SSD; if it is confirmed that the HMB is not enabled successfully, the verification fails.

[0060] S6, read and write operations on the SSD;

[0061] S7, determine whether the read and write operations are successful; if the read and write operations are not successful, the verification fails.

[0062] S8: If the read and write operations are successful, the verification is successful.

[0063] The result of the verification is that the SSD can normally respond to the read and write commands sent by the host.

[0064] This paper utilizes Ulink's DriveMaster software, which provides a very flexible interface. Testers can use these interfaces to construct NVMe commands and send them to the SSD. Therefore, test scripts can be written to verify the impact of entering and exiting D3cold on enabling the SSD's HMB function. The test does not require the selection of a laptop, which improves test efficiency. The present invention is suitable for verifying SSDs that support HMB and D3cold.

[0065] See also Figure 2 As shown, the present invention also discloses a device for verifying the influence of D3cold on enabling SSD HMB, comprising: a first obtaining and setting unit 10, a setting unit 20, a power-off unit 30, a power-on initialization unit 40, a second obtaining and setting unit 50, a reading and writing unit 60, a judging unit 70 and a passing unit 80;

[0066] The first acquisition and setting unit 10 is used to acquire an enable HMB command and set a first memory return field value;

[0067] The setting unit 20 is used to set the power consumption status register in the SSD configuration space so that the SSD enters D3hot;

[0068] The power-off unit 30 is used to power off the SSD so that the SSD enters D3cold;

[0069] The power-on initialization unit 40 is used to re-power on and initialize the SSD;

[0070] The second acquisition and setting unit 50 is used to acquire the enable HMB command and set the second memory return field value;

[0071] The read / write unit 60 is used to perform read / write operations on the SSD;

[0072] The judging unit 70 is used to judge whether the read and write operations are successful;

[0073] The passing unit 80 is used to verify that the read and write operations are successful.

[0074] Among them, the first memory return field value is 0; the second memory return field value is 1.

[0075] The device further includes: a first acquisition confirmation unit, configured to acquire a command for querying the HMB functional status and confirm whether the HMB is enabled successfully; if the HMB is enabled successfully, the power consumption status register in the SSD configuration space is set to enable the SSD to enter D3hot.

[0076] The device further includes: a second acquisition confirmation unit, configured to acquire a command for querying the HMB functional status and confirm whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, the read and write operations on the SSD are performed.

[0077] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the above-mentioned device and each unit for verifying the impact of D3cold on enabling SSD HMB can refer to the corresponding description in the aforementioned method embodiment. For the convenience and brevity of the description, it will not be repeated here.

[0078] The above-mentioned device for verifying the influence of D3cold on enabling SSD HMB can be implemented in the form of a computer program. The computer program can be used in the following manner: Figure 3 Runs on the computer equipment shown.

[0079] See also Figure 3 , Figure 3This is a schematic block diagram of a computer device provided in an embodiment of the present application. The computer device 500 can be a terminal or a server. The terminal can be a smart phone, tablet computer, laptop computer, desktop computer, personal digital assistant, wearable device, or other electronic device with communication capabilities. The server can be a standalone server or a server cluster consisting of multiple servers.

[0080] See Figure 3 The computer device 500 includes a processor 502 , a memory, and a network interface 505 connected via a system bus 501 , wherein the memory may include a non-volatile storage medium 503 and an internal memory 504 .

[0081] The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer program 5032 includes program instructions, which, when executed, may cause the processor 502 to execute a method for verifying the effect of D3cold on enabling SSD HMB.

[0082] The processor 502 is used to provide computing and control capabilities to support the operation of the entire computer device 500.

[0083] The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a method for verifying the influence of D3cold on enabling SSDHMB.

[0084] The network interface 505 is used to communicate with other devices through the network. Figure 3 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present application, and does not constitute a limitation on the computer device 500 to which the solution of the present application is applied. The specific computer device 500 may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0085] The processor 502 is configured to execute a computer program 5032 stored in the memory to implement the following steps:

[0086] Step S1, obtain the enable HMB command and set the first memory return field value;

[0087] Step S2, setting the power consumption status register in the SSD configuration space to make the SSD enter D3hot;

[0088] Step S3, powering off the SSD to put the SSD into D3cold;

[0089] Step S4: Re-power on and initialize the SSD;

[0090] Step S5, obtaining the enable HMB command and setting the second memory return field value;

[0091] Step S6, performing read and write operations on the SSD;

[0092] Step S7, determining whether the read / write operation is successful; if the read / write operation is unsuccessful, the verification fails.

[0093] Step S8: If the read and write operations are successful, the verification is successful.

[0094] It should be understood that in the embodiment of the present application, the processor 502 may be a central processing unit (CPU), and the processor 502 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0095] Those skilled in the art will appreciate that all or part of the steps in the method of the above-described embodiment can be implemented by instructing the relevant hardware through a computer program. The computer program includes program instructions, which can be stored in a storage medium that is computer-readable. The program instructions are executed by at least one processor in the computer system to implement the steps in the method of the above-described embodiment.

[0096] Therefore, the present invention also provides a storage medium. The storage medium can be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the method for verifying the effect of D3cold on enabling SSDHMB can be implemented. The storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the method can be implemented. The program instructions include the following steps:

[0097] Step S1, obtain the enable HMB command and set the first memory return field value;

[0098] Step S2, setting the power consumption status register in the SSD configuration space to make the SSD enter D3hot;

[0099] Step S3, powering off the SSD to put the SSD into D3cold;

[0100] Step S4: Re-power on and initialize the SSD;

[0101] Step S5, obtaining the enable HMB command and setting the second memory return field value;

[0102] Step S6, performing read and write operations on the SSD;

[0103] Step S7, determining whether the read / write operation is successful; if the read / write operation is unsuccessful, the verification fails.

[0104] Step S8: If the read and write operations are successful, the verification is successful.

[0105] In one embodiment, the first memory return field value is 0; the second memory return field value is 1.

[0106] In one embodiment, after the steps of obtaining the HMB enable command and setting the memory return to 0, the step further includes: obtaining a command to query the HMB function status and confirming whether the HMB enablement is successful; if it is confirmed that the HMB enablement is successful, executing the step of setting the power consumption status register in the SSD configuration space to enable the SSD to enter D3hot.

[0107] In one embodiment, after obtaining the HMB enable command and setting the memory return to 1, the method further includes: obtaining a command to query the HMB function status and confirming whether the HMB enablement is successful; if it is confirmed that the HMB enablement is successful, executing the read and write operations on the SSD.

[0108] The storage medium may be any computer-readable storage medium that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a magnetic disk, or an optical disk.

[0109] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0110] In the several embodiments provided herein, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the various units is merely a logical functional division, and actual implementation may employ other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be omitted or not implemented.

[0111] The steps in the methods of the embodiments of the present invention may be adjusted in order, combined, or deleted as needed. The units in the devices of the embodiments of the present invention may be combined, divided, or deleted as needed. Furthermore, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit.

[0112] If this integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the existing technology, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, terminal, or network device, etc.) to execute all or part of the steps of the method described in various embodiments of the present invention.

[0113] The above embodiments are preferred implementation schemes of the present invention. In addition, the present invention can also be implemented in other ways. Any obvious replacement without departing from the concept of the present technical solution is within the scope of protection of the present invention.

Claims

1. A method for verifying the effect of D3cold on enabling SSD HMB, characterized in that: The following steps are involved: Get the Enable HMB command and set the first memory return field value; Set the power consumption status register in the SSD configuration space to make the SSD enter D3hot; Power off the SSD to put it into D3cold. Re-power on and initialize the SSD; Get the Enable HMB command and set the second memory return field value; Perform read and write operations on the SSD; Determine whether the read and write operations are successful; If the read and write operations are successful, the verification passes.

2. The method for verifying the effect of D3cold on enabling SSD HMB according to claim 1, characterized in that: The first memory return field value is 0; the second memory return field value is 1.

3. The method for verifying the effect of D3cold on enabling SSD HMB according to claim 2, characterized in that: After the steps of obtaining the HMB enable command and setting the first memory return field value to 0, the method further includes: obtaining a command to query the HMB function status and confirming whether the HMB enablement is successful; if it is confirmed that the HMB enablement is successful, executing the setting of the power consumption status register in the SSD configuration space to enable the SSD to enter D3hot.

4. The method for verifying the effect of D3cold on enabling SSD HMB according to claim 2, wherein: After the step of obtaining the HMB enable command and setting the second memory return field value to 1, it also includes: obtaining a command to query the HMB function status and confirming whether the HMB enablement is successful; if it is confirmed that the HMB enablement is successful, executing the read and write operations on the SSD.

5. A device for verifying the effect of D3cold on enabling SSD HMB, characterized in that: include: a first acquisition and setting unit, a setting unit, a power-off unit, a power-on initialization unit, a second acquisition and setting unit, a read-write unit, a judgment unit, and a passing unit; The first acquisition and setting unit is configured to acquire an enable HMB command and set a first memory return field value; The setting unit is used to set the power consumption status register in the SSD configuration space so that the SSD enters D3hot; The power-off unit is used to power off the SSD so that the SSD enters D3cold; The power-on initialization unit is used to re-power on and initialize the SSD; The second acquisition and setting unit is used to acquire the enable HMB command and set the second memory return field value; The read / write unit is used to perform read and write operations on the SSD; The judging unit is used to judge whether the read and write operations are successful; The passing unit is used to verify that the read and write operations are successful.

6. The device for verifying the effect of D3cold on enabling SSD HMB according to claim 5, characterized in that: The first memory return field value is 0; the second memory return field value is 1.

7. The device for verifying the effect of D3cold on enabling SSD HMB according to claim 6, characterized in that: Also includes: The first acquisition confirmation unit is used to obtain a command to query the HMB function status and confirm whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, the power consumption status register in the SSD configuration space is set to enable the SSD to enter D3hot.

8. The device for verifying the effect of D3cold on enabling SSD HMB according to claim 6, characterized in that: Also includes: The second acquisition confirmation unit is used to obtain a command for querying the HMB function status and confirm whether the HMB is enabled successfully; if it is confirmed that the HMB is enabled successfully, the read and write operations on the SSD are performed.

9. A computer device, characterized in that: The computer device includes a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the method for verifying the influence of D3cold on enabling SSD HMB according to any one of claims 1 to 4 is implemented.

10. A storage medium, characterized in that: The storage medium stores a computer program, which includes program instructions. When the program instructions are executed by a processor, the method for verifying the effect of D3cold on enabling SSD HMB according to any one of claims 1 to 4 can be implemented.

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