Burst power control method and circuit for clamped asymmetric half-bridge flyback converter

Abstract

The present invention relates to a burst power control method and circuit for a clamped asymmetric half-bridge flyback converter. The method comprises: real-time detection of a load value of the clamped asymmetric half-bridge flyback converter; determining whether the load value meets a condition for entering a burst power mode; if so, entering burst power mode, increasing the converter's switching frequency and peak current limit maximum value based on the load value; determining whether the current load value and the burst power mode operating time meet a condition for terminating the burst power mode; if so, terminating the burst power mode and entering a cooling mode; comparing the load value with a preset maximum output load value in real time; and if the load value is greater than the preset maximum output load value, reducing the transformer's output voltage based on the load value and the maximum output load value to limit the converter's maximum output power. This method accurately limits the maximum burst power without detecting the secondary current, thereby improving prototype reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of converter control, and in particular to a burst power control method and circuit for a clamped asymmetric half-bridge flyback converter. Background Art

[0002] The asymmetric half-bridge flyback converter, due to its topological soft-switching characteristics, has become a research hotspot for high-efficiency switching power supply applications. When the main switch of an asymmetric half-bridge flyback converter achieves zero-voltage turn-on at full load and heavy loads, its power stage parameters are considered optimally designed. Asymmetric half-bridge flyback converters typically exhibit high conversion efficiency at full load and heavy loads. However, the negative peak value of the magnetizing inductor current increases as the load decreases, exceeding the requirement for the converter's main switch to achieve zero-voltage turn-on. This results in ineffective losses, reducing efficiency, low light-load efficiency, and high no-load power consumption.

[0003] In order to solve the problems of low light load efficiency and high no-load power consumption of the asymmetric half-bridge converter, the Chinese patent application number 201911352361.1, entitled Switching Power Supply Device, proposes a clamped asymmetric half-bridge flyback converter, such as Figure 1 As shown in the figure, it adds a unidirectional clamp module (composed of switch tube S3 and diode D3) in parallel with the primary side of the transformer and adopts Figure 2 As shown in the mode processing curve, the controller controls the converter to operate in asymmetric half-bridge flyback mode (AHBF Mode) or clamped asymmetric half-bridge flyback mode (CAHBF Mode) according to different load currents. This can not only ensure optimal efficiency under heavy load or full load, but also effectively control the negative peak of the excitation inductor current under light load, greatly improving the light-load efficiency of the converter and reducing the no-load loss, making the converter system efficiency better within the full load range.

[0004] For optocoupler isolation topologies that use peak current control, the prior art typically uses the detection of the VFB voltage at the optocoupler receiving end to achieve load judgment. However, for the clamped asymmetric half-bridge flyback topology, the nonlinearity introduced by the clamping and input voltage will make the VFB voltage nonlinear, so the VFB voltage cannot be directly used for judgment in mode processing. Based on the topological characteristics of the clamped asymmetric half-bridge flyback converter, the output load current can be detected on the primary side of the converter. The load detection method of primary-side load detection can decouple the detection logic of load judgment from the detection of the VFB voltage, thereby achieving flexible power stage parameter design without considering input voltage, clamping depth, MOS characteristic differences, etc.

[0005] In actual applications, there are situations where a load may be overloaded for a short period of time but then quickly recover to normal or even light load. For example, when starting an inductive load such as a motor, the current required during startup is several times that of normal operation. In such cases, the power module must have a burst power function to prevent it from entering a protection state due to a short-term overload.

[0006] However, the clamped asymmetric half-bridge flyback converter needs to operate in AHBF Mode under heavy load and in CAHBF Mode under light load. If it is in burst power mode, how is the mode processing completed? How is power limiting achieved during the cooldown period of the burst power? Furthermore, accurate power limiting cannot be achieved by simply restoring the system peak current limit maximum value and switching frequency. How to achieve relatively precise power limiting in the primary circuit and how to achieve accurate power limit management during the cooldown period are all issues that must be considered for the clamped asymmetric half-bridge flyback converter with burst power function.

[0007] Traditional burst power mode control typically increases the switching frequency and the converter's peak current limit, allowing the converter to deliver more power during this period. During the cooldown period, traditional cooling control restores the converter's switching frequency and peak current limit (Vcs_max) to their normal operating conditions. If overpower persists, the converter's output voltage (Vo) drops, triggering short-circuit protection when the load is heavy enough.

[0008] However, the above-mentioned traditional burst power control and cooling power limit management will have two problems when applied to the clamped asymmetric half-bridge flyback converter: 1. Due to factors such as the clamping depth, MOSFET characteristics, and input voltage, the VFB voltage will be nonlinear. Relying on VFB detection cannot achieve relatively accurate output power detection under various working conditions. The peak current limit value in the control of "increasing switching frequency + increasing peak current limit value" and the power value allowed to be released during the burst power are nonlinear, which will make it impossible to achieve accurate power management. Figure 3 As shown, VFB exhibits nonlinearity in the actual prototype. 2. For the clamped asymmetric half-bridge flyback converter, the aforementioned control method during the cooldown period makes it difficult to achieve precise power limiting under varying input voltages, clamp depths, MOSFETs, and power parameters. In some cases, the output voltage Vo may drop without triggering short-circuit protection, causing the prototype to continue operating, which is detrimental to converter reliability. Summary of the Invention

[0009] The present invention aims to overcome at least one of the above-mentioned defects in the prior art and proposes a burst power control method and circuit for an asymmetric half-bridge flyback converter. Relying on primary side load detection, the influence of nonlinear factors is eliminated, and the switching frequency and peak current limit maximum value can be accurately increased under burst power conditions. During cooling, the real-time calculated output load value is compared with the set maximum output load value to achieve power-limited cooling.

[0010] The technical solution adopted in the present invention is:

[0011] In one aspect, a burst power control method for an asymmetric half-bridge flyback converter is provided, comprising:

[0012] Real-time detection of the load value of the load clamped asymmetric half-bridge flyback converter;

[0013] Determining whether the load value satisfies a condition for entering a burst power mode;

[0014] If yes, enter a burst power mode, and when entering the burst power mode, increase the switching frequency and peak current limit maximum value of the converter according to the load value to increase the output power of the converter in the burst power mode;

[0015] Determine whether the current load value and the operating time of the burst power mode meet the conditions for terminating the burst power mode. If so, terminate the burst power mode and enter the cooling mode. When entering the cooling mode, compare the load value with the preset maximum output load value in real time. If the load value is greater than the preset maximum output load value, reduce the output voltage of the transformer according to the load value and the maximum output load value to limit the maximum output power of the converter.

[0016] Preferably, the method further comprises:

[0017] collecting the output voltage of the converter;

[0018] A control signal is generated according to the output voltage, and closed-loop control is performed on the main switch of the converter according to the control signal to stabilize the output voltage.

[0019] Preferably, performing closed-loop control on the main switch of the converter according to the control signal to stabilize the output voltage specifically includes:

[0020] The pulse width of the driving pulse transmitted to the main switch tube of the converter is controlled according to the control signal to control the output voltage of the converter and stabilize the output voltage.

[0021] Preferably, determining whether the current load value and the operation time of the burst power mode meet a condition for terminating the burst power mode, and if so, terminating the burst power mode and entering the cooling mode specifically includes:

[0022] Determining whether the current load value is lower than a preset first threshold;

[0023] If yes, then end the burst power mode and enter the cooling mode;

[0024] If not, it is determined whether the operation time of the burst power mode is greater than the preset operable time. If so, the burst power mode is terminated and the cooling mode is entered.

[0025] Preferably, determining whether the load value meets the condition for entering the burst power mode specifically includes:

[0026] Determining whether the load value is greater than a preset second threshold;

[0027] If so, it is determined that the conditions for entering the burst power mode are met;

[0028] If not, it is determined that the conditions for entering the burst power mode are not met;

[0029] The second threshold is smaller than the first threshold.

[0030] Preferably, the load value is a load current value, and the preset maximum output load value is a maximum output load current value; comparing the load value with the preset maximum output load value in real time, and if the load value is greater than the preset maximum output load value, controlling the output voltage of the converter according to the load value and the maximum output load value to limit the maximum output power of the converter, specifically including:

[0031] The load current value is compared with a preset maximum output load current value in real time. If the load current value is greater than the preset maximum output load current value, the output voltage of the converter is controlled according to the load current value and the maximum output load current value to control the output voltage of the converter and thereby limit the maximum output power of the converter, wherein the load current value is inversely proportional to the output voltage.

[0032] Preferably, real-time detection of the load value of the load of the clamped asymmetric half-bridge flyback converter specifically includes:

[0033] Real-time detection of the excitation inductance current value during the conduction period of the main switch tube of the converter;

[0034] Capturing the moment when the negative peak value of the converter's excitation inductance current is generated and outputting a negative peak trigger signal, and capturing the moment when the positive peak value of the excitation inductance current is generated and outputting a positive peak trigger signal;

[0035] Sampling the excitation inductor current, and extracting the negative peak value and the positive peak value of the excitation inductor current according to the sampled excitation inductor current, the negative peak value trigger signal and the positive peak value trigger signal;

[0036] The load value is obtained according to the negative peak value, the positive peak value of the excitation inductor current, the conduction time of the main switch tube and the auxiliary switch tube of the converter, or the duty cycle of the main switch tube and the auxiliary switch tube of the converter.

[0037] In a second aspect, a burst power control circuit for a clamped asymmetric half-bridge flyback converter is provided, comprising:

[0038] A detection module, used for detecting a load value of a load of a clamped asymmetric half-bridge flyback converter in real time;

[0039] A PWM generation and mode processing module, configured to determine whether the load value satisfies the conditions for entering the burst power mode;

[0040] When it is determined that the conditions for entering the burst power mode are met, the PWM generation and mode processing module is further configured to enter the burst power mode, and when entering the burst power mode, increase the switching frequency and peak current limit maximum value of the converter according to the load value to increase the output power of the converter in the burst power mode;

[0041] The PWM generation and mode processing module is further configured to determine whether the current load value and the operating time of the burst power mode satisfy the conditions for terminating the burst power mode. If so, the burst power mode is terminated and the cooling mode is entered. When entering the cooling mode, the load value is compared with a preset maximum output load value in real time. If the load value is greater than the preset maximum output load value, the output voltage of the transformer is controlled according to the load value and the maximum output load value to limit the maximum output power of the converter.

[0042] Preferably, it further comprises an output voltage isolation sampling module for collecting the output voltage of the converter;

[0043] The PWM generation and mode processing module is further configured to generate a control signal according to the output voltage, and perform closed-loop control on the main switch of the converter according to the control signal to stabilize the output voltage.

[0044] Preferably, the detection module includes:

[0045] A current detection module, used to detect the excitation inductor current during the conduction period of the main switch tube of the converter;

[0046] A peak generation moment capture module, used to capture the negative peak generation moment of the converter's excitation inductor current and output a negative peak trigger signal, and used to capture the positive peak generation moment of the excitation inductor current and output a positive peak trigger signal;

[0047] A sampling and holding module, configured to sample the excitation inductor current and extract the negative peak value and the positive peak value of the excitation inductor current according to the sampled excitation inductor current, the negative peak value trigger signal and the positive peak value trigger signal;

[0048] The load and frequency calculation module is used to obtain the load value based on the negative peak value, positive peak value of the excitation inductor current, the conduction time of the main switch tube and auxiliary switch tube of the converter, or the duty cycle of the main switch tube and auxiliary switch tube of the converter.

[0049] Compared with the existing technology, the beneficial effects of this solution are:

[0050] 1. By detecting the load value on the primary side, the influence of nonlinear factors such as input voltage and clamping depth is eliminated, and the switching frequency and peak current limit value can be accurately increased. This has wide applicability and the same strategy can be applied to different systems without the need to design corresponding controllers and compensation strategies for different systems, simplifying controller design and reducing costs. The maximum burst power can be accurately limited without detecting the secondary side current. This allows secondary side current detection without adding external devices, improving prototype reliability.

[0051] 2. Relying on primary-side load detection, the burst power trigger condition is separated from the VFB voltage detection. Because the VFB voltage of the CAHBF has a large discreteness, decoupling the trigger condition from the VFB voltage can improve the trigger accuracy.

[0052] 3. During burst power cooling, the real-time calculated output load value is compared with the set maximum allowable output load value to achieve power-limited cooling. This allows for recovery of the peak current Vcs and switching frequency without requiring specific compensation design for the peak current Vcs recovery value under different system parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 This is a block diagram of an asymmetric half-bridge flyback converter and controller circuit in the prior art;

[0054] Figure 2 A schematic diagram of a prior art asymmetric half-bridge flyback converter and controller mode processing;

[0055] Figure 3 This is a graph showing the relationship between the feedback voltage FB, input voltage, and output load measured for a conventional clamped asymmetric half-bridge flyback converter;

[0056] Figure 4 This is a control circuit block diagram of the clamped asymmetric half-bridge flyback converter of the present invention;

[0057] Figure 5 The working process and typical waveform diagram of entering and exiting the burst power mode of the clamped asymmetric half-bridge flyback converter of the present invention;

[0058] Figure 6 A control circuit diagram for limiting output power of the clamped asymmetric half-bridge flyback converter in cooling mode according to the present invention;

[0059] Figure 7 This is a typical waveform diagram of the burst power mode of the asymmetric half-bridge flyback converter clamped by the technology of the present invention;

[0060] Figure 8 This is a working waveform diagram of each working cycle of the control circuit of the clamped asymmetric half-bridge flyback converter of the present invention. DETAILED DESCRIPTION

[0061] The following will be combined with the drawings in the embodiments of the present invention to describe in detail the technical solutions in the embodiments of the present invention. The drawings are only for illustrative purposes and should not be understood as limiting this patent. In order to better illustrate this embodiment, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product. For those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted. The technical solutions of the present invention are further described below in conjunction with the drawings and embodiments. In order to better understand the design of the present invention, the specific embodiments of the present invention are now described in detail in conjunction with the drawings.

[0062] Clamped asymmetric half-bridge flyback mode: In a switching cycle, the main switch tube, auxiliary switch tube and clamp switch tube are alternately turned on or off. Specifically, each cycle includes five stages: excitation stage, auxiliary switch zero voltage turn-on stage, demagnetization stage, current clamping stage and main switch zero voltage turn-on stage; in the excitation stage and auxiliary switch zero voltage turn-on stage, the clamp switch tube is turned off; in the demagnetization stage, the auxiliary switch tube is turned on, and the clamp switch tube can be turned on or off, and no current flows through the clamp switch tube; at the end of this stage, the excitation inductor is When the current reaches the set value, the auxiliary switch tube is turned off, the clamp switch tube is in the on state, and the clamp current flows through the clamp switch tube; in the current clamping stage, the clamp switch tube is turned on, the clamp current flows through the clamp switch tube, and the clamp switch keeps the clamp current basically unchanged. At the end of this stage, the clamp switch tube is turned off; in the main switch zero voltage turn-on stage, the clamp switch tube has been turned off, the clamp current is released, and the main switch tube voltage is reduced to zero or close to zero. At this time, the main switch tube is controlled to be turned on to achieve the main switch tube zero voltage turn-on, which is abbreviated as CAHBFMode.

[0063] Asymmetric half-bridge flyback mode: In a switching cycle, the main switch tube and the auxiliary switch tube are complementary to each other and turned on, and the controller controls the unidirectional clamp module to always be in the off state. It is abbreviated as AHBF Mode in English.

[0064] Burst power mode: When the external load demand increases significantly within a short period of time, the converter needs to be allowed to output more power during this period. At this time, the switching frequency of the converter is increased, and the maximum value of the peak current limit during normal operation of the converter is increased, so that the converter can output overpower in this short period of time while maintaining a stable output voltage.

[0065] Cooling mode: After the burst power mode ends (i.e., the maximum duration allowed for the burst power is reached), the converter must enter the cooling state to prevent overheating due to long-term over-power output. During this period, the switching frequency of the converter returns to the switching frequency during the non-burst power period, and at the same time, the maximum value of the converter's peak current limit is reduced, thereby realizing the converter's power-limited operating mode during the cooling period.

[0066] Primary side load detection: Due to the clamped asymmetric half-bridge flyback converter, the primary side magnetizing inductor current and the output load have the following equivalent relationship:

[0067]

[0068] Where Io is the converter load, I1 is the positive peak value of the magnetizing inductor current, I2 is the negative peak value of the magnetizing inductor current, D1 is the duty cycle of the main switch S1, D2 is the duty cycle of the auxiliary switch S2, and N is the primary-to-secondary turns ratio of the transformer.

[0069] Traditional burst power control and cooling power limit management, when applied to a clamped asymmetric half-bridge flyback converter, presents two problems: 1. Due to nonlinearity in the VFB voltage caused by factors such as clamp depth, MOSFET characteristics, and input voltage, VFB detection cannot accurately detect output power under various operating conditions. The relationship between the limit value in the "increase switching frequency + increase peak current limit" control and the power value allowed to be released during the burst power is nonlinear, which makes accurate power management impossible. 2. For a clamped asymmetric half-bridge flyback converter, the aforementioned cooling control method has difficulty achieving accurate power limit under different input voltages, clamp depths, MOSFET characteristics, and power parameters. In some cases, output drop may occur without triggering short-circuit protection, and the prototype continues to operate, which is detrimental to the converter's reliability.

[0070] Based on the above description, the burst power control methods and circuits similar to those used for conventional asymmetric half-bridge flyback converters cannot be used for clamped asymmetric half-bridge flyback converters. A new burst power control strategy is needed that is independent of the detection of the feedback voltage signal VFB and eliminates the influence of nonlinear factors such as input voltage, clamp depth, and switching frequency. This strategy can be used to implement overpower, cooling, and power management for clamped asymmetric half-bridge flyback converters.

[0071] The concept of the present invention is to implement load detection on the secondary side of the asymmetric half-bridge flyback converter on the primary side. After the load detection is performed on the primary side, the conditions for entering the burst power mode are determined based on the detected load value. If the conditions are met, the burst power mode is entered and specific burst power mode processing is performed, and burst power cooling (essentially exiting the burst power state and limiting the cooling time, that is, the time to re-enable burst power) management is performed. This process primarily involves two control steps: 1. Determining whether conditions are met for entering burst power mode. If so, burst power mode processing is performed. 2. During burst power mode operation, the first condition for terminating burst power mode is determined in real time based on the detected load value. If so, the load demand has ended before the burst power mode run time expires, and no special processing is required after returning to the normal operating frequency and Vcs maximum limits. If not, the load demand has not ended after the burst power mode run time expires, and the output current must be limited according to LO_max_set. Conventional burst power cooling mechanisms only limit Vcs_max and switching frequency, but cannot accurately limit output power (or current). Primary-side load sampling, however, allows the current load state to be determined, enabling precise power (or current) output limiting. This allows burst power mode entry and exit to be implemented independently of the feedback signal VFB (eliminating the influence of input voltage, clamp depth, and other factors). Furthermore, during this operation, the output voltage is maintained stable through closed-loop pulse width control of the main switch.

[0072] First embodiment

[0073] In this embodiment, a burst power control method for a clamped asymmetric half-bridge flyback converter is provided, comprising the following steps:

[0074] S100 . Detect in real time the load value Io of the load of the clamped asymmetric half-bridge flyback converter.

[0075] Specifically, step S100 includes:

[0076] S101. Real-time detection of the magnetizing inductor current value during the on-state period of the main switch of the converter;

[0077] S102 captures the negative peak moment of the converter's magnetizing inductor current and outputs a negative peak trigger signal and captures the positive peak moment of the magnetizing inductor current and outputs a positive peak trigger signal;

[0078] S103. The excitation inductor current is sampled, and the negative peak value and the positive peak value of the excitation inductor current are extracted according to the sampled excitation inductor current, the negative peak trigger signal and the positive peak trigger signal;

[0079] S104. Obtain the load value Io according to the negative peak value, the positive peak value of the excitation inductor current, the on-time of the main switch S1 and the auxiliary switch S2 of the converter, or the duty cycle of the main switch S1 and the auxiliary switch S2 of the converter.

[0080] Specifically, the primary magnetizing inductor current of the clamped asymmetric half-bridge flyback converter and the output load have the following equivalent relationship:

[0081]

[0082] In the formula, Io is the converter load value, I1 is the positive peak value of the excitation inductor current, I2 is the negative peak value of the excitation inductor current, D1 is the duty cycle of the converter's main switch S1, D2 is the duty cycle of the converter's auxiliary switch S2, and the transformer's primary-to-secondary turns ratio N is used. Therefore, a specific circuit can be used to detect the output load current on the primary side. This circuit module is the primary-side load detection module. By detecting the primary-side excitation inductor current ILm, the duty cycle D1 of the main switch S1, and the duty cycle D2 of the auxiliary switch S2, and given the known system turns ratio N, output load current information can be detected. In other words, secondary-side load current information is detected through primary-side sampling, which is called primary-side load detection.

[0083] Based on the topological characteristics of the clamped asymmetric half-bridge flyback converter, real-time detection of the output load value Io is achieved on the primary side. In this way, the load value Io can be used to manage and control the subsequent burst power mode and cooling mode of the flyback converter, thereby eliminating the influence of nonlinear factors such as input voltage, clamping depth, and switching frequency.

[0084] S200. Determine whether the load value Io meets the conditions for entering the burst power mode.

[0085] Step S200 specifically includes the following steps:

[0086] S201. Determine whether the load value Io is greater than a preset second threshold PEM_IN;

[0087] S202. If so, it is determined that the conditions for entering the burst power mode are met, and step S300 is executed;

[0088] S203. If not, it is determined that the conditions for entering the burst power mode are not met, and the process returns to step S201;

[0089] The second threshold value PEM_IN is smaller than the first threshold value PEM_OUT.

[0090] Specifically, when it is determined that the load value is greater than the second threshold value PEM_IN, it is determined that the load of the converter is heavy enough, and the converter enters the burst power mode.

[0091] S300. If yes, enter the burst power mode. When entering the burst power mode, the switching frequency Fs_set and the peak current limit maximum value Vcs_max of the converter are increased according to the load value to increase the output power of the converter in the burst power mode.

[0092] Generally, when the burst power mode is switched on, the converter will be in the asymmetric half-bridge flyback AHBF Mode, and the clamp tube S3 of the converter will be in the off state.

[0093] After entering the burst power mode, the switching frequency Fs_set and the peak current limit maximum value Vcs_max of the converter are increased in real time according to the detected load value Io, thereby allowing the converter to release more power and more energy in the burst power mode to meet the load requirements; specifically, the load value Io is linearly correlated with the switching frequency Fs_set, that is, when the detected load value Io increases, the switching frequency Fs_set is controlled to increase.

[0094] S400. Determine whether the current load value Io and the operating time of the burst power mode meet the conditions for ending the burst power mode. If so, end the burst power mode and enter the cooling mode. When entering the cooling mode, compare the load value Io with the preset maximum output load value LO_max_set in real time. If the load value Io is greater than the preset maximum output load value, reduce the output voltage of the transformer according to the load value Io and the maximum output load value LO_max_set to limit the maximum output power of the converter.

[0095] Step S400 specifically includes the following steps:

[0096] S401. Determine whether the current load value Io is lower than a preset first threshold;

[0097] S402. If yes, then end the burst power mode and enter the cooling mode;

[0098] S403. If not, determine whether the operation time of the burst power mode is greater than the preset operable time. If so, end the burst power mode and enter the cooling mode.

[0099] The load value Io is the load current value, and the maximum output load value LO_max_set is the maximum output load current value.

[0100] S404. Compare the load current value with the preset maximum output load current value in real time. If the load current value is greater than the preset maximum output load current value, control the output voltage Vo of the converter according to the load current value and the maximum output load current value to control the output voltage Vo of the converter and thereby limit the maximum output power of the converter, wherein the load current value is inversely proportional to the output voltage Vo.

[0101] Specifically, if the load demand ends before the maximum duration (operating time) allowed by the burst power mode stops, the burst power mode is exited and the cooling mode is entered. In the cooling mode, no special processing is required after the normal operating frequency and the peak current Vcs are restored to the upper limit. That is, during the operation of the burst power mode, if the load demand ends prematurely, the burst power mode is immediately exited; if the load demand has not ended after the maximum duration allowed by the burst power stops, the burst power mode is exited and the cooling mode is entered. In the cooling mode, the output power value (or current value) needs to be limited according to the maximum output load value LO_max_set; the ordinary burst power cooling mechanism is only applicable to limiting the peak current limit maximum value Vcs_max and the switching frequency Fs_set, and cannot determine the output power limit. This embodiment can know the current load state through primary side load sampling, thereby achieving accurate power output limitation.

[0102] The clamped asymmetric half-bridge flyback converter topology allows for output load detection on the primary side of the converter. Therefore, relying on primary-side load detection, burst power mode can be quickly activated in the event of a sudden overload. By increasing the switching frequency Fs_set and the peak current limit Vcs_max, load detection is decoupled from VFB, ensuring the specific load value on the secondary side. Therefore, short-term overloads (i.e., burst power) of specific multiples can be achieved under varying input voltage and power parameters. If output power is limited in cooling mode, the output load current can be monitored in real time, ensuring that the converter does not operate at excessive power. Furthermore, programmable cooling power limiting can be implemented, thereby ensuring converter reliability.

[0103] Based on the topological characteristics of the clamped asymmetric half-bridge flyback converter, real-time detection of the output load current can be achieved on the primary side. This detection value is then used to manage the converter's burst power and cooling power. This solves the problem of load consistency when entering burst power mode, despite varying input voltages, MOSFETs (affecting the clamp depth), and power-stage parameters. Compared to traditional burst power cooling methods, this solution compares the load value Io detected in real time on the primary side with the maximum output load value LO_max_set set by the user, and limits the maximum output power based on the comparison result. This allows the converter's maximum output power (or current) to be precisely controlled during the cooling period.

[0104] In this embodiment, the method further includes:

[0105] S500. Collecting the output voltage Vo of the converter;

[0106] S600. Generate a control signal according to the output voltage, and perform closed-loop control on the main switch S1 of the converter according to the control signal to stabilize the output voltage Vo.

[0107] Specifically, the closed-loop control of the main switch S1 of the converter is performed according to the control signal to stabilize the output voltage Vo, which specifically includes:

[0108] The pulse width of the driving pulse transmitted to the main switch S1 of the converter is controlled according to the control signal to control the output voltage Vo of the converter and stabilize the output voltage Vo.

[0109] Second embodiment

[0110] In this embodiment, a burst power control circuit for a clamped half-bridge flyback converter is provided, comprising:

[0111] A detection module, used for real-time detection of a load value Io of the load of the clamped asymmetric half-bridge flyback converter;

[0112] PWM generation and mode processing module, used to determine whether the load value meets the conditions for entering burst power mode;

[0113] When it is determined that the conditions for entering the burst power mode are met, the PWM generation and mode processing module is further configured to enter the burst power mode. When entering the burst power mode, the switching frequency Fs_set and the peak current limit maximum value Vcs_max of the converter are increased according to the load value Io to increase the output power of the converter in the burst power mode.

[0114] The PWM generation and mode processing module is also used to determine whether the current load value and the operating time of the burst power mode meet the conditions for terminating the burst power mode. If so, the burst power mode is terminated and the cooling mode is entered. When entering the cooling mode, the load value Io is compared with the preset maximum output load value LO_max_set in real time. If the load value Io is greater than the preset maximum output load value LO_max_set, the output voltage Vo of the transformer is controlled according to the load value and the maximum output load value LO_max_set to limit the maximum output power of the converter.

[0115] Specifically, the detection module includes:

[0116] The current detection module CS is used to detect the excitation inductor current during the conduction period of the main switch tube of the converter;

[0117] A peak generation moment capture module is used to capture the negative peak generation moment of the converter's excitation inductor current and output a negative peak trigger signal, and to capture the positive peak generation moment of the excitation inductor current and output a positive peak trigger signal;

[0118] The sampling and holding module SS is used to sample the excitation inductor current and extract the negative peak value and the positive peak value of the excitation inductor current according to the sampled excitation inductor current, the negative peak trigger signal and the positive peak trigger signal;

[0119] The load and frequency calculation module LFC is used to obtain the load value Io based on the negative peak value, positive peak value of the excitation inductor current, the conduction time of the main switch tube and the auxiliary switch tube of the converter, or the duty cycle of the main switch tube and the auxiliary switch tube of the converter.

[0120] Specifically, the clamped asymmetric half-bridge flyback converter includes a main circuit and a control circuit; the main circuit includes a main switch tube S1, an auxiliary switch tube S2, a transformer, and a unidirectional clamping network for controlling the excitation inductor current, wherein the unidirectional clamping network has a clamping switch tube S3;

[0121] Specifically, the main circuit includes an input capacitor Cin, a main switch tube S1 and an auxiliary switch tube S2, a resonant capacitor Cr, a unidirectional clamping network (composed of a clamping switch tube S3 and a diode D3), a transformer, a rectifier switch D, and an output filter capacitor Co.

[0122] The control circuit includes a detection module electrically connected to the main circuit, a PWM generation and mode processing module, and an output voltage isolation sampling module. The detection module includes a current detection module CS, a peak current generation moment capture module TS, a sampling and holding module SS, and a load and frequency calculation module LFC.

[0123] The operating principle of the present invention is as follows: The PWM generation and pattern processing module and the load and frequency calculation module (LFC) implement power limit management in both burst power mode and cooling mode based on the load value Io detected by the primary side. This allows the clamped asymmetric half-bridge flyback converter to release more power during burst power mode, while precisely limiting the converter's output power during cooling mode, preventing overpower operation. Specifically, the load and frequency calculation module (LFC) calculates the current converter load value Io. The PWM generation and pattern processing module receives this value and determines whether to enter burst power mode. If the conditions for entering burst power are met, burst power mode is entered. At this point, the PWM generation and pattern processing module operates based on the switching frequency Fs_set and peak current limit maximum value Vcs_max calculated by the load and frequency calculation module (LFC). When exiting the burst power mode and entering the cooling mode, the PWM generation and mode processing module performs power limit control during cooling according to the switching frequency Fs_set calculated by the load and frequency calculation module LFC, the maximum allowed peak current limit Vcs_max, the current load value Io and the set maximum output load value LO_max_set: When the power required by the load during the cooling period exceeds the maximum allowed power (that is, the current load value Io of the converter exceeds the maximum output load value LO_max_set), the PWM generation and mode processing module will limit the closed-loop control (such as Figure 6 A possible implementation scheme is shown), causing the output voltage Vo to drop. When the load is large enough, the output voltage Vo will drop to the short-circuit protection point, causing the converter to enter a fault shutdown state.

[0124] The following, combined Figure 4 This embodiment is further described as follows:

[0125] The positive electrode of the current sensing module CS is connected to the source of the auxiliary switch S2 in the main circuit, the source of the clamp switch S3, and the opposite-polarity terminal of the transformer's primary winding LP. The negative electrode of the current sensing module CS is connected to ground and the negative input terminal -Vin. The output terminal Iout of the current sensing module CS is connected to the input terminal Iin of the sample-and-hold module SS. The current sensing module CS is used to detect the transformer's magnetizing inductor current when the main switch S1 is on.

[0126] In other embodiments, the current detection module CS may also be connected in the converter in the following two ways:

[0127] (1) The positive electrode of the current detection module CS is connected to the input terminal +Vin; the negative electrode of the current detection module CS is connected to the drain of the main switch tube S1; the output terminal Iout of the current detection module CS is connected to the input terminal Iin of the sample and hold module SS.

[0128] (2) The positive electrode of the current detection module CS is connected to the source of the clamp tube S3 and the opposite pole end of the primary winding of the transformer; the negative electrode of the current detection module CS is connected to the source of the auxiliary switch tube S2 and the input terminal -Vin; the output terminal Iout of the current detection module CS is connected to the input terminal Iin of the sampling and holding module SS.

[0129] The input terminal V1 of the peak current generation moment capture module TS is connected to the output terminal Vgs1 of the PWM generation and mode processing module; the GND terminal of the peak current generation moment capture module TS is connected to the ground. The peak current generation moment capture module TS is used to capture the moment when the negative peak and positive peak of the excitation inductor current are generated and output the peak current through the output terminal T N Output the corresponding negative peak trigger signal and pass it through the output terminal T P The corresponding positive peak trigger signal is output, and the negative peak trigger signal and the positive peak trigger signal are sent to the sampling and holding module SS to extract the positive peak value and the negative peak value from the excitation inductor current.

[0130] There are different ways for the peak current generation moment capture module TS to generate a positive peak trigger signal, including but not limited to the following two ways:

[0131] (1) By determining the moment when the drain-source voltage of the main switch tube S1 rises from zero to a certain voltage value, a positive peak trigger signal of the excitation inductor current is generated;

[0132] (2) By determining the falling edge of the gate drive pulse signal of the main switch tube S1, a positive peak trigger signal of the excitation inductor current is generated.

[0133] The input terminal Iin of the sampling and holding module SS is connected to the output terminal Iout of the current detection module CS, and the input terminal T- and input terminal T+ of the sampling and holding module SS are connected to the output terminal T of the peak current generation moment capture module TS. N and output terminal T P The output terminal I± of the sampling and holding module SS is connected to the input terminal IP of the load and frequency calculation module LFC. The sampling and holding module SS is used to sample the excitation inductor current during the conduction period of the main switch tube S1, and extract the positive peak value and negative peak value of the excitation inductor current according to the time when the negative peak value and positive peak value of the excitation inductor current are generated. Specifically: when the positive peak trigger signal is high, the sampling and holding module SS tracks the excitation inductor current. When the positive peak trigger signal is low, the sampling and holding module SS holds and outputs the excitation inductor current at the time of the falling edge of the corresponding trigger signal, and outputs it to the output terminal I + Output, at this time port I + The output signal is the positive peak value of the excitation inductor current. This positive peak value can be used as the source of the converter peak current signal Vcs of the load and frequency calculation module LFC.

[0134] Similarly, when the negative peak trigger signal is high, the sampling and holding module SS tracks the input terminal I in real time. in Input excitation inductor current; when the negative peak trigger signal is low, the sampling and holding module SS saves the input terminal I at the time of low level generation in The input excitation inductor current is output from the output terminal I-. At this time, the output signal of the output terminal I- is the negative peak value of the excitation inductor current.

[0135] Input terminal I of load and frequency calculation module LFC P The load and frequency calculation module LFC is electrically connected to the output terminal I± of the sampling and holding module SS, the output terminal LO of the load and frequency calculation module LFC is electrically connected to the input terminal LO of the PWM generation and pattern processing module, and the output terminal LO_max_set of the load and frequency calculation module LFC is electrically connected to the input terminal LO_max_set of the PWM generation and pattern processing module; the output terminal Vcs_max of the load and frequency calculation module LFC is electrically connected to the input terminal Vcs_max of the PWM generation and pattern processing module, and is used to set the peak current limit maximum value Vcs_max of the converter of the PWM generator. The PWM generation and pattern processing module can then generate corresponding PWM signals based on the received peak current limit maximum value Vcs_max to control the main switch tube S1, the auxiliary switch tube S2, and the clamp switch S3. In this way, the peak current limit maximum value Vcs_max is dynamically adjusted in the burst power state and the non-burst power state, thereby avoiding triggering protection during burst power (i.e., allowing the converter to release more power during burst power). The output terminal Fs_set of the load and frequency calculation module (LFC) is electrically connected to the input terminal Fs_set of the PWM generation and mode processing module. The input terminal Vo of the load and frequency calculation module (LFC) is electrically connected to the output terminal Vo of the output voltage isolation sampling module. The load and frequency calculation module (LFC) is used to calculate the current load value Io of the converter based on the positive and negative peak values ​​of the excitation inductor current, the duty cycle D1 of the main switch S1, the duty cycle D2 of the auxiliary switch S2, and the primary-to-secondary turns ratio N. Furthermore, during the cooling mode after entering the burst power mode, the module determines the power limiting control signal based on the load value Io and the user-set maximum output load value LO_max_set.

[0136] In this embodiment, the load value Io is the load current value. The load current value, the positive peak value I1 and the negative peak value I2 of the excitation inductor current, the duty cycle D1 of the main switch tube S1, the duty cycle D2 of the auxiliary switch tube S2, and the primary-to-secondary turns ratio N of the transformer satisfy the following relationship:

[0137]

[0138] If the load is large, the converter will operate in the asymmetric half-bridge flyback AHBF mode. Ignoring the dead zone, D1+D2=1, and this formula is still satisfied. The load and frequency calculation module LFC can also be implemented in different ways, including but not limited to the following:

[0139] For a converter adopting peak current control, the positive peak value of the excitation inductor current is not sampled and maintained, and the feedback signal output by the output voltage isolation sampling module is used as the signal corresponding to the positive peak current of the excitation inductor current.

[0140] This formula holds true for both CAHBF Mode and AHBF Mode. AHBF Mode is typically switched during burst power. Burst power mode is typically handled by increasing the switching frequency (via Fs_set) and the peak current Vcs (by increasing the maximum peak current limit, Vcs_max). This allows the converter to generate more power during the burst power period without triggering protection, so the formula also holds true.

[0141] At the same time, the peak current Vcs signal is transmitted to the PWM generation and mode processing module, which is used for the module to determine whether the peak current Vcs of the converter has triggered the peak current limit maximum value Vcs_max.

[0142] The input terminal VFB of the PWM generation and mode processing module is used to receive the feedback signal output by the output voltage isolation sampling module to control the stability of the output voltage Vo. The input terminal LO of the PWM generation and mode processing module is used to receive the load current signal reflecting the converter load value Io, which is used as the load basis for mode processing. The input terminal LO_max_set of the PWM generation and mode processing module is used to receive the control signal of the maximum output load value LO_max_set during the cooling period output by the load and frequency calculation module LFC to control the power limit during the cooling period. The input terminal Fs_max of the PWM generation and mode processing module is used to receive the switching frequency information of the converter operation calculated by the load and frequency calculation module LFC. The input terminal Vcs_max is used to receive the peak current information of the converter, which is used to realize peak current closed-loop control together with VFB and to determine whether to enter the maximum peak current protection mode.

[0143] The input terminal FB of the PWM generation and mode processing module is connected to the output terminal FB of the output voltage isolation sampling module. The output terminals Vgs1, Vgs2, and Vgs3 of the PWM generation and mode processing module are used to output drive pulses to control the on or off of the main switch tube S1, the auxiliary switch tube S2, and the clamp switch tube S3. At the same time, the output terminal Vgs1 is also connected to the input terminal V1 of the peak current generation moment capture module TS. The functions of the PWM generation and mode processing module mainly consist of three parts. First, it uses the output voltage isolation sampling module and the peak current limit maximum value Vcs_max of the load and frequency calculation module LFC to perform closed-loop voltage regulation control on the output voltage Vo. Second, it performs mode processing based on the current load value Io of the converter, the set switching frequency Fs_set, and the peak current limit maximum value Vcs_max of the converter calculated by the load and frequency calculation module LFC. Third, it controls the maximum output power allowed during cooling, whether to enter fault protection, etc. based on the maximum output load value LO_max_set during the converter's burst power cooling period set by the user. Figure 7 As shown in FIG, when the duration of the load demand is greater than the duration of the burst power mode, the output voltage Vo will decrease during the cooling period, which may trigger the short-circuit protection of Vo_OSP, thereby shutting down the converter.

[0144] Compared with the traditional burst power cooling method, this solution limits the output power by comparing the load value Io detected in real time at the primary side with the maximum output load value LO_max_set set by the user. In this way, the maximum output power (current) allowed by the converter is accurately controlled during the cooling period. Figure 6 As shown, a circuit for accurately limiting power during the cooling period is provided. When the actual load value Io calculated in real time is greater than the maximum output load value LO_max_set set by the user, the VCOMP voltage (VFB voltage) is quickly pulled down, and the PWM duty cycle is forced to decrease, thereby achieving power limiting.

[0145] The output voltage isolation sampling module is used to isolate and sample the secondary side output voltage and load conditions and generate a feedback signal based on them to achieve closed-loop feedback of the converter.

[0146] Specifically, the PWM generation and mode processing module controls the pulse width of the driving pulse delivered to the main switch tube by receiving the feedback signal of the output voltage of the clamped asymmetric half-bridge flyback converter collected by the output voltage isolation sampling module, thereby controlling the output voltage Vo.

[0147] The following combination Figure 5 、 Figure 6The working principles of each module in the embodiment of the present invention are further explained, wherein Vgs1 represents the drive pulse output by the output terminal Vgs1; Vgs2 represents the drive pulse output by the output terminal Vgs2; Vgs3 represents the drive pulse output by the output terminal Vgs3, Vo represents the output voltage value sampled by the output voltage isolation sampling module, Vcs represents the current waveform during the excitation of the converter (mainly focusing on the peak current), and Io represents the load value of the converter calculated by the primary load and frequency calculation module LFC.

[0148] like Figure 5As shown, the converter's current load value is obtained through the current detection module CS, the peak current generation moment capture module TS, the sample-and-hold module SS, and the load and frequency calculation module LFC. When the load value Io exceeds the second threshold PEM_IN, the PWM generation and mode processing module determines that the converter's load is heavy enough and switches to burst power mode. This increases the upper limit of the switching frequency Fs_set and the maximum peak current limit Vcs_max, allowing the converter to release more energy to meet load requirements and prevent the output voltage Vo from dropping due to overpower output. After entering burst power mode, the load value Io and the switching frequency Fs_set have a linear relationship. As the load value Io further increases, the converter's switching frequency Fs_set further increases. Generally, when entering burst power mode, the converter enters the asymmetric half-bridge flyback (AHBF) mode, during which the clamp transistor S3 is turned off. After entering burst power mode, the load and frequency calculation module LFC calculates the current converter switching frequency Fs_set based on the real-time calculated load value. If the external load demand increases during the burst power period, the switching frequency will continue to increase. The corresponding control signals are transmitted to the PWM generation and mode processing module. This module controls the driving signals for the main switch S1, auxiliary switch S2, and clamp switch S3, as well as their switching frequencies, based on control signals such as the switching frequency Fs_set, the maximum output load value LO_max_set, and the converter's peak current limit Vcs_max. During burst power mode operation, the converter exits burst power mode when the detected load value Io (external load demand) is less than a first threshold value PEM_OUT, where the first threshold value PEM_OUT is less than a second threshold value PEM_IN. Therefore, as described above, the conditions for entering and exiting burst power mode are based on the load value (external load demand) detected and calculated on the secondary side of the converter by the load and frequency calculation module LFC on the primary side of the converter. Compared with the traditional burst power mode entry and exit control method, this method is more suitable for clamped asymmetric half-bridge flyback converters. It can make more full use of the peak current Vcs information while eliminating the influence of nonlinear factors such as input voltage and clamping depth. It has wide applicability. The same strategy can be applied to different systems without the need to design corresponding controllers and compensation strategies for different systems, simplifying the controller design and reducing costs.

[0149] Consider the following situation in actual application: after the maximum timer (i.e., running time) of the burst power mode operation allowed by the PWM generation and mode processing module has passed, the external load demand (load value Io) is still greater than the first threshold PEM_OUT. The converter will perform control management for this situation. Figure 7This section further describes the cooling mode control management process, the operation of each module, and the control logic for the case where, after burst power mode is switched on and the external load demand remains greater than the first threshold value PEM_OUT after the maximum burst power mode operation time allowed by the PWM generation and mode processing module has expired, the load and frequency calculation module (LFC) restores the converter's peak current to its maximum limit before entering burst power mode.

[0150] During the operating cycle, the turn-on edge of main switch S1 is synchronized with the rising edge of the oscillator clock signal, while the turn-off edge of main switch S1 is determined by the peak current closed loop (the flip-over edge of the peak current loop comparator is synchronized with the turn-off edge of S1). During burst power mode, the converter generally operates in asymmetric half-bridge flyback (AHBF) mode, in which auxiliary switch S2 complements main switch S1 (with dead time). In cooling mode, if the external load demand continuously exceeds the maximum output load current allowed by the load and frequency calculation module (LFC), and the output voltage Vo drops to the OSP protection point, the main switch S1, auxiliary switch S2, and clamp switch S3 will all be disabled, and the converter will cease operation.

[0151] It should be pointed out that Figure 5 and Figure 7 The oscillation frequency, first threshold value PEM_OUT, second threshold value PEM_IN, maximum allowable timing time of the burst power mode (i.e., operating time), etc. shown in the figure may be other set values ​​and may be appropriately set according to the specific system. Meanwhile, the burst power mode may be the clamped asymmetric half-bridge flyback CAHBF Mode, but the concepts of entering and exiting the burst power mode and cooling power management remain unchanged. This is a burst power control method and circuit suitable for a clamped asymmetric half-bridge flyback converter.

[0152] Please refer to Figure 8 When the converter operates in burst power and cooling mode, each operating cycle consists of five phases: excitation phase (corresponding to the t0-t1 period), auxiliary switch zero voltage turn-on phase (corresponding to the t1-t2 period), demagnetization phase (corresponding to the t2-t3 period), current clamping phase (corresponding to the t3-t4 period), and main switch zero voltage turn-on phase (corresponding to the t4-t5 period). The operating principle of each cycle is as follows:

[0153] Excitation stage: From time t0 to time t1, the main switch tube S1 is controlled to be turned on, and the input voltage Vin charges the resonant capacitor Cr, the resonant inductor Lr and the excitation inductor Lm. The excitation inductor current ILm and the resonant inductor current ILr increase linearly. That is, the input voltage Vin excites the transformer. In this stage, the control signals Vgs2 and Vgs3 are low, and the auxiliary switch tube S2 and the unidirectional clamp network are turned off.

[0154] Auxiliary switch zero voltage turn-on stage: From time t1 to time t2, the main switch tube S1 is controlled to turn off, and capacitor C1, capacitor C2, resonant inductor Lr and excitation inductor Lm form a series resonance. The resonant inductor current ILr charges capacitor C1 and discharges capacitor C2, causing the voltage VC1 across capacitor C1 to rise and the voltage VC2 across capacitor C2 to fall. When capacitor C2 is discharged and VC2 drops to zero, diode D2 is naturally turned on, and the resonant inductor current ILr flows through diode D2. At time t2, the auxiliary switch tube S2 is controlled to turn on, and the auxiliary switch tube S2 achieves zero voltage turn-on. During this stage, the control signal Vgs3 is still at a low level, and the unidirectional clamping network is turned off;

[0155] Demagnetization stage: From time t2 to time t3, the auxiliary switch S2 is controlled to be turned on, the main switch S1 continues to be turned off, the rectifier switch D is turned on, the current I2 of the rectifier switch D increases, the voltage across the excitation inductor Lm is clamped, the voltage is negative at the top and positive at the bottom, the excitation inductor current ILm decreases linearly, and the transformer is demagnetized. At time t3, when the excitation inductor current reaches the set value, the auxiliary switch S2 is controlled to be turned off. During this stage, the control signal Vgs3 is high, the unidirectional clamping network is turned on, and the unidirectional clamping network can be turned on at any time between t2 and t3 (that is, the unidirectional clamping network can be turned on or off between t2 and t3). Since the unidirectional clamping network only allows current to flow from its anode to its cathode, no current flows through the unidirectional clamping network during this process.

[0156] Current clamping stage: from time t3 to time t4, at time t3, the auxiliary switch tube S2 is turned off, and the unidirectional clamping network continues to conduct. The capacitor C1, capacitor C2, resonant capacitor Cr and resonant inductor Lr form a series resonance. The resonant inductor current ILr is negative and rapidly increases in a positive direction, discharging the capacitor C1 and charging the capacitor C2, causing the voltage VC1 across the capacitor C1 to drop and the voltage VC2 across the capacitor C2 to rise. When VC2 rises to the same voltage as VCr, the anode voltage of the unidirectional clamping network is zero, the excitation inductor current ILm and the resonant inductor current ILr are equal, the rectifier switch D is turned off, and the excitation inductor current ILm (or clamping current) naturally flows from the anode to the cathode of the unidirectional clamping network. The unidirectional clamping network keeps the clamping current basically unchanged. At time t4, the control signal Vgs3 becomes low, and the unidirectional clamping network is turned off;

[0157] Main switch zero voltage turn-on stage: from time t4 to time t5, at time t4, the unidirectional clamping network is turned off, the main switch tube S1 and the auxiliary switch tube S2 remain in the off state, the clamping current maintained by the unidirectional clamping network is released, and the capacitor C1 continues to be discharged and the capacitor C2 continues to be charged. The voltage VC1 across the capacitor C1 continues to drop, and the voltage VC2 across the capacitor C2 continues to rise. When the voltage across the capacitor C1 drops to zero, the clamping current begins to flow through the diode D1. At time t5, the control signal Vgs1 becomes high, the main switch tube S1 is turned on, and the main switch tube S1 achieves zero voltage turn-on.

[0158] From the above analysis, it can be seen that the clamped asymmetric half-bridge flyback converter using the embodiment of the present invention can obtain the converter's current load value Io through primary-side load detection, and determine whether to enter burst power mode based on the load value Io. When entering burst power mode, the converter's switching frequency Fs_set increases, and the converter's peak current limit maximum value Vcs_max increases, allowing the converter to release more power within a specified timeframe. When entering cooling mode, the converter resumes its normal operating switching frequency Fs_set and peak current limit maximum value Vcs_max. Simultaneously, the output load value Io is monitored in real time and compared with the set maximum output load value LO_max_set, thereby achieving precise power limit management during cooling mode and preventing damage to the converter from sustained overpower. Thus, power management during burst power mode and cooling mode is independent of input voltage, system parameters, or clamping depth. Secondary-side output current detection is performed directly on the primary side without detecting the secondary-side load value. This achieves good consistency, simple implementation, simplified control of the clamped asymmetric half-bridge flyback converter, and reduced costs.

[0159] It should be noted that the current detection circuit and mode processing method of the asymmetric half-bridge flyback converter described in the embodiments of the present invention, by changing the position of the resonant cavity of the asymmetric half-bridge flyback converter, the connection method of the unidirectional clamping network and the transformer, the position of the current detection module CS, the implementation method of the peak current generation time capture module TS and the load and frequency calculation module LFC, the wave frequency in the burst power mode, and the power limit management calculation formula in the cooling mode (based on the primary side load detection current value), are still within the scope of protection of the present invention.

[0160] The above are only preferred embodiments of the present invention. It should be pointed out that the above preferred embodiments should not be regarded as limitations of the present invention. For those skilled in the art, several improvements and modifications can be made without departing from the spirit and scope of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention. No further examples will be used here. The scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A burst power control method for a clamped asymmetric half-bridge flyback converter, characterized in that: include: Real-time detection of the load value of the load clamped asymmetric half-bridge flyback converter; Determining whether the load value satisfies a condition for entering a burst power mode; If yes, enter a burst power mode, and when entering the burst power mode, increase the switching frequency and peak current limit maximum value of the converter according to the load value to increase the output power of the converter in the burst power mode; determining whether the current load value and the operation time of the burst power mode meet a condition for terminating the burst power mode; if so, terminating the burst power mode and entering a cooling mode; and comparing the load value with a preset maximum output load value in real time when entering the cooling mode; and if the load value is greater than the preset maximum output load value, reducing the output voltage of the flyback converter according to the load value and the maximum output load value to limit the maximum output power of the converter; Determining whether the current load value and the operation time of the burst power mode meet a condition for terminating the burst power mode, and if so, terminating the burst power mode and entering the cooling mode, specifically including: Determining whether the current load value is lower than a preset first threshold; If yes, then end the burst power mode and enter the cooling mode; If not, determining whether the operation time of the burst power mode is greater than the preset operable time, and if so, ending the burst power mode and entering the cooling mode; Determining whether the load value meets the conditions for entering the burst power mode specifically includes: Determining whether the load value is greater than a preset second threshold; If so, it is determined that the conditions for entering the burst power mode are met; If not, it is determined that the conditions for entering the burst power mode are not met; The second threshold is smaller than the first threshold.

2. The burst power control method of a clamped asymmetric half-bridge flyback converter according to claim 1, characterized in that: Also includes: collecting the output voltage of the converter; A control signal is generated according to the output voltage, and closed-loop control is performed on the main switch of the converter according to the control signal to stabilize the output voltage.

3. The burst power control method of a clamped asymmetric half-bridge flyback converter according to claim 2, characterized in that: Performing closed-loop control on the main switch of the converter according to the control signal to stabilize the output voltage specifically includes: The pulse width of the driving pulse transmitted to the main switch tube of the converter is controlled according to the control signal to control the output voltage of the converter and stabilize the output voltage.

4. The burst power control method of a clamped asymmetric half-bridge flyback converter according to claim 1, characterized in that: The load value is a load current value, and the preset maximum output load value is a maximum output load current value; the load value is compared with the preset maximum output load value in real time, and if the load value is greater than the preset maximum output load value, the output voltage of the converter is controlled according to the load value and the maximum output load value to limit the maximum output power of the converter, specifically including: The load current value is compared with a preset maximum output load current value in real time. If the load current value is greater than the preset maximum output load current value, the output voltage of the converter is controlled according to the load current value and the maximum output load current value to control the output voltage of the converter and thereby limit the maximum output power of the converter, wherein the load current value is inversely proportional to the output voltage.

5. The burst power control method of a clamped asymmetric half-bridge flyback converter according to claim 1, characterized in that: Real-time detection of the load value of the load of the clamped asymmetric half-bridge flyback converter, specifically including: Real-time detection of the excitation inductance current value during the conduction period of the main switch tube of the converter; Capturing the moment when the negative peak value of the converter's excitation inductance current is generated and outputting a negative peak trigger signal, and capturing the moment when the positive peak value of the excitation inductance current is generated and outputting a positive peak trigger signal; Sampling the excitation inductor current, and extracting the negative peak value and the positive peak value of the excitation inductor current according to the sampled excitation inductor current, the negative peak value trigger signal and the positive peak value trigger signal; The load value is obtained according to the negative peak value, the positive peak value of the excitation inductor current, the conduction time of the main switch tube and the auxiliary switch tube of the converter, or the duty cycle of the main switch tube and the auxiliary switch tube of the converter.

6. A burst power control circuit for a clamped asymmetric half-bridge flyback converter, characterized in that: include: A detection module, used for detecting a load value of a load of a clamped asymmetric half-bridge flyback converter in real time; A PWM generation and mode processing module, configured to determine whether the load value satisfies the conditions for entering the burst power mode; When it is determined that the conditions for entering the burst power mode are met, the PWM generation and mode processing module is further configured to enter the burst power mode, and when entering the burst power mode, increase the switching frequency and peak current limit maximum value of the converter according to the load value to increase the output power of the converter in the burst power mode; The PWM generation and mode processing module is further configured to determine whether the current load value and the operation time of the burst power mode meet a condition for terminating the burst power mode; if so, terminate the burst power mode and enter a cooling mode; when entering the cooling mode, compare the load value with a preset maximum output load value in real time; if the load value is greater than the preset maximum output load value, control the output voltage of the flyback converter according to the load value and the maximum output load value to limit the maximum output power of the converter; Determining whether the current load value and the operation time of the burst power mode meet a condition for terminating the burst power mode, and if so, terminating the burst power mode and entering the cooling mode, specifically including: Determining whether the current load value is lower than a preset first threshold; If yes, then end the burst power mode and enter the cooling mode; If not, determining whether the operation time of the burst power mode is greater than the preset operable time, and if so, ending the burst power mode and entering the cooling mode; Determining whether the load value meets the conditions for entering the burst power mode specifically includes: Determining whether the load value is greater than a preset second threshold; If so, it is determined that the conditions for entering the burst power mode are met; If not, it is determined that the conditions for entering the burst power mode are not met; The second threshold is smaller than the first threshold.

7. The burst power control circuit of a clamped asymmetric half-bridge flyback converter according to claim 6, characterized in that: It also includes an output voltage isolation sampling module for collecting the output voltage of the converter; The PWM generation and mode processing module is further configured to generate a control signal according to the output voltage, and perform closed-loop control on the main switch of the converter according to the control signal to stabilize the output voltage.

8. The burst power control circuit of a clamped asymmetric half-bridge flyback converter according to claim 6, characterized in that: The detection module includes: A current detection module, used to detect the excitation inductor current during the conduction period of the main switch tube of the converter; A peak generation moment capture module, used to capture the negative peak generation moment of the converter's excitation inductor current and output a negative peak trigger signal, and used to capture the positive peak generation moment of the excitation inductor current and output a positive peak trigger signal; A sampling and holding module, configured to sample the excitation inductor current and extract the negative peak value and the positive peak value of the excitation inductor current according to the sampled excitation inductor current, the negative peak value trigger signal and the positive peak value trigger signal; The load and frequency calculation module is used to obtain the load value based on the negative peak value, positive peak value of the excitation inductor current, the conduction time of the main switch tube and auxiliary switch tube of the converter, or the duty cycle of the main switch tube and auxiliary switch tube of the converter.

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