Schottky diode with junction terminal extension structure and preparation method thereof

Abstract

The present invention discloses a Schottky diode with a junction terminal extension structure and a preparation method thereof, wherein the diode comprises a cathode, an n + ‑Ga2O3 substrate layer, n ‑ ‑Ga2O3 buffer layer, P-type region, anode; cathode, n + ‑Ga2O3 substrate layer, n ‑ ‑Ga2O3 buffer layers are arranged from bottom to top; n ‑ There is a set of groove structures on the left and right ends of the Ga2O3 buffer layer, and the P-type region covers the n-type region inside and above the groove structure. ‑ ‑Ga2O3 buffer layer surface to form a junction terminal extension structure; the anode is covered on the n ‑ The upper surface of the middle Ga2O3 buffer layer extends to both ends to cover the upper surface of a portion of the P-type region. The P-type region is made of gallium nitride. The present invention adopts a junction terminal extension structure, introduces P-type grooves of increasing depth, and utilizes the resulting lateral PN junction to disperse the electric field at the edge of the Schottky junction, resulting in a smoother equipotential profile and reduced peak electric field. At the same time, the use of P-type GaN as the P-type region circumvents the difficulty of preparing P-type Ga2O3.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics technology, and in particular relates to a Schottky diode with a junction terminal extension structure and a preparation method thereof. Background Art

[0002] Ga2O3 large bandgap width (E g =4.9eV) brings theoretically high critical breakdown field strength (E br =8MV / cm), combined with electron mobility (μ = 300cm 2 / (V·s)), resulting in a high quality factor for power switching applications. Vertical Ga2O3 Schottky diodes (SBDs), a current research hotspot, have a simple device structure. By increasing the thickness of the drift layer and reducing the drift layer doping concentration, the device's breakdown voltage can be increased without affecting the device's lateral dimensions, thereby improving wafer utilization. Furthermore, SBDs are unipolar devices with short reverse recovery times and excellent frequency characteristics.

[0003] Since the breakdown of Ga2O3 SBDs primarily occurs at the edge of the Schottky junction, where the electric field distribution is concentrated, effective termination technology is required to mitigate the electric field concentration at the Schottky junction edge and thereby increase the device's breakdown voltage. Traditional junction termination structures primarily regulate the electric field distribution at the Schottky junction edge in the vertical direction, resulting in limited regulation. Furthermore, Ga2O3 is highly susceptible to the introduction of donor energy levels, such as oxygen vacancies, making the preparation of p-type Ga2O3 difficult. Summary of the Invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a Schottky diode with an extended junction terminal structure and a method for manufacturing the same. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0005] In one aspect, the present invention provides a Schottky diode with a junction terminal extension structure, comprising: a cathode, an n + -Ga2O3 substrate layer, n - -Ga2O3 buffer layer, P-type region, anode; wherein,

[0006] The cathode, n + -Ga2O3 substrate layer, n - -Ga2O3 buffer layers are arranged sequentially from bottom to top;

[0007] The n - -Ga2O3 buffer layer has a set of groove structures at both ends, and the P-type region covers the n-type region in and above the groove structure. - -Ga2O3 buffer layer surface to form a junction terminal extension structure;

[0008] The anode is covered on the n - -The upper surface in the middle of the Ga2O3 buffer layer and extends to both ends to cover a portion of the upper surface of the P-type region.

[0009] In one embodiment of the present invention, each of the groove structures includes a plurality of grooves, and the depth of the grooves gradually increases from the inner side of the device to the left and right sides.

[0010] In one embodiment of the present invention, the width of each of the grooves is 0.5-2 μm, and the distance between two adjacent grooves is 1-3 μm.

[0011] In one embodiment of the present invention, each of the groove structures includes three rectangular grooves, and the aspect ratios of the three rectangular grooves are 1, 2, and 3 from the inner side to the outer side of the device.

[0012] In one embodiment of the present invention, the growth thickness of the P-type region is 0.2-3 μm.

[0013] In one embodiment of the present invention, the doping ions of the P-type region are Mg ions, and the doping concentration is 1×10 17 ~1×10 19 cm -3 .

[0014] In one embodiment of the present invention, the material of the P-type region is P-type gallium nitride.

[0015] In one embodiment of the present invention, the n + -Ga2O3 substrate layer and the n - -Ga2O3 buffer layer doping ions are all Si ions or Sn ions;

[0016] The n + The doping concentration of the Ga2O3 substrate layer is 1×10 18 ~1×10 20 cm -3 , the n - The doping concentration of the Ga2O3 buffer layer is 1×10 16 ~1×10 17 cm -3 .

[0017] On the other hand, the present invention also provides a method for preparing a Schottky diode with an extended junction terminal structure, comprising the following steps:

[0018] Select n + -Ga2O3 substrate and clean it;

[0019] In n +-Ga2O3 substrate with low-doped n- - -Ga2O3 buffer layer;

[0020] For the n - The Ga2O3 buffer layer is etched multiple times to form a set of groove structures at its left and right ends respectively;

[0021] A P-type material is deposited on the entire surface of the sample and etched to form an n-type layer covering the groove structure and the groove structure. - -P-type region on the surface of the Ga2O3 buffer layer;

[0022] In the n + A cathode is made on the other side of the Ga2O3 substrate, and an anode is made on the surface of the obtained sample to complete the preparation of the device.

[0023] In one embodiment of the present invention, the n - The Ga2O3 buffer layer is etched multiple times to form a set of groove structures at its left and right ends, including:

[0024] In the n - - Spin-coat photoresist on the Ga2O3 buffer layer and photoetch the first groove area pattern on its left and right sides respectively;

[0025] The first trench is etched using an ICP device; wherein the etching conditions are: upper electrode power of 260-300W, lower electrode power of 40-80W, chamber pressure of 10mTorr, Cl2 gas flow rate of 20-60sccm, and tray temperature of 20°C;

[0026] Repeat the above steps to etch out the remaining grooves in sequence. - A set of symmetrical groove structures is formed at the left and right ends of the -Ga2O3 buffer layer.

[0027] Beneficial effects of the present invention:

[0028] 1. The present invention realizes a junction terminal extension structure by introducing a plurality of P-type trenches with increasing depths. By adding a plurality of P-type trenches with increasing depths, a plurality of PN junctions are introduced in the lateral direction. The lateral electric field generated by the PN junction further disperses the electric field at the edge of the Schottky junction, making the device have a smoother equipotential profile, reducing the peak electric field, adjusting the electric field distribution at the edge of the Schottky junction, and achieving an increase in the device breakdown voltage. In addition, adopting this design structure can also reduce the increase in forward on-resistance while ensuring the reduction of the peak electric field at the edge of the Schottky junction.

[0029] 2. The present invention uses P-type gallium nitride material as the preparation material for the P-type region. Its preparation process is relatively mature, which avoids the preparation difficulties of P-type Ga2O3. The prepared P-type gallium nitride is of excellent quality, and the doping concentration can be specifically characterized and accurately controlled, which helps to improve device performance.

[0030] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 1 is a schematic structural diagram of a Schottky diode with an extended junction terminal structure provided by an embodiment of the present invention;

[0032] Figure 2 1 is a flow chart of a method for preparing a Schottky diode with an extended junction terminal structure provided by an embodiment of the present invention;

[0033] Figures 3a-3h This is a process diagram for preparing a Schottky diode having three rectangular trenches on the left and right sides, respectively, provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0035] Example 1

[0036] See Figure 1 , Figure 1 This is a schematic diagram of the structure of a Schottky diode with a junction terminal extension structure provided by an embodiment of the present invention, which includes, from bottom to top: cathode 1, n + -Ga2O3 substrate layer 2, n - -Ga2O3 buffer layer 3, P-type region 4, anode 5; wherein,

[0037] The cathode 1, n + -Ga2O3 substrate layer 2, n - -Ga2O3 buffer layer 3 is arranged sequentially from bottom to top;

[0038] The n - -Ga2O3 buffer layer 3 has a set of groove structures at both ends, and the P-type region 4 covers the n-type region in and above the groove structure. - -Ga2O3 buffer layer 3 surface to form a junction terminal extension structure;

[0039] The anode 5 is covered on the n - -The upper surface in the middle of the Ga2O3 buffer layer 3 extends toward both ends to cover a portion of the upper surface of the P-type region 4.

[0040] Furthermore, in this embodiment, each of the groove structures includes a plurality of grooves, and the depth of the grooves gradually increases from the inner side of the device to the left and right sides. The width of each groove is 0.5 to 2 μm, and the spacing between two adjacent grooves is 1 to 3 μm.

[0041] Specifically, the P-type region 4 is in the n - The thickness of the Ga2O3 buffer layer 3 is 0.2 to 3 μm, and the doping ions are Mg ions with a doping concentration of 1×10 17 ~1×10 19 cm -3 .

[0042] Optionally, as an implementation of the present invention, each of the groove structures includes three rectangular grooves, and the aspect ratios (ratio of depth to width) of the three rectangular grooves are 1, 2, and 3 from the inside to the outside of the device, respectively. Figure 1 shown.

[0043] In addition, two or four rectangular trenches may be used to implement the junction terminal extension structure of the present application, and its aspect ratio may be adaptively adjusted according to actual conditions, which is not specifically limited in this embodiment.

[0044] The present invention achieves a junction terminal extension structure by introducing several P-type trenches of increasing depth. Compared to traditional junction terminal extension structures, on the one hand, the present invention introduces several PN junctions in the lateral direction by adding several P-type trenches. The lateral electric field generated by the PN junction further disperses the electric field at the edge of the Schottky junction, giving the device a smoother equipotential profile, reducing the peak electric field, and regulating the electric field distribution at the edge of the Schottky junction, thereby improving the device breakdown voltage. On the other hand, the depth of the P-type trenches constituting the junction terminal in the present invention adopts a gradient variation, with the depth of the P-type trenches gradually decreasing from the edge of the device electrode to the center of the device electrode. Using this design, the increase in forward on-resistance can be reduced while ensuring the reduction of the peak electric field at the edge of the Schottky junction.

[0045] Furthermore, in this embodiment, P-type gallium nitride is used as the material of the P-type region (4). Its preparation process is relatively mature, and the prepared P-type gallium nitride is of excellent quality. Moreover, the doping concentration can be specifically characterized and accurately controlled, which helps to improve device performance and avoids the problem of difficulty in preparing P-type Ga2O3 in the prior art. In addition, other P-type substitutes such as P-type NiO can also be used to realize the P-type region.

[0046] As an implementation of the present invention, the n + -Ga2O3 substrate layer 2 and the n - The doping ions of the -Ga2O3 buffer layer 3 are all Si ions or Sn ions;

[0047] The n + The doping concentration of the Ga2O3 substrate layer 2 is 1×10 18 ~1×10 20 cm -3 , thickness is 300~650μm; said n - The doping concentration of the Ga2O3 buffer layer 3 is 1×10 16 ~1×10 17 cm -3 , thickness is 5 to 15 μm.

[0048] Optionally, in this embodiment, the metal of the cathode 1 is a metal combination of Ti / Au or Ti / Al / Ni / Au, and the metal of the anode 5 is a metal combination of Ni / Au or Pt / Au.

[0049] Specifically, if the cathode metal is a Ti / Au combination, the thickness of the first layer of Ti metal is 10-50 nm, and the thickness of the second layer of Au metal is 100-200 nm. If the cathode metal is a Ti / Al / Ni / Au combination, the thickness of the first layer of Ti metal is 20-100 nm, the thickness of the second layer of Al metal is 20-100 nm, the thickness of the third layer of Ni metal is 20-100 nm, and the thickness of the fourth layer of Au metal is 50-200 nm.

[0050] The anode metal may be a Ni / Au combination or a Pt / Au combination, wherein the growth thickness of the first layer of metal Ni or Pt is 10-50 nm, and the growth thickness of the second layer of metal Au is 100-200 nm.

[0051] In addition, this embodiment may also use other metal combinations to implement the anode and cathode, and the present invention is not limited thereto.

[0052] Optionally, in this embodiment, n + -Ga2O3 substrate layer 2 is doped with Si ions or Sn ions, with a doping concentration of 1×10 18 ~1×10 20 cm -3 , thickness is 300~650μm; n - The doping ions of the Ga2O3 drift layer 3 are Si ions or Sn ions, and the doping concentration is 1×10 16 ~1×10 17 cm -3 , the growth thickness is 5 to 15 μm.

[0053] This embodiment utilizes several P-type trenches of increasing depth to achieve a junction terminal extension structure. On the one hand, by adding several P-type trenches of increasing depth, several PN junctions are introduced in the lateral direction. The lateral electric field generated by the PN junction further disperses the electric field at the edge of the Schottky junction, giving the device a smoother equipotential profile, reducing the peak electric field, and adjusting the electric field distribution at the edge of the Schottky junction, thereby improving the device breakdown voltage. In addition, adopting this design structure can also reduce the increase in forward on-resistance while ensuring the reduction of the peak electric field at the edge of the Schottky junction. On the other hand, filling the P-type gallium nitride material in the P-type trench also circumvents the preparation difficulties of P-type Ga2O3. The prepared P-type gallium nitride is of excellent quality, and the doping concentration can be specifically characterized and precisely controlled, which helps to improve device performance.

[0054] Example 2

[0055] Based on the above embodiment 1, this embodiment provides a method for preparing a Schottky diode with a junction terminal extension structure. Figure 2 , Figure 2 The present invention is a flow chart of a method for preparing a Schottky diode with an extended junction terminal structure provided by an embodiment of the present invention.

[0056] S1: Select n + -Ga2O3 substrate and clean it.

[0057] Specifically, the doping ions can be Si ions or Sn ions, and the doping concentration can be 1×10 18 ~1×10 20 cm -3 , thickness of 300~650μm + -Ga2O3 material is used as the substrate material. The existing standard cleaning method can be used to clean the n + The Ga2O3 substrate is cleaned, and the specific cleaning process is not described in detail in this embodiment.

[0058] S2: In n + -Ga2O3 substrate with low-doped n- - -Ga2O3 buffer layer.

[0059] Specifically, this embodiment adopts the MOCVD method to + -Ga2O3 substrate was placed in MOCVD equipment, and the trimethyl gallium TMGa flow rate was 3.0×10 -6 ~8.0×10 -6 mol / min, O2 flow rate is 1.5×10 -2 ~3.0×10 -2mol / min, temperature of 70-90℃, pressure of 500Pa, under the process conditions of n + -Ga2O3 substrate with epitaxial growth thickness of 5 to 15 μm, doped with Si or Sn ions, and doping concentration ranging from 1×10 16 ~1×10 17 cm -3 low-doped n-type Ga2O3 thin film to form n - -Ga2O3 buffer layer.

[0060] S3: For the n - The Ga2O3 buffer layer is etched multiple times to form a set of groove structures at its left and right ends respectively.

[0061] Specifically, in the n - - Spin-coat photoresist on the Ga2O3 buffer layer and photoetch the first groove area pattern on its left and right sides respectively;

[0062] The first trench is etched using an ICP device; wherein the etching conditions are: upper electrode power 260-300W / lower electrode power 40-80W, chamber pressure 10mTorr, Cl2 gas flow rate 20-60sccm, and tray temperature 20°C;

[0063] Repeat the above steps to etch out the remaining grooves in sequence. - A set of symmetrical groove structures is formed at the left and right ends of the -Ga2O3 buffer layer.

[0064] In this embodiment, the trench structure may be sequentially etched from the inside to the outside of the device, or from the outside to the inside of the device, or other methods may be used, which are not specifically limited in this embodiment.

[0065] S4: Deposit P-type material on the entire surface of the sample and perform etching to form n-type material covering the inside and above the groove structure. - -P-type region on the surface of Ga2O3 buffer layer.

[0066] Preferably, in this embodiment, P-type gallium nitride material is used to form the P-type region.

[0067] First, using the MOCVD method, epitaxially grow P-type GaN material on the surface of the sample obtained in step S3 to fill the grooves of each groove structure, and at the same time form a P-type GaN with a thickness of 0.2 to 3 μm on the surface of the device. The doping ion of P-type GaN is Mg ion, and the doping concentration range is 1×10 17 ~1×10 19 cm -3 .

[0068] Then open the hole and etch. Spin-coat photoresist on the P-type gallium nitride and photoetch the Schottky contact area, and remove the photoresist to form the n-type gallium nitride. - -P-type regions are formed at the left and right ends of the Ga2O3 buffer layer.

[0069] Among them, the specific parameters of the etching process are: upper electrode power is 260~300W, lower electrode power is 40~80W, chamber pressure is 9mTorr, BCl3 / Cl2 gas flow rate is 20~30 / 20~30sccm, He pressure is 10torr, He leakage is 10sccm, and tray temperature is 20℃.

[0070] In the n + A cathode is made on the other side of the Ga2O3 substrate, and an anode is made on the surface of the obtained sample to complete the preparation of the device.

[0071] First, make the bottom electrode (cathode). + The cathode of the Schottky diode is grown on the other side of the Ga2O3 substrate. Using an electron beam evaporation station, a combination of Ti / Au or Ti / Al / Ni / Au is sequentially evaporated on the backside of the Ga2O3 substrate. After the electrode metal is evaporated, it is rapidly annealed in an N2 environment at 500-800°C for 50-80 seconds to form an ohmic contact.

[0072] Specifically, the cathode metal may be a combination of Ti / Au, the growth thickness of the first layer of metal Ti is 10 to 50 nm, and the growth thickness of the second layer of metal Au is 100 to 200 nm.

[0073] In addition, the cathode metal can also be a combination of Ti / Al / Ni / Au, with the growth thickness of the first layer of metal Ti being 20-100nm, the growth thickness of the second layer of metal Al being 20-100nm, the growth thickness of the third layer of metal Ni being 20-100nm, and the growth thickness of the fourth layer of metal Au being 50-200nm.

[0074] Then, the top electrode (anode) is made by sequentially evaporating a Ni / Au combination or a Pt / Au combination on the device surface using an electron beam as the anode.

[0075] The anode metal may be a Ni / Au combination or a Pt / Au combination, wherein the growth thickness of the first layer of metal Ni or Pt is 10 to 50 nm, and the growth thickness of the second layer of metal Au is 100 to 200 nm.

[0076] At this point, the preparation of the Schottky diode with a junction terminal extension structure is completed.

[0077] Example 3

[0078] Based on the above embodiment 2, the preparation process of the present invention is described in detail below with reference to the accompanying drawings, taking the preparation of a Schottky diode having three rectangular trenches on the left and right sides as an example. Figures 3a-3h , Figures 3a-3h This is a process diagram for preparing a Schottky diode having three rectangular trenches on the left and right sides, provided by an embodiment of the present invention, which specifically includes:

[0079] Step 1: Select n + -Ga2O3 substrate and clean it.

[0080] Step 2: In n + -Ga2O3 substrate with low-doped n- - -Ga2O3 buffer layer.

[0081] Specifically, the cleaned n + -Ga2O3 substrate was placed in MOCVD equipment, and the trimethyl gallium TMGa flow rate was 3.0×10 -6 ~8.0×10 -6 mol / min, O2 flow rate is 1.5×10 -2 ~3.0×10 -2 mol / min, temperature of 70-90℃, pressure of 500Pa, under the process conditions of n + -Ga2O3 substrate with epitaxial growth thickness of 5 to 15 μm, doped with Si or Sn ions, and doping concentration ranging from 1×10 16 ~1×10 17 cm -3 Low-doped n - -Ga2O3 thin film to form n - -Ga2O3 buffer layer, such as Figure 3a shown.

[0082] Step 3: Photolithography of the first rectangular trench.

[0083] First, a photoresist is spin-coated on the buffer layer, and the innermost groove area pattern is patterned by photolithography.

[0084] Then, an ICP device was used to etch the innermost trench. The etching conditions were: upper electrode power of 260-300W, lower electrode power of 40-80W, chamber pressure of 10mTorr, Cl2 gas flow rate of 20-60sccm, and tray temperature of 20°C. The rectangular trench had an aspect ratio of 1.

[0085] Finally, after etching is completed, the photoresist is removed to - -A rectangular groove is formed at the left and right ends of the Ga2O3 buffer layer, such as Figure 3b shown.

[0086] Step 4: Photolithography of the second rectangular trench, such as Figure 3c shown.

[0087] Step 5: Photolithography of the third rectangular trench, such as Figure 3d shown.

[0088] Specifically, the process methods of steps 4 and 5 are the same as step 3, wherein the second rectangular trench is the middle trench, and its aspect ratio is 2. The third rectangular trench is the outermost trench, and its aspect ratio is 3.

[0089] So far, we have obtained a set of symmetrical settings on n - -Groove structures at the left and right ends of the Ga2O3 buffer layer.

[0090] Step 6: Using MOCVD method, - -A P-type gallium nitride layer is epitaxially grown on the Ga2O3 buffer layer, such as Figure 3e shown.

[0091] Specifically, P-type gallium nitride material is epitaxially grown on the surface of the device obtained in step 5, so that all the grooves are filled with P-type gallium nitride, and - -Ga2O3 buffer layer forms a P-type gallium nitride layer with a thickness of 0.2 to 3 μm. Among them, the doping ions of P-type gallium nitride are Mg ions, and the doping concentration range is 1×10 17 ~1×10 19 cm -3 .

[0092] Step 7: Open hole etching.

[0093] Specifically, a photoresist is spin-coated on the P-type gallium nitride and a Schottky contact area is photoetched, and the photoresist is removed to form a Schottky contact area on the n-type gallium nitride. - -Ga2O3 buffer layer forms P-type regions at both ends, such as Figure 3f shown.

[0094] Among them, the specific parameters of the etching process are: upper electrode power is 260~300W, lower electrode power is 40~80W, chamber pressure is 9mTorr, BCl3 / Cl2 gas flow rate is 20~30 / 20~30sccm, He pressure is 10torr, He leakage is 10sccm, and tray temperature is 20℃.

[0095] Step 8: Make the bottom electrode (cathode).

[0096] In n +The cathode of the Schottky diode is grown on the other side of the Ga2O3 substrate. Using an electron beam evaporation station, Ti / Au metal combinations are sequentially evaporated on the back of the Ga2O3 substrate. After the electrode metal is evaporated, it is rapidly thermally annealed in a N2 environment at 500-800℃ for 50-80s to form an ohmic contact, such as Figure 3g shown.

[0097] The first metal layer Ti has a growth thickness of 10 to 50 nm, and the second metal layer Au has a growth thickness of 100 to 200 nm.

[0098] Step 9: Make the top electrode (anode).

[0099] The Ni / Au combination is sequentially evaporated on the device surface using an electron beam as the anode, such as Figure 3h The anode metal is a Ni / Au combination or a Pt / Au combination, the thickness of the first layer of Ni or Pt metal is 10 to 50 nm, and the thickness of the second layer of Au metal is 100 to 200 nm.

[0100] At this point, the preparation of the Schottky diode with three rectangular trenches on the left and right sides is completed.

[0101] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0102] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0103] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Furthermore, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0104] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0105] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A Schottky diode with an extended junction terminal structure, characterized in that: include: cathode (1), n + -Ga2O3 substrate layer (2), n - -Ga2O3 buffer layer (3), P-type region (4), anode (5); wherein, The cathode (1), n + -Ga2O3 substrate layer (2), n - -Ga2O3 buffer layers (3) are arranged sequentially from bottom to top; The n - A group of groove structures are provided at the left and right ends of the Ga2O3 buffer layer (3), and the P-type region (4) covers the n-type region in and above the groove structure. - -Ga2O3 buffer layer (3) surface to form a junction terminal extension structure; The anode (5) covers the n - -The upper surface in the middle of the Ga2O3 buffer layer (3) and extends to both ends to cover a portion of the upper surface of the P-type region (4).

2. The Schottky diode with an extended junction terminal structure according to claim 1, wherein: Each of the groove structures includes a plurality of grooves, and the depth of the grooves gradually increases from the inner side of the device to the left and right sides.

3. The Schottky diode with an extended junction terminal structure according to claim 2, wherein: The width of each groove is 0.5-2 μm, and the distance between two adjacent grooves is 1-3 μm.

4. The Schottky diode with an extended junction terminal structure according to claim 1, wherein: Each of the groove structures includes three rectangular grooves, and the depth-to-width ratios of the three rectangular grooves are 1, 2, and 3 from the inner side to the outer side of the device.

5. The Schottky diode with an extended junction terminal structure according to claim 1, wherein: The growth thickness of the P-type region (4) is 0.2-3 μm.

6. The Schottky diode with an extended junction terminal structure according to claim 1, wherein: The doping ions of the P-type region (4) are Mg ions, and the doping concentration is 1×10 17 ~1×10 19 cm -3 .

7. The Schottky diode with an extended junction terminal structure according to claim 1, wherein: The material of the P-type region (4) is P-type gallium nitride.

8. The Schottky diode with an extended junction terminal structure according to claim 1, wherein: The n + -Ga2O3 substrate layer (2) and the n - -The doping ions of the Ga2O3 buffer layer (3) are all Si ions or Sn ions; wherein, The n + -Ga2O3 substrate layer (2) has a doping concentration of 1×10 18 ~1×10 20 cm -3 , the n - -Ga2O3 buffer layer (3) has a doping concentration of 1×10 16 ~1×10 17 cm -3 .

9. A method for preparing a Schottky diode having an extended junction terminal structure, characterized in that: The following steps are involved: Select n + -Ga2O3 substrate and clean it; In n + -Ga2O3 substrate with low-doped n- - -Ga2O3 buffer layer; For the n - The Ga2O3 buffer layer is etched multiple times to form a set of groove structures at its left and right ends respectively; A P-type material is deposited on the entire surface of the sample and etched to form an n-type layer covering the groove structure and the groove structure. - -P-type region on the surface of the Ga2O3 buffer layer; In the n + A cathode is made on the other side of the Ga2O3 substrate, and an anode is made on the surface of the obtained sample to complete the preparation of the device.

10. The method for preparing a Schottky diode with an extended junction terminal structure according to claim 9, wherein: For the n - The Ga2O3 buffer layer is etched multiple times to form a set of groove structures at its left and right ends, including: In the n - - Spin-coat photoresist on the Ga2O3 buffer layer and photoetch the first groove area pattern on its left and right sides respectively; The first trench is etched using an ICP device; wherein the etching conditions are: upper electrode power of 260-300W, lower electrode power of 40-80W, chamber pressure of 10mTorr, Cl2 gas flow rate of 20-60sccm, and tray temperature of 20°C; Repeat the above steps to etch out the remaining grooves in sequence. - A set of symmetrical groove structures is formed at the left and right ends of the -Ga2O3 buffer layer.

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