Multi-operator unit encoding method and device, phase control circuit and storage medium

Abstract

The embodiment of the present invention discloses a multi-operator unit encoding method and device, a phase control circuit and a storage medium. In the multi-operator unit encoding method, the power consumption data of each operator unit in n+1 operator units is first obtained, and the n+1 operator units are sorted in order from large to small based on the size of the power consumption data of the operator unit, and then the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain the M0th to Mnth startup numbers. In this way, when the n+1 operator units are started according to the corresponding startup numbers in one clock cycle, the power consumption data corresponding to the operator unit changes smoothly in the process of starting from the operator unit with the startup number M0 to the operator unit with the startup number Mn; at the same time, the physical positions of the two operator units with adjacent startup numbers are also far apart. The embodiment of the present invention thus achieves effective suppression of system noise with good effect.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor element technology, and in particular to a multi-operator unit encoding method and device, a phase control circuit, and a storage medium. Background Art

[0002] With the rapid growth of AI computing power demand, the number of operators in an AI chip has also increased significantly, which makes it increasingly challenging to improve the power consumption performance of cluster operators. The stability of the chip when the computing unit is fully loaded after receiving instructions is often disturbed by the power consumption noise of the operator. In the process of parallel computing, a large amount of power consumption will be consumed. In the process of power consumption, a big challenge for large chips is that power supply noise will interfere with or impact the internal circuits of the chip.

[0003] In this regard, the traditional way is to add enough capacitor protection devices to the chip power supply unit to perform a similar storage effect to prevent excessive voltage drop. However, due to the limited area of ​​the chip, the capacitor protection mechanism can no longer respond quickly and cannot overcome the instantaneous noise impact generated by multiple operators. In addition, the phase adjustment of the clock cycle is used as a solution to group multiple operators to different clock starting points and perform large-granularity switching such as 0 degrees, 90 degrees (1 / 4 of the clock cycle), 180 degrees, and 270 degrees. This switching adjusts the phase of the clock, groups the operator units in a clock cycle, and divides the operator units into multiple groups to start at different times, which can achieve a certain degree of power consumption noise suppression.

[0004] However, as semiconductor processes advance toward 7nm, 5nm, and 3nm, operator units are densely packed and the scale of operators continues to expand. The above large-granularity means cannot meet the control accuracy requirements, and the interference and impact of system noise can no longer be effectively solved. At this time, we need a fine-grained clock phase modulation method to meet the increase in the density of operator units and achieve fine-grained phase control such as 0 degrees, 5 degrees, and 15 degrees. In the process of achieving fine-grained phase control, how to determine the startup number of each operator unit so that when each operator unit is started according to the corresponding startup number, the system can achieve good noise suppression has become a new problem that needs to be solved urgently. Summary of the invention

[0005] Embodiments of the present invention provide a multi-operator unit encoding method and device, a phase control circuit and a storage medium, so as to encode the startup number of the operator unit based on the power consumption state and physical position of the operator unit, so as to achieve good system noise suppression effect when each operator unit is started according to the corresponding startup number.

[0006] In a first aspect, an embodiment of the present invention provides a multi-operator unit encoding method, including:

[0007] Obtaining power consumption data of each of the n+1 operator units, where n is a positive integer;

[0008] Based on the size of the power consumption data of the operator unit, sort the n+1 operator units in descending order;

[0009] Obtaining position information of each of the n+1 operator units;

[0010] The startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn, so that when the n+1 operator units are started according to the corresponding startup numbers in one clock cycle, in the process of starting from the operator unit with the startup number M0 to the operator unit with the startup number Mt in sequence, the power consumption data of the operator unit shows an increasing trend, and in the process of starting from the operator unit with the startup number Mt to the operator unit with the startup number Mn in sequence, the power consumption data of the operator unit shows a decreasing trend, t=int(m), m=n / 2;

[0011] The startup number of the operator unit with the sorting number 2r is Mk, and the startup number of the operator unit with the sorting number 2r+1 is Mg;

[0012] k=mr and g=m+r, or k=m+r and g=mr;

[0013] 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer.

[0014] Optionally, when n+1 is an odd number, the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit, and the n+1 startup numbers M0 to Mn are obtained, including:

[0015] The start number of the operator unit with the sequence number 1 is encoded as Mm;

[0016] Encode the startup numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively;

[0017] When r=1, k=m-1 and g=m+1 or k=m+1 and g=m-1;

[0018] When 4≤2r≤n, k=mr and g=m+r or k=m+r and g=mr is determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0019] Optionally, when n+1 is an even number, the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit, and the n+1 startup numbers M0 to Mn are obtained, including:

[0020] Encode the startup numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively;

[0021] Among them, when r=1 / 2, k=m-(1 / 2) and g=m+(1 / 2) are determined, or k=m+(1 / 2) and g=m-(1 / 2) are determined; when 3≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0022] Optionally, determining k=mr and g=m+r or determining k=m+r and g=mr according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1 includes:

[0023] When the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j), k=mr and g=m+r;

[0024] When the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,j) or D(2r+1,i), k=mr and g=m+r;

[0025] Wherein, i is the sorting sequence number of the operator unit with the startup number M[m-(r-1)], and j is the sorting sequence number of the operator unit with the startup number M[m+(r-1)];

[0026] D(u,v) is equal to the Manhattan distance between the operator unit with sorting number u and the operator unit with sorting number v, u=2r or 2r+1; v=2(r-1) or 2(r-1)+1.

[0027] In a second aspect, an embodiment of the present invention further provides a multi-operator unit encoding device, including:

[0028] A power consumption acquisition unit, used to acquire power consumption data of each of the n+1 operator units, where n is a positive integer;

[0029] A power consumption sorting unit, used for sorting n+1 of the operator units in descending order based on the size of the power consumption data of the operator units;

[0030] A position acquisition unit, used to acquire the position information of each of the n+1 operator units;

[0031] an encoding unit, for encoding the corresponding startup numbers of each of the operator units according to the sorting numbers and position information of each of the operator units, and obtaining n+1 startup numbers M0 to Mn, so that when the n+1 operator units are respectively started according to the corresponding startup numbers within one clock cycle, in the process of sequentially starting from the operator unit with the startup number M0 to the operator unit with the startup number Mt, the power consumption data of the operator unit shows an increasing trend, and in the process of sequentially starting from the operator unit with the startup number Mt to the operator unit with the startup number Mn, the power consumption data of the operator unit shows a decreasing trend, t=int(m), m=n / 2; wherein, the startup number of the operator unit corresponding to the sorting number 2r is Mk, and the startup number of the operator unit corresponding to the sorting number 2r+1 is Mg;

[0032] k=mr and g=m+r, or k=m+r and g=mr;

[0033] 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer.

[0034] Optionally, the encoding unit includes a first encoding subunit;

[0035] The first encoding subunit is used for encoding the startup number of the operator unit with the sorting sequence number of 1 as Mm when n+1 is an odd number; and encoding the startup numbers of the operator units with the sorting sequence numbers of 2r and 2r+1 as Mk and Mg respectively;

[0036] When r=1, k=m-1 and g=m+1 or k=m+1 and g=m-1;

[0037] When 4≤2r≤n, k=mr and g=m+r or k=m+r and g=mr is determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0038] Optionally, the encoding unit further includes a second encoding subunit;

[0039] The second encoding subunit is used for encoding the start numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively when n+1 is an even number;

[0040] Among them, when r=1 / 2, k=m-(1 / 2) and g=m+(1 / 2) are determined, or k=m+(1 / 2) and g=m-(1 / 2) are determined; when 3≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0041] Optionally, the second encoding subunit is used to determine that k=mr and g=m+r when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j);

[0042] When the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,j) or D(2r+1,i), k=mr and g=m+r;

[0043] Wherein, i is the sorting sequence number of the operator unit with the startup number M[m-(r-1)], and j is the sorting sequence number of the operator unit with the startup number M[m+(r-1)];

[0044] D(u,v) is equal to the Manhattan distance between the operator unit corresponding to the sorting number u and the operator unit corresponding to the sorting number v, u=2r or 2r+1; v=2(r-1) or 2(r-1)+1.

[0045] In a third aspect, an embodiment of the present invention provides a clock phase control circuit for controlling the phase of a clock signal, including:

[0046] A clock distribution module, a phase adjustment module and a multi-operator unit encoding device as described in the second aspect above;

[0047] The clock distribution module includes an equidistant distribution unit, an anti-interference unit, a clock receiving end and n+1 clock sending ends;

[0048] The clock receiving end is connected to each of the clock sending ends through the equidistant distribution unit; the equidistant distribution unit is used to distribute the clock signal received by the clock receiving end into multi-path branch clock signals respectively sent from each of the clock sending ends, and is used to control the total length of the signal transmission line between the clock receiving end and each of the clock sending ends to be the same;

[0049] The anti-interference unit extends in the same direction as the signal transmission line, and is disposed on at least two opposite sides of the signal transmission line; the anti-interference unit is used to absorb interference signals distributed on the outer surface of the signal transmission line;

[0050] The phase adjustment module includes a delay unit, n+1 phase adjustment input terminals and n+1 phase adjustment output terminals;

[0051] Each of the phase modulation input terminals is connected to the multi-operator unit encoding device, and the multi-operator unit encoding device is used to send the start numbers M0 to Mn of n+1 operator units in one clock cycle to the corresponding phase modulation input terminals respectively;

[0052] The phase-modulation input terminal is connected to the clock sending terminal in a one-to-one correspondence; a delay unit is set between one of the phase-modulation input terminals and a corresponding one of the phase-modulation output terminals; the delay unit is used to control the phase of the branch clock signal input by the corresponding phase-modulation input terminal to be delayed accordingly according to the corresponding start number, so that the corresponding phase-modulation output terminal outputs the branch clock signal with a corresponding delay.

[0053] In a fourth aspect, an embodiment of the present invention further provides a storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the multi-operator unit encoding method as described in the first aspect above is implemented.

[0054] The multi-operator unit encoding method and device, phase control circuit and storage medium provided by the embodiment of the present invention first obtain the power consumption data of each operator unit in n+1 operator units, then sort the n+1 operator units in descending order based on the size of the power consumption data of the operator units, and obtain the position information of each operator unit in the n+1 operator units, and then encode the startup number of each operator unit according to the sorting sequence number and position information of each operator unit to obtain the M0th to Mnth startup numbers. In this way, when the n+1 operator units are respectively started according to the corresponding startup numbers in one clock cycle, the power consumption data corresponding to the operator unit shows an increasing trend in the process of starting from the operator unit with the startup number M0 to the operator unit with the startup number Mt, and the power consumption data corresponding to the operator unit shows a decreasing trend in the process of starting from the operator unit with the startup number Mt to the operator unit with the startup number Mn; at the same time, the physical positions of two operator units with adjacent startup numbers are also far apart. According to the embodiment of the present invention, when n+1 operator units are started in fine-grained staggered phase, the power consumption data changes smoothly and steadily between the operator units that are started in sequence according to the encoded startup numbers, so that the noise jitter is small, the system noise is effectively suppressed, and the effect is good; at the same time, since the physical positions of two operator units with adjacent startup numbers are far apart, the system noise is further effectively suppressed, and the system can be an operator group or a chip, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 It is a flow chart of a multi-operator unit encoding method provided by an embodiment of the present invention;

[0056] Figure 2 is a bar chart of power consumption data of multiple operator units provided by an embodiment of the present invention;

[0057] Figure 3 Yes Figure 2 A bar chart of the power consumption data of the plurality of operator units shown is obtained by sorting the power consumption data of the plurality of operator units in descending order;

[0058] Figure 4 Yes Figure 3 A bar distribution diagram of the power consumption data corresponding to the operator units corresponding to the multiple power consumption data shown in the figure within a clock cycle after encoding;

[0059] Figure 5 is a schematic diagram of the physical distribution of operator units in a specified area of ​​a chip provided by an embodiment of the present invention;

[0060] Figure 6Another bar distribution diagram of power consumption data corresponding to operator units corresponding to a plurality of power consumption data in one clock cycle after encoding provided by an embodiment of the present invention;

[0061] Figure 7 is a schematic diagram of physical distribution of operator units in a specified area in another chip provided by an embodiment of the present invention;

[0062] Figure 8 is a structural schematic diagram of a multi-operator unit encoding device provided by an embodiment of the present invention;

[0063] Fig. 9 It is a structural schematic diagram of a clock phase control circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0064] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0065] The operator group mentioned in this embodiment may contain multiple operator units, and an operator unit may contain multiple operators. The multiple operator units in the operator group may be grouped and started in a fine-grained manner (for example, each operator unit constitutes a group for startup or at least two operator units constitute a group for startup). In the process of group startup, the startup number encoded by the operator unit is started based on the power consumption status and physical position of the operator unit in accordance with the embodiment of the present invention, which can effectively suppress the power consumption noise of the operator group with good effect. The multi-operator unit encoding method provided in the embodiment of the present invention can be executed by a multi-operator unit encoding device. Figure 1 1 is a flowchart of a multi-operator unit encoding method provided by an embodiment of the present invention. Figure 1 , the multi-operator unit encoding method includes:

[0066] S10. Obtain power consumption data of each operator unit in n+1 operator units, where n is a positive integer.

[0067] Specifically, the power consumption data of the operator unit includes the power consumption value of the operator unit. One operator unit corresponds to one power consumption data. Each of the n+1 operator units may have different power consumption data. It can be considered that the corresponding power consumption data of the operator unit will not change substantially during the operation of a single service. The power consumption of the operator unit can be tested by the power consumption monitoring device, and then the power consumption data of each of the n+1 operator units can be directly obtained from the power consumption monitoring device.

[0068] In order to allow readers to more clearly and intuitively understand the power consumption data of the n+1 operator units obtained, a tree diagram is used as an example below. Figure 2 is a bar chart of power consumption data of multiple operator units provided by an embodiment of the present invention. Figure 2 In the example, the value of n+1 is 11; the horizontal axis is the initial marking number of the power consumption data, from P0 to P10 represents the power consumption data from the zeroth operator unit to the tenth operator unit; the vertical axis is the power consumption data, represented by W; Figure 2 It can be seen that the power consumption data of the operator units vary in size.

[0069] S11 . Sort n+1 operator units in descending order based on the power consumption data of the operator units.

[0070] Specifically, the power consumption sorting device can sort the acquired n+1 power consumption data of the n+1 operator units in order from large to small, and the sorting numbers obtained from the power consumption data are used as the sorting numbers of the corresponding operator units. The embodiment of the present invention thus obtains the sorting numbers of each operator unit.

[0071] For example, Figure 3 Yes Figure 2 The power consumption data of the multiple operator units shown in the figure are sorted in descending order to obtain a bar chart of the power consumption data of the multiple operator units. Figure 2 and Figure 3 As shown, Figure 2 The power consumption data of multiple operator units are sorted in descending order by the power consumption sorting device, wherein, from left to right and from large to small, the sorting number of the operator unit of the power consumption data P1 is 1, the sorting number of the operator unit of the power consumption data P6 is 2, the sorting number of the operator unit of the power consumption data P2 is 3, the sorting number of the operator unit of the power consumption data P7 is 4, the sorting number of the operator unit of the power consumption data P3 is 5, the sorting number of the operator unit of the power consumption data P9 is 6, the sorting number of the operator unit of the power consumption data P4 is 7, the sorting number of the operator unit of the power consumption data P10 is 8, the sorting number of the operator unit of the power consumption data P8 is 9, the sorting number of the operator unit of the power consumption data P0 is 10, and the sorting number of the operator unit of the power consumption data P5 is 11.

[0072] S12. Obtain the position information of each operator unit in the n+1 operator units.

[0073] Specifically, the position information of the operator unit may include the center coordinates (x, y) of the operator unit. The position information of the operator unit may be stored in advance and directly called when calculation is required.

[0074] S13. Encode the startup number of each operator unit according to the sorting number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn, so that when the n+1 operator units are started according to the corresponding startup numbers within one clock cycle, the power consumption data of the operator unit shows an increasing trend in the process of starting from the operator unit with startup number M0 to the operator unit with startup number Mt, and the power consumption data of the operator unit shows a decreasing trend in the process of starting from the operator unit with startup number Mt to the operator unit with startup number Mn, t=int(m), m=n / 2; wherein, the startup number of the operator unit with sorting number 2r is Mk, and the startup number of the operator unit with sorting number 2r+1 is Mg; k=mr and g=m+r, or k=m+r and g=mr; 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer.

[0075] Specifically, the startup number of the operator unit means that within one clock cycle, the n+1 operator units will be started in sequence according to the corresponding startup numbers; for example, the startup number of the zeroth operator unit is M0, the startup number of the tenth operator unit is M1, the startup number of the fourth operator unit is M2, and the startup number of the seventh operator unit is M3. Then, within one clock cycle, when these four operator units are started, the startup order is the zeroth operator unit (startup number is M0), the tenth operator unit (startup number is M1), the fourth operator unit (startup number is M2), and the seventh operator unit (startup number is M3); similarly, the corresponding n+1 operator units can be started in sequence according to the startup numbers M0 to Mn.

[0076] Sudden changes in power consumption data are likely to cause power consumption noise, and two operator units that are physically close to each other and whose startup sequences are also close to each other are also likely to cause power consumption noise when they are started. Accordingly, the embodiment of the present invention encodes the startup number of each operator unit based on the power consumption data size sorting of each operator unit and the position information of each operator unit, and obtains the startup numbers M0 to Mn corresponding to n+1 operator units, so that when n+1 operator units are started according to the corresponding startup numbers in one clock cycle, in the process of starting from the operator unit with startup number M0 to the operator unit with startup number Mt in sequence, and in the process of starting from the operator unit with startup number Mt to the operator unit with startup number Mn in sequence, the change of the power consumption data of the operator unit is first gradually increased and then gradually decreased, that is, the change of the power consumption data is gentle and stable, avoiding sudden changes in the power consumption data between adjacent started operator units, so that the noise jitter is small, the system noise is effectively suppressed, and the effect is good; at the same time, the physical positions between the two operator units with adjacent startup numbers are far apart, thereby further effectively suppressing the system noise.

[0077] Among them, t=int(m) and m=n / 2, int is a function that rounds m down to the nearest integer, so that the startup number Mt is always a startup number in the middle of M0 to Mn or one of the two startup numbers in the middle, whether n is an odd number or an even number, that is, Mt is in the middle position of a clock cycle (for example, the middle position), and the operator unit corresponding to Mt is the operator unit with the largest power consumption data among the n+1 operator units, so that the change of the power consumption data of the operator unit is gradually increasing and gradually decreasing, and the change of the power consumption data is gentle and stable. For example, if n=10, then m=5, t=5, Mt=M5. For another example, if n=9, then m=4.5, t=4, Mt=M4, of course, Mt can also be M5 at this time, and the embodiment of the present invention does not limit this.

[0078] The startup number of the operator unit with sorting number 2r is Mk, and the startup number of the operator unit with sorting number 2r+1 is Mg; k=mr and g=m+r, or k=m+r and g=mr; 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer. That is, no matter n+1 is an odd number or an even number, two encoding methods correspond to it. One encoding method is that the startup number of the operator unit with the sorting number 2r is M(mr) and the startup number of the operator unit with the sorting number 2r+1 is M(m+r); the other encoding method is that the startup number of the operator unit corresponding to the sorting number 2r is M(m+r) and the startup number of the operator unit with the sorting number 2r+1 is M(mr). Both encoding methods can realize the smooth and stable change of the power consumption data of n+1 operator units within one clock cycle. On this basis, which of the two encoding methods is specifically selected for encoding may depend on the position information of the operator units with the sorting numbers 2r, 2r+1, 2r-1 and 2r-2, so as to realize that the physical positions of two operator units with adjacent startup numbers are far apart, thereby further effectively suppressing system noise.

[0079] On the basis of the above embodiments, optionally, when n+1 is an odd number, in step S13, the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn, including:

[0080] The start number of the operator unit with the coding sequence number 1 is Mm;

[0081] The startup numbers of the operator units with coding sorting numbers 2r and 2r+1 are Mk and Mg respectively; when r=1, k=m-1 and g=m+1 are determined, or k=m+1 and g=m-1 are determined; when 4≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0082] That is, the operator unit with the largest power consumption data among the n+1 operator units occupies the startup number Mm in the middle of the startup numbers M0 to Mn. The operator units with sorting numbers 2 and 3 occupy M(m-1) and M(m+1) among the startup numbers M0 to Mn. On this basis, it is arbitrary whether the operator unit with sorting number 2 occupies M(m-1) or the operator unit with sorting number 3 occupies M(m-1). However, when 4≤2r≤n, and the operator units with sorting numbers 2r and 2r+1 occupy M(mr) and M(m+r) among the startup numbers M0 to Mn, whether the operator unit with sorting number 2r occupies M(mr) or the operator unit with sorting number 2r+1 occupies M(mr) may depend on the position information of the operator units with sorting numbers 2r, 2r+1, 2r-1 and 2r-2, so as to achieve the physical distance between two operator units with adjacent startup numbers on the basis of achieving a smooth and steady change of the power consumption data of n+1 operator units within one clock cycle, thereby further effectively suppressing system noise.

[0083] On the basis of the above embodiments, optionally, when n+1 is an odd number, determining k=mr and g=m+r according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1, or determining k=m+r and g=mr includes: when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j), determining k=mr and g=m+r; when D(2r,i), D(2r,j), D When the maximum value of (2r+1,i) and D(2r+1,j) is D(2r,j) or D(2r+1,i), k=mr and g=m+r are determined; wherein i is the sorting number of the operator unit with the starting number M[m-(r-1)], and j is the sorting number of the operator unit with the starting number M[m+(r-1)]; D(u,v) is equal to the Manhattan distance between the operator unit with the sorting number u and the operator unit with the sorting number v, u=2r,2r+1; v=2(r-1),2(r-1)+1.

[0084] In the embodiment of the present invention, if the position information of operator unit a is (x1, y1) and the position information of operator unit b is (x2, y2), the Manhattan distance between operator unit a and operator unit b is D(a, b) = |x1-x2| + |y1-y2|. In the embodiment of the present invention, the farther the physical positions of two operator units are from each other, the greater the Manhattan distance between the two operator units is, and the closer the physical positions of the two operator units are, the smaller the Manhattan distance between the two operator units is. The farther the physical positions are from each other, the farther the positions are from each other in a two-dimensional plane, and the closer the physical positions are, the closer the positions are in a two-dimensional plane.

[0085] For example, Figure 4 Yes Figure 3 The bar distribution diagram of the power consumption data corresponding to the operator units of the plurality of power consumption data shown in the figure is shown in FIG. 1 after encoding the corresponding power consumption data in a clock cycle, combined with Figure 3 and Figure 4 As shown:

[0086] like Figure 4 As shown in the example, the operator unit with the sorting number 1 is located at A / 2 in the middle of the clock cycle A, which means that the start number corresponding to the operator unit with the sorting number 1 is Mm=M5, and the operator unit will be started at A / 2;

[0087] like Figure 4 As exemplified, the operator unit with the sorting number 3 is located on the right side of A / 2 and adjacent to A / 2, indicating that the start number of the operator unit with the sorting number 3 is M(m+1)=M6, and the operator unit will be started after the start number of the operator unit with the start number M5 is started; the operator unit with the sorting number 2 is located on the left side of A / 2 and adjacent to A / 2, indicating that the start number of the operator unit with the sorting number 2 is M(m-1)=M4, and the operator unit will be started before the start number of the operator unit with the start number M5 is started;

[0088] like Figure 4 As exemplified, due to the Manhattan distance between the operator unit with sorting number 4 and the operator unit with sorting number 2, the Manhattan distance between the operator unit with sorting number 4 and the operator unit with sorting number 3, the Manhattan distance between the operator unit with sorting number 5 and the operator unit with sorting number 2, and the Manhattan distance between the operator unit with sorting number 5 and the operator unit with sorting number 3, reference Figure 5As exemplified, the Manhattan distance between the operator unit with the sorting number 4 and the operator unit with the sorting number 2 is the largest (in the embodiment of the present invention, the farther the physical positions of the two operator units 200 are from each other, the greater the Manhattan distance between the two operator units 200), which meets the requirement that the physical positions of two operator units with adjacent startup numbers are far apart so as to achieve system noise reduction. Therefore, the startup number of the operator unit with the sorting number 4 is determined to be M(m-2)=M3, and the startup number of the operator unit with the sorting number 5 is determined to be M(m+2)=M7 accordingly;

[0089] Based on the same concept, the encoding start number of the operator unit with sorting number 6 and sorting number 7 includes: r=3, mr=2, m+r=8, i=4, j=5; when the maximum value among D64, D65, D74, and D75 is D64 or D75, k=2 and g=8 are determined, so that the start number of the operator unit with sorting number 6 is M2 and the start number of the operator unit with sorting number 7 is M8; when the maximum value among D64, D65, D74, and D75 is D65 or D74, k=8 and g=2 are determined, so that the start number of the operator unit with sorting number 6 is M8 and the start number of the operator unit with sorting number 7 is M2. Figure 4 and Figure 5 As exemplified, the Manhattan distance D74 between the operator unit with sorting number 7 and the operator unit with sorting number 4 is the maximum value among D64, D65, D74, and D75. Therefore, the startup number of the operator unit corresponding to the sorting number 7 is M2, and the startup number of the operator unit corresponding to the sorting number 6 is M8. Therefore, when the startup numbers of the operator unit with sorting number 7 and the operator unit with sorting number 4 are adjacent, the physical positions of the two are far apart, which can effectively prevent system noise.

[0090] The encoding start number of the operator unit with sorting number 8 and sorting number 9 includes: r=4, mr=1, m+r=9, i=7, j=6; when the maximum value among D87, D86, D97, and D96 is D87 or D96, k=1 and g=9 are determined, so that the start number of the operator unit with sorting number 8 is M1 and the start number of the operator unit with sorting number 9 is M9; when the maximum value among D87, D86, D97, and D96 is D86 or D97, k=9 and g=1 are determined, so that the start number of the operator unit with sorting number 8 is M9 and the start number of the operator unit with sorting number 9 is M1. Figure 4 and Figure 5As exemplified, the Manhattan distance D97 between the operator unit with sorting number 9 and the operator unit with sorting number 7 is the maximum value among D87, D86, D97, and D96. Therefore, the startup number of the operator unit with sorting number 8 is M9 and the startup number of the operator unit with sorting number 9 is M1. Therefore, when the startup numbers of the operator unit with sorting number 9 and the operator unit with sorting number 7 are adjacent, the physical positions of the two are far apart, which can effectively prevent system noise.

[0091] The encoding start number of the operator unit with sorting number 10 and sorting number 11 includes: r=5, mr=0, m+r=10, i=9, j=8; when the maximum value among D(10,8), D(10,9), D(11,8), and D(11,9) is D(10,9) or D(11,8), k=0 and g=10 are determined, so that the start number of the operator unit with sorting number 10 is M0 and the start number of the operator unit with sorting number 11 is M10; when the maximum value among D(10,8), D(10,9), D(11,8), and D(11,9) is D(10,8) or D(11,9), k=10 and g=0 are determined, so that the start number of the operator unit with sorting number 10 is M10 and the start number of the operator unit with sorting number 11 is M0. Figure 4 and Figure 5 As exemplified, the Manhattan distance D(11,9) between the operator unit with sorting number 11 and the operator unit with sorting number 9 is the maximum value among D(10,8), D(10,9), D(11,8), and D(11,9). Therefore, the startup number of the operator unit with sorting number 11 is M0 and the startup number of the operator unit with sorting number 10 is M10. Therefore, when the startup numbers of the operator unit with sorting number 11 and the operator unit with sorting number 9 are adjacent, their physical positions are far apart, which can effectively prevent system noise.

[0092] On the basis of the above embodiments, optionally, when n+1 is an even number, in step S13, the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn, including:

[0093] The startup numbers of the operator units with sorting numbers 2r and 2r+1 are encoded as Mk and Mg respectively; when r=1 / 2, k=m-(1 / 2) and g=m+(1 / 2) are determined, or k=m+(1 / 2) and g=m-(1 / 2) are determined; when 3≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0094] That is, the two operator units with the largest power consumption data among the n+1 operator units occupy the two middle startup numbers among the startup numbers M0 to Mn, and on this basis, it is arbitrary whether one of the two operator units with the largest power consumption data occupies M[m-(1 / 2)] or the other one occupies M[m-(1 / 2)]. However, when 3≤2r≤n, and the operator units with sorting numbers 2r and 2r+1 occupy M(mr) and M(m+r) among the startup numbers M0 to Mn, whether the operator unit with sorting number 2r occupies M(mr) or the operator unit with sorting number 2r+1 occupies M(mr) may depend on the position information of the operator units with sorting numbers 2r, 2r+1, 2r-1, and 2r-2, so as to realize that the physical positions of two operator units with adjacent startup numbers are far apart on the basis of realizing the smooth and stable change of the power consumption data of the n+1 operator units within one clock cycle, thereby further effectively suppressing the system noise.

[0095] On the basis of the above embodiments, optionally, when n+1 is an even number, determining k=mr and g=m+r according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1, or determining k=m+r and g=mr includes: when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j), determining k=mr and g=m+r; when D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) are equal, k=mr and g=m+r are equal; When the maximum value of D(r+1,i) and D(2r+1,j) is D(2r,j) or D(2r+1,i), k=m+r and g=mr; wherein i is the sorting number of the operator unit with the start number M[m-(r-1)], j is the sorting number of the operator unit with the start number M[m+(r-1)], D(u,v) is equal to the Manhattan distance between the operator unit corresponding to the sorting number u and the operator unit corresponding to the sorting number v, u=2r,2r+1; v=2(r-1),2(r-1)+1.

[0096] For example, Figure 6 Another bar distribution diagram of power consumption data corresponding to operator units corresponding to multiple power consumption data in one clock cycle after encoding is provided in an embodiment of the present invention, such as Figure 6 As shown: when n+1=10, m=9 / 2;

[0097] The coding start number of the operator unit with the sorting sequence number 1 and the sorting sequence number 2 includes: r = 1 / 2, mr = 4, m + r = 5; Figure 5As shown, the start number of the operator unit with the sorting sequence number 1 is M4 and the start number of the operator unit with the sorting sequence number 2 is M5;

[0098] The encoding start number of the operator unit with sorting number 3 and sorting number 4 includes: r=3 / 2, mr=3, m+r=6, i=1, j=2; when the maximum value among D31, D32, D41, and D42 is D31 or D42, k=3 and g=6 are determined, so that the start number of the operator unit with sorting number 3 is M3 and the start number of the operator unit with sorting number 4 is M6; when the maximum value among D31, D32, D41, and D42 is D32 or D41, k=6 and g=3 are determined, so that the start number of the operator unit with sorting number 3 is M6 and the start number of the operator unit with sorting number 4 is M3. Figure 6 and Figure 7 As exemplified, the Manhattan distance D42 between the operator unit with the sorting number 4 and the operator unit with the sorting number 2 is the maximum value among D31, D32, D41, and D42, so the startup number of the operator unit with the sorting number 4 is M6 and the startup number of the operator unit with the sorting number 3 is M3, so that when the startup numbers of the operator unit with the sorting number 4 and the operator unit with the sorting number 2 are adjacent, the physical positions of the two are far apart, which can effectively prevent system noise (in the embodiment of the present invention, the farther the physical positions of the two operator units 200 are apart, the greater the Manhattan distance between the two operator units 200); and so on...

[0099] The encoding start number of the operator unit with sorting number 9 and sorting number 10 includes: r=9 / 2, mr=0, m+r=9, i=8, j=7; when the maximum value among D98, D97, D(10,8), and D(10,7) is D98 or D(10,7), k=0 and g=9 are determined, so that the start number of the operator unit with sorting number 9 is M0 and the start number of the operator unit with sorting number 10 is M9; when the maximum value among D98, D97, D(10,8), and D(10,7) is D97 or D(10,8), k=9 and g=0 are determined, so that the start number of the operator unit with sorting number 9 is M9 and the start number of the operator unit with sorting number 10 is M0. Combined Figure 6 and Figure 7As exemplified, the Manhattan distance D(10,7) between the operator unit with sorting number 10 and the operator unit with sorting number 7 is the maximum value among D98, D97, D(10,8), and D(10,7). Therefore, the startup number of the operator unit with sorting number 9 is M0 and the startup number of the operator unit with sorting number 10 is M9. Therefore, when the startup numbers of the operator unit with sorting number 10 and the operator unit with sorting number 7 are adjacent, their physical positions are far apart, which can effectively prevent system noise.

[0100] In addition, in an embodiment of the present invention, for the case where D(2r,i)=D(2r+1,i) and the case where D(2r,j)=D(2r+1,j), preferably, a smaller startup number is obtained for the operator unit with a smaller sorting number.

[0101] The embodiment of the present invention further provides a multi-operator unit encoding device, Figure 8 Schematic diagram of a multi-operator unit encoding device provided by an embodiment of the present invention. Figure 8 The multi-operator unit encoding device 100 includes: a power consumption acquisition unit 110, a power consumption sorting unit 120, a position acquisition unit 130 and an encoding unit 140; the power consumption acquisition unit 110 is used to acquire the power consumption data of each operator unit in n+1 operator units, where n is a positive integer; the power consumption sorting unit 120 is used to sort the n+1 operator units in descending order based on the size of the power consumption data of the operator units; the position acquisition unit 130 is used to acquire the position information of each operator unit in the n+1 operator units;

[0102] The encoding unit 140 is used to encode the startup number of each operator unit according to the sorting number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn, so that when the n+1 operator units are started according to the corresponding startup numbers within a clock cycle, the power consumption data of the operator unit shows an increasing trend in the process of starting from the operator unit with startup number M0 to the operator unit with startup number Mt, and the power consumption data of the operator unit shows a decreasing trend in the process of starting from the operator unit with startup number Mt to the operator unit with startup number Mn, t=int(m), m=n / 2; wherein, the startup number of the operator unit with sorting number 2r is Mk, and the startup number of the operator unit with sorting number 2r+1 is Mg; k=mr and g=m+r, or k=m+r and g=mr; 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer.

[0103] In one embodiment of the present invention, optionally, the encoding unit includes a first encoding subunit; the first encoding subunit is used for, when n+1 is an odd number, encoding the start number of the operator unit with the sorting number 1 as Mm; encoding the start numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively; wherein, when r=1, k=m-1 and g=m+1 are determined or k=m+1 and g=m-1 are determined; when 4≤2r≤n, k=mr and g=m+r are determined or k=m+r and g=mr are determined according to the position information of the operator units with the sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0104] In one embodiment of the present invention, optionally, the first encoding subunit is used to determine k=mr and g=m+r when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j); when n+1 is an odd number, k=mr and g=m+r; when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D( 2r,j) or D(2r+1,i), determine k=mr and g=m+r; where i is the sorting number of the operator unit with the startup number M[m-(r-1)], and j is the sorting number of the operator unit with the startup number M[m+(r-1)]; D(u,v) is equal to the Manhattan distance between the operator unit with the sorting number u and the operator unit with the sorting number v, u=2r,2r+1; v=2(r-1),2(r-1)+1.

[0105] In one embodiment of the present invention, optionally, the encoding unit also includes a second encoding subunit; the second encoding subunit is used to encode the starting numbers of the operator units with sorting numbers 2r and 2r+1 as Mk and Mg respectively when n+1 is an even number; wherein, when r=1 / 2, k=m-(1 / 2) and g=m+(1 / 2) are determined, or k=m+(1 / 2) and g=m-(1 / 2) are determined; when 3≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

[0106] In one embodiment of the present invention, optionally, the second encoding subunit is used to determine k=mr and g=m+r when n+1 is an even number and when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j); when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D( 2r,j) or D(2r+1,i), determine k=mr and g=m+r; where i is the sorting number of the operator unit with the startup number M[m-(r-1)], and j is the sorting number of the operator unit with the startup number M[m+(r-1)]; D(u,v) is equal to the Manhattan distance between the operator unit with the sorting number u and the operator unit with the sorting number v, u=2r,2r+1; v=2(r-1),2(r-1)+1.

[0107] The multi-operator unit encoding device and the multi-operator unit encoding method provided in the embodiments of the present invention belong to the same inventive concept and can achieve the same technical effect, and the repeated contents will not be repeated here.

[0108] An embodiment of the present invention further provides a storage medium, which may be a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the multi-operator unit encoding method provided in any of the above embodiments is implemented.

[0109] The embodiment of the present invention further provides a clock phase control circuit. Fig. 9 is a schematic diagram of a clock phase control circuit provided by an embodiment of the present invention, with reference to Fig. 9 , the clock phase control circuit comprises: a clock distribution module 10, a phase adjustment module 20 and a multi-operator unit encoding device 100 provided in any of the above embodiments;

[0110] The clock distribution module 10 includes an equidistant distribution unit 13, an anti-interference unit (not shown in the figure), a clock receiving end 11 and n+1 clock sending ends 12; the clock receiving end 11 is connected to each clock sending end 12 through the equidistant distribution unit 13; the equidistant distribution unit 13 is used to distribute the clock signal received by the clock receiving end 11 into multi-channel branch clock signals respectively sent from each clock sending end 12, and is used to control the total length of the signal transmission line 14 between the clock receiving end 11 and each clock sending end 12 to be the same; the extension direction of the anti-interference unit is the same as the extension direction of the signal transmission line 14, and the anti-interference unit is arranged on at least two opposite sides of the signal transmission line 14; the anti-interference unit is used to absorb interference signals distributed on the outer surface of the signal transmission line 14;

[0111] The phase adjustment module 20 includes a delay unit 23, n+1 phase-adjustment input terminals 21 and n+1 phase-adjustment output terminals 22; each phase-adjustment input terminal 21 is connected to a multi-operator unit encoding device 100, and the multi-operator unit encoding device 100 is used to send the start numbers M0 to Mn of the n+1 operator units in a clock cycle to the corresponding phase-adjustment input terminal 21 respectively; the phase-adjustment input terminal 21 is connected to the clock sending terminal 12 in a one-to-one correspondence; a delay unit 23 is set between a phase-adjustment input terminal 21 and a corresponding phase-adjustment output terminal 22; the delay unit 23 is used to control the phase of the branch clock signal input by the corresponding phase-adjustment input terminal 21 to be delayed accordingly according to the corresponding start number, so that the corresponding phase-adjustment output terminal 22 outputs a branch clock signal with a corresponding delay.

[0112] That is, the clock distribution module 10 distributes the originally provided one-way clock signal into multiple-way high-precision phase-synchronized branch clock signals respectively sent from each clock sending end 12. The n+1 phase-adjusting input ends 21 of the phase adjustment module 20 respectively receive the corresponding branch clock signals, and the multi-operator unit encoding device 100 sends the start numbers M0 to Mn to the corresponding phase-adjusting input ends 21 respectively. The delay unit 23 corresponding to the phase-adjusting input end 21 controls the phase of the branch clock signal input by the corresponding phase-adjusting input end 21 to be delayed accordingly according to the corresponding start number, so that the corresponding phase-adjusting output end 22 outputs the branch clock signal with a corresponding delay, and the operator unit receives the branch clock signal with a corresponding delay from the corresponding phase-adjusting output end 22. The embodiment of the present invention thus realizes that while fine-grained phase adjustment is performed on the multi-operator unit, the power consumption noise of the system is effectively suppressed, and the effect is good.

[0113] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A multi-operator unit encoding method, characterized in that: include: Obtaining power consumption data of each of the n+1 operator units, where n is a positive integer; Based on the size of the power consumption data of the operator unit, sort the n+1 operator units in descending order; Obtaining position information of each of the n+1 operator units; The startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn, so that when the n+1 operator units are started according to the corresponding startup numbers in one clock cycle, in the process of starting from the operator unit with the startup number M0 to the operator unit with the startup number Mt in sequence, the power consumption data of the operator unit shows an increasing trend, and in the process of starting from the operator unit with the startup number Mt to the operator unit with the startup number Mn in sequence, the power consumption data of the operator unit shows a decreasing trend, t=int(m), m=n / 2; The startup number of the operator unit with the sorting number 2r is Mk, and the startup number of the operator unit with the sorting number 2r+1 is Mg; k=mr and g=m+r, or k=m+r and g=mr; 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer.

2. The multi-operator unit encoding method according to claim 1, characterized in that: When n+1 is an odd number, the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn including: The start number of the operator unit with the sequence number 1 is encoded as Mm; Encode the startup numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively; When r=1, k=m-1 and g=m+1 or k=m+1 and g=m-1; When 4≤2r≤n, k=mr and g=m+r or k=m+r and g=mr is determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

3. The multi-operator unit encoding method according to any one of claims 1 or 2, characterized in that: When n+1 is an even number, the startup number of each operator unit is encoded according to the sorting sequence number and position information of each operator unit to obtain n+1 startup numbers M0 to Mn including: Encode the startup numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively; Among them, when r=1 / 2, k=m-(1 / 2) and g=m+(1 / 2) are determined, or k=m+(1 / 2) and g=m-(1 / 2) are determined; when 3≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

4. The multi-operator unit encoding method according to claim 3, characterized in that: Determining k=mr and g=m+r or determining k=m+r and g=mr according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1 includes: When the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j), k=mr and g=m+r; When the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,j) or D(2r+1,i), k=mr and g=m+r; Wherein, i is the sorting sequence number of the operator unit with the startup number M[m-(r-1)], and j is the sorting sequence number of the operator unit with the startup number M[m+(r-1)]; D(u,v) is equal to the Manhattan distance between the operator unit with sorting number u and the operator unit with sorting number v, u=2r or 2r+1; v=2(r-1) or 2(r-1)+1.

5. A multi-operator unit encoding device, characterized in that: include: A power consumption acquisition unit, used to acquire power consumption data of each of the n+1 operator units, where n is a positive integer; A power consumption sorting unit, configured to sort the n+1 operator units in descending order based on the size of the power consumption data of the operator units; A position acquisition unit, used to acquire the position information of each of the n+1 operator units; an encoding unit, for encoding the corresponding startup numbers of each of the operator units according to the sorting numbers and position information of each of the operator units, and obtaining n+1 startup numbers M0 to Mn, so that when the n+1 operator units are respectively started according to the corresponding startup numbers within one clock cycle, in the process of sequentially starting from the operator unit with the startup number M0 to the operator unit with the startup number Mt, the power consumption data of the operator unit shows an increasing trend, and in the process of sequentially starting from the operator unit with the startup number Mt to the operator unit with the startup number Mn, the power consumption data of the operator unit shows a decreasing trend, t=int(m), m=n / 2; wherein, the startup number of the operator unit corresponding to the sorting number 2r is Mk, and the startup number of the operator unit corresponding to the sorting number 2r+1 is Mg; k=mr and g=m+r, or k=m+r and g=mr; 0<r≤n / 2; when n+1 is an odd number, r is a positive integer, and when n+1 is an even number, r is a half integer.

6. The multi-operator unit encoding device according to claim 5, characterized in that: The encoding unit includes a first encoding subunit; The first encoding subunit is used for encoding the startup number of the operator unit with the sorting sequence number of 1 as Mm when n+1 is an odd number; and encoding the startup numbers of the operator units with the sorting sequence numbers of 2r and 2r+1 as Mk and Mg respectively; When r=1, k=m-1 and g=m+1 or k=m+1 and g=m-1; When 4≤2r≤n, k=mr and g=m+r or k=m+r and g=mr is determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

7. The multi-operator unit encoding device according to any one of claims 5 or 6, characterized in that: The encoding unit further includes a second encoding subunit; The second encoding subunit is used for encoding the start numbers of the operator units with the sorting numbers 2r and 2r+1 as Mk and Mg respectively when n+1 is an even number; Among them, when r=1 / 2, k=m-(1 / 2) and g=m+(1 / 2) are determined, or k=m+(1 / 2) and g=m-(1 / 2) are determined; when 3≤2r≤n, k=mr and g=m+r are determined, or k=m+r and g=mr are determined according to the position information of the operator units with sorting numbers 2r-2, 2r-1, 2r and 2r+1.

8. The multi-operator unit encoding device according to claim 7, characterized in that: The second encoding subunit is used to determine k=mr and g=m+r when the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,i) or D(2r+1,j); When the maximum value among D(2r,i), D(2r,j), D(2r+1,i) and D(2r+1,j) is D(2r,j) or D(2r+1,i), k=mr and g=m+r; Wherein, i is the sorting sequence number of the operator unit with the startup number M[m-(r-1)], and j is the sorting sequence number of the operator unit with the startup number M[m+(r-1)]; D(u,v) is equal to the Manhattan distance between the operator unit corresponding to the sorting number u and the operator unit corresponding to the sorting number v, u=2r or 2r+1; v=2(r-1) or 2(r-1)+1.

9. A phase control circuit for controlling the phase of a clock signal, characterized in that: include: A clock distribution module, a phase adjustment module, and a multi-operator unit encoding device as described in any one of claims 5 to 8; The clock distribution module includes an equidistant distribution unit, an anti-interference unit, a clock receiving end and n+1 clock sending ends; The clock receiving end is connected to each of the clock sending ends through the equidistant distribution unit; the equidistant distribution unit is used to distribute the clock signal received by the clock receiving end into multi-path branch clock signals respectively sent from each of the clock sending ends, and is used to control the total length of the signal transmission line between the clock receiving end and each of the clock sending ends to be the same; The anti-interference unit extends in the same direction as the signal transmission line, and is disposed on at least two opposite sides of the signal transmission line; the anti-interference unit is used to absorb interference signals distributed on the outer surface of the signal transmission line; The phase adjustment module includes a delay unit, n+1 phase adjustment input terminals and n+1 phase adjustment output terminals; Each of the phase modulation input terminals is connected to the multi-operator unit encoding device, and the multi-operator unit encoding device is used to send the start numbers M0 to Mn of n+1 operator units in one clock cycle to the corresponding phase modulation input terminals respectively; The phase-modulation input terminal is connected to the clock sending terminal in a one-to-one correspondence; a delay unit is set between one of the phase-modulation input terminals and a corresponding one of the phase-modulation output terminals; the delay unit is used to control the phase of the branch clock signal input by the corresponding phase-modulation input terminal to be delayed accordingly according to the corresponding start number, so that the corresponding phase-modulation output terminal outputs the branch clock signal with a corresponding delay.

10. A storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the multi-operator unit encoding method as described in any one of claims 1 to 4 is implemented.

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