A control method for three-phase power grid negative sequence current imbalance

Abstract

The present application relates to the field of power grid power supply, in particular to a kind of control method of three-phase power grid negative sequence current imbalance.The present application realizes amplitude after sampling positive and negative sequence currents in frequency domain, and through the gain or threshold design of multistage controllable, can set protection level, abnormal time etc. according to power grid characteristics.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power grid power supply, in particular to a three-phase power grid negative sequence current imbalance control method. BACKGROUND

[0002] When the three-phase power grid is in imbalance operation, a large amount of negative sequence and zero sequence components will be generated in the power grid voltage. When the negative sequence current component exists, it will generate an alternating current flow of 2ω (the fundamental frequency of the power grid) through electromagnetic induction in the generator rotor, thereby causing problems such as generator unit vibration, excessive rotor heating, and reduction of the maximum operating load of the asynchronous motor. These hazards cause the electrical equipment to not work normally, and even be damaged, thereby indirectly causing huge economic losses, and the asymmetric operation of the power system will cause serious harm to the transmission and distribution lines, electrical equipment, and users. SUMMARY

[0003] In view of the deficiencies of the prior art, the present application provides a three-phase power grid negative sequence current imbalance control method. After sampling the positive and negative sequence currents, the amplitude is realized in the frequency domain, and through multi-stage controllable gain or threshold design, the protection level and abnormal time can be set according to the characteristics of the power grid.

[0004] The technical scheme of the present application is: a three-phase power grid negative sequence current imbalance control method, characterized by comprising the following steps:

[0005] Step one, negative sequence current sampling; taking the A-phase sampling time as the reference, the B-phase is delayed by N1 sampling sample values relative to the A-phase, and the C-phase is delayed by N2 sampling sample values relative to the A-phase, wherein the calculation formula of N1 and N2 is: f is the three-phase power frequency, and Fs is the sampling frequency;

[0006] Step two, the A-phase, B-phase, and C-phase currents are accumulated and converted to the frequency domain through the fast Fourier transform algorithm, the amplitude is extracted in the frequency domain, and the extracted amplitude is multiplied by the gain K1 to obtain the negative sequence current measurement value I-.

[0007] Step three, positive sequence current sampling; taking the A-phase sampling time as the reference, the B-phase is delayed by N2 sampling sample values relative to the A-phase, and the C-phase is delayed by N1 sampling sample values relative to the A-phase;

[0008] Step four, the A-phase, B-phase, and C-phase currents in step three are accumulated and converted to the frequency domain through the fast Fourier transform (FFT) algorithm, and the amplitude is extracted in the frequency domain, and the extracted amplitude is multiplied by the gain K2 to obtain the positive sequence current measurement value I+. + ;

[0009] Step 5: Calculate the negative sequence ratio A. The negative sequence ratio A equals the negative sequence current measure I divided by the positive sequence current measure I. + ;

[0010] Step 6: Set the ratio valve value B. Calculate the outlier C based on the negative sequence ratio A and the ratio valve value B. When B > A, C = 1; when B is less than A, C = 0.

[0011] Step 7: Set the trip value D, integrate the abnormal value C, and when the integrated value is less than the trip value D, supply power to the three phases of the system. When the integrated value is greater than the trip value D, output a signal to cut off the power supply to the three phases.

[0012] According to the above-described method for controlling the negative sequence current imbalance in a three-phase power grid, the three-phase frequency is 50 Hz, the sampling frequency is 10500 Hz, N1 is 70, and N2 is 140.

[0013] According to the above-described method for controlling the negative sequence current imbalance in a three-phase power grid, the characteristic feature is that the gain K1 is set to 1.

[0014] According to the control method for negative sequence current imbalance in a three-phase power grid as described above, the characteristic is that the gain K2 is set to 1.

[0015] The beneficial effects of this invention are: when the method of this invention is applied to different systems, only some parameters need to be modified in the software to achieve different protection trip times and trip frequencies, thereby reducing the number of abnormal trips. Attached Figure Description

[0016] Figure 1 This is the circuit schematic diagram of the present invention. Detailed Implementation

[0017] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0018] like Figure 1 As shown, a method for controlling the negative sequence current imbalance in a three-phase power grid according to the present invention includes the following steps:

[0019] Step 1: Negative sequence current sampling; taking the sampling time of phase A as the reference, phase B is delayed by N1 sampling values ​​relative to phase A, and phase C is delayed by N2 sampling values ​​relative to phase A. The formulas for calculating N1 and N2 are as follows: f is the three-phase electrical frequency, which is 50 Hz. Fs is the sampling frequency, such as 10500 Hz. Then N1 is 70 and N2 is 140.

[0020] Step two, the A phase, B phase, C phase current accumulation, and the fast Fourier transform (FFT) algorithm is converted to the frequency domain, and the amplitude value is extracted in the frequency domain, and the gain K1 can be set according to the need, so as to realize the negative sequence current measurement value I-;

[0021] Step three, the positive sequence current sampling; with the A phase sampling time as the reference, the B phase is delayed by N2 sampling sample values relative to the A phase, and the C phase is delayed by N1 sampling sample values relative to the A phase.

[0022] Step four, the A phase, B phase, C phase current in step three is accumulated, and the fast Fourier transform (FFT) algorithm is converted to the frequency domain, and the amplitude value is extracted in the frequency domain, and the gain K2 can be set according to the need, so as to realize the positive sequence current measurement value I + ; through the setting of K1 and K2, the circuit can be started according to the severity of the negative sequence current, so as to realize different protection rules according to different power supply lines, such as K1 and K2 being 1, the amplitude being the negative sequence current measurement value I- or the positive sequence current measurement value I + .

[0023] Step five, calculate the negative sequence ratio A, the negative sequence current measurement value I- divided by the positive sequence current measurement value I + ;

[0024] Step six, set the ratio threshold value B, calculate the abnormal value C according to the negative sequence ratio A and the ratio threshold value B, when B>A, C=1; when B is less than A, C=0; in this step, because there is a threshold value B less than the negative sequence ratio abnormal value reset to zero, so in the subsequent integration process, the previous accumulated value can be cleared to zero, ensuring that only when the abnormal time reaches the set time will it be cleared.

[0025] Step seven, set the trip value D, integrate the abnormal value C, when the integral value is less than the trip value D, the system three-phase power supply, when the integral value is greater than the trip value D, the output signal cuts off the three-phase power supply. In this way, the size of the trip value D can be set to design the system to trip processing when the time exceeds how much, ensuring that the system power supply process will not cause abnormal tripping when some high-power electrical appliances start.

[0026] In this experiment, three-phase load A (power 5kW) works for 0-20s; three-phase load B (power 3kW) works for 2-10s; single-phase load (power 4kW) works for 6-20s, when the unbalanced load is applied, the relay trips at about 11s; because the unbalanced load is connected to the power grid at 6s, the integrator starts to integrate, and when the integral value is greater than the threshold value, the protection trip is started; at the same time, the three-phase load and the single-phase unbalanced load are introduced in different time periods, the current of the circuit becomes larger, and the current becomes 0 after tripping at about 11s; after tripping, all loads do not work.

Claims

1. A method of controlling three-phase power grid negative sequence current unbalance, characterized by: The method comprises the following steps: Step one, negative sequence current sampling; Taking the A-phase sampling time as a reference, the B-phase is delayed by N1 sampling sample values relative to the A-phase, and the C-phase is delayed by N2 sampling sample values relative to the A-phase, wherein the calculation formula of N1 and N2 is: f is the three-phase electric frequency, and Fs is the sampling frequency. Step two, the A phase, B phase, C phase current accumulation, and the fast Fourier transform algorithm conversion to the frequency domain, in the frequency domain to extract the amplitude, the amplitude multiplied by the gain K1 for negative sequence current measurement value I - ; Step three, positive sequence current sampling; Taking the sampling time of A phase as a reference, B phase is delayed N2 sampling sample values relative to A phase, and C phase is delayed N1 sampling sample values relative to A phase; Step four, the current of phase A, phase B, phase C in step three is accumulated, and is converted to frequency domain by fast Fourier transform (FFT) algorithm, and the amplitude value is extracted in frequency domain, and the amplitude value multiplied by gain K2 is the positive sequence current measurement value I + ; Step five, calculating the negative sequence ratio A, the negative sequence ratio A being equal to the negative sequence current measure I - divided by the positive sequence current measure I + ; Step six, setting a ratio valve value B, calculating an abnormal value C according to the negative sequence ratio A and the ratio valve value B, when B>A, C=1; when B is less than A, C=0; Step seven, setting a tripping value D, integrating the abnormal value C, resetting the abnormal value of the valve value B to zero when the negative sequence ratio is less than the abnormal value, clearing the previous accumulated value during the integration process, and clearing the abnormal time every time the abnormal time reaches the set time; when the integral value is less than the tripping value D, the system three-phase power supply is powered on, and when the integral value is greater than the tripping value D, the output signal cuts off the three-phase power supply.

2. The method of claim 1, wherein: The three-phase power frequency is 50HZ, the sampling frequency is 10500Hz, N1 is 70, and N2 is 140.

3. A method of controlling three-phase network negative sequence current unbalance according to claim 1 or 2, characterized in that: The gain K1 is 1.

4. The method of claim 1 or 2, characterized in that: The gain K2 is 1.

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