Large-scale parallel assembly method

Abstract

The present application provides a method for a manufacturing apparatus, including providing a first carrier, to which a plurality of chips are attached via an adhesive layer of the first carrier, and a first surface of the plurality of chips is attached to the first carrier. In addition, the method includes selectively attaching a second surface of a subset of the plurality of chips to a transfer carrier via a structured adhesive layer of a transfer layer. In addition, the method includes selectively releasing a subset of the plurality of chips from the first carrier by debonding a corresponding portion of the adhesive layer of the first carrier. In addition, the method includes attaching a first surface of the subset of the plurality of chips to a substrate of the apparatus. In addition, the method includes releasing a subset of the plurality of chips from the transfer carrier by debonding at least a corresponding portion of the structured adhesive layer of the transfer carrier. Therefore, at least one of the two operations of selectively releasing an appropriate subset of the plurality of chips from the first carrier and selectively releasing an appropriate subset of the plurality of chips from the transfer carrier is performed by laser debonding.

Description

Technical Field

[0001] The embodiments relate to a method for manufacturing equipment, and more particularly, to a method that supports parallel attachment of multiple chips to a substrate. Some embodiments relate to large-scale parallel assembly. Background Art

[0002] Generally, in order to bond chips to a substrate, the chips are individually cut from a bare wafer having an adhesive film by needles, received in a vacuum tool, aligned at an accurate position relative to the substrate, and connected by adhesion, soldering, or pressure welding or friction welding in, for example, a thermal step. If the chip size becomes very small, for example, the edge length is less than 250 µm, the processing during cutting and receiving becomes more difficult. Since multiple chips (e.g., thousands of chips) need to be bonded, the overall loading time of the substrate increases, and thus this method becomes less and less economical.

[0003] From [1], different methods for realizing parallel assembly of the same components are known, and these methods are available to a limited extent.

[0004] Therefore, the object of the present invention is to improve the current situation. Summary of the Invention

[0005] This object is solved by the independent claims.

[0006] The dependent claims relate to advantageous implementations.

[0007] An embodiment provides a method for manufacturing a device. The method includes providing a first carrier [e.g., a glass carrier / glass wafer], attaching a plurality of chips [e.g., µLEDs] to the first carrier through an adhesive layer of the first carrier [e.g., provided on the carrier (e.g., surface)], with a first surface of the plurality of chips attached to the first carrier. Further, the method includes selectively attaching a second surface [e.g., opposite to the first surface] of a subset [e.g., a suitable subset] of the plurality of chips to a transfer carrier [e.g., a glass carrier / glass wafer] through a structured adhesive layer of a transfer layer [e.g., provided on the transfer carrier (e.g., surface)]. Further, the method includes selectively releasing the subset [e.g., the suitable subset] of the plurality of chips from the first carrier by debonding [e.g., laser debonding] a corresponding portion of the adhesive layer of the first carrier [e.g., the portion of the adhesive layer of the first carrier to which the subset (e.g., the suitable subset) of the plurality of chips is attached] [e.g., cleaning the first surface of the subset of the plurality of chips]. Further, the method includes attaching a first surface of a subset [e.g., a suitable subset] of the plurality of chips to a substrate of the device. Further, the method includes releasing the subset [e.g., the suitable subset] of the plurality of chips from the transfer carrier by debonding [e.g., laser debonding] at least a corresponding portion of the structured adhesive layer of the transfer carrier [the portion of the adhesive layer of the transfer layer to which the suitable subset of the plurality of chips is attached]. Thus, at least one of the two operations of selectively releasing the suitable subset of the plurality of chips from the first carrier and releasing the suitable subset of the plurality of chips from the transfer carrier is performed by laser debonding.

[0008] The embodiment supports parallel high-precision assembly.

[0009] In an embodiment, the plurality of chips is a two-dimensional chip array.

[0010] In an embodiment, the subset [e.g., the suitable subset] of the plurality of chips is defined by a two-dimensional pattern.

[0011] In an embodiment, according to the two-dimensional pattern, chips are alternately selected from the two-dimensional chip array in the row direction and / or in the column direction, at least every other one or every other two, to obtain the subset [e.g., the suitable subset] of the chips.

[0012] In an embodiment, the method further includes: providing an adhesive layer provided on the transfer carrier for the transfer carrier; constructing the adhesive layer of the transfer carrier according to the two-dimensional pattern defining the subset [e.g., the suitable subset] of the chips to obtain the structured adhesive layer of the transfer layer.

[0013] In an embodiment, attaching the first surface of the subset [e.g., a suitable subset] of the plurality of chips to the substrate of the device includes bonding the subset of the plurality of chips to the substrate of the device.

[0014] In an embodiment, the first surface of the plurality of chips includes a metallization layer.

[0015] In an embodiment, the first surface of the subset [e.g., a suitable subset] of the plurality of chips includes a metallization layer, on which an AuSn solder layer stack is provided. Attaching the first surface of the subset [e.g., a suitable subset] of the plurality of chips to the substrate of the device includes soldering the subset [e.g., a suitable subset] of the plurality of chips to the substrate of the device at a temperature of at least 280 °C [e.g., a temperature between 280 °C and 350 °C, or a temperature between 280 °C and 500 °C].

[0016] In an embodiment, the first carrier is a processing carrier.

[0017] In an embodiment, the first carrier is a donor carrier, wherein providing the donor carrier includes: providing a processing carrier [e.g., a glass carrier / glass wafer], attaching the plurality of chips to the processing carrier through an adhesive layer of the processing carrier [e.g., provided on the surface of the processing carrier], with the second surface of the plurality of chips attached to the processing carrier; attaching the first surface of the plurality of chips or a suitable subset of the plurality of chips to the donor carrier through the adhesive layer of the donor carrier; releasing the plurality of chips or the suitable subset of the chips from the processing carrier by laser debonding at least a corresponding portion of the adhesive layer of the processing carrier.

[0018] In an embodiment, providing the donor carrier further includes providing a metallization layer on the first surface of the device before attaching the first surface of the plurality of chips to the donor carrier.

[0019] In an embodiment, providing the donor carrier further includes providing a metallization layer on the first surface of the device before attaching the first surface of the plurality of chips to the donor carrier, and providing an AuSn solder layer stack on the metallization layer.

[0020] In an embodiment, providing the donor carrier further includes providing an AuSn solder layer stack on the metallization layer of the plurality of chips [e.g., the metallization layer provided on the first surface of the plurality of chips].

[0021] For example, an Au / Sn stack [e.g., an Au / Sn metal stack] can be provided [e.g., set] [e.g., on a metallization layer] and annealed. The eutectic solder AuSn20 or Au / Sn 80 / 20 is formed at a soldering temperature of at least 280°C. When remelted / soldered, the excess gold alloy (Au / Sn 80 / 20) (eutectic) is converted to Au / Sn 88 / 12 (Au5Sn or zeta phase), which melts only at 512°C.

[0022] In an embodiment, providing the processing carrier includes: providing a [e.g., semiconductor] substrate on which the plurality of chips are formed; attaching the substrate having the plurality of chips to the processing carrier via an adhesive layer [e.g., provided on a surface of the carrier], with the plurality of chips facing the carrier; separating the plurality of chips from the substrate [e.g., by dicing the substrate].

[0023] In an embodiment, the plurality of chips are a first plurality of chips [e.g., µLEDs of a first color], and wherein the method further includes: providing a second carrier [e.g., a glass carrier / glass wafer], attaching a second plurality of chips [e.g., µLEDs of a second color different from the first color] to the second carrier via an adhesive layer of the second carrier [e.g., provided on a surface of the carrier], with a first surface of the second plurality of chips attached to the second carrier; selectively attaching a second surface [e.g., opposite to the first surface] of a subset [e.g., a suitable subset] of the second plurality of chips to the second transfer carrier [e.g., a glass carrier / glass wafer] via a structured adhesive layer of the second transfer layer [e.g., provided on a surface of the transfer carrier]; selectively releasing the subset [e.g., the suitable subset] of the second plurality of chips from the second carrier by laser debonding a corresponding portion of the adhesive layer of the second carrier [e.g., the portion of the adhesive layer of the second carrier to which the subset [e.g., the suitable subset] of the second plurality of chips is attached]; attaching the first surface of the subset [e.g., the suitable subset] of the second plurality of chips to the substrate of the device; releasing the subset [e.g., the suitable subset] of the second plurality of chips from the second transfer carrier by laser debonding at least a corresponding portion of the structured adhesive layer of the second transfer carrier [e.g., the portion of the adhesive layer of the second transfer layer to which the subset [e.g., the suitable subset] of the second plurality of chips is attached].

[0024] In an embodiment, the subset [e.g., the suitable subset] of the first plurality of chips and the subset [e.g., the suitable subset] of the second plurality of chips are arranged on the substrate of the device in an interleaved manner relative to each other.

[0025] In an embodiment, the first surfaces of the subset [e.g., suitable subset] of the first plurality of chips and the first surfaces of the subset [e.g., suitable subset] of the second plurality of chips include a metallization layer having an AuSn solder layer stack disposed thereon. Attaching the first surfaces of the subset [e.g., suitable subset] of the first plurality of chips to the substrate of the device includes soldering the first subset [e.g., suitable subset] of the first plurality of chips to the substrate of the device at a temperature between 280 °C and 350 °C. Attaching the first surfaces of the subset [e.g., suitable subset] of the second plurality of chips to the substrate of the device includes soldering the second subset [e.g., suitable subset] of the first plurality of chips to the substrate of the device at a temperature between 280 °C and 350 °C, wherein the first plurality of chips are soldered to the substrate of the device before attaching the first surfaces of the subset [e.g., suitable subset] of the second plurality of chips to the substrate of the device.

[0026] In an embodiment, the chip is at least one of a semiconductor chip, a filter, a ferromagnet, a high-K dielectric, a tilted mirror, a microlens, a laser diode, a photodetector, and a light-emitting diode [e.g., a mini or micro light-emitting diode].

[0027] In an embodiment, the device is a display or a part of a display.

[0028] In an embodiment, the device is an optical module or a part of an optical module [e.g., an optical transceiver [e.g., for a laser diode, a photodetector, a mirror, or a filter]].

[0029] In an embodiment, the device is a power regulator or a switch [e.g., for a capacitor having a high-K dielectric or an inductor having a ferrite or a ferromagnet]. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Embodiments of the present invention are described herein with reference to the accompanying drawings.

[0031] Figure 1 A flowchart of a method of manufacturing a device according to an embodiment of the present invention is shown.

[0032] Figure 2a A cross-sectional view of an intermediate product of device manufacturing is shown after a step of providing a processing carrier with a plurality of chips attached by an adhesive layer.

[0033] Figure 2b A cross-sectional view of an intermediate product of device manufacturing is shown after a step of attaching the first surfaces of a plurality of chips or a suitable subset of the plurality of chips to a donor carrier through an adhesive layer of the donor carrier.

[0034] Figure 2c Shows a cross-sectional view of an intermediate product of device manufacturing after the step of releasing a plurality of chips or a suitable subset of a plurality of chips from a processing carrier.

[0035] Figure 2d Shows a cross-sectional view of an intermediate product of device manufacturing after the step of selectively attaching a second surface of a subset of a plurality of chips (e.g., a suitable subset) to a transfer carrier through a structured adhesive layer.

[0036] Figure 2e Shows a cross-sectional view of an intermediate product of device manufacturing after the step of selectively releasing a subset of a plurality of chips (e.g., a suitable subset) from a donor carrier (or processing carrier).

[0037] Figure 2f Shows a cross-sectional view of an intermediate product of device manufacturing after the step of attaching a first surface of a subset of a plurality of chips (e.g., a suitable subset) to a substrate of the device and after the step of releasing a subset of a plurality of chips (e.g., a suitable subset) from a transfer carrier.

[0038] Figure 3 Shows a cross-sectional view of releasing a bonded wafer or component from a glass carrier by laser debonding.

[0039] Figure 4a Shows a top view of an intermediate product of device manufacturing after the step of providing three processing carriers (or donor carriers), with each processing carrier (or donor carrier) having a plurality of chips attached thereto.

[0040] Figure 4b Shows a top view of an intermediate product of device manufacturing after attaching a suitable subset of a first plurality of chips, a suitable subset of a second plurality of chips, and a suitable subset of a third plurality of chips to a substrate of the device.

[0041] Figure 5 Shows a cross-sectional view of an intermediate product of device manufacturing after the step of providing a processing carrier having a plurality of chips attached thereto through an adhesive layer.

[0042] Figure 6a Shows a cross-sectional view of an intermediate product of device manufacturing during the step of attaching a first surface of a plurality of chips or a suitable subset of a plurality of chips to a donor carrier through an adhesive layer of the donor carrier.

[0043] Figure 6b Shows a cross-sectional view of an intermediate product of device manufacturing after the step of releasing a plurality of chips or a suitable subset of a plurality of chips from a processing carrier.

[0044] Figure 6cShows a cross-sectional view of an intermediate product in device manufacturing after the step of providing a processing carrier to which a plurality of chips are attached via an adhesive layer.

[0045] Figure 6d Shows a cross-sectional view of an intermediate product in device manufacturing after the step of flipping a plurality of chips or a suitable subset of a plurality of chips via a donor carrier and removing the processing carrier from the plurality of chips or the suitable subset of a plurality of chips.

[0046] Figure 7 Shows a cross-sectional view of an intermediate product in device manufacturing after the step of selectively attaching a subset (e.g., a suitable subset) of a plurality of chips to a transfer carrier and selectively releasing a suitable subset of a plurality of chips from a donor carrier (or a processing carrier).

[0047] Figure 8a Shows a cross-sectional view of an intermediate product in device manufacturing after the step of providing a transfer carrier provided with a structured adhesive layer.

[0048] Figure 8b Shows a cross-sectional view of an intermediate product in device manufacturing after the step of selectively attaching a subset (e.g., a suitable subset) of a plurality of chips to a transfer carrier via a structured adhesive layer.

[0049] Figure 8c Shows a cross-sectional view of an intermediate product in device manufacturing after the step of selectively releasing a subset (e.g., a suitable subset) of a plurality of chips from a donor carrier (or a processing carrier) by laser debonding.

[0050] Figure 9 Shows a cross-sectional view of an intermediate product in device manufacturing after the step of attaching a subset (e.g., a suitable subset) of a plurality of chips to a substrate of a device.

[0051] Figure 10a Shows a cross-sectional view of an intermediate product in device manufacturing after the step of selectively attaching a subset (e.g., a suitable subset) of a plurality of chips to a transfer carrier via a structured adhesive layer.

[0052] Figure 10b Shows a cross-sectional view of an intermediate product in device manufacturing during the step of selectively releasing a subset (e.g., a suitable subset) of a plurality of chips from a donor carrier (or a processing carrier) by laser debonding.

[0053] Figure 10c Shows a cross-sectional view of an intermediate product in device manufacturing after the step of selectively releasing a subset (e.g., a suitable subset) of a plurality of chips from a donor carrier (or a processing carrier) and plasma cleaning the subset (e.g., a suitable subset) of a plurality of chips.

[0054] Figure 10d Shows a cross-sectional view of an intermediate product of device manufacturing after plasma cleaning a subset (e.g., a suitable subset) of a plurality of chips attached to a transfer carrier.

[0055] Figure 11a Shows a cross-sectional view of an intermediate product of device manufacturing after the step of attaching a subset (e.g., a suitable subset) of a first plurality of chips (e.g., µLEDs of a first color (e.g., red)) to a substrate of the device using a first transfer carrier.

[0056] Figure 11b Shows a cross-sectional view of an intermediate product of device manufacturing during the step of releasing a subset (e.g., a suitable subset) of a first plurality of chips from the first transfer carrier by laser debonding or the like.

[0057] Figure 11c Shows a cross-sectional view of an intermediate product of device manufacturing after the step of attaching a subset (e.g., a suitable subset) of a second plurality of chips (e.g., µLEDs of a second color (e.g., green)) to a substrate of the device using a second transfer carrier.

[0058] Figure 11d Shows a cross-sectional view of an intermediate product of device manufacturing during the step of releasing a subset (e.g., a suitable subset) of a second plurality of chips from the second transfer carrier by laser debonding or the like.

[0059] Figure 11e Shows a cross-sectional view of an intermediate product of device manufacturing after the step of attaching a subset (e.g., a suitable subset) of a third plurality of chips (e.g., µLEDs of a third color (e.g., blue)) to a substrate of the device using a third transfer carrier.

[0060] Figure 11f Shows a cross-sectional view of an intermediate product of device manufacturing during the step of releasing a subset (e.g., a suitable subset) of a third plurality of chips from the third transfer carrier by laser debonding or the like. Detailed Description

[0061] In the following description, the same or equivalent elements or elements having the same or equivalent functions are denoted by the same or equivalent reference numerals.

[0062] In the following description, numerous specific details are set forth in order to provide a more thorough explanation of embodiments of the present invention. It will be apparent, however, to one skilled in the art that embodiments of the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the present invention. Additionally, unless otherwise specifically stated, the features of the different embodiments described below may be combined with each other.

[0063] Figure 1 FIG. 100 shows a flowchart of a method 100 for manufacturing a device according to an embodiment of the present invention. The method 100 includes step 102: providing a first carrier, the first carrier attaching a plurality of chips through an adhesive layer of the first carrier, a first surface of the plurality of chips being attached to the first carrier. Additionally, the method 100 includes step 104: selectively attaching a second surface of a subset of the plurality of chips to a transfer carrier through a structured adhesive layer of the transfer layer. Additionally, the method 100 includes step 106: selectively releasing a subset of the plurality of chips from the first carrier by debonding a corresponding portion of the adhesive layer of the first carrier. Additionally, the method 100 includes step 108: attaching the first surface of the subset of the plurality of chips to a substrate of the device. Additionally, the method 100 includes step 110: releasing the subset of the plurality of chips from the transfer carrier by debonding at least a corresponding portion of the structured adhesive layer of the transfer carrier. Thus, at least one of the two operations of selectively releasing a suitable subset of the plurality of chips from the first carrier and releasing the suitable subset of the plurality of chips from the transfer carrier is performed by laser debonding.

[0064] Reference is made below to Figures 2a to 2f describe in further detail an embodiment of the method 100 for manufacturing a device, Figures 2a to 2f FIG. 11 shows a cross-sectional view of a device or an intermediate (or inter-stage) product of device manufacturing obtained after different steps of the method 100 for manufacturing a device.

[0065] Figure 2a FIG. 15 shows a cross-sectional view of an intermediate product of device manufacturing after the step of providing a processing carrier 200 attaching a plurality of chips 210 through an adhesive layer 202. In other words, Figure 2a FIG. 17 shows the chips 210 on the processing carrier 210.

[0066] The adhesive layer 202 may be provided on the surface of the processing carrier 200, wherein a plurality of chips 210 may be attached to the adhesive layer 202.

[0067] For example, as Figure 2aAs shown, the second surfaces 212 of the plurality of chips 210 can be attached to the processing carrier 200 via an adhesive layer 202. Of course, in an embodiment, the first surfaces 214 (opposite the second surfaces 212) of the plurality of chips 210 can also be attached to the processing carrier 200 via the adhesive layer 202.

[0068] The first surface 214 of the chip 210 can be pre-treated, for example, including a metallization layer, and optionally having solder disposed thereon, such as an AuSn layer stack (AU is gold, SN is tin). Alternatively, method 100 can include the step of processing the first surface 214 of the chip 210, such as providing a metallization layer on the first surface 214 of the chip 210 and / or providing solder on the metallization layer. In the latter case, it is advantageous for the second surface 212 of the chip 210 to be attached to the processing carrier 200 via the adhesive layer 202, or a donor carrier can be used to flip the chip 210.

[0069] For example, the processing carrier 200 can be a glass carrier or a glass wafer (i.e., a carrier wafer including glass or composed of glass).

[0070] For example, as Figure 2a shown, the plurality of chips can be micro light-emitting diodes (µLEDs). Of course, in an embodiment, the plurality of chips can also be semiconductor chips, filters, ferromagnets, high-K dielectrics, tilt mirrors, microlenses, laser diodes, or photodetectors.

[0071] Figure 2b A cross-sectional view of an intermediate product of device manufacturing is shown after the step of attaching the first surface 214 of the plurality of chips 210 or a suitable subset of the plurality of chips 210 to the donor carrier 220 via the adhesive layer 222 of the donor carrier 220. In other words, Figure 2b shown is the transfer of the chip 210 to the donor (wafer flip).

[0072] The adhesive layer 222 can be disposed on the surface of the donor carrier 220, where the plurality of chips 210 can be attached to the adhesive layer 222.

[0073] For example, the donor carrier 220 can be a glass carrier or a glass wafer (i.e., a carrier wafer including glass or composed of glass).

[0074] Figure 2c A cross-sectional view of an intermediate product of device manufacturing is shown after the step of releasing the plurality of chips or a suitable subset of the plurality of chips 210 from the processing carrier 200. In other words, Figure 2c shown is the release of the chip carrier (e.g., laser debonding).

[0075] A plurality of chips 210 or a suitable subset of the plurality of chips 210 can be released from the processing carrier 200 by treating at least a corresponding portion of the adhesive layer 202 of the carrier 200 (e.g., a portion of the adhesive layer 202 of the carrier 200 to which the plurality of chips 210 or a suitable subset of the plurality of chips 210 can be attached) to debond.

[0076] For example, a plurality of chips 210 or a suitable subset of the plurality of chips 210 can be released from the processing carrier 200 by treating at least a corresponding portion of the adhesive layer 202 of the carrier 200 to debond (e.g., laser debonding). When using temporary bonding and laser debonding on a glass carrier (e.g., a wafer), in a first step (see Figure 3 ), the adhesive layer can be exposed through the glass carrier by a laser 270 (e.g., an excimer laser (e.g., a 248 nm (KrF) excimer laser)), and the laser 270 scans the entire carrier surface or at least a corresponding portion of the carrier surface, where the laser is focused on the adhesive layer such that the laser energy causes decomposition of the material of the adhesive layer, thereby opening the bonding layer (adhesive layer). In a second step, the glass carrier can be separated, and in a third step, the adhesive residue can be removed.

[0077] Figure 2d A cross-sectional view of an intermediate product of device manufacturing is shown after step 104 of selectively attaching a second surface 212 of a subset (e.g., a suitable subset) of a plurality of chips 210 to a transfer carrier 230 through a structured adhesive layer 232. In other words, Figure 2d A transfer chip bonding is shown.

[0078] The structured adhesive layer 232 can be disposed on the surface of the transfer carrier 230. For example, the structured adhesive layer 232 can be obtained by providing an adhesive layer disposed on the transfer carrier 230 and constructing the adhesive layer of the transfer carrier 230 according to a two-dimensional pattern defining a subset (e.g., a suitable subset) of the plurality of chips 210.

[0079] For example, the transfer carrier 230 can be a glass carrier or a glass wafer (i.e., a carrier wafer including or composed of glass).

[0080] In Figure 2dExemplarily, it is assumed that the transfer carrier 230 is attached to a subset (e.g., a suitable subset) of the plurality of chips 210, and the subset of the plurality of chips 210 is attached to the donor carrier 220. Therefore, it should be noted that depending on whether the chips 210 need to be processed (e.g., a metallization layer must be provided on the first surface 212 of the chips and / or solder must be provided on the metallization layer), and / or depending on the orientation of the chips 210 on the processing carrier 200, the transfer carrier 230 can also be directly attached to a subset (e.g., a suitable subset) of the plurality of chips 210, and the subset of the plurality of chips 210 is attached to the processing carrier 200, that is, in the embodiment, Figure 2b and Figure 2c the steps of ( Figure 2b providing the donor carrier and flip - chip ( Figure 2c ) can be omitted.

[0081] Figure 2e FIG. Figure 2e shows a cross - sectional view of an intermediate product of device manufacturing after step 106 of selectively releasing a subset (e.g., a suitable subset) of the plurality of chips 210 from the donor carrier 220 (or the processing carrier 200).

[0082] A subset (e.g., a suitable subset) of the plurality of chips 210 can be released from the donor carrier 220 (or the processing carrier 200) by debonding a corresponding portion of the adhesive layer of the donor carrier 220 (or the processing carrier 200) (e.g., the portion of the adhesive layer of the donor carrier 220 (or the processing carrier 200) to which the subset (e.g., a suitable subset) of the plurality of chips 210 is attached).

[0083] For example, a subset (e.g., a suitable subset) of the plurality of chips 210 can be released from the donor carrier 220 (or the processing carrier 200) by laser debonding (see Figure 3 ) of the corresponding portion of the adhesive layer of the donor carrier 220 (or the processing carrier 200).

[0084] In addition, method 100 can include the step of cleaning the first surface 214 of a subset (e.g., a suitable subset) of the plurality of chips 210 after releasing the subset (e.g., a suitable subset) of the plurality of chips 210 from the donor carrier 220 (or the processing carrier 200).

[0085] Figure 2f FIG. Figure 2f shows a cross - sectional view of an intermediate product of device manufacturing after step 108 of attaching the first surface 214 of a subset (e.g., a suitable subset) of the plurality of chips 210 to the substrate 250 of the device, and after step 110 of releasing a subset (e.g., a suitable subset) of the plurality of chips 210 from the transfer carrier 230.

[0086] A subset of the plurality of chips 210 (e.g., a proper subset) can be released from the transfer carrier 230 by debonding at least a corresponding portion of the structured adhesive layer 232 of the transfer carrier 230 (e.g., the portion of the structured adhesive layer 232 of the transfer carrier 230 to which the subset of the plurality of chips 210 (e.g., a proper subset) is attached).

[0087] For example, a subset of the plurality of chips 210 (e.g., a proper subset) can be released from the transfer carrier 230 by laser debonding (see Figure 3 ) at least a corresponding portion of the structured adhesive layer 232 of the transfer carrier 230.

[0088] For example, as Figure 2f shown in, method 100 supports attaching different chips (e.g., µLEDs of different colors) to the device substrate 250 in sequence (bonding) and debonding (e.g., laser debonding (laser release)) from the corresponding transfer carriers (as described in further detail with respect to FIG. 4), to attach different chips to the same substrate 250.

[0089] Figure 4a A top view of an intermediate product of device manufacturing is shown after the step of providing three processing carriers (or donor carriers), each processing carrier (or donor carrier) having a plurality of chips attached thereto. Specifically, a first plurality of chips 210_1 can be attached to the first processing carrier (or donor carrier), a second plurality of chips 210_2 can be attached to the second processing carrier (or donor carrier), and a third plurality of chips 210_3 can be attached to the third processing carrier (or donor carrier).

[0090] The first plurality of chips 210_1 can be arranged in a two-dimensional array on the first processing carrier (or donor carrier), wherein a proper subset of the first plurality of chips 210_1 to be transferred and attached to the substrate 250 of the device can be defined by a two-dimensional pattern. Similarly, the second plurality of chips 210_2 can be arranged in a two-dimensional array on the second processing carrier (or donor carrier), wherein a proper subset of the second plurality of chips 210_2 to be transferred and attached to the substrate 250 of the device can be defined by a two-dimensional pattern. The third plurality of chips 210_3 can be arranged in a two-dimensional array on the third processing carrier (or donor carrier), wherein a proper subset of the third plurality of chips 210_3 to be transferred and attached to the substrate 250 of the device can be defined by a two-dimensional pattern.

[0091] As Figure 4a exemplarily shown in, according to the corresponding two-dimensional pattern, chips can be alternately selected at least every other one in the row direction and / or in the column direction from the corresponding two-dimensional chip array to obtain the corresponding proper chip subset.

[0092] Figure 4bShows a top view of an intermediate product of device manufacturing after attaching a suitable subset of a first plurality of chips 210_1, a suitable subset of a second plurality of chips 210_2, and a suitable subset of a third plurality of chips 210_3 to a substrate 250 of the device.

[0093] In Figure 4a and Figure 4b exemplarily, it is assumed that the first plurality of chips 210_1 are µLEDs of a first color (e.g., red), the second plurality of chips 210_2 are µLEDs of a second color (e.g., green), and the third plurality of chips 210_3 are µLEDs of a third color (e.g., blue). Of course, in embodiments, the plurality of chips can also be semiconductor chips, filters, ferromagnets, high-K dielectrics, tilt mirrors, microlenses, laser diodes, or photodetectors.

[0094] It is obvious that the embodiments provide a collective selection (= suitable subset of the corresponding plurality of chips) of chips (e.g., LEDs), as well as a collective transfer and bonding to the substrate 250 of the device. Therefore, there is no need to process single-chip dies.

[0095] Embodiments of different steps of a method 100 for manufacturing a device are further described in detail below.

[0096] Figure 5 Shows a cross-sectional view of an intermediate product of device manufacturing after the step of providing a processing carrier 200 with a plurality of chips 210 attached by an adhesive layer 202. In other words, Figure 5 Shows a chip (e.g., LED) wafer having contacts (e.g., AuSn contacts).

[0097] The first surface of the chip 210 can be pre-treated, for example, including a metallization layer, and optionally having solder, such as an AuSn layer stack, provided thereon. Alternatively, the method 100 can include the step of processing the first surface 214 of the chip 210, such as providing a metallization layer on the first surface 214 of the chip 210 and / or providing solder on the metallization layer.

[0098] For example, the processing carrier 200 can be a glass carrier or a glass wafer (i.e., a carrier wafer including or consisting of glass).

[0099] In embodiments, the method 100 can include the step of providing a chip wafer or a chip substrate (e.g., having a plurality of chips) (e.g., step 1), wherein the wafer / substrate can be (temporarily) adhered (or attached) to the processing wafer 200, and wherein the wafer / substrate can be diced into chips to be bonded.

[0100] In embodiments, optionally, for example, if the target thickness has not been obtained, the wafer / substrate can be thinned.

[0101] In an embodiment, optionally, for example, if the metalide is not yet present, the metalide can be deposited on the wafer / substrate for subsequent bonding.

[0102] For example, for AuSn soldering, an AuSn solder can be used, where a solderable metalide can be deposited on the target substrate.

[0103] For example, for AuSn soldering, an Sn solder can be used, where Au can be deposited on the target substrate such that an AuSn solder is formed during bonding.

[0104] For example, for AuSn soldering, a solderable metalide (e.g., Ti / Pt / Au) can be used, where an AuSn solder can be deposited on the target substrate.

[0105] For example, for general soldering, a solder composition can be used, where a solderable metalide can be deposited on the target substrate.

[0106] For example, for general soldering, a solderable metalide can be used, where the solder composition can be deposited on the target substrate.

[0107] For example, for pressure soldering, Au or nanoporous Au can be used, where Au or nanoporous Au can be deposited on the target substrate.

[0108] In an embodiment, the wafer / substrate can preferably be cut by a dry etching process, laser cutting, or plasma etching.

[0109] Preferably, in an embodiment, an AuSn solder can be used. For example, AuSn soldering can be performed with a stack of Au and Sn at a eutectic temperature of about 280 °C or higher. The layer stack on the (e.g., semiconductor) chip can be adjusted to have a eutectic composition with an excess of Au. The soldering initially produces a eutectic composition with a low melting point of 280 °C, and then the excess gold converts the eutectic composition of the compound into a gold-rich composition that solidifies (transient liquid phase bonding (TLPB)), such that the solder joint requires a longer time at a higher temperature of about 510 °C to remelt. Thus, when bonding a second subset of multiple chips to the substrate of the device, the solder joints of the first bonding process (i.e., the process of bonding the first multiple chips to the substrate of the device) do not melt. When bonding a third multiple chips to the substrate of the device, the bonding joints of the first multiple chips and the second multiple chips no longer melt.

[0110] Figure 6aShows a cross-sectional view of an intermediate product in device manufacturing during the step of attaching the first surface 214 of a plurality of chips 210 or a suitable subset of the plurality of chips 210 to a donor carrier 220 through an adhesive layer 222 of the donor carrier 220.

[0111] Figure 6b Shows a cross-sectional view of an intermediate product in device manufacturing after the step of releasing a plurality of chips 210 or a suitable subset of the plurality of chips 210 from a processing carrier 200.

[0112] Figure 6c Shows a cross-sectional view of an intermediate product in device manufacturing after the step of providing a processing carrier 200 that attaches a plurality of chips 210 through an adhesive layer 202.

[0113] Figure 6d Shows a cross-sectional view of an intermediate product in device manufacturing after the step of flipping a plurality of chips 210 or a suitable subset of the plurality of chips 210 through a donor carrier 220 and removing the processing carrier 200 from the plurality of chips 210 or the suitable subset of the plurality of chips 210.

[0114] As Figures 6a to 6d shown, the donor carrier 220 (e.g., a donor wafer (glass)) can be used to flip a plurality of chips 210 or a suitable subset of the plurality of chips 210, i.e., with the chips face down.

[0115] In an embodiment, method 100 may optionally include the step of re-bonding a wafer / substrate to a second carrier (the donor carrier) 220 with an adhesive layer 222 (e.g., step 2).

[0116] Thus, in an embodiment, in order to provide the front and back of the required chips, the processing carrier can become the donor carrier without re-bonding.

[0117] Furthermore, in an embodiment, optionally, the adhesive layer can be configured as an adhesive pattern, where the adhesive pattern can be significantly smaller than the chip size, and several adhesive patterns can be assigned to one chip (see DE 10 2014 201635 B3).

[0118] Furthermore, in an embodiment, optionally, the carrier (donor) carrier can be diced together with the diced chips disposed thereon into donor sub-blocks.

[0119] Figure 7 Shows a cross-sectional view of an intermediate product in device manufacturing after the step of selectively attaching a subset (e.g., a suitable subset) of a plurality of chips 210 to a transfer carrier 230 and selectively releasing a suitable subset of the plurality of chips 210 from the donor carrier 220 (or the processing carrier 200).

[0120] As Figure 7 shown, in an embodiment, method 100 may include the step of providing transfer chunks (e.g., step 3). Specifically, transfer carrier 230 (e.g., transfer wafer (substrate)) may be provided with a structured component of (temporary) adhesive joints 232.

[0121] For example, for each chip to be transferred, at least one adhesive joint may be provided.

[0122] For example, the adhesive joints may be structured lithographically on the transfer carrier 230 (e.g., transfer wafer / substrate).

[0123] For example, the adhesive joints may be structured by stamping or printing an adhesive.

[0124] For example, the transfer carrier 230 (e.g., transfer wafer / substrate) may be cut into transfer chunks.

[0125] Figure 8a A cross-sectional view of an intermediate product of device manufacturing is shown after the step of providing the transfer carrier 230 provided with the structured adhesive layer 232. In other words, Figure 8a A glass substrate 230 with a structured adhesive layer 232 and a test chip level (glass chip) is shown.

[0126] Figure 8b A cross-sectional view of an intermediate product of device manufacturing is shown after the step of selectively attaching a subset (e.g., a suitable subset) of the plurality of chips 210 to the transfer carrier 230 via the structured adhesive layer 232. In other words, Figure 8b The bonding of the transfer substrate 230 to the donor substrate 220 using precise alignment is shown. For example, the alignment may be performed at the transfer bonding temperature.

[0127] Figure 8c A cross-sectional view of an intermediate product of device manufacturing is shown after step 106 of selectively releasing a subset (e.g., a suitable subset) of the plurality of chips 210 from the donor carrier 220 (or processing carrier 200) by debonding with a laser 270. In other words, Figure 8c The laser release of the transfer carrier 230 and the transfer of the chips (e.g., LEDs) defined by the design of the adhesive 232 of the transfer substrate 230 are shown. Thus, pitch adjustment can be performed for each type of chip (e.g., color).

[0128] As Figures 8a to 8cAs shown, in an embodiment, method 100 may include the step of transferring chip 210 (e.g., a subset (e.g., a suitable subset of multiple chips 210)) from a donor carrier 220 (e.g., a donor wafer / substrate) or from a donor block to a transfer carrier 230 or a transfer block (e.g., step 4).

[0129] For example, the adhesive joint 232 of the transfer block may align with chip 210 on the donor carrier 220 (e.g., a donor wafer / substrate) or the donor block.

[0130] For example, the transfer block may be bonded by pressure and temperature.

[0131] For example, the chip may be debonded from the donor wafer / substrate or from the donor block. For example, the debonding may be performed by a laser beam through the rear of the donor carrier 220 (e.g., a donor wafer / substrate) or the donor block. For this, it must be transparent to the wavelength of the laser, where the laser reduces the adhesion strength of the adhesive layer 222. Alternatively, the debonding may be performed by mechanical separation by applying a force. For this, the adhesive layer 222 on the donor carrier 220 may be configured in small adhesive patterns (see DE10 2014 201 635 B3).

[0132] For example, after chip 210 is debonded, the adhesive residue of chip 210 may be removed.

[0133] Figure 9 A cross-sectional view of an intermediate product of device manufacturing is shown after step 108 of attaching a subset (e.g., a suitable subset) of multiple chips 210 to a substrate 250 of the device. In other words, Figure 9 A substrate wafer / die (e.g., silicon) of a device (e.g., a display) is shown, where selected chips (i.e., a subset (e.g., a suitable subset) of multiple chips 210) are soldered to substrate 250 (e.g., sequentially (e.g., 1x first type of chip (e.g., red LED), 1x second type of chip (e.g., green LED), 1x third type of chip (e.g., blue LED))). For example, the wafer (e.g., among multiple chips 210) may include Au contacts and wires.

[0134] Figure 10a A cross-sectional view of an intermediate product of device manufacturing is shown after step 104 of selectively attaching a subset (e.g., a suitable subset) of multiple chips 210 to a transfer carrier 230 through a structured adhesive layer 232. In other words, Figure 10a A transfer carrier 230 bonded to a chip (e.g., a µLED) on a donor 220 is shown.

[0135] Figure 10bShows a cross-sectional view of an intermediate product of device manufacturing during step 106 of selectively releasing a subset (e.g., a suitable subset) of a plurality of chips 210 from a donor carrier 220 (or a processing carrier 200) by laser debonding. In other words, Figure 10b Shows laser debonding (e.g., KrF) of the donor carrier 220.

[0136] Figure 10c Shows a cross-sectional view of an intermediate product of device manufacturing after step 106 of selectively releasing a subset (e.g., a suitable subset) of a plurality of chips 210 from a donor carrier 220 (or a processing carrier 200) and plasma cleaning the subset (e.g., a suitable subset) of the plurality of chips 210.

[0137] Figure 10d Shows a cross-sectional view of an intermediate product of device manufacturing after plasma cleaning a subset (e.g., a suitable subset) of a plurality of chips 210 attached to a transfer carrier 230.

[0138] As Figures 10a to 10c shown, in an embodiment, method 100 may include the step (e.g., step 5) of transferring the chips 210 from the transfer carrier 230 (e.g., transfer block) to the target substrate 250 and removing the transfer carrier 230 (e.g., transfer block).

[0139] For example, the target substrate 250 may include bondable terminal contacts for pressure welding, solder or welding components, or Au or nanoporous Au.

[0140] For example, the transfer carrier 230 (e.g., transfer block) may align the terminal contacts of the target substrate 250 with the chips.

[0141] For example, the transfer carrier 230 (e.g., transfer block) may bond to individual chips by placing the individual chips on the target substrate and reflowing the solder (reflow soldering) without contact pressure, or by welding or pressure welding with pressure and temperature, etc.

[0142] For example, the transfer carrier 230 (e.g., transfer block) may be debonded from the chips bonded to the target substrate 250. Thus, debonding may be performed by a laser beam through the back of the donor carrier 220 (e.g., donor wafer / substrate) or the donor block. For this purpose, this may be transparent to the wavelength of the laser. The laser reduces the adhesion strength of the adhesive layer. Alternatively, debonding may be performed by mechanical separation by applying a force. For this purpose, the adhesive layer on the donor side may be constructed in small adhesive patterns (see DE 10 2014 201 635 B3).

[0143] For example, after debonding, optionally, the adhesive residue on the chip 210 can be removed.

[0144] In an embodiment, the transfer bonding of the above steps 1 to 5 can be repeated to bond chips from different wafer / substrate sources to the same target substrate, which will become clearer from the following Figures 11a to 11f discussion.

[0145] Figure 11a A cross-sectional view of an intermediate product of device manufacturing is shown after step 108 of attaching a subset (e.g., a suitable subset) of the first plurality of chips 210_1 (e.g., µLEDs of a first color (e.g., red)) to the substrate 250 of the device using the first transfer carrier 230_1. In other words, Figure 11a the bonding of the first transfer carrier 230_1 (e.g., an R-transfer carrier (i.e., having R (i.e., red) µLEDs)) is shown.

[0146] Figure 11b A cross-sectional view of an intermediate product of device manufacturing is shown during step 110 of releasing a subset (e.g., a suitable subset) of the first plurality of chips 210_1 from the first transfer carrier 230_1 by debonding such as by laser 270. In other words, Figure 11b the laser debonding of the first transfer carrier 230_1 (e.g., an R-transfer carrier) is shown.

[0147] Figure 11c A cross-sectional view of an intermediate product of device manufacturing is shown after step 108 of attaching a subset (e.g., a suitable subset) of the second plurality of chips 210_2 (e.g., µLEDs of a second color (e.g., green)) to the substrate 250 of the device using the second transfer carrier 230_2. In other words, Figure 11c the bonding of the second transfer carrier 230_2 (e.g., a G-transfer carrier (i.e., having G (i.e., green) µLEDs)) is shown.

[0148] Figure 11d A cross-sectional view of an intermediate product of device manufacturing is shown during step 110 of releasing a subset (e.g., a suitable subset) of the second plurality of chips 210_2 from the second transfer carrier 230_2 by debonding such as by laser 270. In other words, Figure 11d the laser debonding of the second transfer carrier 230_2 (e.g., a G-transfer carrier) is shown.

[0149] Figure 11e A cross-sectional view of an intermediate product of device manufacturing is shown after step 108 of attaching a subset (e.g., a suitable subset) of the third plurality of chips 210_3 (e.g., µLEDs of a third color (e.g., blue)) to the substrate 250 of the device using the third transfer carrier 230_3. In other words,Figure 11e Shows the bonding of the third transfer carrier 230_3 (e.g., a B-transfer carrier (i.e., having B (i.e., blue) µLEDs)).

[0150] Figure 11f Shows a cross-sectional view of an intermediate product of device manufacturing during step 110 of releasing a subset (e.g., a suitable subset) of the third plurality of chips 210_3 from the third transfer carrier 230_3, such as by laser 270 debonding or the like. In other words, Figure 11f Shows the laser debonding of the third transfer 230_3 (e.g., a B-transfer carrier).

[0151] In an embodiment, the chip can be an LED, specifically a mini-LED or a micro-LED (with an edge length below 100 µm). The target substrate 250 can be a display or a part of a display (e.g., a glass substrate or a flexible circuit carrier) or a semiconductor chip for active control of the LED. Additionally, several LED chips or wafers having different wavelengths (red, green, and blue) can be bonded offset from each other in order to produce RGB units and form a color display.

[0152] In an embodiment, the chip can be a VCSEL (i.e., vertical-cavity surface-emitting laser) arranged in a one-dimensional or two-dimensional array on a circuit carrier. Here, different wavelengths can be arranged side by side in order to transmit signals in parallel in the same waveguide or the same optical fiber and, in this way, increase the bandwidth.

[0153] Advantages provided by the embodiment are that no specially designed components (e.g., no detachable / fractable holding rods) are required and no expensive tools are required. Instead, standard equipment can be used, such as lithography and microcurrent, wafer bonders, flip-chip bonders, lasers for debonding, and plasma cleaning.

[0154] Advantages provided by the embodiment are that, compared to bonding processes or traditional soldering of AuSn compounds, the AuSn solder is very strong, has low thermal resistance (good cooling can be achieved), is corrosion-resistant, is resistant to electromigration, and has a high melting point.

[0155] Although some aspects are described in the context of a device, it is clear that these aspects also represent a description of a corresponding method, where a block or device corresponds to a method step or a feature of a method step. Similarly, aspects described in the context of method steps also represent a description of a corresponding block or item or feature of a corresponding device. Some or all of the method steps can be performed by (or using) hardware devices (such as a microprocessor, a programmable computer, or an electronic circuit). In some embodiments, one or more of the most important method steps can be performed by such a device.

[0156] According to some implementation requirements, embodiments of the present invention may provide a hardware or software implementation. This implementation can be executed using a digital storage medium (such as a floppy disk, DVD, Blu-ray, CD, ROM, PROM, EPROM, EEPROM, or flash memory), which stores electronically readable control signals and cooperates (or is capable of cooperating) with a programmable computer system, so that the corresponding method can be executed. Therefore, the digital storage medium can be computer-readable.

[0157] Some embodiments according to the present invention include a data carrier having electronically readable control signals that can cooperate with a programmable computer system, so that one of the methods described herein can be executed.

[0158] Generally, embodiments of the present invention can be implemented as a computer program product having program code that, when the computer program product runs on a computer, can be used to execute one of the methods described above. For example, the program code can be stored in a machine-readable carrier.

[0159] Other embodiments include a computer program stored in a machine-readable carrier for executing one of the methods described herein.

[0160] Therefore, in other words, an embodiment of the method of the present invention is a computer program having program code that, when the computer program runs on a computer, can execute one of the methods described herein.

[0161] Therefore, another embodiment of the method of the present invention is a data carrier (or digital storage medium, or computer-readable medium), which includes a computer program recorded therein for executing one of the methods described herein. The data carrier, digital storage medium, or recording medium is generally tangible and / or non-transitory.

[0162] Therefore, another embodiment of the method of the present invention is a data stream or signal sequence representing a computer program for executing one of the methods described herein. For example, the data stream or signal sequence can be transmitted through a data communication connection (such as through the Internet).

[0163] Another embodiment includes a processing module, such as a computer or a programmable logic device, for executing one of the methods described herein.

[0164] Another embodiment includes a computer in which a computer program for executing one of the methods described herein is installed.

[0165] Another embodiment according to the present invention includes a device or system for transmitting a computer program (e.g., electronic or optical) for performing one of the methods described herein to a receiver. For example, the receiver can be a computer, a mobile device, a memory device, etc. For example, the device or system can include a file server for transmitting the computer program to the receiver.

[0166] In some embodiments, a programmable logic device (e.g., a field programmable gate array) can be used to perform some or all of the functions of the methods described herein. In some embodiments, a field programmable gate array can cooperate with a microprocessor to perform one of the methods described herein. Generally, these methods are preferably performed by any hardware device.

[0167] The devices described herein can be implemented using a hardware device, or a computer, or a combination of a hardware device and a computer.

[0168] The devices described herein or any components of the devices described herein can be implemented at least in part by hardware and / or software.

[0169] The methods described herein can be performed using a hardware device, or a computer, or a combination of a hardware device and a computer.

[0170] The methods described herein or any components of the devices described herein can be performed at least in part by hardware and / or software.

[0171] The embodiments described above are merely for illustrative purposes of the principles of the present invention. It should be understood that modifications and changes to the arrangements and details described herein will be apparent to others skilled in the art. Therefore, the scope of the present invention is limited only by the scope of the patent claims, and not by the specific details presented in the description and explanation of the embodiments herein.

[0172] Literature

[0173] [1] Market and Technology Report - MicroLED Displays, 2017, Report by Yole Development.

Claims

1. A method for manufacturing a device, characterized in that, The method includes: providing a first carrier, wherein a plurality of chips are attached to the first carrier through an adhesive layer of the first carrier, and a first surface of the plurality of chips is attached to the first carrier; selectively attaching a second surface of a subset of the plurality of chips to a transfer carrier through a structured adhesive layer of the transfer carrier; selectively releasing the subset of the plurality of chips from the first carrier by debonding a corresponding portion of the adhesive layer of the first carrier; attaching the first surface of the subset of the plurality of chips to a substrate of the device; releasing the subset of the plurality of chips from the transfer carrier by debonding at least a corresponding portion of the structured adhesive layer of the transfer carrier; wherein at least one of the operations of selectively releasing the subset of the plurality of chips from the first carrier and releasing the subset of the plurality of chips from the transfer carrier is performed by laser debonding; the first carrier is a donor carrier, providing the donor carrier includes: providing a processing carrier, wherein the plurality of chips are attached to the processing carrier through an adhesive layer of the processing carrier, and the second surface of the plurality of chips is attached to the processing carrier; attaching the first surface of the plurality of chips or a subset of the plurality of chips to the donor carrier through the adhesive layer of the donor carrier; releasing the plurality of chips or the subset of the plurality of chips from the processing carrier by laser debonding at least a corresponding portion of the adhesive layer of the processing carrier.

2. The method according to claim 1, wherein the plurality of chips is a two-dimensional chip array.

3. The method according to claim 2, wherein the subset of the plurality of chips is defined by a two-dimensional pattern.

4. The method according to claim 3, wherein according to the two-dimensional pattern, from the two-dimensional chip array, chips are alternately selected in the row direction and / or in the column direction at least every other one or every other two to obtain the subset of the chips.

5. The method according to claim 3 or 4, wherein the method further includes: providing an adhesive layer provided on the transfer carrier for the transfer carrier; constructing the adhesive layer of the transfer carrier according to the two-dimensional pattern defining the subset of the chips to obtain the structured adhesive layer of the transfer carrier.

6. The method according to any one of claims 1 to 4, wherein attaching the first surface of the subset of the plurality of chips to the substrate of the device includes bonding the subset of the plurality of chips to the substrate of the device.

7. The method according to any one of claims 1 to 4, wherein the first surface of the plurality of chips includes a metallization layer.

8. The method according to any one of claims 1 to 4, wherein the first surface of the subset of the plurality of chips includes a metallization layer, and an AuSn solder layer stack is provided on the metallization layer. Attaching the first surfaces of the subset of the plurality of chips to the substrate of the device includes soldering the subset of the plurality of chips to the substrate of the device at a temperature of at least 280 °C.

9. The method according to any one of claims 1 to 4, characterized in that Providing the donor carrier further includes: Providing a metallization layer on the first surfaces of the plurality of chips before attaching the first surfaces of the subset of the plurality of chips to the donor carrier; or Providing a metallization layer on the first surfaces of the plurality of chips before attaching the first surfaces of the subset of the plurality of chips to the donor carrier, and providing a stack of AuSn solder layers on the metallization layer.

10. The method according to any one of claims 1 to 4, characterized in that Providing the processing carrier includes: Providing a first substrate on which the plurality of chips are formed; Attaching the first substrate having the plurality of chips to the processing carrier through an adhesive layer, with the plurality of chips facing the processing carrier; Separating the plurality of chips from the first substrate.

11. The method according to any one of claims 1 to 4, characterized in that The plurality of chips are a first plurality of chips, The method further includes: Providing a second carrier to which a second plurality of chips are attached through an adhesive layer of the second carrier, with the first surfaces of the second plurality of chips attached to the second carrier; Selectively attaching the second surfaces of a subset of the second plurality of chips to the second transfer carrier through a structured adhesive layer of the second transfer carrier; Selectively releasing the subset of the second plurality of chips from the second carrier by laser debonding a corresponding portion of the adhesive layer of the second carrier; Attaching the first surfaces of the subset of the second plurality of chips to the substrate of the device; Releasing the subset of the second plurality of chips from the second transfer carrier by laser debonding at least a corresponding portion of the structured adhesive layer of the second transfer carrier.

12. The method according to claim 11, characterized in that The subset of the first plurality of chips and the subset of the second plurality of chips are arranged on the substrate of the device in an interleaved manner relative to each other.

13. The method according to claim 11, characterized in that The first surfaces of the subset of the first plurality of chips and the first surfaces of the subset of the second plurality of chips include a metallization layer having a stack of AuSn solder layers provided thereon, Attaching the first surfaces of the subset of the first plurality of chips to the substrate of the device includes soldering a first subset of the first plurality of chips to the substrate of the device at a temperature between 280 °C and 350 °C, Attaching the first surfaces of the subset of the second plurality of chips to the substrate of the device includes soldering a second subset of the first plurality of chips to the substrate of the device at a temperature between 280 °C and 350 °C, Among them, before attaching the first surface of the subset of the second plurality of chips to the substrate of the device, the first plurality of chips are soldered to the substrate of the device.

14. The method according to any one of claims 1 to 4, wherein the chip is at least one of a semiconductor chip, a filter, a ferromagnet, a high-K dielectric, a tilt mirror, a microlens, a laser diode, a photodetector, and a light-emitting diode.

15. The method according to any one of claims 1 to 4, wherein the device is a display or a part of a display, or the device is an optical module or a part of an optical module, or the device is a power regulator or a switch.

16. The method according to claim 8, wherein Soldering the subset of the plurality of chips to the substrate of the device at a temperature of at least 280 °C includes: soldering the subset of the plurality of chips to the substrate of the device at a temperature between 280 °C and 500 °C.

17. The method according to claim 8, characterized in that, Soldering the subset of the plurality of chips to the substrate of the device at a temperature of at least 280 °C includes: soldering the subset of the plurality of chips to the substrate of the device at a temperature between 280 °C and 350 °C.

18. The method according to any one of claims 1 to 4, characterized in that, At least one of the first carrier, the processing carrier, the donor carrier, and the transfer carrier is a glass carrier.

19. The method according to claim 11, wherein At least one of the second carrier and the second transfer carrier is a glass carrier.

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