An intelligent cockpit domain controller based on a CPU hard isolation system design method

Abstract

The application discloses an intelligent cockpit domain controller based on a CPU hard isolation system design method, and relates to the technical field of intelligent cockpit domain controllers.

Description

Technical Field

[0001] This invention relates to the field of intelligent cockpits, and more particularly to an intelligent cockpit domain controller based on a CPU hard isolation system design method. Background Technology

[0002] With the development of vehicle technology, the functions equipped in vehicles have become increasingly rich, gradually extending from traditional anti-lock braking systems, four-wheel drive systems, electronically controlled automatic transmissions, active suspension systems, and airbag systems to vehicle safety, networking, entertainment, and sensor control systems. This has led to a significant increase in the number of ECUs (Electronic Control Units). This surge in ECU numbers has also brought significant challenges to traditional distributed electronic and electrical architectures. Traditional distributed architectures are gradually evolving towards centralized architectures, thus giving rise to intelligent cockpit domain controllers. However, existing intelligent cockpit domain controllers on the market primarily employ Hypervisor virtualization technology, which suffers from high development complexity and questionable stability and security.

[0003] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0004] The main objective of this invention is to provide a smart cockpit domain controller method based on a CPU hard isolation system design approach, aiming to solve the technical problems of high development complexity and questionable stability and security of existing smart cockpit domain controllers based on Hypervisor virtualization technology.

[0005] To achieve the above objectives, the present invention provides an intelligent cockpit domain controller based on a CPU hard isolation system design method. The intelligent cockpit domain controller based on the CPU hard isolation system design method employs a multi-core processor, which includes:

[0006] Two or more processing cores, wherein the processing cores are physically isolated into a first isolated core and a second isolated core, the first isolated core is equipped with a real-time operating system for processing preset real-time tasks, and the second isolated core is equipped with a non-real-time operating system for processing preset non-real-time tasks.

[0007] Shared memory is used to connect the first isolated core and the second isolated core to enable inter-core communication.

[0008] Optionally, the first isolation core further includes a first storage unit, and the second isolation core further includes a second storage unit.

[0009] Optionally, the first isolated core is configured to acquire first to-be-interacted data, trigger a first interrupt signal, and copy the first to-be-interacted data into the shared memory; when data sending ends or data is about to overflow, a second interrupt signal is triggered, and the first to-be-interacted data is multiple frames of data of a preset byte.

[0010] The second isolated core is configured to activate a data processing process in response to the first interrupt signal, read the first to-be-interacted data in the shared memory in response to the second interrupt signal, and after reading is completed, generate and store first feedback information into the shared memory, so that the first isolated core reads the first feedback information.

[0011] Optionally, after the first isolated core reads the first feedback information, if the first feedback information is read successfully, the first interrupt signal is triggered again when the first to-be-interacted data is not completely sent, and the unsent data in the first to-be-interacted data is copied into the shared memory, and the second interrupt signal is triggered, so that the second isolated core reads the unsent data.

[0012] Optionally, the second isolated core is configured to acquire second to-be-interacted data, copy the second to-be-interacted data into the shared memory, and trigger a third interrupt signal, and the second to-be-interacted data is single frame data of a preset byte.

[0013] The first isolated core is configured to read the second to-be-interacted data in the shared memory in response to the third interrupt signal, and after reading is completed, generate and store second feedback information into the shared memory, so that the second isolated core reads the second feedback information.

[0014] The second isolated core is further configured to determine whether the second to-be-interacted data is read successfully according to the second feedback information; if the second to-be-interacted data is read successfully, the next frame of data is sent; if the second to-be-interacted data is not read successfully, the second to-be-interacted data is sent again until the second feedback information is read successfully.

[0015] Optionally, the intelligent cockpit domain controller is connected with a vehicle instrument system and a vehicle central control system, respectively.

[0016] The intelligent cockpit domain controller is configured to control the vehicle instrument system to run based on a real-time operating system on the first isolated core.

[0017] The intelligent cockpit domain controller is configured to control the vehicle central control system to run based on a non-real-time operating system on the second isolated core.

[0018] Optionally, the vehicle instrument system includes an instrument screen, a HUD, and a vehicle-mounted air conditioner, and the vehicle central control system includes a central control screen, a copilot screen, and a rear entertainment screen.

[0019] The output end of the intelligent cockpit domain controller is electrically connected with the input end of an instrument screen, a HUD and a vehicle air conditioner respectively.

[0020] The output end of the cockpit domain controller is electrically connected with the input end of a central control screen, a co-pilot screen and a rear entertainment screen.

[0021] Optionally, the real-time operating system is a QNX system.

[0022] Optionally, the non-real-time operating system is an Android system or a Linux system.

[0023] To achieve the above-mentioned purpose, the application further provides a vehicle comprising the intelligent cockpit domain controller based on the CPU hard isolation system design method.

[0024] The intelligent cockpit domain controller based on the CPU hard isolation system design method comprises a multi-core processor, wherein the multi-core processor comprises two or more processing cores, and the processing cores are isolated into a first isolated core and a second isolated core through a physical isolation manner; the first isolated core is loaded with a real-time operating system and is used for processing real-time tasks of the vehicle; and the second isolated core is loaded with a non-real-time operating system and is used for processing non-real-time tasks of the vehicle. BRIEF DESCRIPTION OF DRAWINGS

[0025] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present application and, together with the specification, serve to explain the principles of the application. In order to more clearly illustrate the technical solutions of the embodiments of the application, the drawings needed to be used in the description of the embodiments will be briefly introduced as follows. Obviously, for those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative labor.

[0026] Figure 1 A schematic diagram of the multi-core processor adopted by the intelligent cockpit domain controller involved in the embodiments of the application;

[0027] Figure 2 The control schematic diagram of the intelligent cockpit domain controller, the vehicle instrument system and the vehicle central control system involved in the embodiment of the present application is shown in FIG. 1.

[0028] Figure 3 The connection schematic diagram of the intelligent cockpit domain controller, the vehicle instrument system and the vehicle central control system involved in the embodiment of the present application is shown in FIG. 2.

[0029] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. The above-mentioned drawings have shown the specific embodiments of the present application, and more detailed description will be given hereinafter. These drawings and the written description are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0030] The exemplary embodiments will be described in detail herein with reference to the accompanying drawings. Unless otherwise specified, the same or similar components in different drawings are denoted by the same reference numerals, and repeated description thereof will be omitted. The embodiments described in the following exemplary embodiments do not represent all the embodiments consistent with the present application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the present application, as detailed in the appended claims.

[0031] It should be noted that, in this document, the terms "comprises", "comprising", or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article, or apparatus that comprises a list of elements does not only include those elements, but also includes other elements not expressly listed, or further includes elements inherent in such a process, method, article, or apparatus. Without more limitations, the element defined by the phrase "comprises a" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element, and in addition, components, features, elements with the same name in different embodiments of the present application can have the same meaning or different meanings, and the specific meaning thereof should be determined in the explanation of the specific embodiment or further in combination with the context of the specific embodiment.

[0032] It should be understood that, although terms, first, second, third, etc. can be used herein to describe various information, these terms are not intended to denote a particular order or hierarchy among the information. These terms are used only to distinguish one category of information from another category of information. For example, a first information can be termed a second information, and similarly, a second information can be termed a first information without departing from the scope hereof. The word "if' as used herein, depending on the context in which it is used, can be interpreted to mean "when" or "upon" or "in response to determining" or "in response to monitoring." Also, the word "comprise" or "comprising" as used herein, can be interpreted as meaning "comprising but not limited to." It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, components, items, and / or groups but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, items, and / or groups thereof. As used herein, the terms "or," "and / or," "and," "at least one of," and the like are to be interpreted as inclusive, unless the context of their use indicates otherwise. For example, "A, B, or C" or "A, B, and / or C" or "at least one of A, B, or C" can be interpreted to mean "A; B; C; A and B; A and C; B and C; A, B, and C," or any combination thereof. Similarly, "A, B, or C" or "A, B, and / or C" or "at least one of A, B, or C" can be interpreted to mean "A; B; C; A and B; A and C; B and C; A, B, and C," or any combination thereof. Only when the context of their use indicates otherwise is the definition of these terms to be interpreted as exclusive.

[0033] It should be understood that, although various steps in the flowcharts of the embodiments of the present application are shown in a sequential order, these steps are not necessarily performed in the order shown. Unless explicitly stated, the steps of the embodiments of the present application are not necessarily performed in the order shown. Moreover, at least some of the steps can include multiple sub-steps or multiple stages, which are not necessarily performed in the same time period, but can be performed in different time periods, and the order of the execution of these sub-steps or stages is not necessarily sequential, but can be round-robin or alternating with other steps or sub-steps or stages of other steps.

[0034] The word "if' as used herein, depending on the context in which it is used, can be interpreted to mean "when" or "upon" or "in response to determining" or "in response to monitoring." Similarly, the phrase "if determined" or "if monitoring (a stated condition or event)" can be interpreted to mean "when determined" or "in response to determining" or "when monitoring (a stated condition or event)" or "in response to monitoring (a stated condition or event)," depending on the context of their use.

[0035] It should be noted that in the present document, step codes such as S100, S0, etc. are adopted, the purpose is to more clearly and briefly express the corresponding content, and does not constitute a substantial limitation on the order, and those skilled in the art may perform S0 first and S100 later in specific implementation, etc. But these should be within the protection scope of the present application.

[0036] It should be understood that the specific embodiments described herein are merely intended to explain the present application and not to limit the present application.

[0037] Referring to Figure 1 , Figure 1 A schematic diagram of a multi-core processor adopted by an intelligent cockpit domain controller involved in an embodiment of the present application.

[0038] In an embodiment of the present application, an intelligent cockpit domain controller based on a CPU hard isolation system design method is provided, the intelligent cockpit domain controller based on the CPU hard isolation system design method adopts a multi-core processor, and the multi-core processor comprises:

[0039] Two or more processing cores, the processing cores are isolated into a first isolated core and a second isolated core by a physical isolation manner, the first isolated core carries a real-time operating system and is used for processing real-time tasks of a vehicle, and the second isolated core carries a non-real-time operating system and is used for processing non-real-time tasks of the vehicle;

[0040] A shared memory is used to connect the first isolated core and the second isolated core to realize inter-core communication.

[0041] Specifically, the intelligent cockpit domain controller based on the CPU hard isolation system design method adopts a multi-core processor. The processing cores in the multi-core processor can be isolated into a first isolated core and a second isolated core through physical isolation. The first isolated core can include one or more processing cores, and of course can also include other independent storage units, image processing units, communication interfaces and other peripheral units that are not shared with the second isolated core. The first isolated core runs a real-time operating system, which is used to process real-time tasks of the vehicle, such as connecting the vehicle instrument system, so as to control the operation of the vehicle instrument system through the real-time operating system to realize real-time control tasks of the vehicle. The real-time operating system is an operating system of the RTOS (Real Time Operating System, Real-Time Operating System) type, such as FreeRTOS, QNX, and various real-time operating systems developed by other manufacturers. Similarly, the second isolated core can also include one or more processing cores, and of course can also include other independent storage units, image processing units, communication interfaces and other peripheral units that are not shared with the first isolated core. The second isolated core runs a non-real-time operating system, which is used to process non-real-time tasks of the vehicle, such as connecting the vehicle central control system, so as to control the operation of the vehicle central control system through the non-real-time operating system to realize the entertainment function of the user. The non-real-time operating system is an operating system such as Android, Linux, Windows, etc. The multi-core processor can also include a shared memory for connecting the first isolated core and the second isolated core to realize inter-core communication. Since the first isolated core and the second isolated core are isolated by physical isolation, they cannot interact with each other. Therefore, the first isolated core and the second isolated core can interact with each other through the shared memory, so as to realize inter-core communication between the first isolated core and the second isolated core. Further, the shared memory is encapsulated in the multi-core processor and can be accessed by MMU (Memory Management Unit, Memory Management Unit) to limit access of external devices to the shared memory, so as to ensure that the shared memory is not read and written by illegal external devices, thereby ensuring the security of communication between the first isolated core and the second isolated core.

[0042] The embodiment provides an intelligent cockpit domain controller based on a CPU hard isolation system design method. The intelligent cockpit domain controller adopts a multi-core processor. The multi-core processor comprises two or more processing cores. The processing cores are isolated into a first isolated core and a second isolated core in a physical isolation manner. The first isolated core is loaded with a real-time operating system and is used for processing real-time tasks of a vehicle. The second isolated core is loaded with a non-real-time operating system and is used for processing non-real-time tasks of the vehicle. The multi-core processor is physically separated into the first isolated core and the second isolated core, so that the real-time operating system can be run on the first isolated core to ensure the real-time performance of real-time operation tasks of the vehicle, and the non-real-time operating system can be run on the second isolated core to ensure the compatibility and expansibility of vehicle entertainment functions. The independence of the two systems is ensured in the physical isolation manner, and the inter-core communication of the first isolated core and the second isolated core is ensured through shared memory. Therefore, the development difficulty of the intelligent cockpit domain controller is reduced, and the stability and safety are ensured.

[0043] Further, the first isolated core further comprises a first storage unit, and the second isolated core further comprises a second storage unit.

[0044] Specifically, the first isolated core and the second isolated core have independent storage units, so that the first isolated core and the second isolated core can be better isolated, and the independence of the first isolated core and the second isolated core is ensured. Compared with the case that the first isolated core and the second isolated core adopt the same storage unit, higher stability and safety can be achieved.

[0045] Further, the intelligent cockpit domain controller based on the CPU hard isolation system design method further comprises:

[0046] The first isolated core is configured to acquire first to-be-interacted data, trigger a first interrupt signal, and copy the first to-be-interacted data to the shared memory. When data sending ends or data is about to overflow, a second interrupt signal is triggered. The first to-be-interacted data is multi-frame data of a preset byte.

[0047] The second isolated core is configured to respond to the first interrupt signal, activate a data processing process, and respond to the second interrupt signal, read the first to-be-interacted data in the shared memory, and after reading is completed, generate and store first feedback information to the shared memory, so that the first isolated core reads the first feedback information.

[0048] Specifically, the first to-be-interacted data is data expected to be sent by the first isolated core to the second isolated core. In addition, in the embodiment, the sending end is the first isolated core carrying a real-time operating system, the receiving end is the second isolated core carrying a non-real-time operating system, and asynchronous transmission is required, so the first to-be-interacted data is a plurality of frames of data of a preset byte, for example, the preset byte is 10 bytes, and each frame of data includes a message header and a message body, wherein the message header is 2 bytes. Since most of the messages transmitted by the real-time operating system are protocol data of a CAN (Controller Area Network) bus, and the maximum length of the CAN bus transmission is 8 bytes, the length of each frame of message can be set to 10 bytes. The way of triggering an interrupt signal can be that the sending end writes an interrupt number into an interrupt register and specifies the receiving end, so as to generate an interrupt signal to make the target receiving end receive the interrupt signal. After the first isolated core obtains the first to-be-interacted data, the first isolated core triggers a first interrupt signal to make the second isolated core respond to the first interrupt signal and activate the process of data processing. Then the first isolated core copies the first to-be-interacted data to the shared memory, and when the data transmission ends or is about to overflow, a second interrupt signal is triggered. Then the second isolated core responds to the second interrupt signal to read the first to-be-interacted data in the shared memory, and after reading is completed, the second isolated core generates and stores first feedback information to the shared memory, so that the first isolated core reads the first feedback information. In the embodiment, the communication between the isolated first isolated core and the second isolated core is realized by the interrupt mechanism and the shared memory.

[0049] Further, the intelligent cockpit domain controller based on the CPU hard isolation system design method further includes:

[0050] The first isolated core, after reading the first feedback information, if the first feedback information is read successfully, triggers the first interrupt signal again when the first to-be-interacted data is not completely sent, copies the unsent data in the first to-be-interacted data to the shared memory, triggers the second interrupt signal, and makes the second isolated core read the unsent data.

[0051] Specifically, after the first isolated core reads the first feedback information in the shared memory, if the first feedback information is read successfully, the first isolated core determines whether the first to-be-interacted data is completely sent. If the first to-be-interacted data is completely sent, the sending is ended. When the first to-be-interacted data is not completely sent, the first isolated core triggers the first interrupt signal again, copies the unsent data in the first to-be-interacted data to the shared memory, triggers the second interrupt signal, and makes the second isolated core read the unsent data. If the first feedback information is not read successfully, the first isolated core re-sends the first to-be-interacted data.

[0052] Furthermore, the intelligent cockpit domain controller based on the CPU hard isolation system design method also includes:

[0053] The second isolation core is used to acquire the second data to be interacted with, copy the second data to be interacted with to the shared memory, and trigger the third interrupt signal. The second data to be interacted with is a single frame of data of preset bytes.

[0054] The first isolation core is used to respond to the third interrupt signal and read the second data to be interacted in the shared memory. After reading, it generates and stores the second feedback information in the shared memory so that the second isolation core can read the second feedback information.

[0055] The second isolation core is also used to determine whether the second data to be interacted has been successfully read based on the second feedback information; if it has been successfully read, the next frame of data is sent; if it has not been successfully read, the second data to be interacted is sent again until the second feedback information is received indicating that it has been successfully read.

[0056] Specifically, the first data to be interacted is the data that the second isolation core expects to send to the first isolation core. Furthermore, in this embodiment, the sending end is the second isolation core equipped with a non-real-time operating system, and the receiving end is the first isolation core equipped with a real-time operating system, enabling synchronous transmission. Therefore, the second data to be interacted is a single frame of data in preset bytes. After acquiring the second data to be interacted, the second isolation core copies the second data to be interacted to the shared memory and triggers a third interrupt signal. The first isolation core responds to the third interrupt signal and reads the second data to be interacted from the shared memory. After reading, it generates and stores second feedback information in the shared memory, so that the second isolation core can read the second feedback information. Based on the second feedback information, the second isolation core determines whether the second data to be interacted has been successfully read. If successfully read, it sends the next frame of data; if not successfully read, it resends the second data to be interacted until the second feedback information is received, indicating successful reading.

[0057] Furthermore, further still, Figure 2 This is a control diagram of the intelligent cockpit domain controller, vehicle instrument system, and vehicle central control system involved in the embodiments of the present invention.

[0058] The intelligent cockpit domain controller is connected to the vehicle instrument system and the vehicle central control system, respectively.

[0059] The intelligent cockpit domain controller is used to control the operation of the vehicle's instrument system based on a real-time operating system on the first isolated core;

[0060] The intelligent cockpit domain controller is used for controlling the operation of the vehicle center system based on a non-real-time operating system on a second isolated core.

[0061] Specifically, in the embodiment, the real-time operating system is a QNX system, and the non-real-time operating system is an Android system or a Linux system. Thus, the intelligent cockpit domain controller controls the operation of the vehicle instrument system based on the real-time operating system (QNX system) on the first isolated core, thereby ensuring the stability and safety of the operation of the vehicle instrument system. The intelligent cockpit domain controller controls the operation of the vehicle center system based on the non-real-time operating system (Android system or Linux system) on the second isolated core, thereby ensuring the compatibility and expansibility of the vehicle center system to improve the user experience of the vehicle entertainment function. Meanwhile, the real-time operating system and the non-real-time operating system are respectively operated on the physically isolated first isolated core and the second isolated core, thereby ensuring the independent operation of the two systems without interference, and being more stable and reliable compared with the virtual machine form.

[0062] Further, referring to Figure 3 , Figure 3 is a connection diagram of the intelligent cockpit domain controller, the vehicle instrument system and the vehicle center system according to the embodiment of the present application.

[0063] In the embodiment, the intelligent cockpit controller further comprises:

[0064] The vehicle instrument system comprises an instrument screen, a HUD and a vehicle air conditioner, and the vehicle center system comprises a center screen, a co-pilot screen and a rear entertainment screen.

[0065] The output end of the intelligent cockpit domain controller is electrically connected with the input end of the instrument screen, the HUD and the vehicle air conditioner, respectively.

[0066] The output end of the cockpit domain controller is electrically connected with the input end of the center screen, the co-pilot screen and the rear entertainment screen, respectively.

[0067] Specifically, the vehicle instrument system includes an instrument screen, a HUD (Head Up Display), a vehicle air conditioner, and of course, the vehicle instrument system can also include a face recognition controller, a driving recorder controller, and the like. The vehicle central control system includes a central control screen, a co-driver screen, and a rear entertainment screen. The output end of the intelligent cockpit domain controller can be electrically connected to the input end of the instrument screen and the HUD through a video transmission line such as an LVDS (Low Voltage Differential Signaling) transmission line, and electrically connected to the input end of the vehicle air conditioner through a data transmission line. The output end of the cockpit domain controller can also be electrically connected to the input end of the central control screen, the co-driver screen, and the rear entertainment screen through a video transmission line. In this embodiment, the intelligent cockpit domain controller is electrically connected to each device of the vehicle instrument system and the vehicle central control system, so as to realize the control output and image output of each device.

[0068] It can be understood that the above scenarios are only examples and do not constitute a limitation on the application scenarios of the technical solutions provided by the embodiments of the present application. The technical solutions provided by the embodiments of the present application are also applicable to other scenarios. For example, those skilled in the art can know that, with the evolution of system architecture and the emergence of new business scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0069] The above sequence numbers of the embodiments of the present application are only for description, and do not represent the advantages and disadvantages of the embodiments.

[0070] The steps in the method of the embodiments of the present application can be adjusted, combined, and deleted according to actual needs.

[0071] The units in the device of the embodiments of the present application can be combined, divided, and deleted according to actual needs.

[0072] In the present application, for the same or similar term concept, technical solution and / or application scenario description, generally only the first time is described in detail, and for the sake of brevity, the repeated description is not repeated, and for the understanding of the technical solutions of the present application, the same or similar term concept, technical solution and / or application scenario description which is not described in detail can be referred to the previous related description.

[0073] In the present application, the description of each embodiment has its own emphasis, and the part not described or recorded in a certain embodiment can be referred to the related description of other embodiments.

[0074] The technical features of the technical solutions of the present application can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above-mentioned embodiments are not described, however, as long as the combinations of the technical features do not exist contradictory, it should be considered that the combinations are within the scope of the present application.

[0075] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be realized by means of software and the necessary general hardware platform, of course, they can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as a ROM / RAM, a magnetic disk, an optical disk) as described above, and includes a plurality of instructions for causing a terminal device (which can be a mobile phone, a computer, a server, a controlled terminal, or a network device, etc.) to execute the method of each embodiment of the present application.

[0076] In the above embodiments, all or part can be realized by software, hardware, firmware or any combination thereof. When realized by software, all or part can be realized in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions according to the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another, for example, the computer instructions can be transferred from one website, computer, server or data center to another through wired (such as coaxial cable, optical fiber, digital subscriber line) or wireless (such as infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available media can be magnetic media (such as floppy disks, storage disks, magnetic tapes), optical media (such as DVDs), or semiconductor media (such as solid state storage disks (SSD)) and the like.

[0077] The above is only the preferred embodiment of the present application, and does not limit the patent scope of the present application, and any equivalent structure or equivalent process transformation using the content of the specification and drawings of the present application, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. An intelligent cockpit domain controller based on a CPU hard isolation system design method, characterized in that, The intelligent cockpit domain controller based on the CPU hard isolation system design method adopts a multi-core processor, and the multi-core processor comprises: two or more processing cores, wherein the processing cores are isolated into a first isolated core and a second isolated core through physical isolation, the first isolated core carries a real-time operating system and is used for processing preset real-time tasks, the second isolated core carries a non-real-time operating system and is used for processing preset non-real-time tasks, the first isolated core further comprises a first storage unit, and the second isolated core further comprises a second storage unit; a shared memory for connecting the first isolated core and the second isolated core to realize inter-core communication, the first isolated core is used for obtaining first to-be-interacted data, triggering a first interrupt signal, and copying the first to-be-interacted data into the shared memory, triggering a second interrupt signal when data sending ends or data is about to overflow, the first to-be-interacted data is a plurality of frames of data of a preset byte, the second isolated core is used for responding to the first interrupt signal, activating a data processing process, and responding to the second interrupt signal, reading the first to-be-interacted data in the shared memory, and after reading is completed, generating and storing first feedback information to the shared memory to enable the first isolated core to read the first feedback information; the intelligent cockpit domain controller is connected with a vehicle instrument system and a vehicle central control system respectively; the intelligent cockpit domain controller is used for controlling the vehicle instrument system to run based on a real-time operating system on the first isolated core, wherein the real-time operating system is a QNX system; the intelligent cockpit domain controller is used for controlling the vehicle central control system to run based on a non-real-time operating system on the second isolated core, wherein the non-real-time operating system is an Android system or a Linux system.

2. The intelligent cockpit domain controller based on the CPU hard isolation system design method according to claim 1, wherein the first isolated core is used for, after the first feedback information is read, if the first feedback information is read successfully, triggering the first interrupt signal again when the first to-be-interacted data is not completely sent, copying the unsent data in the first to-be-interacted data into the shared memory, triggering the second interrupt signal, and enabling the second isolated core to read the unsent data.

3. The intelligent cockpit domain controller based on the CPU hard isolation system design method according to claim 2, wherein the second isolated core is used for obtaining second to-be-interacted data, copying the second to-be-interacted data into the shared memory, and triggering a third interrupt signal, the second to-be-interacted data being a single frame of data of a preset byte; the first isolated core is used for responding to the third interrupt signal and reading the second to-be-interacted data in the shared memory, generating and storing second feedback information to the shared memory after reading is completed, and enabling the second isolated core to read the second feedback information; the second isolated core is further used for judging whether the second to-be-interacted data is read successfully according to the second feedback information, and if the second to-be-interacted data is read successfully, sending the next frame of data. If the reading is not successful, the second to-be-interacted data is sent again until the second feedback information is read successfully.

4. The intelligent cockpit domain controller based on the CPU hard isolation system design method of claim 3, wherein, The vehicle instrument system includes an instrument screen, a HUD, and a vehicle air conditioner, and the vehicle central control system includes a central control screen, a co-pilot screen, and a rear entertainment screen. The output end of the intelligent cockpit domain controller is electrically connected to the input end of the instrument screen, the HUD, and the vehicle air conditioner. The output end of the intelligent cockpit domain controller is electrically connected to the input end of the central control screen, the co-pilot screen, and the rear entertainment screen.

5. A vehicle characterized by comprising: The vehicle includes the intelligent cockpit domain controller based on the CPU hard isolation system design method according to any one of claims 1 to 4.

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