Output current overshoot prevention circuit for switching power supply circuit

Abstract

The application provides an output current overshoot prevention circuit for a switching power supply circuit. The switching power supply circuit comprises a voltage providing unit for providing a supply voltage for a constant current load, a switch for connecting or disconnecting the constant current load to or from the switching power supply circuit, and a switch control unit for controlling the switch. The output current overshoot prevention circuit comprises a first control unit configured to control the switch control unit to start or stop controlling the switch according to a first control signal, a second control unit configured to start or stop controlling the switch according to a second control signal, wherein the second control unit controls the switch to be turned on so that the supply voltage is reduced to a predetermined threshold, and a third control unit configured to generate the first control signal and the second control signal according to the supply voltage.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and in particular to an output current overshoot prevention circuit for a switching power supply circuit. Background Art

[0002] Switching power supply circuits are widely used in various electronic systems to act as a switching power supply for loads to control the power supply to the loads.

[0003] Typically, when a switching power supply circuit does not receive an enable signal, it is in sleep mode. At this point, the switching power supply circuit is unloaded relative to the preceding circuit, which can cause the switching power supply circuit's input voltage (and output voltage at its output) to be higher than when the switching power supply circuit is normally supplying power to the load (under load). Therefore, when the switching power supply circuit receives an enable signal and transitions from sleep mode to operating mode, if the input and output voltages are set close together, the higher output voltage will cause the current flowing into the load during startup to be higher than the current during normal load operation. This could damage the load due to overcurrent, potentially posing a safety hazard.

[0004] Therefore, a method is needed to prevent the load from being damaged by overcurrent. Summary of the Invention

[0005] According to an exemplary embodiment of the present invention, a circuit for preventing output current overshoot is provided for a switching power supply circuit, wherein the switching power supply circuit includes a voltage providing unit for providing a supply voltage for a constant current load, a switch for connecting the constant current load to or disconnecting the constant current load from the switching power supply circuit, and a switch control unit for controlling the switch. The circuit for preventing output current overshoot includes: a first control unit, configured to control the switch control unit to start or stop controlling the switch according to a first control signal; a second control unit, configured to start or stop controlling the switch according to a second control signal, wherein the second control unit controls the switch to be turned on so that the supply voltage is reduced to a predetermined threshold; and a third control unit, configured to generate the first control signal and the second control signal according to the supply voltage.

[0006] According to an exemplary embodiment of the present invention, an output current overshoot prevention circuit for a switching power supply circuit can reduce the output voltage of the switching power supply circuit to a predetermined threshold value by controlling a switch control unit in the switching power supply circuit to start or stop control of a switch in the switching power supply circuit, and enabling another control unit to start or stop control of the switch, thereby preventing the load of the switching power supply circuit from being damaged by overcurrent due to a large output voltage, thereby reducing safety hazards. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present invention can be better understood from the following description of specific embodiments of the present invention in conjunction with the accompanying drawings, in which:

[0008] Figure 1 A circuit diagram of a switching power supply circuit according to an exemplary embodiment is shown.

[0009] Figure 2 A timing diagram of signals in a switching power supply circuit according to an exemplary embodiment is shown.

[0010] Figure 3 A block diagram of an output current overshoot prevention circuit connected to a switching power supply circuit according to an exemplary embodiment of the present invention is shown.

[0011] Figure 4 A timing diagram of signals in a switching power supply circuit connected with an output current overshoot prevention circuit according to an exemplary embodiment of the present invention is shown.

[0012] Figure 5 A circuit diagram of an output current overshoot prevention circuit for a switching power supply circuit according to an exemplary embodiment of the present invention is shown.

[0013] Figure 6 A timing diagram of signals in a switching power supply circuit connected with an output current overshoot prevention circuit according to an exemplary embodiment of the present invention is shown. DETAILED DESCRIPTION

[0014] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the detailed description below, many specific details are proposed to provide a comprehensive understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement, and improvement of elements, components, and algorithms without departing from the spirit of the present invention. In the accompanying drawings and the following description, known structures and techniques are not shown to avoid causing unnecessary ambiguity to the present invention.

[0015] According to an exemplary embodiment of the present invention, an output current overshoot prevention circuit for a switching power supply circuit can be used for the following switching power supply circuit: the switching power supply circuit includes a voltage providing unit for providing a supply voltage for a constant current load, a switch for connecting the constant current load to the switching power supply circuit or disconnecting it from the switching power supply circuit, and a switch control unit for controlling the switch.

[0016] Figure 1 A circuit diagram of a switching power supply circuit according to an exemplary embodiment is shown.

[0017] As shown in FIG. 1, VIN is an AC / DC input voltage received by the switching power supply circuit 100 from a previous stage circuit, and VOUT is an output voltage of the switching power supply circuit 100, i.e., a supply voltage for powering a load 200, such as a constant current load, e.g., LEDs in a string. Figure 1 Figure 1 The switch M2 is a switch 130 for connecting or disconnecting the constant current load 200 (LEDs) to or from the switching power supply circuit 100. The LSD drive is a switch control unit 120 for controlling the switch M2 to be on or off. Figure 1 The rest of the switching power supply circuit 100 in FIG. 1 is a voltage providing unit 110 for providing the LEDs 200 with a supply voltage VOUT having an appropriate voltage value.

[0018] The appropriate voltage value can be set according to the constant current load of the switching power supply circuit 100, e.g., according to the number of LEDs, the rated supply voltage and the rated current of the LEDs, etc. It should be understood that although only two LEDs are shown in FIG. 1, any number of LEDs can be provided according to actual needs. Figure 1

[0019] When the switching power supply circuit 100 is in a sleep mode, the switching power supply circuit 100 is not working. When the switching power supply circuit 100 receives an enable signal ENA (not shown, e.g., a high level signal) and enters a working mode, the switching power supply circuit 100 starts to work, i.e., the switching power supply circuit can power the constant current load (LEDs).

[0020] In FIG. 1, C1 is an input end capacitor for stabilizing the input voltage VIN. C2 is an output end capacitor for stabilizing the output voltage VOUT. L1 is an inductor for storing energy when the switch M1 is on, and outputting the energy when the switch M1 is off, i.e., for outputting the energy to the output end through the diode D, so that the output voltage VOUT of the output end has an appropriate voltage value. The switch M1 is controlled by a gate signal GATE provided by a gate drive. The input end of the gate drive is connected to an RS flip-flop. The S input terminal of the RS flip-flop receives a clock signal CLK output by an oscillator OSC, and the R input terminal of the RS flip-flop receives a signal output by a comparator CMP. In one embodiment, for example, the clock signal CLK received by the S input terminal of the RS flip-flop is a signal for turning off the switch M1, and the signal received by the R input terminal of the RS flip-flop is a signal for turning on the switch M1. Figure 1

[0021] ​​​The signal received by the R input terminal of the RS flip-flop can be generated by the amplifier EA and the comparator CMP. In one embodiment, the negative input terminal of the amplifier EA receives a voltage signal at the node FB between the feedback detection resistor R2 and the switch M2, and the positive input terminal of the amplifier EA receives a steady-state reference signal Vref_ea. The steady-state reference voltage signal Vref_ea is related to the normal working current and the normal working voltage of the constant current load (LED) 200 of the switching power supply circuit. For example, the voltage value of the steady-state reference voltage signal Vref_ea is equal to the voltage value at the node FB when the constant current load (LED) 200 is stably working. For example, when the normal working voltage of the LED is 3V, the steady-state reference voltage signal Vref_ea can be 400mV. The output terminal of the amplifier EA outputs a COMP voltage signal, and the voltage value of the COMP voltage signal is equal to the voltage value of the positive terminal of the capacitor C3. The output signal of the amplifier EA is input to the negative input terminal of the comparator CMP, and the positive input terminal of the comparator CMP inputs the superimposed signal RAMP of the voltage at the sensing node CS between the resistor R1 and the switch M1 and the signal OSC_out output by the output terminal of the oscillator OSC.

[0022] For example, when the switching power supply circuit 100 receives the enable signal ENA (e.g., high level) and enters the working mode, the switching power supply circuit 100 generates an opening signal LED_Start (not shown) to open the LSD drive, and the LSD drive 120 turns on the switch M2 according to the opening signal LED_Start to connect the LED 200 to the switching power supply circuit 100, so as to supply power to the LED 200 through the supply voltage VOUT. At this time, in order to make the supply voltage VOUT meet the voltage requirement corresponding to the LED 200, the on or off of the switch M1 can be controlled by the RS flip-flop and the gate signal GATE output by the gate drive, so as to store energy in the inductor L1 when the switch M1 is turned on, and release the energy from the inductor L1 to the output terminal through the diode D when the switch M1 is turned off, so as to make the output supply voltage VOUT reach the appropriate voltage value suitable for the LED.

[0023] In one embodiment, the LSD driver 120 can receive an enable signal ENA to generate an on signal LED_Start to turn on the switch M2 when the on signal LED_Start goes high, for example, to turn on the LED. In another embodiment, the LSD driver 120 can also receive a dimming control signal PWM to control the brightness of the LED, so that the LSD driver 120 can control the on or off of the switch M2 according to the on signal LED_Start and the dimming control signal PWM to control the magnitude of the LED. In another embodiment, the dimming signal PWM can be used as the enable signal ENA, i.e., the first rising edge of the dimming signal PWM can be used to make the switch power supply circuit 100 end the sleep state and enter the working state. It should be understood that the enable signal ENA can be any signal received from an external source for controlling the switch power supply circuit 100 to control the working mode of the switch power supply circuit 100.

[0024] At the moment of receiving the enable signal ENA, the switch power supply circuit 100 enters the working mode from the sleep mode to start supplying power to the LED 200. However, since the switch power supply circuit 100 is in an idle state (or light load state) relative to the front-stage circuit when in the sleep mode, the input voltage VIN and the output voltage VOUT can be greater than the voltage in the normal load state (the input and output voltages are set close to each other). This can cause the current flowing through the LED to be greater than the normal working current when the LED is connected to the switch circuit, resulting in overcurrent (overshoot), which can cause damage to the LED or pose a safety hazard.

[0025] Figure 2 A timing diagram of the signals in the switch power supply circuit 100 according to one example embodiment is shown.

[0026] As shown in Figure 2 When the switch power supply circuit 100 is in the sleep mode, the input voltage VIN and the output voltage VOUT are high, i.e., higher than the normal working voltage. The current ILED of the LED is zero. When the switch power supply circuit 100 receives the enable signal ENA, i.e., the enable signal ENA goes high, the switch power supply circuit 100 enters the working mode. At this time, the switch power supply circuit 100 generates the on signal LED_Start, i.e., the on signal LED_Start goes high. The LED is connected to the switch power supply circuit. At this time, since the input voltage VIN and VOUT are higher than the normal working voltage, the current ILED flowing through the LED can be higher than the normal working current. That is, in the initial stage of the working mode, the LED can be damaged or pose a safety hazard due to overcurrent.

[0027] To prevent LED overcurrent, when the switching power supply circuit 100 ends the sleep mode, the supply voltage VOUT may be discharged first to reduce its voltage value to a safe voltage range for the LED, and then the switching power supply circuit 100 enters the working mode.

[0028] Figure 3 FIG. 1 is a block diagram of an output current overshoot prevention circuit 300 connected to a switching power supply circuit 100 according to an exemplary embodiment of the present invention.

[0029] like Figure 3 As shown, the output current overshoot prevention circuit 300 according to the embodiment of the present invention can be connected to Figure 1 The output current overshoot prevention circuit 300 may include a first control unit 310 , a second control unit 320 , and a third control unit 330 .

[0030] The first control unit 310 is configured to control the switch control unit 120 to start or stop controlling the switch M2 according to a first control signal (e.g., the start signal LED_Start). For example, the first control unit 310 may disconnect or connect the connection between the LSD driver 120 and the switch M2, thereby disconnecting or connecting the LSD driver 120 from controlling the switch M2.

[0031] The second control unit 320 is configured to start or stop controlling the switch M2 based on the second control signal. Here, the second control unit 320 can control the switch M2 to be turned on, thereby reducing the supply voltage VOUT to a predetermined threshold. In one embodiment, for example, the first control signal and the second control signal can have a first level (e.g., a low level) or a second level (e.g., a high level), and the first control signal and the second control signal can be inverted. For example, when the first control signal is the start signal LED_Start, the second control signal can be an inverted start signal LED_Start_N.

[0032] The third control unit 330 is configured to generate a first control signal and a second control signal according to the power supply voltage VOUT. For example, the third control unit 330 may generate a first control signal and a second control signal according to a steady-state reference signal Vref_ea (e.g., Figure 1 As shown), to generate the first control signal and the second control signal.

[0033] In one embodiment, for example, when the switching power supply circuit 100 is turned on (eg, Figure 2When the enable signal ENA in the LED turns high), the first control signal generated by the third control unit 330 may have a first level (for example, the start signal LED_Start is low), and the second control signal generated by the third control unit 330 may have a second level (for example, the inverted start signal LED_Start_N is high). At this time, the first control unit 310 may control the switch control unit (LSD drive) 120 to stop controlling the switch M2, and the second control unit 320 controls the switch M2 to turn on, so that the supply voltage VOUT is discharged through the loop between the LED, switch M2, feedback detection resistor R2, and ground GND, thereby reducing the supply voltage VOUT to a predetermined threshold. This stage can be, for example, the discharge stage of the switching power supply circuit 100.

[0034] When the power supply voltage VOUT drops to a predetermined threshold, the first control signal generated by the third control unit 330 may have a second level (for example, the start signal LED_Start is a high level), and the second control signal generated by the third control unit 330 may have a first level (for example, the inverted start signal LED_Start_N is a low level). At this time, the first control unit 310 may control the switch control unit (LSD drive) 120 to start control of the switch M2, and the second control unit 320 may stop controlling the switch M2. That is, at this time, the switch control unit (LSD drive) 120 may be reconnected to the switch M2 to control the switch M2 normally, and the second control unit 320 may no longer control the switch M2, that is, no longer discharge the power supply voltage VOUT. At this time, the switching power supply circuit may enter Figure 2 The working phase.

[0035] In one embodiment, during the above discharge phase, the second control unit 320 may be configured to: when the switching power supply circuit 100 is turned on (eg, Figure 2 When the enable signal ENA in the DC load 200 becomes a high level), a first intermediate signal is generated according to a first reference voltage corresponding to a predetermined threshold value, and the first intermediate signal is used to control the switch M2 to be turned on. For example, the predetermined threshold value may be related to the operating voltage and operating current of the DC load 200. For example, the predetermined threshold value may correspond to the voltage VOUT when the current flowing through the DC load 200 is a predetermined percentage (for example, 10%) of the operating current. In this case, for example, the first reference voltage (Vref1) may be Figure 1 10% of the voltage value of the steady-state reference voltage signal Vref_ea, for example, 40 mV.

[0036] Thereafter, when the power supply voltage VOUT decreases to a predetermined threshold, the second control unit 320 may be further configured to generate a second intermediate signal according to the first reference voltage, and the second intermediate signal may be used to control the switch M2 to be turned on.

[0037] At this time, when the supply voltage VOUT decreases to the predetermined threshold value, in one embodiment, the third control unit 330 can be configured to generate the first control signal and the second control signal according to the second intermediate signal and a second reference voltage corresponding to the predetermined threshold value (for example, the voltage value of the second intermediate signal is related to the first reference voltage, and the voltage value of the second intermediate signal is related to the second reference voltage), the first control signal has the second level (for example, the start signal LED_Start is high), and the second control signal has the first level (for example, the inverse start signal LED_Start_N is low). At this time, the second control signal with the first level will stop the control of the switch M2 by the second control unit 320, that is, stop the discharge of the supply voltage VOUT, while the first control signal with the second level will start the control of the switch M2 by the LSD drive 120. The switching power supply circuit 100 enters the normal working mode.

[0038] Here, by setting the output current overshoot prevention circuit 300 between the LSD drive 120 and the switch M2, when the switching power supply circuit 100 ends the sleep mode, the control of the switch M2 by the LSD drive 120 is first disconnected, and then the excessively high supply voltage VOUT is decreased to below the predetermined level under the control of the output current overshoot prevention circuit 300, and then the control of the switch M2 (that is, the control of the LED) by the LSD drive 120 is started again, so that the excessively high current flowing through the LED can be prevented from damaging the LED and even causing safety hazards.

[0039] Figure 4 The timing diagram of the signals in the switching power supply circuit connected with the output current overshoot prevention circuit 300 according to one exemplary embodiment of the present application is shown.

[0040] As Figure 4 shown, when the enable signal ENA changes from low to high, the switching power supply circuit 100 enters the discharge phase, at this time the input voltage VIN and the supply voltage (output voltage) VOUT gradually decrease, and the current ILED flowing through the LED is smaller than the normal working current. After the discharge phase ends, that is, the supply voltage VOUT decreases to the predetermined threshold value, the switching power supply circuit 100 enters the working mode, the signal LED_Start changes from low to high, and the current ILED in the LED becomes the normal working current.

[0041] Figure 5 The circuit diagram of the output current overshoot prevention circuit 300 for the switching power supply circuit according to one exemplary embodiment of the present application is shown.

[0042] As Figure 5As shown, the first control unit 310 can include a first switch SW1. The first connection terminal and the second connection terminal of the first switch SW1 can be connected between the output terminal of the switch control unit 120 (LSD drive) and the control terminal of the switch M2, and the control terminal of the first switch SW1 can receive the first control signal (on signal) LED_Start.

[0043] The second control unit 320 can include a first amplifier OP1 and a second switch SW2. The positive input terminal of the first amplifier OP1 receives the first reference signal Vref1, and the negative input terminal of the first amplifier OP1 is connected to the current output terminal of the switch M2. The first connection terminal and the second connection terminal of the second switch SW2 are connected between the output terminal of the first amplifier OP1 and the control terminal of the switch M2, and the control terminal of the second switch SW2 receives the second control signal (inverted on signal) LED_Start_N. The voltage at the node between the second switch SW2 and the control terminal of the switch M2 corresponds to the voltage of the first intermediate signal or the voltage of the second intermediate signal Vgate.

[0044] The third control unit 330 can include a first comparator CMP1 and a first D flip-flop D1. The positive input terminal of the first comparator CMP1 is connected to the control terminal of the switch M2, and the negative input terminal of the first comparator CMP1 receives the second reference voltage Vref2. The clock input terminal clk of the first D flip-flop D1 is connected to the output terminal of the first comparator CMP1, the D terminal of the first D flip-flop D1 receives the predetermined internal voltage DVDD of the switch power supply circuit 100, the first output terminal Q of the first D flip-flop D1 outputs the first control signal LED_Start, and the second output terminal QN of the first D flip-flop D1 outputs the second control signal LED_Start_N.

[0045] In one embodiment, the third control unit 330 can further include a delay unit (Debounce) 340. The delay unit 340 can be connected between the output terminal of the first comparator CMP1 and the clock input terminal clk of the first D flip-flop D1, to delay the signal s1 output by the first comparator CMP1 for a predetermined time, and input the delayed signal to the clock input terminal clk of the first D flip-flop D1.

[0046] In a specific embodiment, when the switch power supply circuit 100 is turned on (for example, when the switch power supply circuit 100 is powered on), the first control signal LED_Start and the second control signal LED_Start_N are both low, and the switch M2 is turned off. Figure 4When the enable signal ENA in the MOSFET goes high, the switching power supply circuit does not immediately cause the enable signal LED_Start (the first control signal) to go high. At this point, the first switch SW1 is off, and the LSD driver 120 disconnects switch M2. The inverted enable signal LED_Start_N goes high, turning on the second switch SW2. The negative feedback generated by the first amplifier OP1 causes the voltage Vgate at the node between the second switch SW2 and switch M2 to have a first value (corresponding to the first intermediate signal), turning on switch M2. The supply voltage VOUT is discharged through the loop formed by the LED, the feedback sense resistor R2, and ground, causing the supply voltage to decrease. At this point, the current in this loop is constant.

[0047] Thereafter, when the power supply voltage VOUT decreases to a value close to a predetermined threshold, the voltage input to the negative input terminal of the first amplifier OP1 is no longer equal to the first reference voltage Vref1, the current in the loop begins to decrease, and the voltage Vgate at the node between the second switch SW2 and the switch M2 increases. When the voltage Vgate increases to a voltage value corresponding to the second reference voltage Vref2 (for example, at Figure 1 When the steady-state reference voltage signal Vref_ea in the circuit is 400mV and the first reference voltage Vref1 is 40mV, the second reference voltage Vref2 can be 4V. The first comparator CMP1 outputs signal s1, which in turn causes the first D-type flip-flop to output a high-level enable signal LED_Start (first control signal) and a low-level inverted enable signal LED_Start_N (second control signal). The first D-type flip-flop latches its outputs of the first and second control signals LED_Start_N. At this point, the second switch SW2 is disconnected due to the low-level second control signal LED_Start_N, while the first switch SW1 is connected due to the high-level first control signal LED_Start. The second control unit 320 disconnects from the switch M2, and the LSD driver 120 connects to the switch M2, enabling control of the switch M2. The switching power supply circuit 100 enters normal operating mode.

[0048] Furthermore, in one embodiment, to prevent the signal s1 output by the first amplifier OP1 from changing due to changes in the voltage Vgate between the second switch SW2 and the switch M2 when the output voltage Vout decreases to near a predetermined threshold, a delay unit 340 may be provided between the first amplifier OP1 and the first D-type flip-flop D1. The delay unit 340 may input the signal s1 to the first D-type flip-flop D1 after a period of time has passed since the first amplifier OP1 outputted the signal s1, thereby improving the stability of the output current overshoot prevention circuit 300.

[0049] In the above process, the switch control unit (LSD drive) 120 can receive the first control signal (start signal LED_Start) to control the switch M2 to be turned on or off according to the first control signal LED_Start when the first control unit 310 controls the switch control unit 120 to turn on the control of the switch M2.

[0050] In addition, in one embodiment, the switch control unit (LSD drive) 120 can also receive a dimming control signal PWM for controlling the brightness of the constant current load 200 (for example, at least one LED) so as to control the switch M2 to be turned on or off according to the first control signal LED_Start and the dimming control signal PWM when the first control unit 310 controls the switch control unit 120 to turn on the control of the switch M2.

[0051] It should be understood that the number of LEDs shown in the above diagrams is merely an example, and any number of LEDs can be set as a constant current load according to actual needs. The voltage values, reference voltage values, ratio values, level levels, and other values ​​in the above examples are merely examples, and any voltage values, reference voltage values, ratio values, level levels, and other values ​​can be set according to actual needs.

[0052] Figure 6 FIG. 1 shows a timing diagram of signals in a switching power supply circuit 100 connected with an output current overshoot prevention circuit 300 according to an exemplary embodiment of the present invention.

[0053] Figure 6 and Figure 4 The difference is that Figure 4 The enable signal ENA in the PWM is replaced by the dimming signal PWM, and the first rising edge of the dimming signal PWM is used as the enable signal for the switching power supply circuit to end the sleep mode. Figure 6 The voltage Vgate shown may have a pulse waveform synchronized with the dimming signal PWM after the discharge phase ends. Figure 6 The working phase may correspond to the normal working phase of the switching power supply circuit 100 .

[0054] According to an exemplary embodiment of the present invention, an output current overshoot prevention circuit for a switching power supply circuit can reduce the power supply voltage of the switching power supply circuit to a predetermined threshold value by controlling a switch control unit in the switching power supply circuit to start or stop control of a switch in the switching power supply circuit, and enabling another control unit to start or stop control of the switch, thereby preventing the load of the switching power supply circuit from being damaged by overcurrent due to a large supply voltage, thereby reducing safety hazards.

[0055] The present invention may be implemented in other specific forms without departing from its spirit and essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the present invention. Therefore, the present embodiments are to be considered in all respects as illustrative and not restrictive, the scope of the invention is defined by the appended claims rather than the foregoing description, and all modifications coming within the meaning and scope of equivalents of the claims are intended to be included within the scope of the present invention.

Claims

1. A circuit for preventing output current overshoot in a switching power supply circuit, wherein: The switching power supply circuit includes a voltage providing unit for providing a supply voltage for a constant current load, a switch for connecting the constant current load to the switching power supply circuit or disconnecting the constant current load from the switching power supply circuit, and a switch control unit for controlling the switch. The output current overshoot prevention circuit includes: a first control unit including a first switch, wherein a first connection terminal and a second connection terminal of the first switch are connected between an output terminal of the switch control unit and a control terminal of the switch, the control terminal of the first switch receiving a first control signal, and the first control unit being configured to control the switch control unit to start or stop controlling the switch according to the first control signal; a second control unit comprising a first amplifier and a second switch, wherein a positive input terminal of the first amplifier receives a first reference signal, a negative input terminal of the first amplifier is connected to a current output terminal of the switch, a first connection terminal and a second connection terminal of the second switch are connected between the output terminal of the first amplifier and a control terminal of the switch, the control terminal of the second switch receives a second control signal, a voltage at a node between the second switch and the control terminal of the switch corresponds to a voltage of the first intermediate signal or a voltage of the second intermediate signal, and the second control unit is configured to start or stop control of the switch according to the second control signal, wherein the second control unit controls the switch to be turned on so that the supply voltage drops to a predetermined threshold; and A third control unit includes a first comparator and a first D-type flip-flop, wherein the positive input terminal of the first comparator is connected to the control terminal of the switch, the negative input terminal of the first comparator receives a second reference voltage corresponding to the predetermined threshold, the clock input terminal of the first D-type flip-flop is connected to the output terminal of the first comparator, the D terminal of the first D-type flip-flop receives a predetermined internal voltage of the switching power supply circuit, the first output terminal of the first D-type flip-flop outputs the first control signal, and the second output terminal of the first D-type flip-flop outputs the second control signal. The third control unit is configured to generate the first control signal and the second control signal according to the supply voltage.

2. The output current overshoot prevention circuit according to claim 1, wherein: The first control signal and the second control signal have a first level or a second level, and the first control signal and the second control signal are in opposite phases.

3. The output current overshoot prevention circuit according to claim 2, wherein: When the switching power supply circuit is turned on, the first control signal has a first level, the second control signal has a second level, the first control unit controls the switch control unit to stop controlling the switch, and the second control unit controls the switch to be turned on.

4. The output current overshoot prevention circuit according to claim 3, wherein: When the supply voltage drops to the predetermined threshold, the first control signal has the second level, the second control signal has the first level, the first control unit controls the switch control unit to start control of the switch, and the second control unit stops control of the switch.

5. The output current overshoot prevention circuit according to claim 4, wherein: The second control unit is configured to: When the switching power supply circuit is turned on, the first intermediate signal is generated according to a first reference voltage corresponding to the predetermined threshold, wherein the first intermediate signal is used to control the switch to be turned on.

6. The output current overshoot prevention circuit according to claim 5, wherein: The second control unit is further configured to: When the supply voltage drops to the predetermined threshold, the second intermediate signal is generated according to the first reference voltage, wherein the second intermediate signal is used to control the switch to be turned on.

7. The output current overshoot prevention circuit according to claim 6, wherein: The third control unit is further configured to: When the supply voltage drops to the predetermined threshold, the first control signal and the second control signal are generated according to the second intermediate signal and the second reference voltage, wherein the first control signal has the second level and the second control signal has the first level.

8. The output current overshoot prevention circuit according to claim 1, wherein: The third control unit further includes: A delay unit is connected between the output terminal of the first comparator and the clock input terminal of the first D flip-flop to delay the signal output by the first comparator by a predetermined time and input the delayed signal to the clock input terminal of the first D flip-flop.

9. The output current overshoot prevention circuit according to any one of claims 1 to 8, wherein: The switch control unit receives the first control signal, so as to control the switch to be turned on or off according to the first control signal when the first control unit controls the switch control unit to start controlling the switch.

10. The output current overshoot prevention circuit according to claim 9, wherein: The constant current load is at least one LED, The switch control unit also receives a dimming control signal for controlling the brightness of the at least one LED, so that when the first control unit controls the switch control unit to turn on control of the switch, the switch is controlled to be turned on or off according to the first control signal and the dimming control signal.

Images