Charge pump circuit and control method thereof

Abstract

The present application discloses a charge pump circuit, comprising: a voltage stabilizing module, which generates a voltage regulation signal based on a first voltage source; a charge pump module, which generates an output voltage based on the first voltage source, a second voltage source, and the voltage regulation signal; wherein the voltage regulation signal is the voltage difference between the first voltage source and a pre-adjusted voltage; the charge pump module comprises a plurality of switching tubes and at least one switching capacitor, wherein the voltage swing between any two of the first, second, and third ends of each switching tube and the voltage swing between the two ends of the capacitor are less than or equal to the magnitude of the pre-adjusted voltage. In an embodiment of the present invention, a voltage stabilizing module is used to generate a voltage regulation signal related to the first voltage source, and a charge pump circuit is connected between the first voltage source and the voltage regulation signal, thereby reducing the voltage swing between any two of the three ends of the switching tube and the voltage swing across the capacitor, thereby reducing the loss caused by the voltage swing on the parasitic capacitance of the switching tube and the loss caused by the charging and discharging of the capacitor.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and more particularly to a charge pump circuit and a control method thereof. Background Art

[0002] Integrated power switch circuits are new integrated circuits that integrate power devices, control circuits, drive circuits, protection circuits, sensors, and other modules. They are widely used in fast charging and Power over Ethernet (PoE) applications. In some integrated power switch circuits, N-type power transistors are used as high-side driver transistors. To turn on the high-side driver transistor, a voltage level higher than the voltage source must be generated. Charge pump circuits are often used to generate such a voltage signal, which is higher than the voltage source voltage.

[0003] Figure 1 FIG. 1 is a schematic diagram showing a charge pump circuit in the prior art. Figure 1 The charge pump circuit includes a first voltage source (or first voltage) V1, a second voltage source (or second voltage) V2, a low-side voltage regulator module 110, a charge pump module 120 and a control module 130.

[0004] The low-side voltage regulator module 110 generates a regulated voltage signal Vs based on a first voltage source V1. The low-side voltage regulator module 110 has a first input terminal connected to the first voltage source V1, a second input terminal connected to the ground terminal GND, and an output terminal outputting the regulated voltage signal Vs. The regulated voltage signal Vs is a pre-regulated voltage Vpre, i.e., Vs=Vpre.

[0005] The charge pump module 120 generates an output voltage Vo based on the second voltage source V2 and the voltage regulation signal Vs, wherein the output voltage Vout = V2 + Vs. The first input terminal of the charge pump module 120 is connected to the output terminal of the low-side voltage regulator module to receive the voltage regulation signal Vs, the second input terminal is connected to the ground terminal GND, and the third input terminal is connected to the second voltage source V2. The charge pump module 120 includes first to fourth switching transistors (M1-M4) and a first switching capacitor C1. The first switching transistor M1, the first switching capacitor C1, and the third switching transistor M3 are connected in series between the voltage regulation signal Vs and the ground terminal GND. A first node A between the first switching transistor M1 and the first switching capacitor C1 is connected to the output terminal of the charge pump module 120 via the second switching transistor M2, and a second node B between the third switching transistor M3 and the first switching capacitor C1 is connected to the second voltage source V2 via the fourth switching transistor M4.

[0006] The control module 130 is configured to generate first to fourth control signals ( G1 - G4 ) according to the clock signal CLK, and respectively control the on and off states of the first to fourth switch transistors ( M1 - M4 ).

[0007] In a first time period, the first switch tube M1 and the third switch tube M3 are turned on, and the second switch tube M2 and the fourth switch tube M4 are turned off. The charge pump module 120 charges the first switch capacitor C1. The voltage across the first switch capacitor C1 is Vs, the voltage at the first node A is Vs, and the voltage at the second node B is 0. In a second time period, the second switch tube M2 and the fourth switch tube M4 are turned on, and the first switch tube M1 and the third switch tube M3 are turned off. The charge pump module 120 superimposes the voltage on the first switch capacitor C1 on the second voltage source V2 for output. Ideally, the output voltage Vo=V2+Vs.

[0008] However, in actual applications, when the charge pump operates at the switching frequency, the gate capacitance of the switch tube and the parasitic capacitance of each node (parasitic capacitance refers to the capacitance of the switch tube relative to each node) are frequently charged and discharged, resulting in energy loss and reducing the efficiency of the charge pump. The formula for energy loss is: Where V is the voltage swing across the first switched capacitor C1. The voltage at the second node B varies from 0V to the second voltage source V2, with a voltage swing of V2. Therefore, the energy loss in the parasitic capacitance of the second node B increases as the second voltage source increases. In conventional integrated circuits, the capacitance of the first switched capacitor C1 is not very large due to area constraints. Therefore, as the second voltage source V2 increases, the energy loss in the parasitic capacitance increases and cannot be ignored, resulting in a gradual decrease in the efficiency of the charge pump. Summary of the Invention

[0009] In view of the above problems, an object of the present invention is to provide a charge pump circuit and a control method thereof, so as to reduce energy loss during voltage conversion and improve the working efficiency of the charge pump.

[0010] According to one aspect of the present invention, a charge pump circuit is provided, comprising: a voltage stabilizing module, which generates a voltage regulating signal based on a first voltage source; a charge pump module, which generates an output voltage based on the first voltage source and the voltage regulating signal; wherein the charge pump module comprises a first input terminal and a second input terminal, wherein the first input terminal is connected to the first voltage source, and the second input terminal is connected to the output terminal of the voltage stabilizing module to receive the voltage regulating signal.

[0011] Preferably, the voltage difference between the first voltage source and the voltage regulation signal is a pre-regulated voltage.

[0012] Preferably, the charge pump module includes multiple switching tubes and at least one switching capacitor, and the swing of the voltage between any two ends of the first end, the second end and the third end of each switching tube and the voltage between the two ends of the capacitor is less than or equal to the size of the pre-adjusted voltage.

[0013] Preferably, the charge pump circuit further includes: a control module, configured to generate a control signal according to a clock signal, wherein the control signal is used to control the on and off of the switch tube.

[0014] Preferably, when the control signal is at a high level, the control signal is a first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

[0015] Preferably, the charge pump further includes a third input terminal connected to the second voltage source.

[0016] Preferably, the charge pump module includes first to fourth switching tubes and a first switching capacitor, wherein the first switching tube, the first switching capacitor and the third switching tube are connected in series between the first voltage source and the voltage regulation signal; the first node between the first switching tube and the first switching capacitor is connected to the output end of the charge pump module via the second switching tube; the second node between the third switching tube and the first switching capacitor is connected to the second voltage source via the fourth switching tube.

[0017] Preferably, the control signal includes a first control signal to a fourth control signal, the first control signal controls the conduction and shutoff of the first switch tube, the second control signal controls the conduction and shutoff of the second switch tube, the third control signal controls the conduction and shutoff of the third switch tube, and the fourth control signal controls the conduction and shutoff of the fourth switch tube.

[0018] Preferably, there is a certain dead time between the first control signal and the third control signal and the second control signal and the fourth control signal to avoid the four switch tubes being turned on at the same time.

[0019] Preferably, the output voltage is the sum of the second voltage and the pre-regulated voltage.

[0020] Preferably, the first voltage source and the second voltage source are the same voltage source.

[0021] Preferably, the control signal includes a first control signal and a second control signal, and the first control signal and the second control signal are opposite.

[0022] Preferably, the charge pump module includes first to fourth switching tubes, a first switching capacitor and a second switching capacitor, wherein the first switching tube and the third switching tube are connected in series between the first voltage source and the output end of the charge pump module; the second switching tube and the fourth switching tube are connected in series between the first voltage source and the output end of the charge pump module; the positive end of the first switching capacitor is connected to the fourth node between the first switching tube and the third switching tube, and the negative end is connected to the first control signal; the control ends of the second switching tube and the fourth switching tube are connected to the fourth node; the positive end of the second switching capacitor is connected to the fifth node between the second switching tube and the fourth switching tube, and the negative end is connected to the second control signal; the control ends of the first switching tube and the third switching tube are connected to the fifth node.

[0023] Preferably, the charge pump module also includes a first inverter to a fourth inverter; the first control signal outputs a third control signal via the first inverter and the second inverter, and the third control signal is connected to the negative end of the first switching capacitor; the second control signal outputs a fourth control signal via the third inverter and the fourth inverter, and the fourth control signal is connected to the negative end of the second switching capacitor.

[0024] Preferably, the positive power supply terminals of the first inverter to the fourth inverter are connected to a first voltage source, and the negative power supply terminals are connected to the output terminal of the voltage stabilizing module.

[0025] Preferably, the first to fourth switching transistors are MOS transistors.

[0026] Preferably, the voltage stabilizing module includes a Zener diode, a current limiting resistor and a high-voltage driving tube, wherein the Zener diode and the current limiting resistor are connected in series between the first voltage source and the ground terminal, the high-voltage driving tube is connected between the output terminal and the ground terminal of the voltage stabilizing module, and the gate of the high-voltage driving tube is connected to the fifth node between the Zener diode and the current limiting resistor.

[0027] According to another aspect of the present invention, a control method for a charge pump circuit is provided, wherein the charge pump includes multiple switching tubes and at least one switching capacitor, and the control method includes: generating a voltage regulation signal based on a first voltage source, wherein the voltage difference between the first voltage source and the voltage regulation signal is a pre-adjusted voltage; charging the switching capacitor based on the first voltage source and the voltage regulation signal to generate an output voltage; wherein the swing amplitude of the voltage between any two ends of the first end, the second end, and the third end of each switching tube and the voltage between the two ends of the capacitor is less than or equal to the magnitude of the pre-adjusted voltage.

[0028] Preferably, the control method further comprises: generating a control signal according to the clock signal, wherein the control signal is used to control the on and off of the switch tube.

[0029] Preferably, when the control signal is at a high level, the control signal is a first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

[0030] Preferably, the control method further comprises: charging a switching capacitor according to the first voltage source, the second voltage source and the voltage regulation signal to generate an output voltage.

[0031] The charge pump circuit and control method provided by the present invention utilize a voltage stabilization module to generate a voltage regulation signal associated with a first voltage source. The charge pump circuit is connected between the first voltage source, a second voltage source, and the voltage regulation signal, ensuring that the voltage swing between any two of the first, second, and third terminals of a switch tube within the charge pump module and the voltage swing between the two terminals of a capacitor are less than or equal to a pre-adjusted voltage. This reduces the voltage swing between any two of the three terminals of the switch tube and the voltage swing across the capacitor, minimizing losses caused by voltage swings on the parasitic capacitance of the switch tube and losses caused by capacitor charging and discharging. This improves the operating efficiency of the charge pump under the same area while reducing the voltage withstand requirements of the MOS tube.

[0032] Furthermore, the first voltage source and the second voltage source are the same voltage source, and the voltage swing of the node between the switching capacitor and the switching tube can be controlled within the voltage regulation signal. The energy loss of the charge pump is independent of the size of the voltage source, and it can still maintain high efficiency operation when the voltage source is high.

[0033] Furthermore, using a voltage source can also reduce chip area and lower costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0035] Figure 1 shows a schematic diagram of a charge pump circuit according to the prior art;

[0036] Figure 2 shows a schematic diagram of a charge pump circuit according to a first embodiment of the present invention;

[0037] Figure 3 A schematic diagram of a voltage stabilizing module in a charge pump circuit according to an embodiment of the present invention is shown;

[0038] Figure 4 A schematic structural diagram of a control module in a charge pump circuit according to a first embodiment of the present invention is shown;

[0039] Figure 5 shows a waveform diagram of a clock signal and various control signals of a charge pump circuit according to a first embodiment of the present invention;

[0040] Figure 6 A schematic diagram showing a charge pump circuit according to a second embodiment of the present invention;

[0041] Figure 7 FIG. 1 is a waveform diagram showing the clock signal and various control signals of the charge pump circuit according to the second embodiment of the present invention. DETAILED DESCRIPTION

[0042] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0043] The charge pump circuit provided in this application is described by taking its application in a non-volatile memory as an example.

[0044] The specific implementation of the present invention is further described in detail below with reference to the accompanying drawings and examples.

[0045] Figure 2 FIG. 1 shows a schematic diagram of a charge pump circuit according to a first embodiment of the present invention. Figure 2 As shown, the charge pump circuit includes a first voltage source (or first voltage) V1, a second voltage source (or second voltage) V2, a voltage stabilizing module 210, a charge pump module 220 and a control module 230.

[0046] The voltage stabilizing module 210 generates a voltage regulation signal Vs according to the first voltage source V1 .

[0047] In this embodiment, the first input terminal of the voltage stabilizing module 210 is connected to the first voltage source V1, the second input terminal is connected to the ground terminal GND, and the output terminal outputs the regulated voltage signal Vs, which is Vs=V1-Vpre, where Vpre is the pre-regulated voltage.

[0048] See also Figure 3 The voltage stabilization module 210 includes a Zener diode Zd, a current-limiting resistor R1, and a high-voltage driver transistor MP1. The Zener diode Zd and the current-limiting resistor R1 are connected in series between a first voltage source V1 and a ground terminal GND. The high-voltage driver transistor MP1 is connected between the output terminal of the voltage stabilization module 210 and the ground terminal. The gate of the high-voltage driver transistor MP1 is connected to a third node C between the Zener diode Zd and the current-limiting resistor R1. The voltage at the third node C, Vc = V1 - Vzd, where Vzd is the voltage across the Zener diode Zd. Vzd drives the high-voltage driver transistor MP1 to turn on, and the source terminal of the high-voltage driver transistor MP1 outputs a voltage regulation signal Vs, which is Vs = V1 - Vpre. The pre-adjusted voltage Vpre = Vzd - |Vth|, where Vth is the threshold voltage of the high-voltage driver transistor. In this embodiment, the high-voltage driver transistor MP1 is a PMOS transistor.

[0049] The charge pump module 220 generates an output voltage Vo according to the first voltage source V1 , the second voltage source V2 and the voltage regulation signal Vs.

[0050] In this embodiment, the ideal output voltage Vo= V2+(V1-Vs)=V2+Vpre.

[0051] The first input terminal of the charge pump module 220 is connected to the first voltage source V1 , the second input terminal is connected to the output terminal of the voltage stabilizing module 210 , and receives the voltage regulation signal Vs; and the third input terminal is connected to the second voltage source V2 .

[0052] Specifically, the charge pump module 220 includes first to fourth switch tubes (M1-M4) and a first switch capacitor C1. The first switch tube M1, the first switch capacitor C1 and the third switch tube M3 are connected in series between the first voltage source V1 and the voltage regulation signal Vs; the first node A between the first switch tube M1 and the first switch capacitor C1 is connected to the output end of the charge pump module 220 via the second switch tube M2, and the second node B between the third switch tube M3 and the first switch capacitor C1 is connected to the second voltage source V2 via the fourth switch tube M4.

[0053] In this embodiment, the first to fourth switch transistors (M1-M4) are field effect transistors, wherein the first switch transistor M1, the second switch transistor M2, and the fourth switch transistor M4 are PMOS transistors, and the third switch transistor M3 is an NMOS transistor.

[0054] The control module 230 is configured to generate first to fourth control signals (G1-G4) based on a clock signal CLK, respectively controlling the on and off states of the first to fourth switches (M1-M4). A dead time is defined between the first and third control signals and the second and fourth control signals to prevent the first to fourth switches (M1-M4) from being on simultaneously.

[0055] In this embodiment, the control module 230 includes a dead zone control unit 231, a first level conversion unit 232, a second level conversion unit 233, a third level conversion unit 234, and a fourth level conversion unit 235. The dead zone control unit 231 generates a dead zone control signal based on a clock signal, the first level conversion unit 232 generates a first control signal G1 based on the dead zone control signal, the second level conversion unit 233 generates a second control signal G2 based on the dead zone control signal, the third level conversion unit 234 generates a third control signal G3 based on the dead zone control signal, and the fourth level conversion unit 235 generates a fourth control signal G4 based on the dead zone control signal.

[0056] In the first time period, the first switch tube M1 and the third switch tube M3 are turned on, and the second switch tube M2 and the fourth switch tube M4 are turned off. The charge pump module 120 charges the first switch capacitor C1, and the voltage across the first switch capacitor C1 is V1-Vs. That is, the final voltage difference across the first switch capacitor C1 is the pre-adjusted voltage Vpre, the voltage at the first node A is V1, and the voltage at the second node B is Vs. In the second time period, the second switch tube M2 and the fourth switch tube M4 are turned on, and the first switch tube M1 and the third switch tube M3 are turned off. The charge pump module 220 superimposes the voltage on the first switch capacitor C1 on the second voltage source V2 for output. Ideally, the output voltage Vo=V2+V1-Vs=V2+Vpre.

[0057] The voltage between any two ends of the first switching transistor M1 to the fourth switching transistor M4 and the voltage difference between the first switching capacitor and the second switching capacitor do not exceed the pre-adjusted voltage.

[0058] The voltage of the second node B changes from the voltage regulation signal Vs to the second voltage source V2. The voltage regulation signal Vs is a positive voltage. Therefore, the voltage swing of the second node B is V2-Vs. Compared with the prior art, the swing of the second node voltage is reduced, thereby reducing the energy loss in the voltage conversion process and improving the working efficiency of the charge pump.

[0059] In a preferred embodiment, the first voltage source V1 and the second voltage source V2 are the same power source.

[0060] according to Figure 5When the first control signal G1 is V1-Vpre, the third control signal G3 is V1, the second control signal G2 is V2, and the fourth control signal G4 is V2-Vpre, the first switch tube M1 and the third switch tube M3 are turned on, and the second switch tube M2 and the fourth switch tube M4 are turned off, charging the first capacitor C1. Point A is the connection point between the third terminal of the first switch tube M1 and the first terminal of the first capacitor. The voltage at point A rises as C1 charges. Finally, the voltage at point A is V1, and the voltage at point B is V1-Vpre. The first end of the first switch tube M1 is connected to the first voltage source V1, and the voltage at the first end of the first switch tube M1 is V1. The second end of the first switch tube M1 is connected to the first control signal G1, and the voltage at the second end of the first switch tube M1 is V1-Vpre. The third end of the first switch tube M1 is connected to point A, and the voltage at the third end of the first switch tube M1 is V1. Therefore, during the charging process of C1, the voltage difference between the first end and the second end, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end of the first switch tube M1 do not exceed the pre-adjusted voltage Vpre, and the voltage difference between points A and B at both ends of C1 also does not exceed the pre-adjusted voltage Vpre. The first end of the third switch tube M3 is connected to the voltage regulation signal, and the voltage value of the first end of the third switch tube M3 is V1-Vpre. The second end of the third switch tube M3 is connected to the third control signal G3, and the voltage value of the second end of the third switch tube M3 is V1. The third end of the third switch tube M3 is connected to point B, and the voltage value of the third end of the third switch tube M3 is V1-Vpre. Therefore, during the charging process of C1, the voltage difference between the first and second ends, the voltage difference between the first and third ends, and the voltage difference between the second and third ends of the third switch tube M3 do not exceed the pre-regulated voltage Vpre.

[0061] When the first control signal G1 is V1 and the third control signal G3 is V1-Vpre, the first and third switches M1 and M3 are off, M2 and M4 are on, and C1 discharges. Initially, the voltage at point A is V2+Vpre, and the voltage at point B is V2. That is, the voltage at the third terminal of the first switch M1 is V2+Vpre, the voltage at the first terminal of the first switch M1 is V1, the voltage at the second terminal of the first switch M1 is V1, and the voltage at the third terminal of the third switch M3 is V2. The voltage at the first terminal of the third switch M3 is V1-Vpre, and the voltage at the second terminal of the third switch M3 is V1-Vpre. The relationship between V1 and V2 is that V1 is greater than or equal to V2. In the preferred embodiment, V1 and V2 are from the same voltage source, that is, V1=V2. Therefore, when the first switch M1 is off, the voltage difference between any two terminals of the first switch M1, the voltage difference between any two terminals of the third switch M3, and the voltage across C1 do not exceed the pre-adjusted voltage Vpre.

[0062] The circuit analysis of the other switching devices in on and off states is similar to that of M1. When the second control signal G2 is V2 + Vpre and the fourth control signal G4 is V2, the second and fourth switches M2 and M4 are on, while the first and third switches M1 and M3 are off, and C1 begins discharging. At the initial discharge, the voltage at point A is V2 + Vpre, and the voltage at point B is V2. The first terminal of the second switch M2 is connected to point A, the second terminal is connected to the second control signal G2, and the third terminal is connected to the output voltage Vo = V2 + Vpre. This means that the voltages at the first terminal, second terminal, and third terminal of the second switch M2 are V2 + Vpre, V2 + Vpre, and V2 + Vpre, respectively. During the discharge process of C1, the voltage differences between the first and second terminals, the first and third terminals, and the second and third terminals of the second switch M2 do not exceed the pre-adjusted voltage Vpre. The fourth switch M4 has a first terminal connected to point B, a second terminal connected to the fourth control signal G4, and a third terminal connected to the second voltage source. That is, the voltage at the first terminal, the second terminal, and the third terminal of the fourth switch M4 are V2, V2, and V2, respectively. During the discharge process of C1, the voltage difference between the first and second terminals, the voltage difference between the first and third terminals, and the voltage difference between the second and third terminals of the fourth switch M4 do not exceed the pre-adjusted voltage Vpre.

[0063] When the first voltage source V1 and the second voltage source V2 are the same voltage source, the voltage at the second node B changes from the voltage-regulated signal V2-Vpre to the second voltage source V2. That is, the voltage swing at the second node B is the pre-regulated voltage Vpre. Therefore, the energy loss of the charge pump is only related to the pre-regulated voltage Vpre and is independent of the voltage source voltage. Regardless of the voltage source voltage, the energy loss of the charge pump does not increase, ensuring that the voltage source maintains high efficiency even under high voltage conditions.

[0064] Furthermore, the energy loss of the charge pump is related to the pre-adjustment voltage Vpre, which is generated by the voltage stabilization module 210 . The energy loss of the charge pump can also be reduced by adjusting the pre-adjustment voltage Vpre generated by the voltage stabilization module 210 .

[0065] The charge pump circuit provided by the present invention utilizes a voltage stabilization module to generate a voltage-regulated signal associated with a first voltage source. The charge pump circuit is connected between the first and second voltage sources and the voltage-regulated signal, ensuring that the voltage swing between any two of the first, second, and third terminals of a switching transistor within the charge pump module and the voltage swing between the two terminals of a capacitor are less than or equal to a pre-regulated voltage. This reduces the voltage swing between any two of the three terminals of the switching transistor and the voltage swing across the capacitor, minimizing losses caused by voltage swings on the parasitic capacitance of the switching transistor and losses caused by capacitor charging and discharging. This improves the operating efficiency of the charge pump while maintaining a given area, while also reducing the voltage withstand requirements of the MOS transistor.

[0066] Furthermore, the first voltage source and the second voltage source are the same voltage source, and the voltage swing of the node between the switching capacitor and the switching tube can be controlled within the voltage regulation signal. The energy loss of the charge pump is independent of the size of the voltage source, and it can still maintain high efficiency operation when the voltage source is high.

[0067] Furthermore, using a voltage source can also reduce chip area and lower costs.

[0068] Figure 6 FIG2 is a schematic diagram showing a charge pump circuit according to a second embodiment of the present invention. Compared with the first embodiment, the circuit connection mode of the charge pump module in the second embodiment is different from that in the first embodiment.

[0069] See also Figure 6 The charge pump module 220 includes (M1-M4), a first switched capacitor C1, and a second switched capacitor C2. The first switch M1 and the third switch M3 are connected in series between the first voltage source V1 and the output of the charge pump module (i.e., the output voltage Vo); the second switch M2 and the fourth switch M4 are connected in series between the first voltage source V1 and the output of the charge pump module (i.e., the output voltage Vo).

[0070] The positive terminal of the first switching capacitor C1 is connected to the fourth node E between the first switching transistor M1 and the third switching transistor M3, and the negative terminal is connected to the control signal. The positive terminal of the second switching capacitor C2 is connected to the fifth node between the second switching transistor M2 and the fourth switching transistor M4, and the negative terminal is connected to the control signal.

[0071] The control ends of the second switch tube M2 and the fourth switch tube M4 are connected to the fourth node E; the control ends of the first switch tube M1 and the third switch tube M3 are connected to the fourth node E.

[0072] The control module 230 is configured to generate a first control signal G1 and a second control signal G2 according to a clock signal CLK. The first control signal G1 is connected to the negative terminal of the first switched capacitor C1, and the second control signal G2 is connected to the negative terminal of the second switched capacitor C2. The first control signal G1 and the second control signal G2 are completely opposite.

[0073] The charge pump module 220 further includes first to fourth inverters. The first control signal G1 is connected to the negative end of the first switch capacitor C1 via the first and second inverters; the second control signal G2 is connected to the negative end of the second switch capacitor C2 via the third and fourth inverters.

[0074] The positive power supply terminals of the first to fourth inverters are connected to a first voltage source V1, and the negative power supply terminals are connected to the output terminal of the voltage regulator module 210. The input terminal of the first inverter receives a first control signal G1, the output terminal of the first inverter is connected to the input terminal of the second inverter, and the output terminal of the second inverter is connected to the negative terminal of the first switched capacitor C1. The input terminal of the third inverter receives a second control signal G2, the output terminal of the third inverter is connected to the input terminal of the fourth inverter, and the output terminal of the fourth inverter is connected to the negative terminal of the second switched capacitor C2.

[0075] The first control signal G1 is converted into a third control signal G3 after passing through a first inverter and a second inverter. The phases of the first control signal G1 and the third control signal G3 remain unchanged, and their amplitudes are between V1 and Vs. The second control signal G2 is converted into a fourth control signal G4 after passing through a third inverter and a fourth inverter. The phases of the second control signal G2 and the fourth control signal G4 remain unchanged, and their amplitudes are between Vs and V1. The third control signal G3 and the fourth control signal G4 are in opposite phases.

[0076] During the first time period, when the third control signal G3 is V1 and the fourth control signal G4 is Vs = V1 - Vpre, the second and fourth switches M2 and M4 are off, while the third switch M3 remains on. The first switch M1 is first turned on to charge the second switched capacitor C2, causing the voltage at the fifth node E to rise to V1. After the second switched capacitor C2 is fully charged, the voltage difference across the second switched capacitor C2 is Vpre, and the voltage at the fifth node E is V1, causing the first switch M1 to be turned off. Since the voltage difference across the first switched capacitor C1 was Vpre in the previous period, the output voltage at this time is the voltage at the fourth node D, i.e., Vo = V1 + Vpre.

[0077] The first end of the first switch tube M1 is connected to the first voltage source, the second end is connected to the fifth node E, and the third end is connected to the fourth node D. Then, the voltage at the first end of the first switch tube M1 is V1, the voltage at the second end is V1, and the voltage at the third end is V1+Vpre. Therefore, it can be seen that during the charging process of the second switch capacitor C2, the voltage difference between the first end and the second end, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end of the first switch tube M1 do not exceed the pre-adjusted voltage Vpre, and the voltage difference across C2 also does not exceed the pre-adjusted voltage Vpre.

[0078] The first end of the third switch tube M3 is connected to the fourth node D, the second end is connected to the fifth node E, and the third end is connected to the output voltage Vo. Therefore, the voltage at the first end of the third switch tube M3 is V1+Vpre, the voltage at the second end is V1, and the voltage at the third end is V1+Vpre. Therefore, it can be seen that during the charging process of the second switch capacitor C2, the voltage difference between the first end and the second end, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end of the third switch tube M3 do not exceed the pre-adjusted voltage Vpre, and the voltage difference across C2 also does not exceed the pre-adjusted voltage Vpre.

[0079] During the second time period, when the third control signal G3 is Vs = V1 - Vpre and the fourth control signal G4 is V1, the first and third switches M1 and M3 are turned off, while the fourth switch M4 remains on. The second switch M2 is first turned on to charge the first switched capacitor C1, causing the voltage at the fourth node D to rise to V1. After the first switched capacitor C1 is fully charged, the voltage difference across the first switched capacitor C1 is Vpre, and the voltage at the fourth node D is V1 + V1pre. The second switch M2 is turned off. Because the voltage difference across the second switched capacitor C2 was Vpre in the previous period, the output voltage is now the voltage at the fifth node E, i.e., Vo = V1 + Vpre. These two states alternate, ensuring that the output voltage Vo is constantly maintained at V1 + Vpre.

[0080] The first end of the second switch tube M2 is connected to the first voltage source, the second end is connected to the fourth node D, and the third end is connected to the fifth node E. Then, the voltage at the first end of the second switch tube M2 is V1, the voltage at the second end is V1+Vpre, and the voltage at the third end is V1. Therefore, it can be seen that during the charging process of the first switch capacitor C1, the voltage difference between the first end and the second end, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end of the second switch tube M2 do not exceed the pre-adjusted voltage Vpre, and the voltage difference across C2 also does not exceed the pre-adjusted voltage Vpre.

[0081] The first end of the fourth switch tube M4 is connected to the fifth node E, the second end is connected to the fourth node D, and the third end is connected to the output voltage Vo. Therefore, the voltage at the first end of the fourth switch tube M4 is V1+Vpre, the voltage at the second end is V1, and the voltage at the third end is V1+Vpre. Therefore, it can be seen that during the charging process of the second switched capacitor C2, the voltage difference between the first and second ends, the voltage difference between the first and third ends, and the voltage difference between the second and third ends of the fourth switch tube M4 do not exceed the pre-adjusted voltage Vpre, and the voltage difference across C2 also does not exceed the pre-adjusted voltage Vpre.

[0082] The voltage between any two ends of the first switching transistor M1 to the fourth switching transistor M4 and the voltage difference between the first switching capacitor and the second switching capacitor do not exceed the pre-adjusted voltage.

[0083] The charge pump circuit provided by the present invention utilizes a voltage stabilization module to generate a voltage-regulated signal associated with a first voltage source. The charge pump circuit is connected between the first voltage source and the voltage-regulated signal, ensuring that the voltage swing between any two of the first, second, and third terminals of a switching transistor within the charge pump module, as well as the voltage swing between the two terminals of a capacitor, is less than or equal to a pre-regulated voltage. This reduces both the voltage swing between any two of the three terminals of the switching transistor and the voltage swing across the capacitor, minimizing losses caused by voltage swings on the parasitic capacitance of the switching transistor and losses caused by capacitor charging and discharging. This improves the operating efficiency of the charge pump while maintaining a given area, while also reducing the voltage withstand requirements of the MOS transistor.

[0084] Furthermore, using a voltage source can also reduce chip area and lower costs.

[0085] An embodiment of the present invention further provides a control method for a charge pump circuit, wherein the charge pump includes a plurality of switching tubes and at least one switching capacitor, and the control method includes the following steps.

[0086] In step S01 , a voltage regulation signal Vs is generated according to a first voltage source V1 , wherein a voltage difference between the first voltage source V1 and the voltage regulation signal Vs is a pre-adjusted voltage Vpre, ie, Vs=V1−Vpre.

[0087] In step S02, the switched capacitor is charged according to the first voltage source V1 and the voltage regulation signal Vs to generate an output voltage Vo. The voltage swing between any two of the first, second, and third terminals of each switching transistor and the voltage swing between the two terminals of the capacitor are less than or equal to the magnitude of the pre-regulated voltage.

[0088] The control method further includes step S03.

[0089] In step S03 , a control signal is generated according to the clock signal CLK, and the control signal is used to control the on and off of the switch tube.

[0090] Specifically, when the control signal is at a high level, the control signal is a first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

[0091] In a preferred embodiment, in step S02 , the switched capacitor is charged according to the first voltage source V1 , the second voltage source V2 and the voltage regulation signal Vs to generate the output voltage Vo.

[0092] While embodiments of the present invention have been described above, these embodiments do not exhaustively describe all details and do not limit the invention to the specific embodiments described. Obviously, many modifications and variations are possible based on the above description. These embodiments are selected and described in detail in this specification in order to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better utilize the present invention and its modifications. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A charge pump circuit, characterized in that: include: A voltage stabilization module, generating a voltage regulation signal according to a first voltage source; a charge pump module, generating an output voltage according to a first voltage source and the voltage regulation signal; The charge pump module includes a first input terminal and a second input terminal, wherein the first input terminal is connected to the first voltage source, and the second input terminal is connected to the output terminal of the voltage stabilization module to receive a voltage regulation signal. The voltage difference between the first voltage source and the voltage regulation signal is a pre-adjusted voltage, The charge pump module includes multiple switching tubes and at least one switching capacitor, and the swing of the voltage between any two ends of the first end, the second end and the third end of each switching tube and the voltage between the two ends of the capacitor is less than or equal to the size of the pre-adjusted voltage.

2. The charge pump circuit according to claim 1, wherein: Also includes: The control module is used to generate a control signal according to the clock signal, and the control signal is used to control the on and off of the switch tube.

3. The charge pump circuit according to claim 2, wherein: When the control signal is at a high level, the control signal is a first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

4. The charge pump circuit according to claim 2, wherein: The charge pump further includes a third input terminal connected to a second voltage source.

5. The charge pump circuit according to claim 4, wherein: The charge pump module includes first to fourth switching tubes and a first switching capacitor, wherein: The first switch tube and the third switch tube are turned on, and the first switch tube, the first switch capacitor and the third switch tube are connected in series between the first voltage source and the voltage regulation signal; A first node between the first switch tube and the first switch capacitor is connected to the output end of the charge pump module via the second switch tube; A second node between the third switch tube and the first switch capacitor is connected to the second voltage source via the fourth switch tube.

6. The charge pump circuit according to claim 5, wherein: The control signals include first to fourth control signals, the first control signal controls the on and off of the first switch tube, the second control signal controls the on and off of the second switch tube, the third control signal controls the on and off of the third switch tube, and the fourth control signal controls the on and off of the fourth switch tube.

7. The charge pump circuit according to claim 6, wherein: There is a certain dead time between the first control signal and the third control signal and the second control signal and the fourth control signal to prevent the four switch tubes from being turned on at the same time.

8. The charge pump circuit according to claim 4, wherein: The output voltage is the sum of the second voltage and the pre-regulated voltage.

9. The charge pump circuit according to claim 4, wherein: The first voltage source and the second voltage source are the same voltage source.

10. The charge pump circuit according to claim 2, wherein: The control signal includes a first control signal and a second control signal, and the first control signal and the second control signal are opposite.

11. The charge pump circuit according to claim 10, wherein: The charge pump module includes first to fourth switching tubes, a first switching capacitor and a second switching capacitor, wherein: The first switch tube and the third switch tube are turned on, and the first switch tube and the third switch tube are connected in series between the first voltage source and the output end of the charge pump module; The second switch tube and the fourth switch tube are turned on, and the second switch tube and the fourth switch tube are connected in series between the first voltage source and the output end of the charge pump module; The positive end of the first switch capacitor is connected to the fourth node between the first switch transistor and the third switch transistor, and the negative end is connected to the first control signal; The control ends of the second switch tube and the fourth switch tube are connected to the fourth node; The positive end of the second switch capacitor is connected to the fifth node between the second switch transistor and the fourth switch transistor, and the negative end is connected to the second control signal; The control ends of the first switch tube and the third switch tube are connected to the fifth node.

12. The charge pump circuit according to claim 11, wherein: The charge pump module further includes first to fourth inverters; The first control signal is converted into a third control signal via the first inverter and the second inverter, and the third control signal is connected to the negative terminal of the first switch capacitor; The second control signal is output as a fourth control signal via a third inverter and a fourth inverter, and the fourth control signal is connected to the negative terminal of the second switch capacitor.

13. The charge pump circuit according to claim 12, wherein: The positive power supply terminals of the first inverter to the fourth inverter are connected to a first voltage source, and the negative power supply terminals are connected to the output terminal of the voltage stabilizing module.

14. The charge pump circuit according to claim 5 or 11, characterized in that: The first to fourth switching tubes are MOS transistors.

15. The charge pump circuit according to claim 1, wherein: The voltage stabilizing module includes a Zener tube, a current limiting resistor and a high-voltage driving tube, wherein the Zener tube and the current limiting resistor are connected in series between a first voltage source and a ground terminal, the high-voltage driving tube is connected between an output terminal of the voltage stabilizing module and a ground terminal, and a gate of the high-voltage driving tube is connected to a fifth node between the Zener tube and the current limiting resistor.

16. A method for controlling a charge pump circuit, characterized in that: The charge pump includes a plurality of switching tubes and at least one switching capacitor, and the control method includes: generating a voltage-regulated signal according to a first voltage source, wherein a voltage difference between the first voltage source and the voltage-regulated signal is a pre-regulated voltage; charging the switched capacitor according to the first voltage source and the voltage regulation signal to generate an output voltage; The swing amplitude of the voltage between any two ends of the first end, the second end and the third end of each switch tube and the voltage between the two ends of the capacitor is less than or equal to the magnitude of the pre-adjusted voltage.

17. The control method according to claim 16, characterized in that: Also includes: A control signal is generated according to the clock signal, and the control signal is used to control the on and off of the switch tube.

18. The control method according to claim 17, characterized in that: When the control signal is at a high level, the control signal is a first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

19. The control method according to claim 17, characterized in that: Also includes: The switching capacitor is charged according to the first voltage source, the second voltage source and the voltage regulation signal to generate an output voltage.

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