Power-on detection circuit and electronic equipment

Abstract

The present invention discloses a power-on detection circuit and an electronic device, wherein the power-on detection circuit includes: a storage capacitor; a pull-up module for pulling up the voltage of a first node based on a power supply voltage and a reference voltage; a pull-down module for pulling down the voltage of the first node based on a feedback signal; an output module; and a feedback module for providing the feedback signal, wherein the feedback signal is related to the output signal of the output module. When the circuit starts to power on, the power supply voltage and the reference voltage increase from zero, the reference voltage increases to a first voltage and remains constant, and the rate of increase of the reference voltage is less than the rate of increase of the power supply voltage. By applying the technical solution provided by the present invention, the circuit structure is simple, and precise control of the power-on detection threshold can be achieved, thereby avoiding abnormal system operation due to power supply voltage fluctuations.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integration technology, and in particular to a power-on detection circuit and electronic equipment. Background Art

[0002] With the continuous development of science and technology, more and more electronic devices are widely used in people's daily life and work, bringing great convenience to people's daily life and work, and becoming an indispensable tool for people today.

[0003] Power-on detection circuits are essential in various electronic systems. By monitoring the power supply voltage, they ensure that the circuit operates properly only when it is above a certain value. This prevents logic errors that could damage components if the power supply voltage is too low. However, most current power-on detection circuits suffer from inaccurate detection thresholds or increase system power consumption during normal operation. Summary of the Invention

[0004] In view of this, the present invention provides a power-on detection circuit and an electronic device, which have a simple circuit structure and can achieve precise control of the power-on detection threshold.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] A power-on detection circuit, comprising:

[0007] a storage capacitor, wherein one plate of the storage capacitor is connected to the ground terminal, and the other plate of the storage capacitor is connected to the first node;

[0008] a pull-up module, configured to pull up the voltage of the first node based on a power supply voltage and a reference voltage;

[0009] a pull-down module, configured to pull down the voltage of the first node based on a feedback signal;

[0010] an output module, wherein an input terminal of the output module is connected to the first node;

[0011] a feedback module, the feedback module being configured to provide the feedback signal, wherein the feedback signal is related to the output signal of the output module;

[0012] When the circuit starts to power on, the power supply voltage and the reference voltage start to increase from zero, the reference voltage increases to a first voltage and then remains constant, and the increase rate of the reference voltage is less than the increase rate of the power supply voltage.

[0013] Preferably, in the above-mentioned power-on detection circuit, after the pull-up capability of the pull-up module meets a preset condition, the pull-down module switches from the first pull-down strength to the second pull-down strength;

[0014] Wherein, the second pull-down strength is smaller than the first pull-down strength.

[0015] Preferably, in the above power-on detection circuit, before the power supply voltage is no greater than the second voltage, the pull-down module has the first pull-down strength, the pull-up module is turned off, and the pull-up strength of the pull-up module is less than the first pull-down strength; the second voltage is greater than the first voltage;

[0016] When the power supply voltage starts to be greater than the second voltage, the pull-up module starts to conduct, the pull-up strength of the pull-up module is greater than the first pull-down strength, and as the power supply voltage gradually increases, the pull-up strength of the pull-up module gradually increases; when the output signal changes from 0 to the current power supply voltage, the pull-down module is controlled to switch to the second pull-down strength according to the feedback signal.

[0017] Preferably, in the above power-on detection circuit, before the power supply voltage is no greater than the second voltage, the pull-down module connects the first node to the ground terminal through a first path, and the first path has the first pull-down strength;

[0018] When the power supply voltage is greater than the second voltage, the pull-up strength is greater than the first pull-down strength. When the power supply voltage is greater than the sum of the second voltage and a set constant, the pull-down module connects the first node to the ground terminal via a second path. The second path has the second pull-down strength, and the second pull-down strength is less than the first pull-down strength.

[0019] Preferably, in the above-mentioned power-on detection circuit, the pull-up module includes: a first transistor, wherein the gate of the first transistor is used to input the reference voltage, the source of the first transistor is used to input the power supply voltage, and the drain of the first transistor is connected to the first node; the second voltage is equal to the sum of the first voltage and the threshold voltage of the first transistor;

[0020] The first transistor is turned off when the power supply voltage is lower than the first voltage, and starts to be turned on when the power supply voltage starts to be higher than the second voltage.

[0021] Preferably, in the above power-on detection circuit, the first transistor is a PMOS.

[0022] Preferably, in the above power-on detection circuit, the pull-down module includes: a second transistor, a third transistor, a first resistor and a second resistor;

[0023] The gate of the second transistor is connected to the ground terminal, the source of the second transistor is connected to the second node via the first resistor, and the drain of the second transistor is connected to the first node;

[0024] The gate of the third transistor inputs the feedback signal, the drain thereof is connected to the second node, and the source thereof is connected to the ground end;

[0025] The second transistor is continuously turned on; the third transistor is turned on before the power supply voltage is no greater than the sum of the second voltage and the set constant; and the third transistor is turned off after the power supply voltage is greater than the sum of the second voltage and the set constant.

[0026] Preferably, in the above power-on detection circuit, the second transistor is an NMOS.

[0027] Preferably, in the above-mentioned power-on detection circuit, the feedback signal is an inverted signal of the output signal of the output module;

[0028] The feedback module includes a wire for inputting the inverted signal, and the third transistor is an NMOS.

[0029] Preferably, in the above-mentioned power-on detection circuit, the feedback signal is the output signal of the output module;

[0030] The feedback module includes a wire for inputting the output signal, and the third transistor is a PMOS.

[0031] Preferably, in the above power-on detection circuit, when the pull-down module switches from the first pull-down strength to the second pull-down strength, the output signal follows the power supply voltage, and the two remain consistent.

[0032] Preferably, in the above power-on detection circuit, the output module includes: a Schmitt trigger and an inverter;

[0033] The input end of the Schmitt trigger is connected to the first node, and the output end is connected to the third node;

[0034] The input end of the inverter is connected to the third node, and the output end of the inverter is the output end of the output module.

[0035] The present invention further provides an electronic device, comprising the power-on detection circuit as described in any one of the above items.

[0036] From the above description, it can be seen that in the power-on detection circuit and electronic device provided by the technical solution of the present invention, the power-on detection circuit has a feedback module, which can generate hysteresis based on the introduced feedback signal, thereby avoiding abnormal system operation due to power supply voltage fluctuations, and the circuit structure is simple, which can realize precise control of the power-on detection threshold. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0038] The structures, proportions, sizes, etc. depicted in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not intended to limit the conditions under which the present invention can be implemented and therefore have no substantive technical significance. Any structural modifications, changes in proportional relationships, or adjustments in size should still fall within the scope of the technical contents disclosed in the present invention without affecting the effects and objectives that can be achieved by the present invention.

[0039] Figure 1 This is a schematic diagram of a conventional power-on detection circuit;

[0040] Figure 2 This is another conventional power-on detection circuit schematic;

[0041] Figure 3 A schematic diagram of a power-on detection circuit provided by an embodiment of the present invention;

[0042] Figure 4 This is a working waveform diagram of the power-on detection circuit in an embodiment of the present invention;

[0043] Figure 5 A schematic structural diagram of another power-on detection circuit provided by an embodiment of the present invention;

[0044] Figure 6 A schematic structural diagram of another power-on detection circuit provided by an embodiment of the present invention;

[0045] Figure 7 A schematic structural diagram of another power-on detection circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0046] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0047] Power-on detection circuits are essential in various electronic systems. By monitoring the power supply voltage, they ensure that the circuit operates properly only when it is above a certain value. This prevents logic errors that could damage components if the power supply voltage is too low. However, most current power-on detection circuits suffer from inaccurate detection thresholds or increase system power consumption during normal operation.

[0048] refer to Figure 1 , Figure 1 This is a schematic diagram of a conventional power-on detection circuit structure. Figure 1 As shown, the power supply voltage VDD is connected to the upper plate of capacitor C through a pull-up resistor R, and the lower plate of capacitor C is grounded. When the power supply voltage VDD exceeds the inverter threshold, the output signal VDD_OK jumps high, indicating that the power supply is powered on. This circuit structure has no DC current path, making it highly advantageous in low-power products. However, the power-on detection threshold of this structure is determined by the inverter threshold, which is significantly affected by process variations and cannot be continuously adjusted, limiting its widespread application.

[0049] refer to Figure 2 , Figure 2 This is a schematic diagram of another conventional power-on detection circuit structure. Figure 2 The circuit structure shown is in Figure 1 The power-on detection threshold of the circuit is set by the voltage divider network R1 and R2 and the Schmitt trigger 21. Figure 2 The size parameters of the Schmitt trigger 21 and the values ​​of the voltage divider networks R1 and R2 can achieve precise control of the power-on detection threshold. However, this circuit structure introduces a DC current path, and the current increases with the increase of the power supply voltage VDD, which is not conducive to the application of low-power circuits.

[0050] In response to the problems existing in the above two power-on detection circuit solutions, the present invention proposes a power-on detection circuit and an electronic device, which can achieve precise control of the power-on detection threshold and avoid a significant increase in circuit power consumption during normal operation.

[0051] The power-on detection circuit comprises:

[0052] a storage capacitor, wherein one plate of the storage capacitor is connected to the ground terminal, and the other plate of the storage capacitor is connected to the first node;

[0053] a pull-up module, configured to pull up the voltage of the first node based on a power supply voltage and a reference voltage;

[0054] a pull-down module, configured to pull down the voltage of the first node based on a feedback signal;

[0055] an output module, wherein an input terminal of the output module is connected to the first node;

[0056] a feedback module, the feedback module being configured to provide the feedback signal, wherein the feedback signal is related to the output signal of the output module;

[0057] When the circuit starts to power on, the power supply voltage and the reference voltage start to increase from zero, the reference voltage increases to a first voltage and then remains constant, and the increase rate of the reference voltage is less than the increase rate of the power supply voltage.

[0058] The circuit of the present invention is simple to implement and can achieve precise control of the power-on detection threshold, which is continuously adjustable. During normal system operation, the DC power consumption of the power-on detection circuit is determined by the pull-down current source and is independent of the power supply voltage. Therefore, it can be controlled within a very small range. In addition, by introducing hysteresis into the feedback signal, it can prevent abnormal system operation caused by power supply voltage fluctuations.

[0059] From the above description, it can be seen that in the power-on detection circuit and electronic device provided by the technical solution of the present invention, the power-on detection circuit has a feedback module, which can generate hysteresis based on the introduced feedback signal, thereby avoiding abnormal system operation due to power supply voltage fluctuations, and the circuit structure is simple, which can realize precise control of the power-on detection threshold.

[0060] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0061] refer to Figure 3 and Figure 4 , Figure 3 A schematic diagram of a power-on detection circuit according to an embodiment of the present invention is provided. Figure 4 2 is a working waveform diagram of the power-on detection circuit in an embodiment of the present invention.

[0062] like Figure 3 and Figure 4 As shown, the power-on detection circuit includes:

[0063] a storage capacitor C, wherein one plate of the storage capacitor C is connected to the ground terminal, and the other plate of the storage capacitor C is connected to the first node A;

[0064] a pull-up module 31 configured to pull up the voltage of the first node A based on a power supply voltage VDD and a reference voltage Vref;

[0065] a pull-down module 32 configured to pull down the voltage of the first node A based on a feedback signal;

[0066] an output module 33, wherein an input end of the output module 33 is connected to the first node A;

[0067] a feedback module 34 , configured to provide the feedback signal, wherein the feedback signal is related to the output signal VDD_OK of the output module 33 ;

[0068] When the circuit starts to power on, the power supply voltage VDD and the reference voltage Vref start to increase from zero at the same time, for example, they can increase linearly from zero. After the reference voltage Vref increases to the first voltage Vref0, it remains constant. The increase rate of the reference voltage Vref is less than the increase rate of the power supply voltage VDD.

[0069] In the embodiment of the present invention, after the pull-up capability of the pull-up module 31 meets a preset condition, the pull-down module 32 switches from the first pull-down strength to the second pull-down strength; wherein the second pull-down strength is less than the first pull-down strength.

[0070] like Figure 4 As shown, before the power supply voltage VDD is not greater than the second voltage VTH, the pull-down module 32 has a first pull-down strength, the pull-up module 31 is turned off, and the pull-up strength of the pull-up module 31 is less than the first pull-down strength; the second voltage VTH is greater than the first voltage Vref0.

[0071] When the power supply voltage VDD starts to be greater than the second voltage VTH, the pull-up module 31 starts to turn on, and the pull-up strength of the pull-up module 31 is greater than the first pull-down strength. As the power supply voltage VDD gradually increases, the pull-up strength of the pull-up module 31 gradually increases; when the output signal VDD_OK changes from 0 to the current power supply voltage VDD, the pull-down module 32 is controlled to switch to the second pull-down strength according to the feedback signal.

[0072] In the embodiment of the present invention, when the pull-down module 32 switches from the first pull-down strength to the second pull-down strength, the output signal VDD_OK follows the power supply voltage VDD, and the two remain consistent.

[0073] It should be noted that when the circuit just starts working, the pull-up module 31 is turned off and the pull-up capability is 0. When the output signal changes from 0 to the current power supply voltage VDD, the pull-up capability is large enough to clamp the pull-down module 32 and meet the preset conditions.

[0074] In the technical solution of the present invention, the feedback module 34 can generate hysteresis based on the introduced feedback signal, thereby avoiding abnormal system operation due to fluctuations in the power supply voltage VDD, and the circuit structure is simple, which can achieve precise control of the power-on detection threshold.

[0075] In the embodiment of the present invention, before the power supply voltage VDD is no greater than the second voltage VTH, the pull-down module 32 connects the first node A to the ground terminal through the first path, and the first path has the first pull-down strength. During this process, the storage capacitor C discharges, so that the potential of the first node A is zero, thereby resetting the potential of the first node A.

[0076] Furthermore, when the power supply voltage VDD is greater than the second voltage VTH, the pull-up strength of the pull-up module 31 is greater than the first pull-down strength. When the power supply voltage VDD is greater than the sum of the second voltage VTH and the set constant ΔV, the output signal VDD_OK changes from 0 to the current power supply voltage VDD. The pull-down module 32 connects the first node A to the ground end via a second path. The second path has the second pull-down strength, and the second pull-down strength is less than the first pull-down strength.

[0077] Figure 3 The specific implementation of the power-on detection circuit can be shown in Figure 5.

[0078] like Figure 5 As shown, Figure 5 A schematic structural diagram of another power-on detection circuit provided by an embodiment of the present invention. Figure 5 In the illustrated embodiment, the pull-up module 31 includes: a first transistor MP1, wherein the gate of the first transistor MP1 is used to input the reference voltage Vref, the source of the first transistor MP1 is used to input the power supply voltage VDD, and the drain of the first transistor MP1 is connected to the first node A; the second voltage VTH is equal to the sum of the first voltage Vref0 and the threshold voltage Vthp of the first transistor MP1, that is, VTH=Vref0+Vthp (Vthp is the threshold voltage of the PMOS);

[0079] The first transistor MP1 is turned off when the power supply voltage VDD is lower than the first voltage Vref0 , and starts to be turned on when the power supply voltage VDD starts to be higher than the second voltage VTH.

[0080] The first transistor MP1 is a PMOS transistor.

[0081] like Figure 5 As shown, the pull-down module 32 includes: a second transistor MN1, a third transistor MN2, a first resistor R1, and a second resistor R2; the gate of the second transistor MN1 is connected to the ground terminal, the source thereof is connected to the second node B through the first resistor R1, and the drain thereof is connected to the first node A; the gate of the third transistor MN2 inputs the feedback signal, the drain thereof is connected to the second node B, and the source thereof is connected to the ground terminal;

[0082] The second transistor MN1 is continuously turned on; the third transistor MN2 is turned on before the power supply voltage VDD is no greater than the sum of the second voltage VTH and the set constant ΔV; and the third transistor MN2 is turned off after the power supply voltage VDD is greater than the sum of the second voltage VTH and the set constant ΔV.

[0083] It should be noted that the first path refers to the state in which the second transistor MN1 and the third transistor MN2 of the pull-down module 32 are both turned on, and the second path refers to the state in which the second transistor MN1 of the pull-down module 32 is turned on and the third transistor MN2 is turned off.

[0084] In an embodiment of the present invention, when the power supply voltage VDD begins to exceed the second voltage VTH, the first transistor MP1 begins to conduct. When the power supply voltage VDD is greater than the second voltage VTH but less than the sum of the second voltage VTH and a set constant ΔV, the first transistor MP1 operates in a saturation region. When the power supply voltage VDD exceeds the sum of the second voltage VTH and the set constant ΔV, the first transistor MP1 operates in an amplification region. Ideally, when the power supply voltage VDD equals the second voltage VTH, the first transistor MP1 is fully conducted. However, due to factors such as the manufacturing process and device parameters, there may be a certain delay in the conduction of the first transistor MP1, where ΔV is a constant related to the device parameters and manufacturing process of the first transistor MP1.

[0085] In the embodiment of the present invention, the pull-down module 32 generates a pull-down signal by a current source composed of a depletion-type second transistor MN1, an enhancement-type third transistor MN2, a first resistor R1 and a second resistor R2. The second transistor MN1 is an NMOS, and the third transistor MN2 is an NMOS.

[0086] In one way, Figure 5 As shown, the second transistor MN1 is an NMOS, the feedback signal is the inverted signal VDD_OK_B of the output signal VDD_OK of the output module 33, and the two have a phase difference of 180°; the feedback module 34 includes a wire for inputting the inverted signal VDD_OK_B, and the third transistor MN2 is an NMOS.

[0087] like Figure 5 As shown, the output module 33 includes a Schmitt trigger 331 and an inverter 332. The input of the Schmitt trigger 331 is connected to the first node A, and the output is connected to the third node D. The input of the inverter 332 is connected to the third node D, and the output of the inverter 332 is the output of the output module 33. The feedback module 34 is directly connected to the third node D and the gate of the third transistor MN2.

[0088] In the embodiment of the present invention, the gate of the third transistor MN2 is directly controlled by the output of the Schmitt trigger 331 . If the third transistor MN2 is replaced with a PMOS transistor, its gate can be directly controlled by the output of the inverter 332 .

[0089] Figure 3 The specific implementation of the power-on detection circuit shown can also be as follows Figure 6 shown.

[0090] In another way, Figure 6 As shown, Figure 6 A schematic diagram of the structure of another power-on detection circuit provided by an embodiment of the present invention. Figure 5 The difference between the two methods is that Figure 6 In the illustrated embodiment, the feedback signal is the output signal VDD_OK of the output module 33. The feedback module 34 includes a wire for inputting the output signal VDD_OK. The third transistor MN2 is a PMOS transistor. The feedback module 34 is directly connected to the output terminal of the output module 33 and the gate of the third transistor MN2.

[0091] exist Figure 6 In the embodiment shown, the Schmitt trigger 331 can also be replaced with an inverter, which will not affect the overall function. However, compared with the inverter, the advantage of using the Schmitt trigger 331 is that it can eliminate output jitter.

[0092] Figure 5 and Figure 6 In the power-on detection circuit shown in the figure, its equivalent circuit can be as follows Figure 7 shown.

[0093] refer to Figure 7 , Figure 7 This is a schematic diagram of the structure of another power-on detection circuit provided by an embodiment of the present invention. The pull-up module 31 compares the power supply voltage VDD with a reference voltage Vref. When the power supply voltage VDD is greater than the reference voltage Vref, that is, when the power supply voltage VDD rises to Vref + |Vthp|, the switch SW1 closes, connecting the power supply voltage VDD to the upper plate of the storage capacitor C through the variable resistor R, thereby achieving pull-up. When the output signal VDD_OK jumps high, the third transistor MN2 is simultaneously turned off, reducing the DC current of the power-on detection circuit and being independent of the power supply voltage VDD.

[0094] In the embodiment of the present invention, by detecting whether the power supply voltage VDD rises above the second voltage VTH, when the power supply voltage VDD is lower than the second voltage VTH, the output signal VDD_OK is output as 0, and when the power supply voltage VDD is higher than the second voltage VTH, the output signal VDD_OK is output as 1.

[0095] Specifically, the power supply voltage VDD starts to rise from zero. When the power supply voltage VDD is less than the second voltage VTH, switch SW1 turns off and switch SW2 turns on. At this time, the pull-up module 31 is turned off, and the pull-down module 32, which is composed of current sources Ib1 and Ib2, has a stronger pull-down capability than a pull-up capability. The output signal VDD_OK is 0. As the power supply voltage VDD further increases, when the power supply voltage VDD rises to a value greater than the second voltage VTH, SW1 turns on and SW2 turns off. At this time, the pull-down module 32 is composed only of Ib1, and the pull-up capability of the pull-up module 31 increases with the increase in the power supply voltage VDD. Therefore, the output signal VDD_OK is 1.

[0096] It should be noted that when the output signal VDD_OK is high, it indicates that the power supply voltage VDD is higher than the power-on detection threshold. When the output signal VDD_OK is low, it indicates that the power supply voltage VDD is lower than the power-on detection threshold. The level of the output signal VDD_OK is only determined by the relative strength of the pull-up module 31 and the pull-down module 32, and has no direct relationship with the feedback signal.

[0097] In this embodiment of the present invention, when the power supply voltage VDD is lower than the power-on detection threshold, switch SW2 is closed, and Ib1 and Ib2 are connected in parallel to form a pull-down path. When the power supply voltage VDD is higher than the power-on detection threshold, the system operates normally, and switch SW2 is opened. At this time, the power consumption of the power-on detection circuit is determined only by current source Ib1.

[0098] Feedback module 34 determines whether to close switch SW2 based on the output of Schmitt trigger 331 and inverter 332. Specifically, when output signal VDD_OK is high, switch SW2 is open; otherwise, switch SW2 is closed. Output signal VDD_OK can be fed back to pull-down module 32 to generate hysteresis by controlling the closing and opening of switch SW2.

[0099] The circuit of the present invention is simple to implement and can achieve precise control of the power-on detection threshold, which is continuously adjustable. During normal system operation, the DC power consumption of the power-on detection circuit is determined by the pull-down current source and is independent of the power supply voltage. Therefore, it can be controlled within a very small range. In addition, by introducing hysteresis into the feedback signal, it can prevent abnormal system operation caused by power supply voltage fluctuations.

[0100] From the above description, it can be seen that in the power-on detection circuit provided by the technical solution of the present invention, the power-on detection circuit has a feedback module, which can generate hysteresis based on the introduced feedback signal, thereby avoiding abnormal system operation due to power supply voltage fluctuations, and the circuit structure is simple, which can realize precise control of the power-on detection threshold.

[0101] Based on the above embodiments, another embodiment of the present invention further provides an electronic device, comprising the power-on detection circuit described in the above embodiments. The electronic device employs the power-on detection circuit described in the above embodiments to precisely control the power-on detection threshold, thereby preventing abnormal system operation due to power supply voltage fluctuations.

[0102] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on the differences from other embodiments, and reference can be made to the corresponding similar parts between the various embodiments. For the electronic device disclosed in the embodiments, since it corresponds to the power-on detection circuit disclosed in the embodiments, the description is relatively simple. For relevant parts, refer to the description of the power-on detection circuit.

[0103] It should be noted that in the description of the present invention, it should be understood that the terms "upper," "lower," "top," "bottom," "inner," "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of the present invention and simplify the description. They do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. When a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally located component.

[0104] It should also be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such article or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the article or device comprising the aforementioned elements.

[0105] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power-on detection circuit, characterized in that: include: a storage capacitor, wherein one plate of the storage capacitor is connected to the ground terminal, and the other plate of the storage capacitor is connected to the first node; a pull-up module, configured to pull up the voltage of the first node based on a power supply voltage and a reference voltage; a pull-down module, configured to pull down the voltage of the first node based on a feedback signal; an output module, wherein an input terminal of the output module is connected to the first node; a feedback module, the feedback module being configured to provide the feedback signal, wherein the feedback signal is related to the output signal of the output module; When the circuit starts to power on, the power supply voltage and the reference voltage start to increase from zero, the reference voltage increases to a first voltage and then remains constant, and the increase rate of the reference voltage is less than the increase rate of the power supply voltage.

2. The power-on detection circuit according to claim 1, characterized in that: After the pull-up capability of the pull-up module meets a preset condition, the pull-down module switches from the first pull-down strength to the second pull-down strength; Wherein, the second pull-down strength is smaller than the first pull-down strength.

3. The power-on detection circuit according to claim 2, characterized in that: Before the power supply voltage is no greater than the second voltage, the pull-down module has the first pull-down strength, the pull-up module is turned off, and the pull-up strength of the pull-up module is less than the first pull-down strength; the second voltage is greater than the first voltage; When the power supply voltage starts to be greater than the second voltage, the pull-up module starts to conduct, the pull-up strength of the pull-up module is greater than the first pull-down strength, and as the power supply voltage gradually increases, the pull-up strength of the pull-up module gradually increases; when the output signal changes from 0 to the current power supply voltage, the pull-down module is controlled to switch to the second pull-down strength according to the feedback signal.

4. The power-on detection circuit according to claim 3, characterized in that: Before the power supply voltage is no greater than the second voltage, the pull-down module connects the first node to the ground terminal through a first path, and the first path has the first pull-down strength; When the power supply voltage is greater than the second voltage, the pull-up strength is greater than the first pull-down strength. When the power supply voltage is greater than the sum of the second voltage and a set constant, the pull-down module connects the first node to the ground terminal via a second path. The second path has the second pull-down strength, and the second pull-down strength is less than the first pull-down strength.

5. The power-on detection circuit according to claim 4, characterized in that: The pull-up module includes: a first transistor, The gate of the first transistor is used to input the reference voltage, the source thereof is used to input the power supply voltage, and the drain thereof is connected to the first node; the second voltage is equal to the sum of the first voltage and the threshold voltage of the first transistor; The first transistor is turned off when the power supply voltage is lower than the first voltage, and starts to be turned on when the power supply voltage starts to be higher than the second voltage.

6. The power-on detection circuit according to claim 5, characterized in that: The first transistor is a PMOS transistor.

7. The power-on detection circuit according to claim 4, characterized in that: The pull-down module includes: a second transistor, a third transistor, a first resistor and a second resistor; The gate of the second transistor is connected to the ground terminal, the source of the second transistor is connected to the second node via the first resistor, and the drain of the second transistor is connected to the first node; The gate of the third transistor inputs the feedback signal, the drain thereof is connected to the second node, and the source thereof is connected to the ground end; wherein the second transistor is continuously turned on; Before the power supply voltage is no greater than the sum of the second voltage and the set constant, the third transistor is turned on. After the power supply voltage is greater than the sum of the second voltage and the set constant, the third transistor is turned off.

8. The power-on detection circuit according to claim 7, characterized in that: The second transistor is an NMOS transistor.

9. The power-on detection circuit according to claim 7, characterized in that: The feedback signal is an inverted signal of the output signal of the output module; The feedback module includes a wire for inputting the inverted signal, and the third transistor is an NMOS.

10. The power-on detection circuit according to claim 7, characterized in that: The feedback signal is the output signal of the output module; The feedback module includes a wire for inputting the output signal, and the third transistor is a PMOS.

11. The power-on detection circuit according to claim 2, characterized in that: When the pull-down module switches from the first pull-down strength to the second pull-down strength, the output signal follows the power supply voltage, and the two remain consistent.

12. The power-on detection circuit according to any one of claims 1 to 11, characterized in that: The output module includes: a Schmitt trigger and an inverter; The input end of the Schmitt trigger is connected to the first node, and the output end is connected to the third node; The input end of the inverter is connected to the third node, and the output end of the inverter is the output end of the output module.

13. An electronic device, characterized in that: The electronic device comprises the power-on detection circuit according to any one of claims 1 to 12.

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