Semiconductor device, multi-beam drawing apparatus, and multi-beam irradiation apparatus

Abstract

This invention provides a semiconductor device, a multi-charged particle beam mapping apparatus, and a multi-charged particle beam irradiation apparatus, capable of suppressing unwanted deflection of charged particle beams. The semiconductor device of the embodiment includes: a substrate having a plurality of through holes disposed at predetermined intervals along a first direction in the substrate surface and a second direction in the substrate surface intersecting the first direction; an insulating layer disposed on the substrate, through which the plurality of through holes penetrate; a plurality of first electrodes disposed on the insulating layer and adjacent to the plurality of through holes in the first direction; a plurality of second electrodes disposed on the insulating layer and adjacent to the plurality of through holes in the first direction, configured to face the plurality of first electrodes and maintained at a predetermined potential; and a wiring layer disposed on the insulating layer, electrically connecting adjacent plurality of second electrodes.

Description

[0001] This application is based on Japanese Patent Application No. 2021-025289 (Filing date: February 19, 2021) and claims priority thereto. This application incorporates the entire contents of the above-mentioned application by reference thereto. TECHNICAL FIELD

[0002] Embodiments of the present application relate to a semiconductor device, a charged particle beam drawing device, and a multi-charged particle beam irradiation device. BACKGROUND

[0003] Lithography technology, which is responsible for the progress of miniaturization of semiconductor devices, is an extremely important process. In recent years, along with the high integration of LSIs, the circuit line width required for semiconductor devices has been miniaturized year by year. Electron beam drawing technology has excellent resolution in nature, and therefore, an electron beam is used to draw a mask pattern on a mask blank.

[0004] A drawing device using a multi-electron beam (multi-beam) can greatly improve the processing capacity compared to the case of drawing one electron beam. In such a multi-beam type drawing device, for example, an electron beam emitted from an electron gun is made to pass through a shaped aperture having a plurality of holes to form a multi-beam. Each electron beam constituting the formed multi-beam is subjected to blanking control by a blanking aperture array. The electron beam deflected by the blanking aperture array is blocked (blanked), and the electron beam that is not deflected is irradiated to a sample such as a mask blank.

[0005] A through hole for each electron beam to pass through is provided in the blanking aperture array. Further, a pair of electrodes for deflecting the electron beam is provided around each through hole. In the manufacture of the blanking aperture array, a method of using semiconductor manufacturing technology, for example, forming each through hole and each electrode pair on a silicon (Si) substrate, and the like is adopted. SUMMARY

[0006] Embodiments of the present application provide a semiconductor device, a charged particle beam drawing device, and a multi-charged particle beam irradiation device capable of suppressing deflection of an undesirable charged particle beam.

[0007] The semiconductor device of the embodiment has a substrate having a plurality of through holes provided at a prescribed interval along a first direction in a substrate plane and a second direction in the substrate plane intersecting the first direction, an insulating layer provided on the substrate, the plurality of through holes penetrating the insulating layer, a plurality of first electrodes provided on the insulating layer, each of which is adjacent to the plurality of through holes in the first direction, a plurality of second electrodes provided on the insulating layer, each of which is adjacent to the plurality of through holes in the first direction, is provided opposite to the plurality of first electrodes, and is held at a prescribed potential, and a wiring layer provided on the insulating layer, electrically connecting between the plurality of second electrodes adjacent to each other. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 is a schematic cross-sectional view of an electron beam drawing apparatus of Embodiment 1.

[0009] Figures 2A-2D is a schematic view of a semiconductor device of Embodiment 1.

[0010] Figures 3A-3B is a schematic plan view of a ground electrode and its periphery of Embodiment 1.

[0011] Figure 4 is a schematic view of a through-hole and its periphery of Embodiment 1.

[0012] Figure 5 is a schematic cross-sectional view showing a connection method of a ground electrode and a wiring layer and a wiring of Embodiment 1.

[0013] Figures 6A-6C is a schematic cross-sectional view explaining a manufacturing method of a main part of a semiconductor device of Embodiment 1.

[0014] Figures 7A-7B is a schematic plan view explaining an effect of a semiconductor device of Embodiment 1.

[0015] Figure 8 is a schematic plan view explaining an effect of a semiconductor device of Embodiment 1.

[0016] Figures 9A-9D is a schematic view of a semiconductor device of Embodiment 2.

[0017] Figures 10A-10D is a schematic view of a semiconductor device of Embodiment 2.

[0018] SYMBOL EXPLANATION

[0019] 2: substrate; 4: first insulating layer (SiO x ); 6: second insulating layer (SiN x ); 8: control circuit; 10: first electrode (control electrode); 12: second electrode (ground electrode); 14: wiring layer; 16: through-hole; 20: first conductive layer; 22: second conductive layer; 30: first connection wiring; 32: second connection wiring (wiring); 40: charge prevention film; 50: insulating film; 60: first opening portion; 62: second opening portion; 64: third opening portion; 66: fourth opening portion; 90: protrusion; 100: semiconductor device (blanking aperture array); 110: semiconductor device (blanking aperture array); 150: charged particle beam drawing apparatus. DETAILED DESCRIPTION

[0020] Hereinafter, the embodiments will be described with reference to the drawings. Note that the same or similar portions in the drawings are denoted by the same or similar reference numerals.

[0021] In this specification, the same symbol is attached to the same or similar parts, and the repeated explanation is omitted at times.

[0022] In this specification, the upward direction of the drawing is described as "up", and the downward direction of the drawing is described as "down" in order to express the positional relationship of members and the like. In this specification, "up" and "down" are not necessarily terms for expressing the relationship with the direction of gravity.

[0023] Hereinafter, as an example of a charged particle beam (charged particle line), the configuration using an electron beam will be described. However, the charged particle beam is not limited to an electron beam, and can be a beam using a charged particle such as an ion beam.

[0024] (First Embodiment)

[0025] The semiconductor device of the present embodiment includes a substrate having a plurality of through holes arranged at a predetermined interval along a first direction in a substrate plane and a second direction in the substrate plane intersecting the first direction, an insulating layer provided on the substrate, the plurality of through holes penetrating the insulating layer, a plurality of first electrodes provided on the insulating layer, each of which is adjacent to the plurality of through holes in the first direction, a plurality of second electrodes provided on the insulating layer, each of which is adjacent to the plurality of through holes in the first direction, is arranged opposite to the plurality of first electrodes, and is held at a predetermined potential, and a wiring layer provided on the insulating layer, electrically connecting between the plurality of second electrodes adjacent to each other.

[0026] Figure 1 is a schematic cross-sectional view of an electron beam drawing device 150 of the present embodiment. The electron beam drawing device 150 is an example of a multi-charged particle beam drawing device or a charged particle beam drawing device.

[0027] The semiconductor device 100 of the present embodiment is used, for example, as a blanking aperture array (deflector) of the electron beam drawing device 150. Note that the use of the semiconductor device 100 is not limited to this.

[0028] The electron beam drawing device 150 includes an electron barrel 102 (multi-electron beam column) and a drawing chamber 103. Inside the electron barrel 102, an electron gun 201, an illumination lens 202, a shaping aperture array 203, the semiconductor device 100 (blanking aperture array), a reduction lens 205, a limiting aperture member 206, an objective lens 207, a main deflector 208, and a sub-deflector 209 are arranged.

[0029] Here, an x-axis, a y-axis intersecting the x-axis perpendicularly, and a z-axis intersecting the x-axis and the y-axis perpendicularly are defined. The electron beam 200 is emitted along the z-axis direction from the electron gun 201. Further, the sample 101 is disposed in a plane parallel to the xy plane.

[0030] The electron beam 200 emitted from the electron gun 201 is substantially perpendicularly illuminated to the shaped aperture array 203 by the illumination lens 202. Then, the electron beam 200 passes through the opening portions of the shaped aperture array 203, whereby the multi-beam 109 is formed. The multi-beam 109 has electron beams 120a, 120b, 120c, 120d, 120e, and 120f. The shape of each electron beam 120 reflects the shape of the opening portion of the shaped aperture array 203, for example, a rectangular shape. In addition, Figure 1 Six opening portions of the shaped aperture array 203 are shown in FIG. 6, but the number is not limited thereto. The multi-beam 109 formed by the shaped aperture array 203 has six roots in the example shown in FIG. 6. However, the number of roots of the multi-beam 109 formed is not limited thereto. As an example, the opening portions of the shaped aperture array 203 are arranged in a matrix of 512 each in the x direction and the y direction. Figure 1 Six roots are shown in FIG. 6. However, the number of roots of the multi-beam 109 formed is not limited thereto. As an example, the opening portions of the shaped aperture array 203 are arranged in a matrix of 512 each in the x direction and the y direction.

[0031] The semiconductor device 100 is disposed below the shaped aperture array 203. The electron beams 120 deflected by the semiconductor device 100 are offset from the hole position at the center of the limiting aperture member 206 and are blocked by the limiting aperture member 206. On the other hand, the electron beams 120 that are not deflected pass through the hole at the center of the limiting aperture member 206. Thus, the on-off of the electron beams is controlled.

[0032] The electron beams 120 after passing through the limiting aperture member 206 are focused by the objective lens 207 to a desired reduction ratio of a pattern image and are deflected by the main deflector 208 and the sub-deflector 209. Then, each irradiation position on the sample 101 placed on the XY stage 105 is irradiated. A mirror 210 for position measurement of the XY stage 105 is also disposed on the XY stage 105.

[0033] Figures 2A-2D is a schematic view of the semiconductor device 100 of the present embodiment. Figure 2A is a schematic plan view of the semiconductor device 100 of the present embodiment. Figure 2B is a schematic cross-sectional view of the semiconductor device 100 of Figure 2A is a schematic cross-sectional view of the semiconductor device 100 of Figure 2C is a schematic cross-sectional view of the semiconductor device 100 of Figure 2A is a schematic cross-sectional view of the semiconductor device 100 of Figure 2D is a schematic cross-sectional view of the semiconductor device 100 of Figure 2A is a schematic cross-sectional view of the semiconductor device 100 of

[0034] Figures 3A-3B is a schematic plan view of the ground electrode 12 and its periphery of the present embodiment.

[0035] In addition, in Figures 2A-2D and Figures 3A-3B , the illustration of the first conductive layer 20, the second conductive layer 22, and the charge preventing film 40 described later is omitted.

[0036] The substrate 2 is, for example, a semiconductor substrate. The substrate 2 is, for example, a Si (silicon) substrate.

[0037] Here, the surface (substrate surface) of the substrate 2 is arranged in a plane parallel to the xy plane. Therefore, both the x direction and the y direction are parallel to the substrate surface. However, the arrangement of the semiconductor device 100 is of course not limited to this. In addition, the y direction parallel to the y axis is an example of the first direction, and the x direction parallel to the x axis is an example of the second direction.

[0038] A plurality of through holes 16 are provided on the substrate 2 along the x direction and the y direction. In Figure 2A , as the through holes 16, through holes 16a to 16k and 16l are provided. The through holes 16a, 16b, 16c, and 16d are provided along the x direction. The through holes 16e, 16f, 16g, and 16h are provided along the x direction. The through holes 16i, 16j, 16k, and 16l are provided along the x direction. The through holes 16i, 16a, and 16e are provided along the y direction. The through holes 16j, 16b, and 16f are provided along the y direction. The through holes 16k, 16e, and 16g, and the through holes 16l, 16d, and 16h extend along the y direction.

[0039] The first insulating layer 4 is provided on the substrate 2. The first insulating layer 4 contains, for example, SiO x (silicon oxide). However, the material of the first insulating layer 4 is not particularly limited to this.

[0040] The second insulating layer 6 is provided on the first insulating layer 4. The second insulating layer 6 is provided in order to suppress the deterioration of the first connection wiring 30 and the second connection wiring 32 due to the moisture absorption of the first insulating layer described later. The second insulating layer 6 contains, for example, SiN x (silicon nitride). However, the material of the second insulating layer 6 is not particularly limited to this.

[0041] The first insulating layer 4, the first connection wiring 30, the second connection wiring 32, and the second insulating layer 6 on the substrate 2 are produced by LSI manufacturing technology.

[0042] The plurality of through holes 16 all penetrate the first insulating layer 4 and the second insulating layer 6.

[0043] A plurality of control electrodes 10 are provided on the second insulating layer 6. The plurality of control electrodes 10 are adjacently provided in the y direction with respect to the plurality of through-holes 16, respectively. In addition, the control electrode 10 is an example of the first electrode.

[0044] The entirety of the control electrode 10 including the surface or the inside is composed of a conductive material. As the material of the control electrode 10, from the viewpoint of processing, since, for example, Au (gold) easily forms an electrode of high aspect ratio, a good deflection characteristic of an electron beam can be obtained, and thus is preferable. However, the material of the control electrode 10 is not particularly limited to Au.

[0045] The wiring layer 14 is provided on the second insulating layer 6 (on the first insulating layer 4) between the plurality of through-holes 16 in the x direction. For example, in the example shown in FIG. 1, the wiring layer 14b is provided between the through-hole 16a and the through-hole 16b. The wiring layer 14c is provided between the through-hole 16f and the through-hole 16g. The wiring layer 14d is provided between the through-hole 16c and the through-hole 16d. Figure 2A

[0046] The wiring layer 14 is composed of a conductive material. For the wiring layer 14, since, for example, TiN (titanium nitride) is easy to process and the characteristic is stable, it is preferable. However, the material of the wiring layer 14 is not particularly limited to TiN. x x .

[0047] The ground electrode 12 is provided on the second insulating layer 6. The ground electrode 12 is provided so as to sandwich the through-hole 16 in the y direction with the control electrode 10. In addition, the ground electrode 12 is an example of the second electrode, and the second electrode is held at a prescribed potential.

[0048] The ground electrode 12 contains a conductive material. For the ground electrode 12, from the viewpoint of processing, since, for example, Au (gold) easily forms an electrode of high aspect ratio, a good deflection characteristic of an electron beam can be obtained, and thus is preferable. However, the material of the ground electrode 12 is not particularly limited to Au.

[0049] As shown in FIG. 1, the ground electrode 12 has a cross shape. The four end portions of the ground electrode 12 of the cross shape are electrically connected to the wiring layers 14a, 14b, 14c, and 14f, respectively. Figure 3A In addition, the shape of the ground electrode 12 and the connection method of the ground electrode 12 to the wiring layer 14 are not limited thereto.

[0050] For example, as shown in FIG. 2, the ground electrode 12 has a rectangular shape. The four end portions of the ground electrode 12 of the rectangular shape are electrically connected to the wiring layers 14a, 14b, 14c, and 14f, respectively.

[0051] Figure 3B ​​​As shown, the ground electrode 12 can also be in a linear shape. In this case, the wiring layers 14a, 14g, 14f, 14b, 14c, 14h are provided in a linear shape extending along the y direction so as to be connected to the ground electrode 12 in a linear shape extending along the x direction. By forming such a configuration, the volume of the ground electrode can be reduced, the film stress can be reduced, and the warping of the substrate can be suppressed.

[0052] The first connection wiring 30 is provided in the first insulating layer 4. For example, as shown in FIG. 2, the first connection wiring 30 is provided in the first insulating layer 4 in a linear shape extending along the x direction. Figure 2C As shown, a portion of the control electrode 10 penetrates the second insulating layer 6 and is electrically connected to the first connection wiring 30. The control electrode 10a is electrically connected to the first connection wiring 30a. The control electrode 10b is electrically connected to the first connection wiring 30b. The control electrode 10c is electrically connected to the first connection wiring 30c. The control electrode 10d is electrically connected to the first connection wiring 30d. As the material of the first connection wiring 30, Al (aluminum) or Cu (copper) is preferable because it is easy to form. However, the material of the first connection wiring 30 is not particularly limited to Al (aluminum) or Cu (copper). Furthermore, the arrangement or shape of the first connection wiring 30 and the manner of connecting the first connection wiring 30 to the control electrode 10 are not limited to those shown in FIG. 2. Figure 2A and Figure 2C as shown.

[0053] The control electrode 10 is electrically connected to the control circuit via the wiring portions 8a, 8b, 8c, and 8d thereof, which are provided in the first insulating layer 4. The wiring portion 8a is connected to the control electrode 10a via the first connection wiring 30a. The wiring portion 8b is connected to the control electrode 10b via the first connection wiring 30b. The wiring portion 8c is connected to the control electrode 10c via the first connection wiring 30c. The control circuit 8d is connected to the control electrode 10d via the first connection wiring 30d. The control circuit is, for example, a CMOS (Complimentary Metal-Oxide-Semiconductor) circuit. The control circuit has a function of applying a prescribed voltage of, for example, about 5 V to the control electrode 10. Furthermore, the arrangement of the wiring portions 8a, 8b, 8c, and 8d and the manner of connecting the wiring portions 8a, 8b, 8c, and 8d to the control electrode 10 are not limited to those shown in FIG. 2. Figure 2A and Figure 2C as shown.

[0054] The electron beams 120 shaped by the shaped aperture array 203 pass through the through holes 16, respectively. Here, for example, when the control circuit 8 applies a prescribed voltage to the control electrode 10, an electric field is generated between the control electrode 10 and the ground electrode 12. The electron beams 120 passing through the through holes 16 where the electric field is generated are deflected.

[0055] In addition, the electron beam 120 can pass through the back surface of the substrate 2 from the upper surface (the surface on which the electrode is formed) side, or can pass through the upper surface from the back surface side.

[0056] The second connection wiring 32 is provided in the first insulating layer 4. When the semiconductor device 100 is provided in the electron beam drawing device 150, the second connection wiring 32 is grounded via a wiring not shown. In Figure 2B In the embodiment, the second connection wirings 32e, 32f are provided. A part of the wiring layer 14b penetrates the second insulating layer 6 and is electrically connected to the second connection wiring 32e. In addition, a part of the wiring layer 14d penetrates the second insulating layer 6 and is electrically connected to the second connection wiring 32f. In the electron beam drawing device 150, the wiring layer 14b is grounded via the second connection wiring 32e, and the wiring layer 14d is grounded via the second connection wiring 32f. Thus, the ground electrode 12 is grounded via the wiring layer 14.

[0057] In Figure 2D In the embodiment, the second connection wirings 32a, 32b, 32c, 32d are provided, which are grounded. A part of the ground electrode 12a penetrates the second insulating layer 6 and is electrically connected to the second connection wirings 32a, 32b. A part of the ground electrode 12c penetrates the second insulating layer 6 and is electrically connected to the second connection wirings 32c, 32d.

[0058] In addition, the shape of the second connection wiring 32 and the connection method to the wiring layer 14 are not limited to Figure 2A , Figure 2B and Figure 2D as shown. In addition, the second connection wiring 32 is an example of a wiring.

[0059] It is preferable that the wiring layer 14 have a portion on the second insulating layer 6 on the first insulating layer 4, which has a height lower than the height of the control electrode 10 and the height of the ground electrode 12. By thinning the wiring layer 14, warping due to a stress difference with the substrate 2 can be suppressed. In Figure 2B and Figure 2C , the wiring layer 14b has a portion with a height hi lower than the height h2 of the control electrode 10a and the ground electrode 12b. In addition, the height of the control electrode 10 and the height of the ground electrode 12 can not be consistent, but in order to obtain good deflection characteristics of the electron beam, a higher height is preferable.

[0060] Figure 4 is a schematic view of the through-hole 16a of the embodiment and its surroundings in A-A' cross section of Figure 2A . In addition, in Figure 4The illustrations of the first conductive layer 20 and the second conductive layer 22 are omitted. An anti-charge film 40 is provided on the upper surface of the second insulating layer 6 (the upper surface of the first insulating layer 4), the sides of the first insulating layer 4 and the second insulating layer 6 within the through-hole 16a, the sides 2a and 2b of the substrate 2 within the through-hole 16a, the back surface 2c of the substrate 2, the sides and front surface of the ground electrode 12b, and the sides and upper surface of the wiring layer 14b. If the second insulating layer 6 and the sides of the first insulating layer 4 within the through-hole 16a are exposed, unwanted deflection of the electron beam 120 may occur due to charging. To suppress this, the anti-charge film 40 is preferably provided, except where the exposed areas of the first insulating layer 4 and the second insulating layer 6 are extremely small and the effects of charging can be ignored. Alternatively, the anti-charge film 40 may also be provided on the upper surface and sides of the control electrode 10, but even in this case, it is preferable to have a sufficiently high resistance to the extent that leakage current does not interfere with the operation of the CMOS circuit.

[0061] Materials used for the anti-charge film 40, such as Pt (platinum), Au, Ag, Cu, Fe, Cr, CrN, Ti, TiN, or TaN, are preferred because they are difficult to oxidize and thus have good electrical conductivity. However, the material of the anti-charge film 40 is not particularly limited to materials containing these.

[0062] Figure 5 It means Figure 2A This is a schematic cross-sectional view along section C-C' of this embodiment showing the connection between the ground electrode 12, the wiring layer 14, and the second connecting wiring 32. A first conductive layer 20 and a second conductive layer 22 are provided between the ground electrode 12a and ground electrode c and the second insulating layer 6 (first insulating layer 4). The ground electrode 12c, the first conductive layer 20, and the second conductive layer 22 penetrate the second insulating layer 6. The ground electrode 12c is electrically connected to the second connecting wiring 32c via the first conductive layer 20 and the second conductive layer 22. Furthermore, a portion of the first conductive layer 20 and the second conductive layer 22 is provided on the wiring layer 14c. The ground electrodes 12a and 12c are also electrically connected to the wiring layer 14c via the first conductive layer 20 and the second conductive layer 22. The connection between the control electrode 10 and the first connecting wiring 30 is also the same, therefore, it is not shown in the figure.

[0063] The first conductive layer 20 and the second conductive layer 22 are substrate layers formed by electroplating the control electrode 10 and the ground electrode 12. For example, when the control electrode 10 and the ground electrode 12 are Au, the first conductive layer 20 contains Ti (titanium) and the second conductive layer 22 contains Pd (palladium), which facilitates the formation of the control electrode 10 and the ground electrode 12, and is therefore preferred.

[0064] Figures 6A-6Cis a schematic cross-sectional view illustrating a manufacturing method of a main part of the semiconductor device of the present embodiment. In addition, Figures 6A-6C is a schematic cross-sectional view for illustrating the electrical connection of the wiring layer 14, the ground electrode 12, and the second connection wiring 32, and the electrical connection of the control electrode 10 and the first connection wiring 30, and does not mean that the cross section of Figures 6A-6C such exists in the actual semiconductor device 100.

[0065] First, the first insulating layer 4 provided on the substrate 2, the first connection wiring 30 and the second connection wiring 32 provided in the first insulating layer 4, and the second insulating layer 6 provided on the first insulating layer are formed. Next, the first opening portion 60 penetrating the second insulating layer 6 and reaching the upper surface of the second connection wiring 32 is formed. Figure 6A .

[0066] Next, the wiring layer 14 spanning the upper surface of the second connection wiring 32, the side surface of the first opening portion 60, and the second insulating layer 6 is formed. Next, the second opening portion 62 penetrating the second insulating layer 6 and reaching the upper surface of the second connection wiring 32, and the third opening portion 64 and the fourth opening portion 66 penetrating the second insulating layer 6 and reaching the upper surface of the first connection wiring 30 are formed. Next, the insulating film 50 containing, for example, polyimide is formed in the fourth opening portion 66. Figure 6B .

[0067] Next, the first conductive layer 20a and the second conductive layer 22a spanning the upper surface of the second connection wiring 32, the side surface of the second opening portion 62, the second insulating layer 6, the wiring layer 14, the side surface of the fourth opening portion 66, and the insulating film 50 are formed, and in addition, the first conductive layer 20b and the second conductive layer 22b spanning the upper surface of the first connection wiring 30, the side surface of the third opening portion 64, the second insulating layer 6, the side surface of the fourth opening portion 66, and the insulating film 50 are formed. Next, the first conductive layer 20a and the second conductive layer 22a are used as a base layer, and the ground electrode 12 is formed by electrolytic plating. In addition, the first conductive layer 20b and the second conductive layer 22b are used as a base layer, and the control electrode 10 is formed by electrolytic plating. In this way, the electrical connection of the wiring layer 14, the ground electrode 12, and the second connection wiring 32, and the electrical connection of the control electrode 10 and the first connection wiring 30 can be performed. In addition, in the wiring layer 14 Figure 6B and Figure 6C in the fourth opening portion 66, a recess 15 is illustrated, but the wiring layer 14 can be formed after the first opening portion 60 is filled with a conductive material.

[0068] Next, the effects of the semiconductor device, the charged particle beam drawing device, and the multi-charged particle beam irradiation device of the present embodiment are described.

[0069] The silicon oxide used for the first insulating layer 4 has hygroscopicity. Therefore, there is a problem that the first connection wiring 30 and the second connection wiring 32 provided in the first insulating layer 4 can be corroded. Therefore, as the configuration of the LSI, it is generally preferable to provide the second insulating layer 6 containing silicon nitride on the first insulating layer 4 to suppress the hygroscopicity of the first insulating layer 4.

[0070] However, the specific resistance of silicon nitride is very high. Therefore, if the second insulating layer 6 is exposed, it is easily charged to cause an unwanted deflection of the electron beam. In addition, the side surface of the first insulating layer 4 in the through-hole 16a also causes an unwanted deflection of the electron beam due to charging. Therefore, it is preferable to provide the anti-charging film 40 grounded in the charged particle beam irradiation device to suppress the charging of the second insulating layer 6.

[0071] In Figure 7A and Figure 7B schematic top views of semiconductor devices 800a, 800b as comparative modes of the present embodiment are shown. In the case where the anti-charging film 40 provided for the purpose of preventing the charging of the second insulating layer 6 is electrically connected to the control electrode 10a, when a voltage is applied to the control electrode 10a for the purpose of controlling the electron beam 120 passing through the through-hole 16a, the voltage is applied to the adjacent through-hole 16b, and the electron beam 120 passing through the through-hole 16b causes an unwanted deflection due to the electric field generated thereby. Even in the case where the anti-charging film 40 is not provided, such a conduction path is sometimes formed by electrically conductive residues generated in the formation process of the control electrode 10 and the ground electrode 12, electrically conductive foreign matters attached to the second insulating layer 6, and the like.

[0072] In Figure 8 a schematic top view of a semiconductor device 800c as a comparative mode is shown. In the semiconductor device 800b, the ground electrode 12 is formed in a lattice shape, and the through-hole 16 and the control electrode 10 are formed in each lattice. Further, the anti-charging film 40 is provided around the through-hole 16a and the control electrode 10a, for example, in a manner not to be in contact with the ground electrode 12. In this case, even if the anti-charging film is connected to the control electrode by mistake, the influence on the adjacent unit does not spread. However, the volume of the ground electrode 12 increases, and therefore, the difference between the stress of the material for the ground electrode 12 and the stress of the substrate 2 becomes large, and there is a problem that the substrate 2 is warped.

[0073] The semiconductor device 100 of the present embodiment is provided with the wiring layer 14 grounded on the second insulating layer 6 provided between the plurality of through-holes 16 in the x direction. Further, the ground electrode 12 is electrically connected to the wiring layer 14.

[0074] In the x direction, the wiring layer 14 is provided between the adjacent through holes 16 to be grounded. The wiring layer 14 is electrically connected to the ground electrode 12, and the voltage applied to the first electrode 10 is not applied to the adjacent through hole 16, and thus, does not affect the beam passing through the adjacent through hole. Thus, even in the case where the control electrode adjacent to the through hole is inadvertently connected to the charge preventing film, the effect does not affect the beam passing through the adjacent through hole. Therefore, it is possible to provide a semiconductor device and a charged particle beam drawing device capable of suppressing the deflection of the unwanted charged particle beam.

[0075] The wiring layer 14 is grounded via the second connection wiring 32 provided in the first insulating layer 4, and thus, it is possible to ground the wiring layer 14 without newly providing a wiring.

[0076] The wiring layer 14 has a portion having a height lower than the height of the control electrode 10 or the height of the ground electrode 12, and thus, it is possible to reduce the volume of the ground electrode 12 provided on the substrate 2. Therefore, it is possible to suppress the warping due to the difference in stress between the ground electrode 12 and the substrate 2.

[0077] According to the semiconductor device, the charged particle beam drawing device, and the multi-charged particle beam irradiation device of the present embodiment, it is possible to provide a semiconductor device, a charged particle beam drawing device, and a multi-charged particle beam irradiation device capable of suppressing the deflection of the unwanted charged particle beam even in the case where the control electrode 10 is connected to the charge preventing film 40.

[0078] (Second Embodiment)

[0079] In the semiconductor device of the present embodiment, the wiring layer 14 extends in the y direction, which is different from the semiconductor device of the first embodiment. Here, for the description repeated from the first embodiment, the description is omitted.

[0080] Figures 9A-9D is a schematic view of the semiconductor device 110 of the present embodiment. The wiring layer 14 extends in the x direction and the y direction. Thus, the wiring layer 14 is electrically connected to the ground electrode 12, and the voltage applied to the first electrode 10 does not affect the adjacent through hole 16, and thus, does not affect the beam passing through the adjacent through hole.

[0081] Similarly, the configuration in which the wiring layer 14 extends in the y direction can also be applied to the structure in which the adjacent ground electrodes 12 are not connected. As Figures 10A-10D indicated, the wiring layer 14 is provided to extend in the y direction, and connects between the ground electrodes 12 in the x direction, respectively. Similarly, the wiring layer 14 is connected to the ground electrode 12, and thus, the voltage applied to the first electrode 10 does not affect the adjacent through hole 16, and thus, does not affect the beam passing through the adjacent through hole.

[0082] The semiconductor device, charged particle beam drawing apparatus, and multiple charged particle beam irradiation apparatus according to this embodiment can provide a semiconductor device, charged particle beam drawing apparatus, and multiple charged particle beam irradiation apparatus capable of suppressing unwanted deflection of charged particle beams.

[0083] In addition, the multi-charged particle beam irradiation apparatus includes a multi-charged particle beam drawing apparatus that uses a charged particle beam containing an electron beam to draw a mask pattern onto a mask blank, and a multi-charged particle beam inspection apparatus that inspects the mask pattern by detecting secondary electrons generated due to the irradiation of the mask pattern with an electron beam.

[0084] The semiconductor device described in the above embodiments can also be applied to a charged particle beam irradiation apparatus that includes a multi-charged particle beam irradiation apparatus. In other words, the semiconductor device described in the above embodiments can be applied not only to a charged particle beam drawing apparatus that includes a multi-charged particle beam drawing apparatus, but also to a charged particle beam inspection apparatus that includes a multi-charged particle beam inspection apparatus.

[0085] Several embodiments and examples of the present invention have been described. These embodiments and examples are provided as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, and are included in the invention described in the technical solution and its equivalents.

Claims

1. A semiconductor device comprising: a substrate having a plurality of through holes provided at a predetermined interval along a first direction in a substrate plane and a second direction in the substrate plane intersecting the first direction; an insulating layer provided on the substrate, the plurality of through holes penetrating the insulating layer; a plurality of first electrodes provided on the insulating layer, respectively adjacent to the plurality of through holes in the first direction; a connection wiring provided in the insulating layer; a plurality of second electrodes provided on the insulating layer, electrically connected to the connection wiring, respectively adjacent to the plurality of through holes in the first direction, provided opposite to the plurality of first electrodes, and held at a predetermined potential; and a wiring layer provided on the insulating layer, electrically connecting between adjacent ones of the plurality of second electrodes.

2. The semiconductor device according to claim 1, wherein the second electrodes are grounded.

3. The semiconductor device according to claim 1, wherein the wiring layer extends along the first direction.

4. The semiconductor device according to claim 1, wherein the insulating layer includes a first insulating layer and a second insulating layer provided on the first insulating layer.

5. The semiconductor device according to claim 4, wherein the first insulating layer contains silicon oxide and the second insulating layer contains silicon nitride.

6. The semiconductor device according to claim 1, further comprising an anti-charging film provided at least on an upper surface of the insulating layer.

7. The semiconductor device according to claim 1, wherein a height of the wiring layer is lower than a height of the second electrodes.

8. The semiconductor device according to claim 1, wherein the second electrodes are provided to respectively form pairs with the first electrodes, and the wiring layer is provided to electrically connect the second electrodes adjacent in the first direction and the second direction, respectively.

9. The semiconductor device according to claim 1, wherein the second electrodes each have a linear shape extending along the second direction, are provided opposite to a plurality of the first electrodes provided along the second direction, and the wiring layer is provided to electrically connect the second electrodes adjacent in the first direction, respectively.

10. The semiconductor device according to claim 1, wherein the second electrodes have a cross shape projecting in the first direction and the second direction, at least either of portions projecting in the first direction is provided between regions where adjacent ones of the through holes are respectively provided, a portion projecting in the second direction is provided at a position opposite to the first electrode, and the wiring layer is provided to electrically connect the second electrodes adjacent, respectively.

11. The semiconductor device according to claim 1, wherein the wiring layer contains titanium nitride.

12. A charged particle beam drawing device, comprising: the semiconductor device according to claim 1.

13. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device for a multi-charged particle beam irradiation device.

14. A multi-charged particle beam irradiation device, comprising: the semiconductor device according to claim 1. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 13. A semiconductor device, ​ ​ ​ ​

Images