High electron mobility transistor based on algaSbN / gaN heterojunction and preparation method

Abstract

The application discloses a high electron mobility transistor based on AlGaSbN / GaN heterojunction and a preparation method, and mainly solves the problems of low Al component and two-dimensional electron gas concentration of a barrier layer of an existing HEMT device. From bottom to top, the high electron mobility transistor comprises a c-sapphire substrate layer (1), an AlN nucleation layer (2), a GaN buffer layer (3) and a barrier layer (4), the two ends of the barrier layer are respectively provided with drain electrodes (6, 7), the middle of the barrier layer is provided with a gate electrode (8), the position of the barrier layer without electrode deposition is a gate dielectric layer (5), a Si3N4 passivation layer (9) is arranged on the gate dielectric layer, the barrier layer adopts AlGaSbN material to increase the Al component and realize lattice matching with the GaN buffer layer (3); and the gate dielectric layer adopts SiO2 material to reduce gate leakage. The application improves the concentration and working efficiency of two-dimensional electron gas, and can be used to manufacture GaN-based high-voltage high-power electronic devices and radio frequency electronic devices.

Description

Technical Field

[0001] This invention belongs to the field of microelectronics technology, and specifically relates to a high electron mobility transistor that can be used to fabricate GaN-based high-voltage high-power electronic devices and radio frequency electronic devices. Technical Background

[0002] Currently, most commonly used high electron mobility transistors (HEMTs) employ AlGaN / GaN heterojunctions. Thanks to their excellent material properties, AlGaN / GaN heterojunction HEMTs have demonstrated unique advantages in high voltage and high power applications, attracting numerous research efforts in pursuit of high threshold voltage, high voltage, and high power.

[0003] However, the current 2D electron gas density still does not meet the requirements of high-power high-frequency devices. In order to further improve the 2DEG density, it is desirable to have the Al content as high as possible. However, with the increase of Al content, the lattice mismatch between AlGaN and GaN also increases. In order to prevent wafer cracking, the Al content in the usual AlGaN / GaN heterojunction is controlled at 20%-30%. It is desirable to obtain a heterojunction structure with a higher Al content.

[0004] Patent application number 202110084430.6 proposes a back-gate fully controlled AlGaN / GaN heterojunction enhancement-mode power HEMT device and its fabrication method. The HEMT device includes: a substrate, a P-GaN layer, a GaN channel layer, and an AlGaN barrier layer stacked sequentially from bottom to top; a source electrode disposed on one side of the AlGaN barrier layer; a drain electrode disposed on the other side of the AlGaN barrier layer and opposite to the source electrode; a portion of the thickness of the substrate, P-GaN layer, GaN channel layer, and AlGaN barrier layer between the source electrode and the drain electrode forming a fin structure; a gate electrode located between the source electrode and the drain electrode, covering the two sides of the fin structure perpendicular to the substrate and the top surface of the fin structure, with an ohmic contact formed between the gate electrode and the P-GaN layer; and a gate dielectric layer disposed between the gate electrode and the fin structure. This device uses a P-GaN layer and gate metal to form a back gate, and the gate electric field of the AlGaN / GaN heterojunction is adjusted, which is beneficial to improve the breakdown voltage of the device. However, the structure is too complex and the fabrication is difficult.

[0005] Patent application number 201811384276.9 discloses a gallium nitride HEMT low-ohmic contact resistance structure and its fabrication method, the structure as follows: Figure 1The device comprises, from bottom to top: a substrate 101, a buffer layer 102, a channel layer 103, and a barrier functional layer 104. The barrier functional layer 104 has a drain electrode 105 at its left end, a source electrode 106 at its right end, and a gate electrode 107 in the middle. A dielectric layer 109 is grown at the remaining locations where no electrodes are deposited. A two-dimensional electron gas channel 108 is formed between the channel layer 103 and the barrier layer 104. Although this device achieves low contact resistance between the alloy and the two-dimensional electron gas in the channel, the insufficient Al atomic composition in the barrier functional layer results in a low density of the two-dimensional electron gas in the channel. Consequently, the efficiency of the fabricated high electron mobility transistor does not meet the requirements of radio frequency electronic devices. Summary of the Invention

[0006] The purpose of this invention is to address the above-mentioned shortcomings by proposing a high electron mobility transistor based on an AlGaSbN / GaN heterojunction and its fabrication method, so as to increase the Al composition in the heterojunction and increase the density of the two-dimensional electron gas 2DEG without increasing lattice mismatch, thereby improving the performance of the high electron mobility transistor (HEMT).

[0007] The key technology of this invention is: using AlGaSbN material as the barrier layer of a high electron mobility transistor (HEMT), and increasing the Al composition in the barrier layer while maintaining lattice matching with the GaN buffer layer. The implementation scheme is as follows:

[0008] 1. A high electron mobility transistor based on an AlGaSbN / GaN heterojunction, comprising, from bottom to top: a c-plane sapphire substrate layer, an AlN nucleation layer, a GaN buffer layer, and a barrier layer, wherein drain and source electrodes are respectively disposed at both ends of the barrier layer, and a gate electrode is disposed in the middle; the remaining positions on the barrier layer where no electrodes are deposited are a gate dielectric layer, and a Si3N4 passivation layer is disposed on the gate dielectric layer, characterized in that:

[0009] The barrier layer is made of AlGaSbN material to increase the Al content and achieve lattice matching with the GaN buffer layer.

[0010] The gate dielectric layer is made of SiO2 material to reduce gate leakage current;

[0011] Furthermore, the AlGaSbN barrier layer has a thickness of 20-40 nm and an Al composition of 0.5-0.8; the SiO2 gate dielectric layer has a thickness of 5-10 nm.

[0012] Furthermore, the thickness of the AlN nucleation layer is 20-50 nm; the thickness of the GaN buffer layer is 2000-4000 nm; the thickness of the drain electrode, source electrode, and gate electrode is 10-20 nm; and the thickness of the Si3N4 passivation layer is 15-30 nm.

[0013] 2. A method for fabricating high electron mobility transistors based on AlGaSbN / GaN heterojunctions, characterized by comprising the following steps:

[0014] 1) Heat-treat the c-plane sapphire substrate and place the heat-treated substrate in a reaction chamber at a temperature of 1000-1100℃. Introduce ammonia gas at a flow rate of 3000-4000 sccm and continue for 3-5 minutes for nitriding.

[0015] 2) An AlN nucleation layer with a thickness of 20-50 nm was grown on the nitrided substrate using MOCVD process;

[0016] 3) A GaN buffer layer with a thickness of 2000-4000 nm was grown on the AlN nucleation layer using MOCVD process;

[0017] 4) Simultaneously introduce four gases into the MOCVD reaction chamber: ammonia at a flow rate of 2000-2200 sccm, hydrogen antimony at a flow rate of 1000-1200 sccm, aluminum source at a flow rate of 250-270 sccm, and gallium source at a flow rate of 100-120 sccm. Set the reaction chamber temperature to 1100-1150℃ and the pressure to 20-60 Torr. Grow an AlGaSbN barrier layer with a thickness of 20-50 nm on the GaN buffer layer. The Al composition is adjusted within the range of 0.5-0.8.

[0018] 5) Electron beam evaporation was used on the AlGaSbN barrier layer to deposit source, drain and gate electrodes with a thickness of 10-20 nm.

[0019] 6) A SiO2 gate dielectric layer with a thickness of 5-10 nm is grown on the AlGaSbN barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode using MOCVD process.

[0020] 7) A Si3N4 passivation layer with a thickness of 15-30 nm is grown on the gate dielectric layer using PECVD process to complete the fabrication of high electron mobility transistors.

[0021] Compared with traditional HEMT device fabrication methods, the present invention has the following advantages:

[0022] By using AlGaSbN material as the barrier layer of the device, this invention can increase the Al composition in the buffer layer while maintaining lattice matching with the GaN buffer layer, thereby increasing the two-dimensional electron gas concentration of the device and significantly improving the device performance. Attached Figure Description

[0023] Figure 1 This is a diagram of an existing GaN / AlGaN heterojunction high electron mobility transistor structure;

[0024] Figure 2 This is a diagram of the high electron mobility transistor structure based on the AlGaSbN / GaN heterojunction of this invention;

[0025] Figure 3 This invention is made Figure 2 A schematic diagram of the high electron mobility transistor process. Detailed Implementation

[0026] The embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0027] Reference Figure 2 The device structure of the present invention includes: a c-plane sapphire substrate layer 1, an AlN nucleation layer 2, a GaN buffer layer 3, an AlGaSbN barrier layer 4, a gate dielectric layer 5, a drain electrode 6, a source electrode 7, a gate electrode 8, and a Si3N4 passivation layer 9. The AlN nucleation layer 2 is located on the c-plane sapphire substrate layer 1, with a thickness of 20-50 nm; the GaN buffer layer 3 is located on the AlN nucleation layer 2, with a thickness of 2000-4000 nm; the AlGaSbN barrier layer 4 is located on the GaN buffer layer 3, with a thickness of 20-50 nm, and the Al composition is adjusted within the range of 0.5-0.8; the drain electrode 6, source electrode 7, and gate electrode 8 are located on the AlGaSbN barrier layer 4, each with a thickness of 10-20 nm; the gate dielectric layer 5 is located between the source electrode 7 and the gate electrode 8 and between the drain electrode 6 and the gate electrode 8, with a thickness of 5-10 nm; and the Si3N4 passivation layer 9 is located on the gate dielectric layer 5, with a thickness of 15-30 nm.

[0028] Reference Figure 3 This invention provides three embodiments for fabricating high electron mobility transistors based on AlGaSbN / GaN heterojunctions.

[0029] Example 1: A high electron mobility transistor with a core layer thickness of 20 nm, a buffer layer thickness of 2000 nm, a gate dielectric layer thickness of 5 nm, a passivation layer thickness of 15 nm, an electrode thickness of 10 nm, a barrier layer thickness of 20 nm, and an Al composition of 0.5 was fabricated.

[0030] Step 1: Pre-treat the substrate.

[0031] 1a) After cleaning, the c-plane sapphire substrate is placed in the MOCVD reaction chamber, and the vacuum level of the reaction chamber is reduced to 2 × 10⁻⁶. -2 Torr; Hydrogen gas is introduced into the reaction chamber, and the substrate is heated to 900°C and held for 10 minutes under the condition that the pressure in the reaction chamber reaches 20 Torr, thus completing the heat treatment of the substrate.

[0032] 1b) The heat-treated substrate is placed in a reaction chamber at a temperature of 1000°C, and ammonia gas with a flow rate of 3500 sccm is introduced for 5 minutes to complete nitriding.

[0033] Step two, using MOCVD process to grow AlN nucleation layer, such as... Figure 3 (a).

[0034] The temperature of the MOCVD reaction chamber was adjusted to 950℃, and ammonia gas with a flow rate of 3000 sccm and an aluminum source with a flow rate of 40 sccm were introduced simultaneously. Under the condition of maintaining a pressure of 20 Torr, an AlN nucleation layer with a thickness of 20 nm was grown on the nitrided substrate.

[0035] Step 3: Grow a GaN buffer layer using MOCVD technology, such as... Figure 3 (b)

[0036] The temperature of the MOCVD reaction chamber was adjusted to 950℃, and ammonia gas with a flow rate of 2500 sccm and a gallium source with a flow rate of 150 sccm were introduced at the same time. The pressure was maintained at 50 Torr, and a GaN buffer layer with a thickness of 2000 nm was grown on the AlN nucleation layer.

[0037] Step four: Grow an AlGaSbN barrier layer using MOCVD technology, such as... Figure 3 (c)

[0038] The MOCVD reaction chamber temperature was adjusted to 1100℃, and four gases were simultaneously introduced: ammonia at a flow rate of 2000 sccm, hydrogen antimony at a flow rate of 1000 sccm, aluminum source at a flow rate of 250 sccm, and gallium source at a flow rate of 100 sccm. The pressure was maintained at 50 Torr, and an AlGaSbN barrier layer with a thickness of 20 nm and an Al composition of 0.5 was grown on the GaN buffer layer.

[0039] Step 5, deposit the electrode, such as Figure 3 (d)

[0040] Titanium, aluminum, nickel, and gold were evaporated on an AlGaSbN barrier layer using electron beam evaporation technology to deposit source, drain, and gate electrodes with a thickness of 10 nm.

[0041] Step six: Grow the gate dielectric layer using MOCVD technology, such as... Figure 3 (e).

[0042] The temperature of the MOCVD reaction chamber was adjusted to 900℃, and silane with a flow rate of 1000 sccm and oxygen with a flow rate of 160 sccm were introduced at the same time. The pressure was maintained at 20 Torr. A SiO2 gate dielectric layer with a thickness of 5 nm was grown on the AlGaSbN barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode.

[0043] Step 7: Grow a passivation layer using PECVD process, such as... Figure 3 (f).

[0044] The radio frequency power of the equipment was adjusted to 150W, the reaction chamber temperature to 300℃, and the reaction chamber pressure to 40Torr. Simultaneously, silane with a flow rate of 60sccm and nitrogen with a flow rate of 80sccm were introduced to grow a 15nm thick Si3N4 passivation layer on the gate dielectric layer, thus completing the fabrication of a high electron mobility transistor.

[0045] Example 2: A high electron mobility transistor with a core layer thickness of 50 nm, a buffer layer thickness of 4000 nm, a gate dielectric layer thickness of 10 nm, a passivation layer thickness of 30 nm, an electrode thickness of 20 nm, a barrier layer thickness of 40 nm, and an Al composition of 0.8 was fabricated.

[0046] Step 1: Pre-treat the substrate.

[0047] 1.1) The c-plane sapphire substrate is heat-treated in the same manner as step 1a) of Example 1;

[0048] 1.2) The heat-treated substrate was placed in a reaction chamber at 1100℃ and ammonia gas with a flow rate of 3800 sccm was introduced for 3 minutes to perform nitriding treatment on the substrate.

[0049] Step 2: Growing an AlN nucleation layer using MOCVD process, such as... Figure 3 (a).

[0050] With the MOCVD reaction chamber temperature set at 1100℃, the reaction chamber pressure at 60 Torr, and the ammonia flow rate at 4000 sccm and the aluminum source flow rate at 20 sccm, a 50 nm thick AlN nucleation layer was grown on the nitrided substrate.

[0051] Step 3: Grow a GaN buffer layer using MOCVD technology, such as... Figure 3 (b)

[0052] With the MOCVD reaction chamber temperature set at 1100℃, the reaction chamber pressure at 60 Torr, and the ammonia flow rate at 3000 sccm and the gallium source flow rate at 180 sccm, a GaN buffer layer with a thickness of 4000 nm was grown on the AlN nucleation layer.

[0053] Step 4: Grow an AlGaSbN barrier layer using MOCVD technology, such as... Figure 3 (c)

[0054] With the MOCVD reaction chamber temperature set at 1120℃ and the reaction chamber pressure at 60 Torr, and the flow rates of ammonia gas at 2200 sccm, hydrogen antimony at 1200 sccm, aluminum source at 270 sccm, and gallium source at 120 sccm, an AlGaSbN barrier layer with a thickness of 40 nm and an Al composition of 0.8 was grown on the GaN buffer layer.

[0055] Step 5, deposit the electrode, such as Figure 3 (d)

[0056] Titanium, aluminum, nickel, and gold were evaporated on an AlGaSbN barrier layer using an electron beam to deposit source, drain, and gate electrodes with a thickness of 20 nm.

[0057] Step 6: Grow the gate dielectric layer using MOCVD process, such as... Figure 3 (e).

[0058] With the MOCVD reaction chamber temperature set at 1200℃, the reaction chamber pressure at 60 Torr, and the silane flow rate at 1100 sccm and the oxygen flow rate at 210 sccm, a 10 nm thick SiO2 gate dielectric layer was grown on the AlGaSbN barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode.

[0059] Step 7: Grow a passivation layer using PECVD process, such as... Figure 3 (f).

[0060] With the equipment's RF power set at 300W, reaction chamber temperature at 500℃, reaction chamber pressure at 80Torr, and silane flow rate at 100sccm and nitrogen flow rate at 120sccm, a 30nm thick Si3N4 passivation layer was grown on the gate dielectric layer, thus completing the fabrication of a high electron mobility transistor.

[0061] Example 3: A high electron mobility transistor with a core layer thickness of 30 nm, a buffer layer thickness of 3000 nm, a gate dielectric layer thickness of 7 nm, a passivation layer thickness of 22 nm, an electrode thickness of 15 nm, a barrier layer thickness of 30 nm, and an Al composition of 0.65 was fabricated.

[0062] Step A: Pre-treat the substrate.

[0063] A1) Perform heat treatment on the c-plane sapphire substrate, which is consistent with step 1a) of Example 1;

[0064] A2) Place the heat-treated substrate in a reaction chamber at a temperature of 1000℃, introduce ammonia gas at a flow rate of 35800 sccm, and continue nitriding for 3 minutes to complete the nitriding treatment of the substrate.

[0065] Step B involves growing an AlN nucleation layer using MOCVD technology, such as... Figure 3 (a).

[0066] Under the process conditions of maintaining the reaction chamber temperature at 1000℃, the pressure at 40 Torr, and simultaneously introducing ammonia gas at a flow rate of 3500 sccm and an aluminum source at a flow rate of 30 sccm, an AlN nucleation layer with a thickness of 30 nm was grown on the nitrided substrate.

[0067] Step C, a GaN buffer layer is grown using MOCVD technology, such as... Figure 3 (b)

[0068] Under the process conditions of a reaction chamber temperature of 1000℃, a pressure of 40 Torr, and simultaneous introduction of ammonia gas at a flow rate of 2800 sccm, a gallium source at a flow rate of 160 sccm, and a silicon source at a flow rate of 15 sccm, a GaN buffer layer with a thickness of 3000 nm was grown on the AlN nucleation layer.

[0069] Step D: An AlGaSbN barrier layer is grown using MOCVD technology, such as... Figure 3 (c)

[0070] Under the process conditions of a reaction chamber temperature of 1110℃, a pressure of 50 Torr, and simultaneous introduction of four gases—ammonia at a flow rate of 2100 sccm, hydrogen antimony at a flow rate of 1100 sccm, aluminum source at a flow rate of 260 sccm, and gallium source at a flow rate of 110 sccm—a GaN buffer layer with a thickness of 30 nm and an Al composition of 0.65 was grown.

[0071] Step E, deposit the electrode, as follows Figure 3 (d)

[0072] Titanium, aluminum, nickel, and gold were evaporated on an AlGaSbN barrier layer using an electron beam to deposit source, drain, and gate electrodes with a thickness of 15 nm.

[0073] Step F involves growing a gate dielectric layer using MOCVD technology, such as... Figure 3 (e).

[0074] Under the process conditions of MOCVD reaction chamber temperature of 1100℃, pressure of 40 Torr, and simultaneous introduction of silane at a flow rate of 1050 sccm and oxygen at a flow rate of 180 sccm, a 7 nm thick SiO2 gate dielectric layer was grown on the AlGaSbN barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode.

[0075] Step G involves growing a passivation layer using MOCVD technology, such as... Figure 3 (f).

[0076] Under the process conditions of 230W RF power, 400℃ reaction chamber temperature, 60Torr reaction chamber pressure, and simultaneous introduction of silane at a flow rate of 80sccm and nitrogen at a flow rate of 100sccm, a 22nm thick Si3N4 passivation layer was grown on the gate dielectric layer, thus completing the fabrication of a high electron mobility transistor.

[0077] The above descriptions are merely three specific examples of the present invention and do not constitute any limitation on the present invention. Obviously, those skilled in the art, after understanding the content and principles of the present invention, may make various modifications and changes in form and detail without departing from the principles and structure of the present invention. However, these modifications and changes based on the ideas of the present invention are still within the scope of protection of the claims of the present invention.

Claims

1. A high electron mobility transistor based on an AlGaSbN / GaN heterojunction, comprising, from bottom to top: The c-plane consists of a sapphire substrate (1), an AlN nucleation layer (2), a GaN buffer layer (3), and a barrier layer (4). The barrier layer has a drain electrode (6) and a source electrode (7) at its two ends, and a gate electrode (8) in the middle. The remaining areas on the barrier layer where no electrodes are deposited are a gate dielectric layer (5). A Si3N4 passivation layer (9) is provided on this gate dielectric layer. The key feature is that: The barrier layer (4) is made of AlGaSbN material to increase the Al content and achieve lattice matching with the GaN buffer layer (3); The gate dielectric layer (5) is made of SiO2 material to reduce gate leakage.

2. The transistor according to claim 1, characterized in that: The AlGaSbN barrier layer (4) has a thickness of 20-40 nm and an Al composition of 0.5-0.

8. The thickness of the SiO2 gate dielectric layer (5) is 5-10 nm.

3. The transistor according to claim 1, characterized in that: The thickness of the AlN nucleation layer (2) is 20-50 nm. The thickness of the GaN buffer layer (3) is 2000-4000 nm. The thickness of the drain electrode (6), source electrode (7), and gate electrode (8) is 10-20 nm. The thickness of the Si3N4 passivation layer (9) is 15-30 nm.

4. A method for fabricating high electron mobility transistors based on AlGaSbN / GaN heterojunctions, characterized in that, Includes the following steps: 1) Heat treatment is performed on the c-plane sapphire substrate (1), and the heat-treated substrate is placed in a reaction chamber at a temperature of 1000-1100℃, and ammonia gas with a flow rate of 3000-4000 sccm is introduced for 3-5 minutes for nitriding. 2) An AlN nucleation layer with a thickness of 20-50 nm was grown on the nitrided substrate using MOCVD process (2); 3) A GaN buffer layer (3) with a thickness of 2000-4000 nm was grown on the AlN nucleation layer (2) using MOCVD process; 4) Simultaneously introduce four gases into the MOCVD reaction chamber: ammonia with a flow rate of 2000-2200 sccm, hydrogen antimony with a flow rate of 1000-1200 sccm, aluminum source with a flow rate of 250-270 sccm, and gallium source with a flow rate of 100-120 sccm. Set the reaction chamber temperature to 1100-1150℃ and the pressure to 20-60 Torr. Grow an AlGaSbN barrier layer (4) with a thickness of 20-50 nm on the GaN buffer layer (3). The Al composition is adjusted within the range of 0.5-0.

8. 5) Titanium, aluminum, nickel and gold are deposited on the AlGaSbN barrier layer (4) by electron beam evaporation to deposit source electrode (7), drain electrode (6) and gate electrode (8) with a thickness of 10-20 nm. 6) A SiO2 gate dielectric layer (5) with a thickness of 5-10 nm is grown on the AlGaSbN barrier layer (4) between the source electrode and the gate electrode and between the drain electrode and the gate electrode using MOCVD process; 7) A Si3N4 passivation layer (9) with a thickness of 15-30 nm is grown on the gate dielectric layer (5) using PECVD process to complete the fabrication of high electron mobility transistor.

5. The method according to claim 4, characterized in that, In step 1), the substrate undergoes heat treatment by first cleaning the c-plane sapphire substrate, then placing it in the MOCVD reaction chamber, and reducing the vacuum level of the reaction chamber to less than 2 × 10⁻⁶. - 2 Torr; then hydrogen gas is introduced into the reaction chamber, and the substrate is heated to 900-1200℃ under the condition that the MOCVD reaction chamber pressure reaches 20-760 Torr, and held for 5-10 min.

6. The method according to claim 4, characterized in that, Step 2) uses the MOCVD process, with the following conditions and parameters set for the reaction chamber: The reaction chamber temperature is 950-1100℃. Maintain the reaction chamber pressure at 20-60 Torr. Ammonia gas with a flow rate of 3000-4000 sccm and aluminum source gas with a flow rate of 20-40 sccm are introduced into the reaction chamber.

7. The method according to claim 4, characterized in that, The MOCVD process used in step 3) involves setting the following parameters for the reaction chamber: The reaction chamber temperature is 950-1100℃. Maintain the reaction chamber pressure at 20-60 Torr. Ammonia gas with a flow rate of 2500-3000 sccm and gallium source gas with a flow rate of 150-180 sccm are introduced into the reaction chamber.

8. The method according to claim 4, characterized in that, The MOCVD process used in step 6) involves setting the following parameters for the reaction chamber: The reaction chamber temperature is 900-1200℃. Maintain the reaction chamber pressure at 20-60 Torr. Two gases, silane at a flow rate of 1000-1100 sccm and oxygen at a flow rate of 160-210 sccm, are simultaneously introduced into the reaction chamber.

9. The method according to claim 4, characterized in that, The PECVD process used in step 7) involves setting the following parameters for the reaction chamber: RF power is 150-300W The reaction chamber temperature is 300-500℃. Maintain the reaction chamber pressure at 40-80 Torr. Two gases, silane at a flow rate of 60-100 sccm and nitrogen at a flow rate of 80-120 sccm, are simultaneously introduced into the reaction chamber.

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