A digital control circuit and system for automatically generating PWM high-order dimming curve

Abstract

This invention discloses a digital control circuit and system for automatically generating high-order PWM dimming curves, relating to the field of lighting control technology. The circuit includes a curve calculation module, N playback control modules, control logic, and a multiplexer. A register group is connected to the curve calculation module and the playback control module respectively, used to store the curve parameters corresponding to each channel. The playback control module is connected to the control logic, used to generate the playback control flag bit of the corresponding channel based on the curve parameters. The control logic is connected to the curve calculation module, the curve calculation module is connected to the playback control module, and the playback control module is connected to the curve calculation module through the multiplexer, used to transmit the current step of the corresponding channel. When the playback control flag bit of any channel appears, the control logic continuously triggers the calculation module N times to calculate the pulse width of each channel at the current step, thereby realizing the automatic generation of the dimming curve.

Description

Technical Field

[0001] The present invention relates to the technical field of lighting control, and in particular to a digital control circuit and system for automatically generating a PWM high-order dimming curve. Background Art

[0002] With the continuous development of automotive electronics and chip technology, the integration of the two fields has become increasingly close. More and more automotive chips are emerging in all aspects of automotive electronic control, among which lighting control has gradually become an important field of R&D investment. From headlights, taillights, turn signals to interior ambient lights, etc., they are gradually moving away from the original design mode and seeking new lighting effects in order to bring users a more diverse car experience.

[0003] A widely used method of controlling LED lights is dimming based on PWM signals. By changing the duty cycle of the PWM signal, the LED conduction time is controlled to adjust the brightness of the LED light. Based on the new requirements described in the previous paragraph, in order to achieve more diverse lighting effects, the following three points are led: First, more LED lights are required to participate in the realization of lighting effects; second, higher requirements are placed on the precision of PWM dimming; third, the PWM waveform of each LED light needs to be more accurately controlled according to a preset time sequence, so that the brightness changes between the lights can present a preset lighting effect overall.

[0004] In order to achieve the above three points, on the one hand, it is necessary to improve the PWM dimming accuracy, which will increase the number of bits of the digital counter; on the other hand, it is necessary to continuously and in real time configure the duty cycle of the PWM control signal of each lamp on the network. Generally speaking, the configuration can be rewritten by accessing the corresponding register of the chip through network communication. However, due to the above two points, a huge data throughput will undoubtedly be generated on the same communication network. This not only increases the risk of communication failure, resulting in repeated communication and thus worsening the real-time control of LED lights; it also largely squeezes out the communication space for other chip control and other related configuration information. Summary of the invention

[0005] In view of the above problems and technical requirements, the inventors have proposed a digital control circuit and system for automatically generating a PWM high-order dimming curve. The PWM waveform sequence is calculated according to the curve equation through pre-configured curve parameters, thereby achieving automatic generation of the PWM dimming curve. The light intensity of the LED is controlled according to the configured time length to achieve a variety of LED lighting effects. The communication pressure between the host computer and the chip is greatly alleviated, and the requirements for data traffic on the same network are reduced.

[0006] The technical solution of the present invention is as follows:

[0007] In a first aspect, the present application provides a digital control circuit for automatically generating a PWM high-order dimming curve, comprising a curve calculation module, a playback control module for N PWM channels, a control logic, and two multiplexers; the first input end of the curve calculation module is connected to an external register group through a first multiplexer, and the first end of each playback control module is respectively connected to an external register group as an input, and the register group is used to store the curve parameters corresponding to each PWM channel; the second end of each playback control module is connected to the input end of the control logic, and is used to generate a playback control flag bit of the corresponding PWM channel according to the curve parameters; the output end of the control logic is connected to the control end of the curve calculation module, and the output end of the curve calculation module is connected to the third end of each playback control module; the fourth end of each playback control module is connected to the second input end of the curve calculation module through a second multiplexer, and is used to determine the current step of the corresponding PWM channel according to the curve parameters; the control end of the control logic is respectively connected to the control ends of the first and second multiplexers;

[0008] When the playback control flag of any PWM channel appears, the control logic continuously triggers the curve calculation module N times to calculate the PWM pulse width of each PWM channel under the current step, and stores it in the corresponding playback control module; the curve calculation module obtains the PWM pulse width sequence of each PWM channel based on the high-order polynomial curve equation as the dimming curve of each PWM channel, where step is the horizontal coordinate of the high-order polynomial curve equation.

[0009] Its further technical solution is that the register group includes N first registers connected to the first multiplexer, each first register is used to select a group from a given curve configuration parameter group as the curve configuration parameters of the corresponding PWM channel, and the first multiplexer is used to select the curve configuration parameters of the corresponding PWM channel and give them to the curve calculation module.

[0010] Its further technical solution is that for each PWM channel, the playback control module is also used to perform timing control on the dimming curve, including: configuring the duration of the pulse width corresponding to the step, the delay configuration of the head and tail pulse widths, intercepting and sampling the dimming curve, and connecting the dimming curves.

[0011] A further technical solution is to configure the duration of the pulse width corresponding to the step to include:

[0012] The register group includes a second register connected to the first end of the playback control module, and the curve control parameters corresponding to each PWM channel are configured in the second register, and the curve control parameters include the duration of the pulse width corresponding to each step;

[0013] When the playback control module is in the PLAY state, for each PWM channel, the playback control module times the step of the current channel, and switches to the next step when the duration configured by the second register corresponding to the current channel is reached. During this period, each PWM channel maintains the corresponding PWM pulse width obtained by the curve calculation module.

[0014] A further technical solution is that the delay configuration of the head and tail pulse widths includes:

[0015] The register group includes a third register group and a fourth register group connected to the first end of the playback control module, the third register group is used to configure the duration of the playback control module in the DELAY state, and the fourth register group is used to configure the duration of the playback control module in the HOLD state, and the two durations are used as curve control parameters;

[0016] If the LED brightness is maintained at the beginning and end values ​​of the dimming curve, corresponding delays are added to the first and last pulse widths of the dimming curve in the PLAY state, that is, the first pulse width value of the curve is maintained for the timing time of the third register group corresponding to the DELAY state, and then the dimming curve is started to be played, and / or, after the curve is played, the last pulse width value of the curve is maintained for the timing time of the fourth register group corresponding to the HOLD state.

[0017] A further technical solution is to intercept and extract points of the dimming curve, including:

[0018] The register group includes a fifth register, a sixth register and a seventh register connected to the first end of the playback control module, the fifth register is used to store the starting step selected from the original dimming curve, the sixth register is used to store the ending step selected from the original dimming curve, and the seventh register is used to store the number of jump steps between two extracted points, and the starting step, the ending step and the number of jumps are used as curve control parameters;

[0019] For the corresponding PWM channel, the playback control module intercepts an arbitrary curve from the original dimming curve as a new dimming curve of the PWM channel to achieve different lighting effects according to the curve control parameters configured by the above three registers.

[0020] A further technical solution is that the connection between the dimming curves includes:

[0021] The curve parameters include the PLAY bit, NEXT bit and NOW bit of the register connected to the first end of the playback control module, as the curve control signal;

[0022] For the PLAY bit, when the dimming curve of the corresponding PWM channel is in the non-playing state, the PWM channel plays the curve in the order of IDEL->DELAY->PLAY->HOLD->IDLE; when the HOLD state ends, the curve enters the initial state IDLE state and waits for the next write of PLAY;

[0023] For the NEXT bit, at least two groups of dimming curves with different configurations are selected. When the NEXT bit is written in any playback state of the first group of dimming curves, after the HOLD state of the first group of dimming curves ends, the playback control module enters the playback of the second group of dimming curves to achieve the connection of the two groups of dimming curves; and the configuration of the second group of dimming curves can be configured in advance in any playback state of the first group of dimming curves, without affecting the playback of the first group of curves;

[0024] For the NOW bit, take at least two groups of dimming curves with different configurations. When the NOW bit is written in any playback state of the first group of dimming curves, when the current step duration is reached, the playback control module immediately switches to the playback of the second group of dimming curves to achieve instant connection between the two groups of dimming curves.

[0025] Its further technical solution is that, in the process of continuously calculating the PWM pulse width of each PWM channel at the current step, for the PWM channels in the playing state and the non-playing state, the curve calculation module updates the PWM pulse width at the current step; or, for the PWM channels in the non-playing state, the curve calculation module does not calculate or update the PWM pulse width at the current step.

[0026] In the second aspect, the present application provides a system for automatically generating a PWM high-order dimming curve, comprising a register group, a digital control circuit as described in the first aspect, a PWM signal generating module, N switching tubes and N LEDs; the register group is connected to the digital control circuit, and is used to transmit the curve parameters corresponding to each configured PWM channel, wherein the curve parameters are configured by rewriting the register group through a communication bus; the digital control circuit is connected to the PWM signal generating module, and is used to transmit the PWM pulse width corresponding to each PWM channel, and the PWM signal generating module is respectively connected to the gate of each switching tube, and is used to generate a gate control signal corresponding to each PWM channel according to the PWM pulse width, and the other two poles of each switching tube are respectively connected to the cathode and anode of the corresponding LED; the conduction of the corresponding switching tube is controlled according to the level change of the gate control signal, so as to realize the on and off changes of the LED lamp group.

[0027] A further technical solution is that the PWM signal generation module includes a counter, processing logic for enable and phase control signals, and is used to generate a PWM square wave signal as a gate control signal according to the PWM pulse width;

[0028] When the PWM pulse width is all 0, the LEDs are all off; when the PWM pulse width is all 1, the LEDs are all on; when the PWM pulse width is other values, within a PWM counting cycle, the light is on when the counter is less than the current PWM pulse width, otherwise the light is off.

[0029] The beneficial technical effects of the present invention are:

[0030] The digital control circuit proposed in this application is used in the system to generate the dimming curve (i.e., pulse width sequence) of each PWM channel. The PWM signal generation module in the system will generate the control signal of the switch control end according to the pulse width to control the on and off of the LED. The core of the digital control circuit is the curve calculation module, the playback control module and its control logic. By setting the register group to rewrite the curve parameters, select the curve, change the step duration, intercept and extract the curve, connect the curve and other operations, a more flexible lighting effect can be achieved. In this way, communication will only occur when configuring the curve configuration parameters, and after the configuration is completed, when controlling the playback and stopping of the curve. Except for the PLAY, NEXT and NOW bits of the control register, other parameters are considered not to need to be changed frequently, so the required data traffic is greatly reduced and the burden on the communication network is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic block diagram of the system architecture provided by this application.

[0032] Figure 2 It is a schematic block diagram of the digital control circuit provided by this application.

[0033] Figure 3 It is a schematic block diagram of the control logic timing provided by this application.

[0034] Figure 4 It is a schematic diagram of a dimming curve provided in this application.

[0035] Figure 5 It is a timing diagram of the cubic polynomial curve calculation module provided by this application.

[0036] Figure 6 This is a timing diagram of the step duration provided by this application.

[0037] Figure 7 This is a timing diagram of a complete playback of any channel provided by this application.

[0038] Figure 8 It is a timing diagram of the delay and hold states provided by this application.

[0039] Fig. 9 It is a timing diagram of curve interception and sampling provided by this application.

[0040] Fig.10 This is a timing diagram of the next bit provided by this application.

[0041] Fig.11 It is a timing diagram of the now bit provided in this application. DETAILED DESCRIPTION

[0042] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.

[0043] like Figure 1 As shown, the present application provides a system for automatically generating a PWM high-order dimming curve, which is used to output multiple PWM gate control signals. Taking 12 PWM channels as an example, the system includes a register group, a digital control circuit for outputting PWM pulse width curve generation logic, a PWM signal generation module, 12 switch tubes and 12 LEDs. The register group is connected to the digital control circuit, which is used to transmit the curve parameters corresponding to each configured PWM channel, wherein the curve parameters are configured by rewriting the register group through the communication bus; the digital control circuit is connected to the PWM signal generation module, which is used to transmit the PWM pulse width corresponding to each PWM channel. The PWM signal generation module is respectively connected to the gate of each switch tube, which is used to generate the gate control signal (i.e., high and low level signal) corresponding to each PWM channel according to the PWM pulse width. The other two poles of each switch tube are respectively connected to the cathode and anode of the corresponding LED (the LED is driven by an external constant current source, which is omitted in the figure). Optionally, the switch tube of the present application is a MOSFET tube. The conduction of the corresponding switch tube is controlled according to the level change of the gate control signal to realize the on and off change of the LED lamp group. For example, when the gate control signal is at a high level, the switch is turned on, the corresponding LED is bypassed, and the light is off; when the gate control signal is at a low level, the switch is turned off, the corresponding LED is turned on, and the light is on. Of course, in the analog part, there will be corresponding driver, charge pump and other implementation circuits, but this is not the focus of the present invention and is only a simplified schematic diagram.

[0044] The gate control signal of each channel is determined by the PWM signal generation module through the given PWM pulse width (pulse width is equivalent to duty cycle: pulse width = duty cycle x PWM cycle, PWM cycle = clock cycle x PWM counter range). The PWM signal generation module mainly includes a counter, processing logic for control signals such as enable and phase, which is used to generate a square wave signal with a certain pulse width, i.e., PWM waveform, according to the PWM pulse width output by the curve generation logic.

[0045] The implementation and application of the present invention do not limit the number of bits of the PWM counter. For example, in this example, the PWM counter is 12 bits and the pulse width is also 12 bits. When the PWM pulse width is 12 bits full of 0, the LED lights are all off; when the PWM pulse width is 12 bits full of 1, the LED lights are all on; when the PWM pulse width is 12 bits and other values, within a PWM counting cycle, when the counter is less than the current PWM pulse width, the gate control signal is low level, the light is on, otherwise the light is off. In short, the PWM pulse width always represents the time when the LED light is on. Therefore, for the PWM signal generation module, it is only necessary to provide the pulse width of the corresponding channel.

[0046] The pulse width of each channel is automatically generated by the PWM pulse width curve generation logic through the curve configuration parameters stored in the register group. Figure 2 As shown, the present application also provides a digital control circuit for automatically generating a PWM high-order dimming curve, including a curve calculation module, a playback control module of 12 PWM channels, a control logic, and two multiplexers. The first input end of the curve calculation module is connected to N first registers CUR_SEL in an external register group through a first multiplexer 1, and each first register CUR_SEL is used to select a group from a given curve configuration parameter group as the curve configuration parameter of the corresponding PWM channel, and then the first multiplexer selects the curve configuration parameter of the corresponding PWM channel to the curve calculation module. The first end of each playback control module is connected to the external register group as an input, and the register group is also used to store the curve control parameters corresponding to each PWM channel. The second end of each playback control module is connected to the input end of the control logic, which is used to generate the playback control flag of the corresponding PWM channel according to the curve control parameters. The output end of the control logic is connected to the control end of the curve calculation module, and the output end of the curve calculation module is connected to the third end of each playback control module, which is used to output the PWM pulse width calculation result. The fourth end of each playback control module is connected to the second input end of the curve calculation module through a second multiplexer 2, which is used to determine the current step of the corresponding PWM channel according to the curve control parameters. The control end of the control logic is respectively connected to the control end of the first and second multiplexers 1 and 2. To simplify the block diagram, a module or signal with the same function that is instantiated multiple times is given only one example in the figure, and the letter N is used to indicate that it needs to be repeated multiple times (12 PWM channels are illustrated in this example), and the ladder box is regarded as a multiplexer.

[0047] From the above, we can see that Figure 1 The PWM curve parameters of each channel shown in are divided into two parts: 1) curve control parameters; 2) curve configuration parameters. Figure 2 For convenience, the two parts are separated and shown separately. The two register groups are actually Figure 1 The two parts of the register group.

[0048] pass Figure 1 The communication bus shown in , rewrites the curve configuration parameters and curve control parameters. When the playback control flag of any PWM channel appears, the control logic triggers the curve calculation module 12 times continuously, such as Figure 3 As shown, the PWM pulse width of each PWM channel at the current step is calculated in turn, and stored in the corresponding playback control module and output to the PWM signal generation module of the system. The curve calculation module obtains the PWM pulse width sequence of each PWM channel based on the high-order polynomial curve equation as the dimming curve of each PWM channel, where step is the horizontal coordinate of the high-order polynomial curve equation.

[0049] The calculation of the PWM pulse width of each channel allows multiple clock cycles. This example requires 6 10 MHz clock cycles (the main clock of the system of the present invention) to complete, which is determined by the cubic polynomial curve equation used in this example.

[0050] Furthermore, as mentioned above, the PWM pulse width is calculated by the curve calculation module. The diversity of lighting effects is actually formed by the arrangement of LED brightness at a certain time. For example 1) increase the duty cycle (or pulse width) by 10% every 100us, and after 1ms, the lights are fully lit; 2) from a duty cycle of 75%, reduce it by 15% every 1ms, and after 4ms, the brightness of the lights is maintained at 15%. There are two dimensions here, one is the time interval, and the other is the order of arrangement of the duty cycle. If the sequence of duty cycles (pulse widths) is taken out separately, that is, the time interval between each two pulse widths is ignored, it can be called a PWM dimming curve. The high-order polynomial curve equation of the curve calculation module of the present application is illustrated by a cubic polynomial curve. In fact, other high-order polynomial curves can also be selected to construct the calculation module. The expression is:

[0051] y=k3x 3 +k2x 2 +k1x+k0;

[0052] Where y is the calculated PWM pulse width. k3 to k0 are curve configuration parameters. Except k0 which is a 12-bit unsigned number, k3 to k1 are all 13-bit signed numbers, that is, in order to provide a variety of curves, an additional sign bit is added, all configured by the first register CUR_SEL; Optionally, the first register CUR_SEL in this example is a 3-bit register, so 8 groups of k3 to k0 are provided for flexible generation of dimming curves. x is the step specified by the corresponding playback control module count. In this example, the step is 8 bits, which means that a dimming curve consisting of up to 256 different brightness values ​​can be realized, such as Figure 4 shown.

[0053] Due to the hardware consumption of the polynomial curve, the present invention allows the curve to be calculated using multiple cycles through time division multiplexing, etc. Taking the cubic polynomial equation of the present invention as an example, 6 clock cycles are required to complete the calculation of the curve.

[0054] like Figure 5 As shown, it can be seen as Figure 3 Detailed timing diagram of any two consecutive channel calculations. Figure 3 As shown in , after the calculation of the current channel is completed, the calculation of the next channel will start until all channels are completed. It should be noted that when switching to the next PWM channel (i.e. Figure 2 , Figure 3 and Figure 5 The current channel selection signal in is increased by 1), and the step and curve configuration parameter k are converted into the values ​​corresponding to the next PWM channel through the first and second multiplexers respectively.

[0055] Furthermore, the cubic curve calculation module completes the calculation of the dimming curve pulse width sequence. In order to achieve different lighting effects, each channel needs to be independently controlled by a playback control module. In order to provide the greatest convenience and flexibility for the application, the present invention implements the control of the following curve timing: 1) configure the duration of the pulse width corresponding to the step, 2) configure the delay of the head and tail pulse widths, 3) intercept and extract the dimming curve, and 4) connect the dimming curves. The following is a detailed introduction:

[0056] 1) Configure the duration of the pulse width corresponding to the step, including:

[0057] First, if Figure 4 As shown, even if it is the same curve (for example, after 256 calculations, the step is traversed from 0 to 255), if the duration of each step is different, the lighting effect will be visually different. The present application sets the register group to include a second register STEP_PRD connected to the first end of the playback control module, and configures the curve control parameters corresponding to each PWM channel in the second register STEP_PRD. The curve control parameters include the duration of the pulse width corresponding to each step. Optionally, STEP_PRD is 6-bit, supports up to 64ms, and has a resolution of 1ms.

[0058] like Figure 6 As shown, in Figure 2 The playback control module corresponding to each channel is a 1KHz clock. Figure 6The upper part corresponds to each step lasting 1ms; the lower part corresponds to each step lasting 2ms. If any channel is in the PLAY state (i.e., the playback state), the control logic triggers the cubic curve calculation module every 1ms. The current channel selection "1-12" in the figure indicates Figure 3 In the process of polling all PWM channels, during the polling process (i.e., the continuous triggering process), for the PWM channel in the playing state, the curve calculation module updates the PWM pulse width under the current step; for the PWM channel in the non-playing state, when the calculation of this channel is polled, it still takes a corresponding number of clock cycles (taking the present invention as an example, 6), and the curve calculation module can choose to update the PWM pulse width, or choose not to calculate or update the PWM pulse width under the current step, that is, all relevant parameters will remain in the initial state, that is, step and parameter k are all 0, and in the last calculation cycle, the corresponding PWM pulse width register is not assigned (the PWM pulse width register is located in the playing control module of each PWM channel), and the latter case is preferred in this example.

[0059] Please note that due to the curve configuration, the current step value of each channel may be different. Figure 6 In the example, step M and L are used to distinguish them. The switching of each channel step is specified by the count of the playback control module of the corresponding channel. It should also be noted that, as mentioned above, the current channel selection and three playback control modules are 10MHz, and their timing is much less than 1ms. Figure 6 In order to clearly explain the timing, the corresponding duration is stretched and displayed.

[0060] like Figure 7 As shown in the figure, when the playback control module starts playing, the playback control state machine jumps to PLAY. For each PWM channel, the playback control module times the step of the current channel and switches to the next step when the duration configured by the second register STEP_PRD corresponding to the current channel is reached. In each step, the execution control logic continuously triggers the curve calculation module to calculate the PWM pulse width of each PWM channel at the current step. The PWM pulse width calculation timing is already in Figure 6 In the display. Figure 6 As mentioned above, there is a delay between step switching and pulse width results when the cubic curve calculation module polls 12 channels, but because it is a 10MHz clock logic, the duration corresponding to STEP_PRD is extremely short. Figure 7 In order to better illustrate, this delay is intentionally magnified. Figure 6As mentioned above, in each STEP, if the duration set by the second register STEP_PRD is greater than 1ms, the cubic curve calculation module will be triggered to poll once every 1ms to calculate the pulse width value corresponding to the current step M / L, and the pulse width will also be updated. However, since the duration within this time interval does not change, the calculated PWM pulse width does not change either.

[0061] 2) The delay configuration of the head and tail pulse width includes:

[0062] In order to use the dimming curve more flexibly, the present invention allows adding a delay at the beginning and end of the playback so that the LED brightness (PWM pulse width) is maintained at the beginning and end values ​​of the curve. Figure 8 As shown, the state of the playback control module during playback is called PLAY, and the states of maintaining the start and end values ​​at the beginning and end are called DELAY and HOLD respectively. The DELAY state means that the curve starts to play after a period of "delay"; the HOLD state means that the last brightness is "maintained" for a period of time after the curve is played.

[0063] The register group set in this application includes a third register group and a fourth register group connected to the first end of the playback control module. The third register group is used to configure the duration of the playback control module in the DELAY state, and the fourth register group is used to configure the duration of the playback control module in the HOLD state. The two durations are used as curve control parameters. Figure 8 As shown, in this example, the third register group includes two registers, DELAY and DELAY_UNIT, and the fourth register group includes two registers, HOLD and HOLD_UNIT. The DELAY / HOLD register is used to configure the timing times, which is optional and is an 8-bit positive integer; the DELAY_UNIT / HOLD_UNIT register is used to configure the timing unit, and the DELAY_UNIT and HOLD_UNIT registers support configurations of 1, 2, 4, 6, 10, 16, 32, and 64ms. Then the duration of the DELAY state is equal to DELAY*DELAY_UNIT, and the duration of the HOLD state is equal to HOLD*HOLD_UNIT. Therefore, the shortest duration of the two delay states is 0ms, that is, there is no DELAY state and HOLD state to directly start or end the curve playback, and the maximum duration is 64ms*255=16.32s.

[0064] If the LED brightness is to be maintained at the beginning and end values ​​of the dimming curve, corresponding delays are added to the first and last pulse widths of the dimming curve in the PLAY state, that is, the first pulse width value of the curve is maintained for the timing time DELAY*DELAY_UNIT corresponding to the DELAY state, and then the dimming curve is started to play, and / or, after the curve is played, the last pulse width value of the curve is maintained for the timing time HOLD*HOLD_UNIT corresponding to the HOLD state.

[0065] 3) Intercepting and sampling the dimming curve include:

[0066] In addition to providing HOLD, DELAY and step duration changes, more flexible configuration can be achieved by intercepting and sampling the curve. Up to the current explanation, in the PLAY state, the step is from 0 to 255, that is, all possible brightness values ​​of the curve are traversed sequentially. Therefore, the present application sets a register group including a fifth register START_STEP, a sixth register STOP_STEP and a seventh register NUM_DECIM connected to the first end of the playback control module, START_STEP is used to store the starting step selected from the original dimming curve, STOP_STEP is used to store the ending step selected from the original dimming curve, NUM_DECIM is used to store the number of jump steps between the two extracted points, NUM_DECIM=0 means no step jump, the starting step, the ending step and the number of jumps are used as curve control parameters. For the corresponding PWM channel, the playback control module intercepts an arbitrary curve from the original dimming curve as the new dimming curve of the PWM channel according to the curve control parameters configured by the above three registers to achieve different lighting effects.

[0067] Fig. 9 Two timing examples are given. The first one starts from step = 5 and ends at step = 90, with 9 steps skipped between every two points. The second one starts from step = 200 and ends at step = 45, with 19 steps skipped between every two points. It can be seen that this application supports both starting points smaller than the end point and starting points larger than the end point. In the latter case, the playback control module will automatically move downward from the larger starting step to the smaller ending step. Since the step supports a maximum of 256 points, START_STEP and STOP_STEP are also 8-bit. In this example, NUM_DECIM is 5-bit, which means that a maximum of 31 points are skipped.

[0068] 4) The connection between dimming curves includes:

[0069] In addition to the above:

[0070] Registers such as STEP_PRD, DELAY / HOLD, DELAY_UNIT / HOLD_UNIT, START_STEP, STOP_STEP, NUM_DECIM and CUR_SEL, that is, different lighting effects can be achieved by adjusting the duration, configuring parameters, etc., and different lighting effects can also be achieved by connecting different curves. The curve parameters set in this application include the PLAY bit, NEXT bit and NOW bit of the register connected to the first end of the playback control module as the curve control signal.

[0071] For the PLAY bit, the register is self-clearing. When the dimming curve of the corresponding PWM channel is in the non-playing state (that is, the curve is not in the DELAY / PLAY / HOLD state), the PWM channel follows the playing curve state (such as Figure 8 , Fig. 9 )IDEL->DELAY->PLAY->HOLD->IDLE. When the HOLD state ends, the curve enters the initial state IDLE state and waits for the next PLAY to be written.

[0072] For the NEXT bit, the register is self-clearing and automatically cleared after writing 1. Take at least two groups of dimming curves with different configurations, write the NEXT bit in any playback state of the first group of dimming curves, and wait until the HOLD state of the first group of dimming curves ends, and then the playback control module enters the playback of the second group of dimming curves to achieve the connection of the two groups of dimming curves, that is, Fig.10 As shown, Fig. 9 The two sets of curve configurations are connected. The configuration of the second dimming curve can be configured in advance in any playback state of the first dimming curve to increase flexibility. Updating the configuration while the current configuration is playing will not affect the current playback.

[0073] For the NOW bit, the register is self-clearing and automatically cleared after writing 1. Take at least two groups of dimming curves with different configurations. Optionally, except for the HOLD state, when the NOW bit is written in any playback state of the first group of dimming curves, when the current step length is reached, the playback control module immediately switches to the playback of the second group of dimming curves to achieve instant connection between the two groups of dimming curves. Fig.11 As shown, the configuration is updated at step = 25, and the current playback is not affected. NOW is written during step = 35. When STEP_PRD reaches the number of seconds, the playback state enters the next set of dimming curves. From the DELAY state to the HOLD state, the playback control enters the IDLE state. It should be noted that when the NOW bit is written in the HOLD state of the first set of dimming curves, the playback control module immediately ends the playback of the current dimming curve, that is, if the HOLD seconds have not expired, it also switches to the playback of the second set of dimming curves to achieve the connection between the two sets of dimming curves.

[0074] Optionally, the conversion method of writing the NOW bit in any playback state can be adjusted according to actual needs. For example, if the NOW bit is written in the DELAY state of the current dimming curve, no response is made to the bit.

[0075] In summary, the PWM pulse width curve generation logic is used in the system to generate the dimming curve (i.e., pulse width sequence) of each channel. The PWM signal generation module in the system will generate the control signal of the switch control end according to the pulse width to control the on and off of the LED. In the PWM pulse width curve generation logic, the curve configuration parameters, curve control parameters, curve selection, step duration change, curve interception and extraction, curve connection and other operations are rewritten by setting the register group, thereby providing considerable flexibility for the application. Except for the PLAY, NEXT and NOW bits of the control register, other parameters are considered not to need to be changed frequently, so the required data traffic is greatly reduced and the burden on the communication network is reduced. It should be noted that, except for the PLAY, NEXT and NOW bits, the parameter configuration of the remaining registers can be configured once through the communication serial port or automatically loaded into the configuration through the non-volatile memory when powered on.

[0076] The above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is understood that other improvements and changes directly derived or associated by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included in the protection scope of the present invention.

Claims

1. A digital control circuit for automatically generating a PWM high-order dimming curve, characterized in that: It includes a curve calculation module, a playback control module of N PWM channels, a control logic and two multiplexers; the first input end of the curve calculation module is connected to an external register group through a first multiplexer, and the first end of each of the playback control modules is respectively connected to an external register group as an input, and the register group is used to store the curve parameters corresponding to each PWM channel; the second end of each of the playback control modules is connected to the input end of the control logic, and is used to generate a playback control flag bit of the corresponding PWM channel according to the curve parameters; the output end of the control logic is connected to the control end of the curve calculation module, and the output end of the curve calculation module is connected to the third end of each of the playback control modules; the fourth end of each of the playback control modules is connected to the second input end of the curve calculation module through a second multiplexer, and is used to determine the current step of the corresponding PWM channel according to the curve parameters; the control end of the control logic is respectively connected to the control ends of the first and second multiplexers; When the playback control flag of any PWM channel appears, the control logic continuously triggers the curve calculation module N times to calculate the PWM pulse width of each PWM channel under the current step, and stores it in the corresponding playback control module; the curve calculation module obtains the PWM pulse width sequence of each PWM channel based on the high-order polynomial curve equation as the dimming curve of each PWM channel, wherein the step is the horizontal coordinate of the high-order polynomial curve equation; The register group includes N first registers connected to the first multiplexer, each of the first registers is used to select a group from a given curve configuration parameter group as the curve configuration parameters of the corresponding PWM channel, and the first multiplexer is used to select the curve configuration parameters of the corresponding PWM channel and provide them to the curve calculation module; the register group also includes a second register connected to the first end of the playback control module, and the curve control parameters corresponding to each PWM channel are configured in the second register, and the curve control parameters include the duration of the pulse width corresponding to each step.

2. The digital control circuit for automatically generating a PWM high-order dimming curve according to claim 1, characterized in that: For each PWM channel, the playback control module is also used to perform timing control on the dimming curve, including: configuring the duration of the pulse width corresponding to the step, the delay configuration of the head and tail pulse widths, intercepting and sampling the dimming curve, and connecting the dimming curves.

3. The digital control circuit for automatically generating a PWM high-order dimming curve according to claim 2, characterized in that: The duration of the pulse width corresponding to the configuration step includes: When the playback control module is in the PLAY state, for each PWM channel, the playback control module times the step of the current channel, and switches to the next step when the duration configured by the second register corresponding to the current channel is reached. During this period, each PWM channel maintains the corresponding PWM pulse width obtained by the curve calculation module.

4. The digital control circuit for automatically generating a PWM high-order dimming curve according to claim 2, characterized in that: The delay configuration of the head and tail pulse widths includes: The register group includes a third register group and a fourth register group connected to the first end of the playback control module, the third register group is used to configure the duration of the playback control module in the DELAY state, and the fourth register group is used to configure the duration of the playback control module in the HOLD state, and the two durations are used as curve control parameters; If the LED brightness is maintained at the beginning and end values ​​of the dimming curve, corresponding delays are added to the first and last pulse widths of the dimming curve in the PLAY state, that is, the first pulse width value of the curve is maintained for the timing time of the third register group corresponding to the DELAY state, and then the dimming curve is started to be played, and / or, after the curve is played, the last pulse width value of the curve is maintained for the timing time of the fourth register group corresponding to the HOLD state.

5. The digital control circuit for automatically generating a PWM high-order dimming curve according to claim 2, characterized in that: The intercepting and sampling the dimming curve comprises: The register group includes a fifth register, a sixth register and a seventh register connected to the first end of the playback control module, the fifth register is used to store a starting step selected from the original dimming curve, the sixth register is used to store an ending step selected from the original dimming curve, and the seventh register is used to store the number of jump steps between two extracted points, and the starting step, the ending step and the number of jumps are used as curve control parameters; For the corresponding PWM channel, the playback control module intercepts an arbitrary curve from the original dimming curve as a new dimming curve of the PWM channel to achieve different lighting effects according to the curve control parameters configured by the above three registers.

6. The digital control circuit for automatically generating a PWM high-order dimming curve according to claim 2, characterized in that: The connection between the dimming curves includes: The curve parameters include the PLAY bit, NEXT bit and NOW bit of the register connected to the first end of the playback control module, as curve control signals; For the PLAY bit, when the dimming curve of the corresponding PWM channel is in a non-playing state, the PWM channel plays the curve in the order of IDEL -> DELAY -> PLAY -> HOLD -> IDLE; when the HOLD state ends, the curve enters the initial state IDLE state, waiting for the next writing of PLAY; For the NEXT bit, at least two groups of dimming curves with different configurations are taken. When the NEXT bit is written in any playback state of the first group of dimming curves, after the HOLD state of the first group of dimming curves ends, the playback control module enters the playback of the second group of dimming curves to achieve the connection of the two groups of dimming curves; and the configuration of the second group of dimming curves can be configured in advance in any playback state of the first group of dimming curves, without affecting the playback of the first group of curves; For the NOW bit, at least two groups of dimming curves with different configurations are taken. When the NOW bit is written in any playback state of the first group of dimming curves, after the current step duration is reached, the playback control module immediately switches to the playback of the second group of dimming curves to achieve instant connection between the two groups of dimming curves.

7. The digital control circuit for automatically generating a PWM high-order dimming curve according to claim 1, characterized in that: In the process of continuously calculating the PWM pulse width of each PWM channel at the current step, for the PWM channels in the playing state and the non-playing state, the curve calculation module updates the PWM pulse width at the current step; or, for the PWM channels in the non-playing state, the curve calculation module does not calculate or update the PWM pulse width at the current step.

8. A system for automatically generating a PWM high-order dimming curve, characterized in that: It comprises a register group, a digital control circuit as described in any one of claims 1 to 7, a PWM signal generating module, N switch tubes and N LEDs; the register group is connected to the digital control circuit, and is used to transmit the curve parameters corresponding to each configured PWM channel, wherein the curve parameters are configured by rewriting the register group through a communication bus; the digital control circuit is connected to the PWM signal generating module, and is used to transmit the PWM pulse width corresponding to each PWM channel, the PWM signal generating module is respectively connected to the gate of each of the switch tubes, and is used to generate a gate control signal corresponding to each PWM channel according to the PWM pulse width, and the other two electrodes of each of the switch tubes are respectively connected to the cathode and anode of the corresponding LED; the conduction of the corresponding switch tube is controlled according to the level change of the gate control signal, so as to realize the on and off change of the LED lamp group.

9. The system for automatically generating a PWM high-order dimming curve according to claim 8, characterized in that: The PWM signal generation module includes a counter, and processing logic for enable and phase control signals, and is used to generate a PWM square wave signal as the gate control signal according to the PWM pulse width; When the PWM pulse width is all 0, the LEDs are all off; when the PWM pulse width is all 1, the LEDs are all on; when the PWM pulse width is other values, within a PWM counting cycle, the light is on when the counter is less than the current PWM pulse width, otherwise the light is off.

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