Chip detection method, device, equipment and storage medium

By measuring the total time of receiving command reply data of the chip to be tested under different parameters in the preset detection circuit, the problems of misjudgment and misjudgment of chip detection in the prior art are solved, and higher detection accuracy and yield rate are achieved.

CN114994513BActive Publication Date: 2025-09-05ZHEJIANG GEOFORCECHIP TECH CO LTD
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Patent Information

Application Number
CN202210769972.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-01
Publication Date
2025-09-05
Estimated Expiration
2042-07-01

AI Technical Summary

Technical Problem

In the prior art, when detecting chips, especially when the processes are similar, it is easy to lead to misjudgment and misjudgment, resulting in inaccurate detection results.

Method used

By obtaining the total duration of the received command reply data of the chip to be tested under different parameter values ​​based on the preset detection circuit, and comparing it with the total reference time of the preset reference time of the chip to be tested, it is determined whether the chip to be tested meets the performance parameters, including measuring the difference in the total duration during the input voltage and temperature changes.

Benefits of technology

It improves the accuracy of chip detection, reduces misjudgment and missed judgment, improves the product yield, and can perform effective anti-counterfeiting identification.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application proposes a chip detection method, apparatus, device, and storage medium. The chip detection method is based on a preset detection circuit, which includes a chip interface, a pull-up resistor, and a power interface connected in sequence. The chip interface is used to access the chip to be tested, and the chip interface and the power interface are both connected to a single-chip microcomputer. The method includes: based on the preset detection circuit, obtaining the total duration of receiving command reply data corresponding to different parameter values ​​of the chip to be tested during the process of the value of at least one influencing parameter changing; based on the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions, determining whether the chip to be tested meets the performance parameters of the preset benchmark chip. The present application can greatly improve the accuracy of differential detection and reduce the misjudgment and missed judgment caused by traditional methods.
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Description

Technical Field

[0001] The present application belongs to the field of chip technology, and specifically relates to a chip detection method, device, equipment and storage medium. Background Art

[0002] With the advancement of chip technology, the number of chip manufacturers has increased. For chips of the same specifications (size, electrical performance, etc.) (including, but not limited to, chips used in microcontrollers), there are often multiple products on the market from multiple manufacturers. However, the performance of products from different manufacturers often varies. Therefore, before using a chip, it is usually necessary to test it to confirm that it is the selected chip.

[0003] In the prior art, when testing chips, especially when two chips use similar processes, the data of the two chips at specific points are often not much different, so it is easy to cause misjudgment and missed judgment, resulting in inaccurate test results. Summary of the Invention

[0004] The present application proposes a chip detection method, device, equipment and storage medium, which can greatly improve the accuracy of differential detection and reduce the misjudgment and missed judgment caused by traditional methods.

[0005] In a first aspect, an embodiment of the present application provides a chip detection method based on a preset detection circuit, wherein the preset detection circuit includes a chip interface, a pull-up resistor, and a power interface connected in sequence, wherein the chip interface is used to connect to the chip to be tested, and the chip interface and the power interface are both connected to a single-chip microcomputer; the method includes:

[0006] Based on the preset detection circuit, obtaining the total duration of receiving command reply data corresponding to different parameter values ​​of the chip under test during a process in which the value of at least one influencing parameter changes;

[0007] According to the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions, it is determined whether the chip under test meets the performance parameters of the preset benchmark chip.

[0008] In some embodiments of the present application, obtaining the total duration of receiving command reply data corresponding to different parameter values ​​during a change in the value of at least one influencing parameter of the chip under test includes:

[0009] Obtain the total duration of receiving command reply data corresponding to different input voltage values ​​during the process of the input voltage of the chip under test changing.

[0010] In some embodiments of the present application, determining whether the chip under test meets the performance parameters of the preset benchmark chip based on the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions includes:

[0011] Determine the total test time and the total benchmark time corresponding to each input voltage value, respectively, according to the total test time of the chip under test corresponding to each input voltage value and the total benchmark time of the preset benchmark chip corresponding to each input voltage value;

[0012] According to the total time to be tested and the reference total time corresponding to each input voltage value, it is determined whether the chip to be tested meets the performance parameters of the preset reference chip.

[0013] In some embodiments of the present application, determining whether the chip under test meets the performance parameters of the preset benchmark chip according to the total test time and the benchmark total time corresponding to each input voltage value includes:

[0014] Calculating a first difference between the total time to be measured and the reference total time corresponding to each input voltage value;

[0015] Determining whether the sum of the absolute values ​​of all first differences is greater than a first preset threshold;

[0016] If so, it is determined that the chip under test does not meet the performance parameters of the preset reference chip.

[0017] In some embodiments of the present application, after determining whether the sum of the absolute values ​​of all first differences is greater than a first preset threshold, the method further includes:

[0018] If not, calculating the duration growth slopes of the total duration to be measured and the reference total duration corresponding to each input voltage value, and determining whether the sum of the absolute values ​​of all duration growth slopes is greater than a second preset threshold;

[0019] If so, it is determined that the chip under test does not meet the performance parameters of the preset reference chip; if not, it is determined that the chip under test meets the performance parameters of the preset reference chip.

[0020] In some embodiments of the present application, obtaining the total duration of receiving command reply data corresponding to different parameter values ​​during a change in the value of at least one influencing parameter of the chip under test includes:

[0021] Obtain the total duration of receiving command reply data corresponding to different temperature values ​​during the temperature change of the chip under test.

[0022] In some embodiments of the present application, determining whether the chip under test meets the performance parameters of the preset benchmark chip based on the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions includes:

[0023] Determine the total time to be measured and the total reference time corresponding to each temperature value, respectively, according to the total time to be measured of the chip to be measured corresponding to each input voltage value and the total reference time of the preset reference chip corresponding to each input voltage value;

[0024] According to the total time to be tested and the benchmark total time corresponding to each temperature value, it is determined whether the chip to be tested meets the performance parameters of the preset benchmark chip.

[0025] In some embodiments of the present application, determining whether the chip under test meets the performance parameters of the preset benchmark chip according to the total time to be tested and the benchmark total time corresponding to each temperature value includes:

[0026] Calculating a second difference between the total time to be measured and the reference total time corresponding to each temperature value;

[0027] It is determined whether the chip to be tested meets the performance parameters of the preset reference chip according to the second difference corresponding to each temperature value.

[0028] In some embodiments of the present application, determining whether the chip under test meets the performance parameters of the preset reference chip according to the second difference corresponding to each temperature value includes:

[0029] Calculating an average of all the second difference values ​​according to the second difference values ​​corresponding to the temperature values, and determining whether the average value is less than or equal to a third preset threshold;

[0030] If so, it is determined that the chip under test does not meet the performance parameters of the preset reference chip; if not, it is determined that the chip under test meets the performance parameters of the preset reference chip.

[0031] An embodiment of a second aspect of the present application provides a chip detection device, based on a preset detection circuit, wherein the preset detection circuit includes a chip interface, a pull-up resistor, and a power interface connected in sequence, wherein the chip interface is used to connect to a chip to be tested, and the chip interface and the power interface are both connected to a single-chip microcomputer; the device includes:

[0032] a duration acquisition module, configured to acquire, based on the preset detection circuit, a total duration of receiving command reply data corresponding to different parameter values ​​during a process in which the value of at least one influencing parameter of the chip under test changes;

[0033] The result determination module is used to determine whether the chip under test meets the performance parameters of the preset benchmark chip according to the total time corresponding to each parameter value and the benchmark total time of the preset benchmark chip under the same conditions.

[0034] An embodiment of the third aspect of the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps described in the first aspect when executing the computer program.

[0035] An embodiment of the fourth aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the program is executed by a processor to implement the method described in the first aspect.

[0036] The technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0037] The chip detection method provided in the embodiment of the present application is based on the above-mentioned preset detection circuit. After the chip to be tested is connected to the preset detection circuit, the total time length of receiving command reply data corresponding to different parameter values ​​of the chip to be tested during the process of changing the value of at least one influencing parameter can be detected. And according to the total time length corresponding to each parameter value and the benchmark total time length of the preset benchmark chip under the same conditions (i.e., the benchmark total time length described below), it is determined whether the chip to be tested meets the performance parameters of the preset benchmark chip. In this way, by changing the total time length of receiving command reply data corresponding to different parameter values ​​obtained under the condition of changing the influencing parameters, the performance (including but not limited to power consumption performance and diode performance) of the chip to be tested can be detected to improve the yield rate of the product and to perform anti-counterfeiting identification on the chip (chips with the same characteristic description and preset benchmark belong to the same manufacturer, and chips with different characteristic descriptions and preset benchmarks do not belong to the same manufacturer). And this method distinguishes the performance of different chips from the two aspects of total time length and influencing parameters, which can greatly improve the accuracy of the distinguishing detection and reduce the misjudgment and missed judgment caused by traditional methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present application. Throughout the accompanying drawings, the same reference numerals are used to denote the same components.

[0039] In the attached figure:

[0040] Figure 1 A schematic diagram of the framework structure of a preset detection circuit provided in an embodiment of the present application is shown;

[0041] Figure 2A schematic diagram of the principle structure of a preset detection circuit provided in one embodiment of the present application is shown;

[0042] Figure 3 A schematic diagram of a chip detection method according to an embodiment of the present application is shown;

[0043] Figure 4a FIG1 shows a timing diagram of command X when the input voltage value of the chip under test is 3.2V in one embodiment of the present application;

[0044] Figure 4b FIG1 shows a timing diagram of command X when the input voltage value of the chip under test is 2.72V in one embodiment of the present application;

[0045] Figure 4c FIG1 shows a timing diagram of command X when the input voltage value of the chip under test is 2.4V in one embodiment of the present application;

[0046] Figure 4d FIG1 shows a timing diagram of command X when the input voltage value of the chip under test is 2.08V in one embodiment of the present application;

[0047] Figure 4e FIG1 shows a timing diagram of command X when the input voltage value of the chip under test is 1.84V in one embodiment of the present application;

[0048] Figure 5 A schematic diagram showing different input voltage values ​​and total time of the chip under test in one embodiment of the present application is shown;

[0049] Figure 6 A schematic diagram of scatter point fitting of different input voltage values ​​and total durations of a chip under test and a preset reference chip in one embodiment of the present application is shown;

[0050] Figure 7 A schematic diagram showing a flow chart of another chip detection method provided in one embodiment of the present application is shown;

[0051] Figure 8a FIG1 shows a timing diagram of command X when the temperature of the chip under test is 5° C. in one embodiment of the present application;

[0052] Figure 8b FIG1 shows a timing diagram of command X when the temperature of the chip under test is 15° C. in one embodiment of the present application;

[0053] Figure 8c FIG1 shows a timing diagram of command X when the temperature of the chip under test is 25° C. in one embodiment of the present application;

[0054] Figure 8dFIG1 shows a timing diagram of command X when the temperature of the chip under test is 50° C. in one embodiment of the present application;

[0055] Figure 9 A schematic diagram showing different temperature values ​​and total time of the chip to be tested in one embodiment of the present application is shown;

[0056] Figure 10 A schematic diagram of scatter point fitting of different temperature values ​​and total time of a chip to be tested and a preset reference chip in one embodiment of the present application is shown;

[0057] Figure 11 A schematic diagram showing a flow chart of another chip detection method provided in an embodiment of the present application is shown;

[0058] Figure 12 A schematic structural diagram of an electronic device provided in one embodiment of the present application is shown;

[0059] Figure 13 A schematic diagram of a storage medium provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0060] The following describes exemplary embodiments of the present application in more detail with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments described herein. Instead, these embodiments are provided to enable a more thorough understanding of the present application and to fully convey the scope of the present application to those skilled in the art.

[0061] It should be noted that, unless otherwise specified, the technical or scientific terms used in this application should have the common meanings understood by those skilled in the art to which this application belongs.

[0062] Existing techniques employ a fixed voltage test command length method. Specifically, the chip sends a fixed command to the microcontroller and then measures the total length of time (total duration) it takes for the chip to receive the microcontroller's response data. This method can be used to distinguish between identical chips from different manufacturers. However, using only the total duration parameter often fails to effectively distinguish identical chips from different manufacturers, leading to misjudgments and inaccurate chip identification.

[0063] To solve the above problems, the present invention provides a chip detection method, device, equipment and storage medium. The chip in this embodiment is generally a chip used in a single-chip microcomputer, which can be an analog chip or a digital chip. This embodiment does not specifically limit this.

[0064] The chip detection method is based on a preset detection circuit, such as Figure 1As shown, the preset detection circuit includes a chip interface, a pull-up resistor and a power interface connected in sequence. The chip interface is used to access the chip to be tested, and the chip interface and the power interface are both connected to the microcontroller.

[0065] like Figure 2 As shown, the power supply interface may include a DAC (digital-to-analog converter) interface, which is connected to the single-chip microcomputer, receives the power supply voltage provided by the single-chip microcomputer, and can output a fixed voltage or a variable voltage. The chip interface is connected to the chip to be tested, can communicate with the chip to be tested, can send data to the chip to be tested, and receive data fed back by the chip to be tested, etc. The chip interface may include two pins, one pin V1 is connected to the pull-up resistor for IO output, and the other pin LIGND is grounded, which can pull the voltage of pin V1 down to 0. Pin V1 can be an open-drain output (or a push-pull output according to technical requirements). Under the action of the pull-up resistor, its output voltage is pulled up to the voltage of the pull-up resistor. Pin V1 outputs command data, and after outputting the command, it is set to input read command data so that command data can be sent and command reply data can be received.

[0066] Based on the above-mentioned preset detection circuit, after the chip to be tested is connected to the preset detection circuit, the total time length of receiving command reply data corresponding to different parameter values ​​of the chip to be tested during the process of the value of at least one influencing parameter changing can be detected. And according to the total time length corresponding to each parameter value and the benchmark total time length of the preset benchmark chip under the same conditions (i.e., the benchmark total time length described below), it is determined whether the chip to be tested meets the performance parameters of the preset benchmark chip. In this way, by changing the influencing parameters, the total time length of receiving command reply data corresponding to different parameter values ​​can be obtained to achieve the performance (including but not limited to power consumption performance and diode performance) detection of the chip to be tested, so as to improve the product yield rate and perform anti-counterfeiting identification of the chip (chips with the same characteristic description and preset benchmark belong to the same manufacturer, and chips with different characteristic descriptions and preset benchmarks do not belong to the same manufacturer). And this method distinguishes the performance of different chips from the two aspects of total time length and influencing parameters, which can greatly improve the accuracy of the differentiated detection and reduce the misjudgment and missed judgment caused by traditional methods.

[0067] As mentioned above, this embodiment can be applied to the chip production process to test the chip performance to improve the yield rate of the product. It can also be applied to the chip anti-counterfeiting identification during the chip use process to ensure that the quality chip is used and the performance of the product is guaranteed. Accordingly, when applied to the chip production process, the preset reference chip is usually a chip with relatively ideal performance produced by a certain manufacturer itself. The various electrical properties, specifications, dimensions, internal logic, etc. of the preset reference chip can be tested and recorded before the test to be tested, and this can be used to check whether the subsequent production chips meet the standards. When applied to the chip use process, the preset reference chip is usually a chip with relatively ideal performance produced by a certain manufacturer to be selected (it can be itself or an upstream manufacturer). Similarly, the various electrical properties, specifications, dimensions, internal logic, etc. of the preset reference chip can be tested and recorded before the test to be tested, and this can be used to check whether the subsequent production chips meet the standards.

[0068] Please refer to Figure 3 , is a flow chart of the chip detection method provided in the embodiment of the present application, such as Figure 3 As shown, the method includes the following steps:

[0069] Step S1: Based on a preset detection circuit, the total duration of receiving command reply data corresponding to different parameter values ​​of the chip under test during a process in which the value of at least one influencing parameter changes is obtained.

[0070] Step S2 , determining whether the chip under test meets the performance parameters of the preset benchmark chip based on the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions.

[0071] The command may be any command for interaction between the chip and the microcontroller, and this embodiment does not impose any specific limitation on this. The influencing parameter may include any parameter that can affect the total time it takes for the chip to receive reply data from the microcontroller, including but not limited to the chip input voltage, chip temperature, and the total time it takes to receive reply data for different commands (the influencing parameter may be considered as the type of command), and this embodiment does not impose any specific limitation on this.

[0072] In some embodiments, the influencing parameter includes the input voltage of the chip, and the above step S1 may include the following processing: obtaining the total time length of receiving command reply data corresponding to different input voltage values ​​when the input voltage of the chip under test changes.

[0073] Because the total time it takes for a chip to receive a MCU's response data is related to the chip's internal logic for reading and replying commands, as well as the logic initialization, timing logic, and loop processing logic after the reply command, different chips can have significant differences in this total time. Even the same chip's total time to receive MCU response data can vary depending on the input voltage. This embodiment effectively detects performance differences between different chips by comparing the total time it takes for the chip under test to receive MCU response data with a preset reference chip at multiple input voltages.

[0074] Specifically, if Figure 2 As shown, this embodiment uses the DAC to adjust the output voltage of the microcontroller, that is, the chip's input voltage. V1 controls the chip's data output. When the DAC adjusts the chip's input voltage (high voltage), V1 is used to open-drain and output a command (including, but not limited to, command 74, command 70, and command 90) at different input voltages. The total time T for the reply data is measured using the V1 input mode.

[0075] like Figure 4a-4e As shown in FIG. 1 , there are respectively shown command timing diagrams of the chip under test sending command X to the single-chip microcomputer when the input voltage values ​​are 3.2V, 2.72V, 2.4V, 2.08V and 1.84V in this embodiment.

[0076] It is understandable that the total duration of all commands of the benchmark chip or the chip under test under different input voltages can be tested according to the above process, which will not be repeated here. According to the above total duration test method, after obtaining the total duration corresponding to different input voltage values, a scatter plot of the corresponding relationship between input voltage value and total duration can be drawn to facilitate subsequent data acquisition and use. Figure 5 The figure shows a scatter plot of the corresponding relationship between the input voltage value and the total duration for command X, determined by the chip under test according to the above process. As for the scatter plot of the corresponding relationship between the input voltage value and the total duration of the reference chip, before implementing this method or before implementing step S2, after obtaining the total duration corresponding to different input voltage values ​​according to the above total duration test method, a scatter plot of the corresponding relationship between the input voltage value and the total duration of the preset reference chip can be drawn. This will not be repeated here.

[0077] Accordingly, step S2 may include the following processing: determining the total time to be tested of the chip corresponding to each input voltage value and the preset benchmark data based on the total time to be tested and the preset benchmark total time of the benchmark chip; determining whether the chip to be tested meets the performance parameters of the preset benchmark chip based on the total time to be tested and the benchmark total time corresponding to each input voltage value.

[0078] Since the total time it takes for different chips to receive reply data for the same command is different under the same input voltage value, this embodiment compares the total time of the chip to be tested and the benchmark total time of the reference chip during the change of different input voltage values. This not only takes into account the total time it takes for the chip to receive reply data, but also takes into account the impact of different input voltage values ​​on the total time. This can more accurately determine whether the chip to be tested meets the performance parameters of the preset reference chip, thereby greatly improving the accuracy of differentiation detection and reducing missed judgments and misjudgments of traditional methods.

[0079] In other embodiments, when determining whether the chip under test meets the performance parameters of a preset benchmark chip based on the total test time and the benchmark total time corresponding to each input voltage value, first differences between the total test time and the benchmark total time corresponding to each input voltage value can be calculated, and then a determination can be made as to whether the sum of the absolute values ​​of all first differences is greater than a first preset threshold. If so, it is determined that the chip under test does not meet the performance parameters of the preset benchmark chip.

[0080] If the sum of the absolute values ​​of all first differences is less than or equal to the first preset threshold, the time growth slope of the total time to be measured and the benchmark total time corresponding to each input voltage value is calculated, and it is determined whether the sum of the absolute values ​​of all time growth slopes is greater than the second preset threshold; if so, it is determined that the chip to be tested does not meet the performance parameters of the preset benchmark chip; if not, it is determined that the chip to be tested meets the performance parameters of the preset benchmark chip.

[0081] Among them, the first difference can be understood as a general term, which can refer to the difference between the two total time lengths corresponding to any input voltage value. The first preset threshold value and the second preset threshold value can both be any constant value, and this embodiment does not specifically limit this. Specifically, the first preset threshold value and the second preset threshold value can be set according to actual conditions. For example, when performing chip testing, if a larger fault tolerance rate is to be set to improve the product factory rate, the first preset threshold value and the second preset threshold value can both be set relatively larger. If a smaller fault tolerance rate is to be set to strictly control product quality, the first preset threshold value and the second preset threshold value can both be set relatively smaller.

[0082] When determining whether the chip under test meets the performance parameters of the preset reference chip, the corresponding relationship scatter plot of the input voltage value and total duration of the chip under test for command X and the corresponding relationship scatter plot of the input voltage value and total duration of the preset reference chip for command X can be fitted to obtain the following: Figure 6 The fitted scatter plot of the corresponding relationship between the input voltage value and the total duration of the command X for the chip under test and the reference chip is shown. Figure 6The difference in the total duration of the two chips for different commands can be observed more intuitively, and the total duration deviation of the two chips for the same command can be specifically calculated, that is, the above-mentioned first difference, and then the sum of the absolute values ​​of all first differences and the sum of the absolute values ​​of all duration growth slopes are calculated, and it is determined that the chip under test does not meet the performance parameters of the preset benchmark chip.

[0083] Given that both the difference and the growth slope can be positive or negative, for ease of comparison, the sum of the absolute values ​​of the first difference and the sum of the absolute values ​​of the growth slope can be calculated, and then the sum of the absolute values ​​of the first difference can be compared with the first preset threshold, and the sum of the absolute values ​​of the growth slope can be compared with the second preset threshold, and then it can be determined that the chip to be tested and the preset reference chip are different types of chips, which can effectively avoid misjudgment caused by single-point test errors, thereby further improving the accuracy of chip detection.

[0084] The following is combined with Figure 7 The process of performing chip detection based on the total time corresponding to different input voltage values ​​in this embodiment is described in detail. Figure 7 As shown, the benchmark total duration of a preset reference chip corresponding to different input voltage values ​​can be first obtained according to the above-mentioned total duration acquisition method. A first difference between the total duration to be measured and the benchmark total duration corresponding to each input voltage value, as well as the sum of the absolute values ​​of the first differences, can be calculated. The sum of the absolute values ​​of the first differences is then compared with a first preset threshold. If the sum of the absolute values ​​of the first differences is greater than the first preset threshold, it can be directly determined that the chip under test does not meet the performance parameters of the preset benchmark chip, i.e., the chip under test is unqualified or does not belong to the same manufacturer as the preset benchmark chip. If the sum of the absolute values ​​of the first differences is less than or equal to the first preset threshold, the duration growth slope of the total duration to be measured and the benchmark total duration corresponding to each input voltage value can be calculated. It is then determined whether the sum of the absolute values ​​of all duration growth slopes is greater than a second preset threshold. If the sum of the absolute values ​​of the growth slopes is greater than the second preset threshold, it is determined that the chip under test does not meet the performance parameters of the preset benchmark chip, i.e., the chip under test is unqualified or does not belong to the same manufacturer as the preset benchmark chip. If the sum of the absolute values ​​of the growth slopes is less than or equal to the second preset threshold, it is determined that the chip under test meets the performance parameters of the preset reference chip, that is, the chip under test is qualified, or belongs to the same manufacturer as the preset reference chip.

[0085] In other embodiments, the influencing parameter includes the temperature of the chip, and the above step S1 may include the following processing: obtaining the total time length of receiving command reply data corresponding to different temperature values ​​when the temperature of the chip under test changes.

[0086] Because the total time it takes for a chip to receive a MCU's reply is related to the chip's internal logic for reading and replying commands, as well as the logic initialization, timing logic, and loop processing logic following the reply command, different chips can experience significant differences in this total time. The same chip's total time to receive MCU reply data can also vary at different temperatures. This embodiment effectively detects performance differences between different chips by comparing the total time it takes to receive MCU reply data with a preset reference chip at multiple temperatures.

[0087] Specifically, if Figure 2 As shown, this embodiment can output a fixed pull-up voltage (such as 3.3V) through DAC, control data output through V1, output a certain command under different temperatures through V1 open drain (which can be but is not limited to 74 commands, 70 commands and 90 commands, etc.), and use V1 input mode to measure the total time length T of the reply data.

[0088] like Figure 8a-8d As shown in FIG. 1 , there are respectively shown command timing diagrams of the chip under test sending command X to the single chip microcomputer when the chip temperature values ​​are 5° C., 15° C., 25° C. and 50° C. in this embodiment.

[0089] It is understandable that the total duration of all commands of the benchmark chip or the chip to be tested at different temperature values ​​can be tested according to the above process, which will not be repeated here. According to the above total duration test method, after obtaining the total duration corresponding to different temperature values, a scatter plot of the corresponding relationship between temperature value and total duration can be drawn to facilitate subsequent data acquisition and use. Figure 9 The figure shows a scatter plot of the corresponding relationship between the temperature value and the total duration for command X, determined according to the above process, for the chip under test. For the scatter plot of the corresponding relationship between the temperature value and the total duration of the reference chip, a scatter plot of the corresponding relationship between the temperature value and the total duration of the preset reference chip can be drawn before implementing this method or before implementing step S, after obtaining the total duration corresponding to different temperature values ​​according to the above total duration test method. This will not be repeated here.

[0090] Accordingly, step S2 may include the following processing: determining the total time to be tested of the chip corresponding to each temperature value and the preset benchmark data according to the total time corresponding to each temperature value and the preset benchmark data; determining whether the chip to be tested meets the performance parameters of the preset benchmark chip according to the total time to be tested and the benchmark total time corresponding to each temperature value.

[0091] Since the total time for different chips to receive reply data for the same command is different under the same temperature value, this embodiment compares the total test time of the chip to be tested and the benchmark total time of the reference chip during the change of different temperature values. It not only takes into account the total time for the chip to receive reply data, but also takes into account the impact of different temperature values ​​on the total time. It can more accurately determine whether the chip to be tested meets the performance parameters of the preset reference chip, thereby greatly improving the accuracy of differentiation detection and reducing missed judgments and misjudgments of traditional methods.

[0092] In other embodiments, when determining whether the chip to be tested meets the performance parameters of the preset reference chip based on the total time to be tested and the benchmark total time corresponding to each temperature value, the second difference between the total time to be tested and the benchmark total time corresponding to each temperature value can be calculated first, and then based on the second difference corresponding to each temperature value, it can be determined whether the chip to be tested meets the performance parameters of the preset reference chip.

[0093] Specifically, when determining whether the chip under test meets the performance parameters of a preset reference chip based on the second differences corresponding to the temperature values, an average of all the second differences can be calculated based on the second differences corresponding to the temperature values, and then a determination can be made as to whether the average is less than or equal to a third preset threshold. If the average is less than or equal to the third preset threshold, it is determined that the chip under test does not meet the performance parameters of the preset reference chip; if not, it is determined that the chip under test meets the performance parameters of the preset reference chip.

[0094] Among them, the second difference can be understood as a general term, which can refer to the difference between two total time periods corresponding to any temperature value. The third preset threshold can be any constant value, and this embodiment does not specifically limit this. Specifically, the third preset threshold can be set according to actual conditions. For example, when performing chip testing, if a larger fault tolerance rate is to be set to improve the product factory rate, the third preset threshold can be set relatively larger. If a smaller fault tolerance rate is to be set to strictly control product quality, the third preset threshold can be set relatively smaller.

[0095] When determining whether the chip under test meets the performance parameters of the preset reference chip, the corresponding relationship scatter plot of the temperature value and total duration of the chip under test for command X and the corresponding relationship scatter plot of the temperature value and total duration of the preset reference chip for command X can be fitted to obtain the following: Figure 10 The fitted scatter plot of the relationship between the temperature value and the total duration of the command X for the chip under test and the reference chip is shown. Figure 6 The difference in the total duration of the two chips for different commands can be observed more intuitively, and the total duration deviation of the two chips for the same command, that is, the above-mentioned second difference, can be specifically calculated. Then, the average value of all the second differences is calculated, and based on the average value, it is determined that the chip under test does not meet the performance parameters of the preset benchmark chip.

[0096] In view of the fact that the judgment of a single second difference is prone to deviation, this embodiment calculates the average value based on all the second differences, and then compares the average value with the third preset threshold value, and then determines that the chip to be tested and the preset reference chip are different types of chips. This can effectively avoid misjudgment caused by single-point test errors, thereby further improving the accuracy of the chip detection.

[0097] The following is combined with Figure 11 The process of performing chip detection based on the total time corresponding to different temperature values ​​in this embodiment is described in detail. Figure 11 As shown, the benchmark total time of the preset reference chip corresponding to different temperature values ​​can be obtained according to the above-mentioned total time acquisition method. Then, the second difference between the total time to be measured and the benchmark total time corresponding to each temperature value is calculated. The average value of all the second differences is compared with the third preset threshold value. If the average value of the second differences is greater than the third preset threshold value, it can be determined that the chip to be tested does not meet the performance parameters of the preset reference chip, that is, the chip to be tested is unqualified, or does not belong to the same manufacturer as the preset reference chip. If the average value of the second differences is less than or equal to the third preset threshold value, it can be determined that the chip to be tested meets the performance parameters of the preset reference chip, that is, the chip to be tested is qualified, or belongs to the same manufacturer as the preset reference chip.

[0098] In summary, this embodiment is based on the above-mentioned preset detection circuit. After the chip under test is connected to the preset detection circuit, the total time length of receiving command reply data corresponding to different parameter values ​​of the chip under test can be detected during the process of the value of at least one influencing parameter changing. And according to the total time length corresponding to each parameter value and the benchmark total time length of the preset benchmark chip under the same conditions (i.e., the benchmark total time length described below), it is determined whether the chip under test meets the performance parameters of the preset benchmark chip. In this way, by changing the influencing parameters, the total time length of receiving command reply data corresponding to different parameter values ​​can be obtained to achieve the performance (including but not limited to power consumption performance and diode performance) detection of the chip under test, so as to improve the product yield rate and perform anti-counterfeiting identification of the chip (chips with the same characteristic description and the preset benchmark belong to the same manufacturer, and chips with different characteristic descriptions and the preset benchmark do not belong to the same manufacturer). Moreover, this method distinguishes the performance of different chips from the two aspects of total time length and influencing parameters, which can greatly improve the accuracy of the differentiation detection and reduce the misjudgment and missed judgment caused by traditional methods.

[0099] Based on the same concept as above, this embodiment also provides a chip detection device, which is based on a preset detection circuit. The preset detection circuit includes a chip interface, a pull-up resistor, and a power interface connected in sequence. The chip interface is used to connect to the chip to be tested, and the chip interface and the power interface are both connected to a single-chip microcomputer. The device includes:

[0100] A duration acquisition module is used to obtain, based on a preset detection circuit, the total duration of receiving command reply data corresponding to different parameter values ​​when the value of at least one influencing parameter of the chip under test changes;

[0101] The result determination module is used to determine whether the chip under test meets the performance parameters of the preset benchmark chip based on the total time corresponding to each parameter value and the benchmark total time of the preset benchmark chip under the same conditions.

[0102] The chip detection device provided in this embodiment is based on the same concept as the above-mentioned chip detection method, so it can at least achieve the above-mentioned beneficial effects, and any of the above-mentioned implementation methods can be applied to the chip detection device provided in this embodiment, which will not be repeated here.

[0103] The present application also provides an electronic device to perform the above chip detection method. Figure 12 , which shows a schematic diagram of an electrical device provided by some embodiments of the present application. Figure 12 As shown, the electrical device 40 includes: a processor 400, a memory 401, a bus 402 and a communication interface 403. The processor 400, the communication interface 403 and the memory 401 are connected through the bus 402; the memory 401 stores a computer program that can be run on the processor 400, and when the processor 400 runs the computer program, it executes the chip detection method provided in any of the aforementioned embodiments of the present application.

[0104] The memory 401 may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage. The communication connection between the device network element and at least one other network element is achieved through at least one communication interface 403 (which may be wired or wireless), and may use the Internet, a wide area network, a local area network, a metropolitan area network, etc.

[0105] Bus 402 may be an ISA bus, a PCI bus, or an EISA bus. Buses may be classified as address buses, data buses, and control buses. Memory 401 is used to store programs, and processor 400 executes the programs upon receiving execution instructions. The chip detection method disclosed in any of the aforementioned embodiments of the present application may be applied to or implemented by processor 400.

[0106] The processor 400 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by hardware integrated logic circuits in the processor 400 or by software instructions. The above processor 400 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), an off-the-shelf field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in conjunction with the embodiments of this application can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory 401 , and the processor 400 reads the information in the memory 401 and completes the steps of the above method in combination with its hardware.

[0107] The electrical equipment provided in the embodiment of the present application and the chip detection method provided in the embodiment of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, operated or implemented therein.

[0108] The present application also provides a computer-readable storage medium corresponding to the chip detection method provided in the above embodiment. Figure 13 The computer-readable storage medium shown is a CD 30 on which a computer program (ie, a program product) is stored. When the computer program is run by a processor, it executes the chip detection method provided by any of the aforementioned embodiments.

[0109] It should be noted that examples of computer-readable storage media may also include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical or magnetic storage media, which are not listed here one by one.

[0110] The computer-readable storage medium provided in the above-mentioned embodiments of the present application and the chip detection method provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.

[0111] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application, and they should all be included in the scope of the claims and specification of the present application. In particular, as long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions that fall within the scope of the claims.

Claims

1. A chip detection method, characterized in that: Based on a preset detection circuit, the preset detection circuit includes a chip interface, a pull-up resistor and a power interface connected in sequence, the chip interface is used to access the chip to be tested, and the chip interface and the power interface are both connected to a single-chip microcomputer; the method includes: Based on the preset detection circuit, obtaining the total duration of receiving command reply data corresponding to different parameter values ​​of the chip under test during a process in which the value of at least one influencing parameter changes; Determining whether the chip under test meets the performance parameters of the preset benchmark chip based on the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions; Obtaining the total duration of receiving command reply data corresponding to different parameter values ​​during a change in the value of at least one influencing parameter of the chip under test, including: Obtain the total duration of receiving command reply data corresponding to different input voltage values ​​during the process of the input voltage of the chip under test changing.

2. The method according to claim 1, characterized in that Determining whether the chip under test meets the performance parameters of the preset benchmark chip according to the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions includes: Determine the total test time and the total benchmark time corresponding to each input voltage value, respectively, according to the total test time of the chip under test corresponding to each input voltage value and the total benchmark time of the preset benchmark chip corresponding to each input voltage value; According to the total time to be tested and the reference total time corresponding to each input voltage value, it is determined whether the chip to be tested meets the performance parameters of the preset reference chip.

3. The method according to claim 2, characterized in that Determining whether the chip under test meets the performance parameters of the preset benchmark chip according to the total test time and the benchmark total time corresponding to each input voltage value, including: Calculating a first difference between the total time to be measured and the reference total time corresponding to each input voltage value; Determining whether the sum of the absolute values ​​of all first differences is greater than a first preset threshold; If so, it is determined that the chip under test does not meet the performance parameters of the preset reference chip.

4. The method according to claim 3, characterized in that After determining whether the sum of the absolute values ​​of all first differences is greater than a first preset threshold, the method further includes: If not, calculating the duration growth slopes of the total duration to be measured and the reference total duration corresponding to each input voltage value, and determining whether the sum of the absolute values ​​of all duration growth slopes is greater than a second preset threshold; If so, it is determined that the chip under test does not meet the performance parameters of the preset reference chip; if not, it is determined that the chip under test meets the performance parameters of the preset reference chip.

5. The method according to claim 1, characterized in that Obtaining the total duration of receiving command reply data corresponding to different parameter values ​​during a change in the value of at least one influencing parameter of the chip under test, including: Obtain the total duration of receiving command reply data corresponding to different temperature values ​​during the temperature change of the chip under test.

6. The method according to claim 5, characterized in that Determining whether the chip under test meets the performance parameters of the preset benchmark chip according to the total duration corresponding to each parameter value and the benchmark total duration of the preset benchmark chip under the same conditions includes: Determine the total time to be measured and the total reference time corresponding to each temperature value, respectively, according to the total time to be measured of the chip to be measured corresponding to each input voltage value and the total reference time of the preset reference chip corresponding to each input voltage value; According to the total time to be tested and the benchmark total time corresponding to each temperature value, it is determined whether the chip to be tested meets the performance parameters of the preset benchmark chip.

7. The method according to claim 6, characterized in that Determining whether the chip under test meets the performance parameters of the preset benchmark chip according to the total time to be tested and the benchmark total time corresponding to each temperature value, including: Calculating a second difference between the total time to be measured and the reference total time corresponding to each temperature value; It is determined whether the chip to be tested meets the performance parameters of the preset reference chip according to the second difference corresponding to each temperature value.

8. The method according to claim 7, characterized in that The determining, based on the second difference corresponding to each temperature value, whether the chip under test meets the performance parameters of the preset reference chip includes: Calculating an average of all the second difference values ​​according to the second difference values ​​corresponding to the temperature values, and determining whether the average value is less than or equal to a third preset threshold; If so, it is determined that the chip under test meets the performance parameters of the preset reference chip; if not, it is determined that the chip under test does not meet the performance parameters of the preset reference chip.

9. A chip detection device, characterized in that: Based on a preset detection circuit, the preset detection circuit includes a chip interface, a pull-up resistor and a power interface connected in sequence, the chip interface is used to access the chip to be tested, and the chip interface and the power interface are both connected to a single-chip microcomputer; the device includes: A duration acquisition module is configured to acquire, based on the preset detection circuit, a total duration of receiving command reply data corresponding to different parameter values ​​during a process in which the value of at least one influencing parameter of the chip under test changes; acquiring the total duration of receiving command reply data corresponding to different parameter values ​​during a process in which the value of at least one influencing parameter of the chip under test changes, including: acquiring the total duration of receiving command reply data corresponding to different input voltage values ​​during a process in which the input voltage of the chip under test changes; The result determination module is used to determine whether the chip under test meets the performance parameters of the preset benchmark chip according to the total time corresponding to each parameter value and the benchmark total time of the preset benchmark chip under the same conditions.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the method according to any one of claims 1 to 8 is implemented.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the method according to any one of claims 1 to 8.

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