A method and system for regulating the weights of artificial electronic synapses of phase change memristors

Abstract

The present invention discloses a method and system for regulating the weight of a phase-change memristor artificial electronic synapse. The method comprises the following steps: obtaining the type of the phase-change memristor to be regulated; determining a pulse sequence type based on the obtained phase-change memristor type; designing a nonlinear electrical pulse sequence based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor; and regulating the weight of the phase-change memristor artificial electronic synapse based on the nonlinear electrical pulse sequence. The nonlinear electrical pulse sequence includes a nonlinear electrical pulse sequence for achieving synaptic enhancement and a nonlinear electrical pulse sequence for achieving synaptic inhibition. The present invention can solve the technical problem in the prior art that phase-change memristors are difficult to use to simulate linear, continuously adjustable changes in neural synaptic weights.

Description

Technical Field

[0001] The present invention belongs to the field of neuromorphic computing based on memristors and the field of novel nano-memory technology, and in particular relates to a method and system for regulating the weights of artificial electronic synapses of phase-change memristors. Background Art

[0002] Driven by big data and advanced algorithms, artificial intelligence technology has achieved unprecedented development. However, it also faces the urgent problem of high energy consumption and low computing power. The fundamental reason is that the bus mechanism of the existing von Neumann computing architecture has inherent limitations. The memory performance and processor speed are seriously mismatched, resulting in a bottleneck of limited bus transmission rate when facing massive amounts of data, causing data transmission delays. Von Neumann computers also have shortcomings such as poor fault tolerance and high power consumption. In summary, the urgent need to research new computing architecture systems with high computing power and low power consumption is of great significance.

[0003] Memristor-based neuromorphic computing technology aims to simulate the low-power, efficient information processing mode of the brain's biological neural network through the integration of hardware nano-memristors. It is a potential high-computing power, low-power computing architecture and has attracted much attention in recent years. Its key technology is to use memristor artificial electronic synaptic units to simulate the neural synapses in biological neural networks.

[0004] Memristors based on phase change mechanisms are among the most mature memristors currently, with widespread application in the storage industry. However, existing conventional phase-change memristors typically exhibit high or low conductance states, or a few discontinuous multi-level conductance states, making them difficult to directly simulate linear, continuously adjustable changes in synaptic weights. Although numerous researchers have conducted extensive research in recent years on modifying phase-change memristor materials for artificial electronic synaptic applications, improving the controllability and continuity of memristor conductance distribution to some extent, the synaptic performance gains achieved by material design in phase-change memristor artificial electronic synaptic devices are gradually reaching a bottleneck, and reliance solely on material modification research still cannot meet the requirements of artificial electronic synaptic devices. Summary of the Invention

[0005] The present invention aims to provide a method and system for regulating the weights of artificial electronic synapses using a phase-change memristor, thereby resolving one or more of the aforementioned technical problems. Specifically, the method provided by the present invention utilizes nonlinear electrical pulses to regulate the weights of artificial electronic synapses using a phase-change memristor. Essentially, this method utilizes electrical pulses to regulate the conductance of the phase-change memristor, resolving the prior art technical problem of phase-change memristors being difficult to use to simulate linear, continuously adjustable changes in neural synaptic weights.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions:

[0007] The present invention provides a method for regulating the weight of a phase-change memristor artificial electronic synapse, comprising the following steps:

[0008] Obtaining the type of phase-change memristor to be regulated; wherein the types of phase-change memristors include abrupt phase-change memristors and gradual phase-change memristors;

[0009] Determine the type of pulse sequence based on the acquired phase-change memristor type; if it is a sudden-change phase-change memristor, use a write-only pulse sequence; if it is a gradual-change phase-change memristor, use a write-read pulse sequence;

[0010] Based on the determined pulse sequence type and in accordance with the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence is designed and obtained; based on the nonlinear electric pulse sequence, the weight of the artificial electronic synapse of the phase-change memristor is regulated; wherein the nonlinear electric pulse sequence includes a nonlinear electric pulse sequence for achieving synaptic enhancement and a nonlinear electric pulse sequence for achieving synaptic inhibition.

[0011] A further improvement of the method of the present invention is that the step of obtaining the type of the phase-change memristor to be regulated specifically includes:

[0012] If there is a step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is judged to be a mutation-type phase-change memristor;

[0013] If there is no step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a gradual-change phase-change memristor.

[0014] A further improvement of the method of the present invention is that the pulse sequence type is determined based on the acquired phase change memristor type; wherein, if it is a sudden phase change memristor, a write-only pulse sequence is used, and if it is a gradual phase change memristor, a write-read pulse sequence is used.

[0015] The write-only pulse sequence means that each operating pulse is a read pulse, and the operating pulse is used to stimulate the artificial electronic synapse and also to return the conductance value in real time;

[0016] The write-read pulse sequence means that each operation pulse is followed by a read pulse, and the operation pulse is only used to stimulate the artificial electronic synapse.

[0017] A further improvement of the method of the present invention is that the step of designing and obtaining a nonlinear electrical pulse sequence based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor specifically includes:

[0018] Based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor, the total number of pulses, the number of repetitions of sub-pulses, the interval between sub-pulses, the pulse amplitude and pulse width of the sub-pulses of the nonlinear electrical pulse sequence are designed;

[0019] Among them, the sub-pulse voltage amplitude in the nonlinear electric pulse sequence shows a nonlinear increase or nonlinear decrease trend according to the intrinsic conductance distribution of the phase change memristor; the pulse width of the sub-pulse shows a nonlinear increase or nonlinear decrease trend; the interval between adjacent sub-pulses shows a nonlinear increase or nonlinear decrease trend; and the number of sub-pulse repetitions shows a nonlinear distribution trend.

[0020] A further improvement of the method of the present invention is that, based on the determined pulse sequence type, a nonlinear electric pulse sequence is designed according to the statistical switching characteristics of the phase-change memristor; in the process of realizing the regulation of the artificial electronic synaptic weight of the phase-change memristor based on the nonlinear electric pulse sequence,

[0021] Based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor, a nonlinear electrical pulse sequence for achieving synaptic enhancement is designed. The steps of controlling the weight of the artificial electronic synapse of the phase-change memristor based on the nonlinear electrical pulse sequence specifically include:

[0022] Obtaining a resistance-voltage curve of the phase-change memristor, and based on the resistance-voltage curve, determining a voltage corresponding to when the high resistance begins to decrease as a starting pulse amplitude of the nonlinear pulse sequence;

[0023] Obtaining a threshold voltage of a turn-on process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the turn-on process; wherein the termination pulse amplitude is lower than the threshold voltage of the turn-on process;

[0024] Acquiring a conductance-pulse number curve of the phase-change memristor based on a nonlinear electric pulse sequence, adding sub-pulses between the amplitude of the starting pulse and the amplitude of the ending voltage pulse based on the conductance-pulse number curve; and setting the number of repetitions of each sub-pulse based on the added sub-pulses to achieve refined conductance control;

[0025] Based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence for achieving synaptic inhibition is designed. The steps of achieving the regulation of the artificial electronic synaptic weight of the phase-change memristor based on the nonlinear electric pulse sequence specifically include:

[0026] Obtaining a low-resistance window region of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a starting pulse amplitude of a nonlinear electrical pulse sequence based on the low-resistance window region; wherein the starting pulse voltage amplitude is higher than a voltage corresponding to the low-resistance window region;

[0027] Obtaining a threshold voltage of a reset process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse voltage amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the reset process; wherein the termination pulse voltage amplitude is lower than the threshold voltage of the reset process;

[0028] A conductance-pulse number curve of the phase-change memristor is obtained based on a nonlinear electric pulse sequence, and sub-pulses between the starting pulse amplitude and the ending voltage pulse amplitude are added based on the conductance-pulse number curve; based on the added sub-pulses, the number of repetitions of each sub-pulse is set to achieve refined conductance control.

[0029] A further improvement of the method of the present invention is that it further comprises:

[0030] Establish a memristor synaptic model, the expression is:

[0031]

[0032] Where G represents the conductivity value, G LRS , G HRS Represent low conductance value and high conductance value respectively, α represents linearity parameter, and ω represents weight variable;

[0033] Obtaining a normalized conductance value after conductance regulation and substituting it into the memristor synaptic model to perform linearity evaluation to obtain a linearity evaluation result; obtaining a continuity evaluation result based on the linearity evaluation result and the conductance-pulse number distribution obtained under nonlinear pulse train excitation;

[0034] If there is a discontinuous area, the pulse amplitude and pulse repetition times in the nonlinear pulse sequence are redesigned for the electric pulse corresponding to the discontinuous area; after multiple iterative optimizations, the nonlinear electric pulse is finally determined.

[0035] The present invention provides a system for regulating the weight of a phase-change memristor artificial electronic synapse, comprising:

[0036] A phase-change memristor type acquisition module, configured to acquire the type of the phase-change memristor to be regulated; wherein the types of the phase-change memristor include abrupt phase-change memristor and gradual phase-change memristor;

[0037] a pulse sequence type determination module, configured to determine the type of pulse sequence based on the acquired phase-change memristor type; wherein, if the phase-change memristor is a sudden-change phase-change memristor, a write-only pulse sequence is used; and if the phase-change memristor is a gradual-change phase-change memristor, a write-read pulse sequence is used;

[0038] A nonlinear electric pulse sequence acquisition module is used to design and obtain a nonlinear electric pulse sequence based on a determined pulse sequence type and the statistical switching characteristics of a phase-change memristor; based on the nonlinear electric pulse sequence, the weight of an artificial electronic synapse of the phase-change memristor is regulated; wherein the nonlinear electric pulse sequence includes a nonlinear electric pulse sequence for achieving synaptic enhancement and a nonlinear electric pulse sequence for achieving synaptic inhibition.

[0039] A further improvement of the system of the present invention is that the step of obtaining the type of the phase-change memristor to be regulated specifically includes:

[0040] If there is a step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is judged to be a mutation-type phase-change memristor;

[0041] If there is no step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a gradual-change phase-change memristor.

[0042] A further improvement of the system of the present invention is that the type of pulse sequence is determined based on the acquired phase change memristor type; wherein, if it is a sudden phase change memristor, a write-only pulse sequence is used, and if it is a gradual phase change memristor, a write-read pulse sequence is used.

[0043] The write-only pulse sequence means that each operating pulse is a read pulse, and the operating pulse is used to stimulate the artificial electronic synapse and also to return the conductance value in real time;

[0044] The write-read pulse sequence means that each operation pulse is followed by a read pulse, and the operation pulse is only used to stimulate the artificial electronic synapse.

[0045] A further improvement of the system of the present invention is that, based on the determined pulse sequence type, a nonlinear electric pulse sequence is designed according to the statistical switching characteristics of the phase-change memristor; in the process of realizing the regulation of the artificial electronic synaptic weight of the phase-change memristor based on the nonlinear electric pulse sequence,

[0046] Based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor, a nonlinear electrical pulse sequence for achieving synaptic enhancement is designed. The steps of controlling the weight of the artificial electronic synapse of the phase-change memristor based on the nonlinear electrical pulse sequence specifically include:

[0047] Obtaining a resistance-voltage curve of the phase-change memristor, and based on the resistance-voltage curve, determining a voltage corresponding to when the high resistance begins to decrease as a starting pulse amplitude of the nonlinear pulse sequence;

[0048] Obtaining a threshold voltage of a turn-on process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the turn-on process; wherein the termination pulse amplitude is lower than the threshold voltage of the turn-on process;

[0049] Acquiring a conductance-pulse number curve of the phase-change memristor based on a nonlinear electric pulse sequence, adding sub-pulses between the amplitude of the starting pulse and the amplitude of the ending voltage pulse based on the conductance-pulse number curve; and setting the number of repetitions of each sub-pulse based on the added sub-pulses to achieve refined conductance control;

[0050] Based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence for achieving synaptic inhibition is designed. The steps of achieving the regulation of the artificial electronic synaptic weight of the phase-change memristor based on the nonlinear electric pulse sequence specifically include:

[0051] Obtaining a low-resistance window region of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a starting pulse amplitude of a nonlinear electrical pulse sequence based on the low-resistance window region; wherein the starting pulse voltage amplitude is higher than a voltage corresponding to the low-resistance window region;

[0052] Obtaining a threshold voltage of a reset process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse voltage amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the reset process; wherein the termination pulse voltage amplitude is lower than the threshold voltage of the reset process;

[0053] A conductance-pulse number curve of the phase-change memristor is obtained based on a nonlinear electric pulse sequence, and sub-pulses between the starting pulse amplitude and the ending voltage pulse amplitude are added based on the conductance-pulse number curve; based on the added sub-pulses, the number of repetitions of each sub-pulse is set to achieve refined conductance control.

[0054] Compared with the prior art, the present invention has the following beneficial effects:

[0055] The method provided by the present invention is specifically a method for regulating the weight of artificial electronic synapses of phase-change memristors using nonlinear electric pulses. In essence, the conductance of phase-change memristors is regulated by electric pulses, which can solve the technical problem of phase-change memristors being difficult to use to simulate linear and continuously adjustable changes in neural synaptic weights. Specifically, electric heat can cause the phase-change material to transform from an amorphous state to a crystalline state, thereby achieving a transition from low conduction to high conductance. Due to the complex Joule heating effect within the phase-change material, this transition from an amorphous state to a crystalline state has nonlinear change characteristics under conventional linear electric excitation, thereby causing the nonlinear and discontinuous conductance distribution presented by existing phase-change memristors. Through the design of nonlinear electric pulses, the electric heat applied to the phase-change memristor is finely regulated, thereby regulating the amorphous-to-crystalline state transition process of the phase-change material to make it as linear and continuous as possible, thereby achieving linearization and continuity of the conductance of the phase-change memristor, thereby solving the technical problem of phase-change memristors being difficult to use to simulate linear and continuously adjustable changes in neural synaptic weights. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art; obviously, the drawings described below are some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0057] Figure 1 1 is a flow chart of a method for regulating the weight of a phase-change memristor artificial electronic synapse according to an embodiment of the present invention;

[0058] Figure 2 1 is a schematic structural diagram of an artificial electronic synapse based on phase change memory in an embodiment of the present invention;

[0059] Figure 3 1 is a schematic diagram of an electrical pulse sequence in the case of a write-read pulse and a write-only pulse in an embodiment of the present invention;

[0060] Figure 4 1 is a resistance-voltage schematic diagram of an artificial electronic synapse based on a CGST phase change memory according to an embodiment of the present invention;

[0061] Figure 5 2 is a schematic diagram of the distribution of conductance increase and conductance decrease of an artificial electronic synapse based on a CGST phase change memory under linear electric pulse control in an embodiment of the present invention;

[0062] Figure 6 Schematic diagram of a linear electric pulse for achieving conductance increase based on a CGST phase change memory artificial electronic synapse in an embodiment of the present invention;

[0063] Figure 7 Schematic diagram of a linear electric pulse for regulating conductance reduction based on a CGST phase change memory artificial electronic synapse in an embodiment of the present invention;

[0064] Figure 8 Schematic diagram of a nonlinear write-only pulse sequence for regulating conductance increase based on a CGST phase change memory artificial electronic synapse in an embodiment of the present invention;

[0065] Figure 9 Schematic diagram of a nonlinear write and read pulse sequence for regulating conductance reduction based on artificial electronic synapses of CGST phase change memory in an embodiment of the present invention;

[0066] Figure 10 1 is a schematic diagram of the distribution of conductance increase and conductance decrease of an artificial electronic synapse based on a CGST phase change memory under the nonlinear electric pulse control provided by the present invention in an embodiment of the present invention;

[0067] Figure 11 3. Schematic diagram of the statistical results of 30 consecutive conductance increases and conductance decreases achieved by the artificial electronic synapse based on the CGST phase change memory under the nonlinear electric pulse scheme provided by the present invention in an embodiment of the present invention;

[0068] Figure 12 1 is a resistance-voltage diagram of an artificial electronic synapse based on a CaGST phase change memory according to an embodiment of the present invention;

[0069] Figure 13 1 is a schematic diagram of statistical results of conductance enhancement achieved by an artificial electronic synapse based on a CaGST phase change memory under the nonlinear electric pulse control provided by the present invention in an embodiment of the present invention;

[0070] Figure 14 It is a schematic diagram of the statistical results of the conductance reduction achieved by the artificial electronic synapse based on the CaGST phase change memory under the nonlinear electric pulse regulation provided by the present invention in an embodiment of the present invention. DETAILED DESCRIPTION

[0071] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0072] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0073] The present invention is described in further detail below with reference to the accompanying drawings:

[0074] Explanation of terms in the embodiments of the present invention:

[0075] An electrical pulse is a sequence of electrical pulses generated by any pulse generator, signal source, semiconductor parameter analyzer, or any other source capable of stimulating a pulse voltage in direct current (DC) or alternating current (AC) mode.

[0076] The characteristics of the single pulse contained in the electric pulse sequence can be rectangular (square wave) pulse, triangular wave pulse, ramp wave, trapezoidal pulse, sine wave, arbitrary waveform, etc.

[0077] The rising edge, falling edge, pulse width, delay time, pulse frequency, and duty cycle of a single pulse can be any value.

[0078] The number of sub-pulses in an electrical pulse sequence can be arbitrary. The interval between adjacent sub-pulses in an electrical pulse sequence can be arbitrary. The shape characteristics of the electrical pulse sequence can be linearly or nonlinearly distributed. Linear or nonlinear distribution can be achieved by incrementally or incrementally programming the pulse voltage amplitude, pulse voltage width, and pulse frequency.

[0079] Memristor artificial electronic synapses are novel silicon devices that mimic biological synapses in both structure and operating mode. Their resistance (conductance) exhibits a nonlinear distribution as applied voltage increases. This principle utilizes the conductance of the memristor to simulate the weights of biological synapses. The simulation of synaptic weights is categorized into two types: synaptic potentiation and potentiation inhibition. Synaptic potentiation is simulated by a continuous increase in the memristor's conductance, while synaptic inhibition is simulated by a continuous decrease in its conductance. Phase-change memristors are switching devices that utilize a crystalline / amorphous switching mechanism, driven by the electrothermal effect. The device exhibits high and low conductance states in its crystalline and amorphous states, respectively.

[0080] Phase-change memristors come in two types: abrupt-type phase-change memristors and gradual-change-type phase-change memristors. In the resistance-voltage switching curve of abrupt-type phase-change memristors, there is a clear step during the turn-on process (when switching from high resistance to low resistance); a clear step during the reset process (when switching from low resistance to high resistance); or a clear step during both the turn-on and reset processes. In the resistance-voltage switching curve of gradual-change-type phase-change memristors, there is no clear step during the turn-on process (when switching from high resistance to low resistance) or during the reset process (when switching from low resistance to high resistance).

[0081] A phase-change memristor consists of an upper electrode, a phase-change layer, and a lower electrode. The device structure can be a mushroom, planar, or self-limiting structure. In a mushroom structure, the upper electrode and phase-change layer are planar coatings, while the lower electrode is small. The device's phase-change operating area is determined by the size of the lower electrode. In a planar structure, the upper electrode, phase-change layer, and lower electrode are arranged horizontally, with the phase-change layer located at the junction of the upper and lower electrodes. The device's phase-change operating area is determined by the minimum gap between the upper and lower electrodes. In a self-limiting structure, the phase-change material is confined within a silicon trench, with the upper and lower electrodes separated at either end. The size of the phase-change operating area depends on the trench's dimensions. The upper and lower electrodes can be single-layer, two-layer, or multi-layer structures, with thicknesses ranging from 1nm to 5μm and shapes ranging from rectangular, circular, or triangular. The phase-change layer can be single-layer, two-layer, or multi-layer structures, with thicknesses ranging from 1nm to 1μm. The materials of the upper electrode and the lower electrode can be composed of metals such as aluminum (Al), titanium (Ti), gold (Au), copper (Cu), silver (Ag), platinum (Pt), tungsten (W), titanium nitride (TiN) and their compounds, as well as highly doped semiconductor conductive materials such as highly doped silicon (Si) and germanium (Ge); the key phase change material of the phase change layer is composed of metal alloys such as germanium (Ge), antimony (Sb), tellurium (Te), gallium (Ga), ruthenium (Ru), titanium (Ti), scandium (Sc) or doped modified materials based on the above metal alloys.

[0082] The regulation of the weight of memristor artificial electronic synapses refers to the use of electric pulse stimulation to regulate the distribution relationship of the conductivity of the phase change memristor device as the number of electric pulses increases. It includes improving the linearity of the conductivity distribution, the continuity of the conductivity distribution, the modulation range of the conductivity distribution, and the stability and repeatability of the conductivity distribution.

[0083] See also Figure 1 A method for regulating the weight of a phase-change memristor artificial electronic synapse according to an embodiment of the present invention comprises the following steps:

[0084] Step 1: Obtain the type of the phase-change memristor; wherein, if there is a step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a sudden phase-change memristor; if there is no step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a gradual phase-change memristor;

[0085] Step 2: Determine the type of pulse sequence based on the acquired phase-change memristor type; wherein, the abrupt-type phase-change memristor uses a write-only pulse sequence, and the gradual-change phase-change memristor uses a write-read pulse sequence; specifically, the write-read pulse sequence means that each operation pulse is followed by a read pulse, and the operation pulse is only used to stimulate the artificial electronic synapse without measurement, so that its pulse width can be reduced to 8ns; the write-only pulse sequence means that each operation pulse is also a read pulse, and the operation pulse is used to stimulate the artificial electronic synapse and also to return the conductance value in real time, so that its pulse width can be reduced to 500ns due to the influence of test accuracy;

[0086] Step 3, based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, design a corresponding nonlinear electrical pulse sequence; specifically, the total number of pulses in the pulse sequence, the number of repetitions of sub-pulses, the interval between sub-pulses, the pulse amplitude and pulse width of the sub-pulses are designed; the voltage amplitude of the sub-pulses in the pulse sequence shows a nonlinear increase or nonlinear decrease trend according to the intrinsic conductance distribution of the phase-change memristor; the pulse width of the sub-pulses in the pulse sequence shows a nonlinear increase or nonlinear decrease trend; the interval between adjacent sub-pulses in the pulse sequence shows a nonlinear increase or nonlinear decrease trend; the number of repetitions of sub-pulses in the pulse sequence shows a nonlinear distribution trend;

[0087] Step 4, obtain the phase-change memristor to be regulated, edit and output the nonlinear pulse sequence designed in step 3 in an arbitrary pulse waveform generator, and apply it to any one end electrode of the phase-change memristor; and the other end of the phase-change memristor is connected to the ground end of the arbitrary pulse waveform generator; while applying the nonlinear electric pulse sequence excitation, the arbitrary pulse waveform generator synchronously collects the real-time regulated conductance value of the phase-change memristor to obtain the regulated conductance-pulse number curve, which is equivalent to the nonlinear pulse sequence regulating the artificial electronic synaptic weight of the phase-change memristor.

[0088] The methods provided in embodiments of the present invention for regulating the weight of a phase-change memristor artificial electronic synapse include two methods: regulating the conductance from small to large to achieve synaptic enhancement, and regulating the conductance from large to small to achieve synaptic inhibition. The process of increasing the conductance from small to large corresponds to the turn-on process, while the process of decreasing the conductance from large to small corresponds to the reset process.

[0089] The principles of the technical solutions provided by the embodiments of the present invention include: Electric pulse modulation is essential for realizing artificial electronic synapses. For phase-change memristors with nonlinear characteristics, the applied electric pulse is closely related to the resulting device conductance distribution. Research on methods for using electric pulses to modulate the weights of artificial electronic synapses using phase-change memristors is highly desirable and can significantly reduce the difficulty in material design for phase-change memristor artificial electronic synapses, thus having significant practical significance. Specifically, electric heat can cause the phase change material to change from an amorphous state to a crystalline state, thereby achieving a transition from low conductivity to high conductivity; due to the complex Joule heating effect inside the phase change material, under conventional linear electrical excitation, this transition from an amorphous state to a crystalline state itself has a nonlinear change characteristic, thereby causing the nonlinear and discontinuous conductivity distribution presented by the existing phase change memristor; through the design of nonlinear electric pulses, the electric heat applied to the phase change memristor is finely adjusted, and then the transition process from the amorphous state to the crystalline state of the phase change material is regulated to make it as linear and continuous as possible, thereby achieving the linearization and continuity of the conductivity of the phase change memristor, solving the technical problem in the existing technology that the phase change memristor is difficult to use to simulate linear and continuously adjustable changes in neural synaptic weights.

[0090] Step 1 of the embodiment of the present invention specifically includes determining the type of phase-change memristor based on the switching material, switching mechanism, resistance-voltage switching curve, and conductance-pulse number curve of the memristor; wherein, if there is an obvious step process during the turn-on process or reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a sudden phase-change memristor; if there is no obvious step process during the turn-on process or reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a gradual phase-change memristor. Further specifically, in an embodiment of the present invention, by applying a linearly increasing DC voltage or a linearly increasing pulse voltage across the memristor, the intrinsic resistance-voltage switching curve of the phase change memristor is obtained, thereby obtaining the switching ratio, the low resistance window area, the threshold voltage of the turn-on process, the threshold voltage required for the reset process, and the applied voltage interval corresponding to the two regions of increased conductivity and decreased conductivity; wherein the so-called switching ratio refers to the ratio between the highest resistance value and the minimum resistance value in the resistance-voltage switching curve; the low resistance window area refers to the voltage region corresponding to low resistance; the so-called threshold voltage of the turn-on process refers to the voltage value corresponding to the moment the resistance of the memristor decreases to 10% of the high resistance state during the transition from the high resistance state (amorphous state) to the low resistance state (crystalline state); the so-called threshold voltage of the reset process refers to the voltage value corresponding to the moment the resistance of the memristor increases from the low resistance to the high resistance state (90% of the high resistance state) during the transition from the low resistance state (crystalline state) to the high resistance state (amorphous state).

[0091] In a preferred embodiment of the present invention, the step of designing a corresponding nonlinear electrical pulse sequence in step 3 specifically includes:

[0092] Step 1. Set up a nonlinear pulse train for synaptic enhancement:

[0093] Step 1-1, determining the termination pulse amplitude of the nonlinear electrical pulse sequence for simulating synaptic enhancement based on the threshold voltage of the phase change memristor during the turn-on process obtained in step 1; the termination pulse amplitude does not exceed the threshold voltage of the threshold turn-on process;

[0094] Step 1-2: Based on the resistance-voltage curve of the phase-change memristor obtained in step 1, the voltage corresponding to when the high resistance begins to decrease is determined as the starting pulse amplitude of the nonlinear pulse train for synaptic enhancement;

[0095] Step 1-3, according to step 1-1 and step 1-2, add sub-pulses between the starting pulse amplitude and the ending voltage pulse amplitude of the nonlinear pulse sequence; according to the conductivity-pulse number curve obtained in step 1, the sub-pulse amplitude step size is larger in the area where the conductivity increases slower, and the sub-pulse amplitude step size is smaller in the area where the conductivity increases faster.

[0096] Steps 1-4: For each sub-pulse in 1-3, set the number of sub-pulse repetitions to further achieve refined conductivity control; according to the conductivity-pulse number curve obtained in step 1, the number of sub-pulse repetitions is smaller in areas where the conductivity increases more slowly, and the number of sub-pulse repetitions is larger in areas where the conductivity increases more quickly.

[0097] Step 2: Set up a nonlinear pulse train for synaptic inhibition:

[0098] Step 2-1: Determine the starting pulse amplitude of the nonlinear electrical pulse sequence used to simulate synaptic inhibition based on the low-resistance window region of the phase-change memristor obtained in step 1. The starting pulse voltage amplitude is greater than the voltage corresponding to the low-resistance window region;

[0099] Step 2-2: determining the voltage amplitude of the termination pulse of the nonlinear electric pulse sequence for simulating synaptic inhibition based on the threshold voltage required for the reset process of the phase change memristor obtained in step 1, wherein the voltage amplitude of the termination pulse does not exceed the threshold voltage required for the reset process;

[0100] Step 2-3, adding sub-pulses between the amplitude of the starting pulse and the amplitude of the ending voltage pulse of the nonlinear pulse sequence according to Step 2-1 and Step 2-2; according to the conductance-pulse number curve obtained in Step 1, the sub-pulse amplitude step size is larger in the region where the conductance increases more slowly, and the sub-pulse amplitude step size is smaller in the region where the conductance increases more quickly;

[0101] Step 2-4: For each sub-pulse in 2-3, set the number of sub-pulse repetitions to further achieve refined conductivity control; according to the conductivity-pulse number curve obtained in step 1, the number of sub-pulse repetitions is smaller in areas where the conductivity increases slower, and the number of sub-pulse repetitions is larger in areas where the conductivity increases faster.

[0102] In an embodiment of the present invention, it is further preferred that the step of iteratively optimizing the nonlinear electrical pulse sequence specifically includes:

[0103] The obtained conductance distribution is further normalized using the following formula to establish the expression of the memristor synaptic model:

[0104]

[0105] Where G is the conductivity value, G LRS and G HRS where α is the linearity parameter. When the conductance-pulse number curve is concave, a < 1; when the conductance-pulse number curve is convex, a > 1. The specific value is obtained by fitting. ω is a weight variable that varies between [0, 1]. When a synaptic enhancing pulse train is applied, ω gradually increases with the pulse delivery; when a synaptic depressing pulse train is applied, ω gradually decreases with the pulse delivery.

[0106] The normalized conductance value was brought into the model to evaluate the linearity, and the linearity close to 1 was selected;

[0107] Based on the linearity evaluation and the conductivity-pulse number distribution obtained under the nonlinear pulse sequence excitation in step 4, if discontinuous areas still exist, return to step 3 and redesign the pulse amplitude and pulse repetition number for the electric pulses corresponding to the discontinuous areas; after multiple iterative optimizations, the nonlinear electric pulse scheme is finally determined.

[0108] The iteration in the embodiment of the present invention is to modify the nonlinear pulse according to the existing conductivity-pulse number distribution curve, which specifically includes:

[0109] For discontinuous areas, the number of pulses corresponding to the discontinuous areas is obtained, and then the corresponding pulse voltage range is obtained according to the nonlinear pulse sequence. In this case, the number of repetitions of the low-voltage pulse should be increased. For example, a nonlinear pulse sequence contains 60 pulses, but it is found that the conductivity in the interval between the 10th and 15th pulses is discontinuous. Then, in the nonlinear pulse sequence, the sub-pulse voltage corresponding to the 10th to 15th pulse is found. For example, the sub-pulse voltage corresponding to the interval of 0.5-0.8V should be found. In this case, the 0.5V sub-pulse should be selected and the number of repetitions of the 0.5V sub-pulse should be increased to slow down the discontinuity.

[0110] For continuous but nonlinear regions, the number of pulses corresponding to the discontinuous regions is obtained, and then the corresponding pulse voltage range is obtained based on the nonlinear pulse sequence. If the nonlinear region is a bulge relative to the linear relationship—for example, if the overall conductivity increase in this region is too rapid—then the corresponding nonlinear pulse amplitude or width increase should be appropriately reduced. For example, if a nonlinear voltage sequence is based on a nonlinear region containing five sub-pulses, ranging from 0.5 to 0.9V with an increase of 0.1V, to overcome the excessive increase, the increase can be reduced to 0.05V to slow the conductivity increase, ultimately bringing the nonlinear region closer to linearity. Conversely, if the region is growing slower than the overall linear distribution, the sub-pulse amplitude or width increase can be increased to accelerate the conductivity increase and approach linearity.

[0111] See also Figure 2 The present invention provides an exemplary embodiment of a phase change memristor structure as follows: Figure 2 As shown in the figure, from bottom to top, there are the columnar lower electrode, the phase change layer, and the upper electrode. Its device structure is equivalent to a biological neural synapse. The biological neural synapse structure includes the presynaptic membrane, the synaptic cleft, and the postsynaptic membrane.

[0112] Specifically, an embodiment of the present invention provides a sudden phase change memristor artificial electronic synaptic device comprising a lower electrode, a phase change layer, and an upper electrode. The lower electrode can be made of a metal such as copper, platinum, tungsten, or a conductive compound thereof, preferably tungsten; preferably cylindrical, with a diameter of 1 nm to 5 μm, preferably 300 nm; the phase change layer can be made of a metal alloy such as germanium, antimony, tellurium, or gallium, preferably carbon-doped germanium antimony telluride (CGST) phase change material, with a thickness of 1 nm to 1 μm, preferably 100 nm; and the upper electrode can be made of a metal such as copper, platinum, tungsten, or a conductive compound thereof, preferably titanium nitride, with a thickness of 1 nm to 5 μm, preferably 300 nm.

[0113] See also Figure 3 , the embodiment of the present invention is exemplified by the schematic diagram of the nonlinear write-read pulse sequence and the write-only pulse sequence used. Figure 3 As shown, the pulse voltage amplitude of the included sub-pulses increases nonlinearly.

[0114] See also Figures 4 to 7 , Figure 4 The resistance-voltage diagram of a preferred CGST-based mutant phase-change memristor artificial electronic synaptic device; Figure 5 The conductivity distribution diagram of the CGST phase-change memristor artificial electronic synapse under the control of linear electric pulses; Figure 6 and Figure 7They are respectively used in the CGST phase change memristor artificial electronic synapse in the above embodiment to achieve conductance increase and conductance reduction (such as Figure 4 The schematic diagrams of linear electric pulses (as shown in the figure) all contain 60 sub-pulses; the pulse voltage range of the pulse sequence used for conductivity increase is 0.4V to 1.0V, which is lower than the turn-on process voltage, thereby avoiding the step phenomenon to a certain extent; and the pulse voltage range of the pulse sequence used for conductivity reduction is 3.0V to 3.9V, which is completely within the voltage range required for the reset process, thereby avoiding the unstable conductivity modulation in the window area. Figure 5 The conductance distribution diagram has obvious steps in both the conductance increase and conductance decrease processes, and has extremely low linearity, which still does not meet the requirements of neural synapses.

[0115] See also Figure 8 The method provided by the embodiment of the present invention is to use nonlinear electric pulses to regulate the weight of phase-change memristor artificial electronic synapse, thereby achieving high-linearity conductance modulation and realizing high-performance artificial electronic synapse. Figure 8 The nonlinear electric pulse sequence provided in the embodiment of the present invention for regulating the conductance increase of the CGST phase change memristor artificial electronic synapse in this embodiment case. The operating pulse width of the nonlinear electric pulse can be 50ns to 5ms, more preferably 3us; the pulse rising edge and falling edge are equal, which can be 20ns to 1ms, more preferably 40ns; the number of sub-pulses included is the same as Figure 6 The linear electrical pulses contain a consistent number of sub-pulses; the operating voltage pulse also serves as the read voltage pulse; and the voltage amplitude of the pulse sequence increases nonlinearly from 0.4V to 1.0V. Specifically, the entire pulse sequence includes 18 pulse amplitude increments. In the first 12 increments, each sub-pulse is repeated three times, and in the next six voltage increments, each sub-pulse is repeated four times. Further specifically, in the first stage, from 0.4V to 0.64V, there are five voltage increments of 0.06V; in the second stage, from 0.68V to 0.84V, there are five voltage increments of 0.04V; and in the third stage, from 0.86V to 1.0V, there are five voltage increments of 0.06V.

[0116] See also Figure 9 , Figure 9 The embodiment of the present invention provides a nonlinear electric pulse sequence for regulating the conductance reduction of the CGST phase change memristor artificial electronic synapse in the embodiment of the present invention. The nonlinear electric pulse includes the same number of sub-pulses as Figure 6The linear electrical pulses contain a consistent number of sub-pulses, specifically 60 pulses. The operating voltage pulses and read voltage pulses are independent of each other. Specifically, the operating voltage is relatively narrow and is primarily used to excite the phase-change memristor. Each operating pulse is followed by a wider read voltage pulse. The voltage amplitude of the operating voltage pulse sequence increases nonlinearly from 3.0V to 3.9V, specifically, in the first stage, it linearly increases from 3.0V to 3.49V with an increment of 0.01V; in the second stage, it nonlinearly increases from 3.5V to 3.9V. The operating voltage pulse width can be 50ns to 5ms, more preferably 100ns; the rising and falling edges of the pulse are equal, and can be 20ns to 1ms, more preferably 40ns. The read voltage pulse is characterized by a pulse width of 500ns to 5ms, more preferably 3us; and by a pulse with equal rising and falling edges, and can be 20ns to 1ms, more preferably 500ns.

[0117] See also Figure 10 and Figure 11 , Figure 10 This is a distribution diagram of conductance increase and conductance decrease of an artificial electronic synapse based on a CGST phase change memory in the above embodiment under the nonlinear electric pulse control provided by the present invention. Figure 11 The statistical results of 30 consecutive conductance increases and decreases achieved by an artificial electronic synapse based on CGST phase change memory in the above embodiment are compared with the conductance distribution under linear electric pulse control (such as Figure 4 Compared with the embodiment of the present invention, the nonlinear electric pulse scheme provided by the embodiment of the present invention greatly increases the conductivity modulation range of the phase change memristor and also has good continuity and linearity, thereby helping to achieve reliable neural synaptic weight simulation.

[0118] See also Figure 12 , Figure 12 This is a resistance-voltage diagram of a GaGST-based gradient phase-change memristor artificial electronic synaptic device according to an embodiment of the present invention. The gradient phase-change memristor is a resistance-voltage switching curve obtained when both ends of the phase-change memristor are stimulated by a linearly increasing pulse voltage. During the turn-on process of switching from high resistance to low resistance, the resistance shows a gradual decreasing trend; while during the reset process of switching from low resistance to high resistance, the resistance shows a gradual increasing trend. There is no obvious step phenomenon in both processes.

[0119] See also Figure 13 and Figure 14 , Figure 13 The statistical results of the conductance enhancement achieved by an artificial electronic synapse based on a CaGST phase change memory in the above embodiment under the electric pulse control of the nonlinear write and read pulses provided in the embodiment of the present invention; Figure 14The following are statistical results of the conductance reduction achieved by a CaGST phase-change memory artificial electronic synapse in the aforementioned embodiment under the nonlinear electrical pulse control provided by the present invention. It can be seen that the method provided by the present invention for nonlinear electrical pulse control of phase-change memristor weights can also be applied to graded-change phase-change memristors.

[0120] In summary, the present invention relates to the field of neuromorphic computing based on memristors and the field of novel nano-memory technology. The embodiments of the present invention specifically disclose a method and system for regulating the weights of phase-change memristor artificial electronic synapses using a nonlinear electric pulse sequence. Specifically, the present invention closely focuses on the requirements of neuromorphic computing technology for the linearity and continuity of synaptic weights of memristor artificial electronic synapses. In response to the urgent problem that the current research on phase-change memristor artificial electronic synapse devices is still imperfect, a method of electric pulse excitation is designed to reliably regulate the conductance of the phase-change memristor, thereby enhancing the linearity, continuity and tuning range of the weights of the phase-change memristor artificial electronic synapses, and applying it to neuromorphic computing technology. The method of the present invention reduces the requirements of neuromorphic computing technology for phase-change memristor artificial electronic synapses in terms of material design, and has wide applicability, which helps to promote the development of neuromorphic computing technology based on memristors.

[0121] The following are device embodiments of the present invention, which can be used to perform the method embodiments of the present invention. For details not disclosed in the device embodiments, please refer to the method embodiments of the present invention.

[0122] In yet another embodiment of the present invention, a system for regulating the weight of a phase-change memristor artificial electronic synapse is provided, comprising:

[0123] A phase-change memristor type acquisition module, configured to acquire the type of the phase-change memristor to be regulated; wherein the types of the phase-change memristor include abrupt phase-change memristor and gradual phase-change memristor;

[0124] a pulse sequence type determination module, configured to determine the type of pulse sequence based on the acquired phase-change memristor type; wherein, if the phase-change memristor is a sudden-change phase-change memristor, a write-only pulse sequence is used; and if the phase-change memristor is a gradual-change phase-change memristor, a write-read pulse sequence is used;

[0125] A nonlinear electric pulse sequence acquisition module is used to design and obtain a nonlinear electric pulse sequence based on a determined pulse sequence type and the statistical switching characteristics of a phase-change memristor; based on the nonlinear electric pulse sequence, the weight of an artificial electronic synapse of the phase-change memristor is regulated; wherein the nonlinear electric pulse sequence includes a nonlinear electric pulse sequence for achieving synaptic enhancement and a nonlinear electric pulse sequence for achieving synaptic inhibition.

[0126] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0127] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0128] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0129] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0130] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A method for regulating the weight of a phase-change memristor artificial electronic synapse, characterized in that: The following steps are involved: Obtaining the type of phase-change memristor to be regulated; wherein the types of phase-change memristors include abrupt phase-change memristors and gradual phase-change memristors; Determine the type of pulse sequence based on the acquired phase-change memristor type; if it is a sudden-change phase-change memristor, use a write-only pulse sequence; if it is a gradual-change phase-change memristor, use a write-read pulse sequence; Based on the determined pulse sequence type and in accordance with the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence is designed and obtained; based on the nonlinear electric pulse sequence, the weight of the artificial electronic synapse of the phase-change memristor is regulated; wherein the nonlinear electric pulse sequence includes a nonlinear electric pulse sequence for achieving synaptic enhancement and a nonlinear electric pulse sequence for achieving synaptic inhibition; in, Based on the determined pulse sequence type, according to the statistical switching characteristics of the phase change memristor, a nonlinear electric pulse sequence is designed; in the process of realizing the regulation of the artificial electronic synaptic weight of the phase change memristor based on the nonlinear electric pulse sequence, Based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence for achieving synaptic enhancement is designed. The steps of controlling the weight of the artificial electronic synapse of the phase-change memristor based on the nonlinear electric pulse sequence specifically include: Obtaining a resistance-voltage curve of the phase-change memristor, and based on the resistance-voltage curve, determining a voltage corresponding to when the high resistance begins to decrease as a starting pulse amplitude of the nonlinear pulse sequence; Obtaining a threshold voltage of a turn-on process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the turn-on process; wherein the termination pulse amplitude is lower than the threshold voltage of the turn-on process; Acquiring a conductance-pulse number curve of the phase-change memristor based on a nonlinear electric pulse sequence, adding sub-pulses between the amplitude of the starting pulse and the amplitude of the ending pulse based on the conductance-pulse number curve; and setting the number of repetitions of each sub-pulse based on the added sub-pulses to achieve refined conductance control; Based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence for achieving synaptic inhibition is designed. The steps of achieving the regulation of the artificial electronic synaptic weight of the phase-change memristor based on the nonlinear electric pulse sequence specifically include: Obtaining a low-resistance window region of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a starting pulse amplitude of a nonlinear electrical pulse sequence based on the low-resistance window region; wherein the starting pulse amplitude is higher than a voltage corresponding to the low-resistance window region; Obtaining a threshold voltage of a reset process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse voltage amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the reset process; wherein the termination pulse voltage amplitude is lower than the threshold voltage of the reset process; A conductance-pulse number curve of the phase-change memristor is obtained based on a nonlinear electric pulse sequence, and sub-pulses between the starting pulse amplitude and the ending pulse voltage amplitude are added based on the conductance-pulse number curve; based on the added sub-pulses, the number of repetitions of each sub-pulse is set to achieve refined conductance control.

2. The method for regulating the weight of a phase-change memristor artificial electronic synapse according to claim 1, characterized in that: The step of obtaining the type of the phase-change memristor to be regulated specifically includes: If there is a step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is judged to be a mutation-type phase-change memristor; If there is no step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a gradual-change phase-change memristor.

3. The method for regulating the weight of a phase-change memristor artificial electronic synapse according to claim 1, characterized in that: The pulse sequence type is determined based on the acquired phase change memristor type; wherein, if it is a sudden phase change memristor, a write-only pulse sequence is used; if it is a gradual phase change memristor, a write-read pulse sequence is used. The write-only pulse sequence means that each operating pulse is a read pulse, and the operating pulse is used to stimulate the artificial electronic synapse and also to return the conductance value in real time; The write-read pulse sequence means that each operation pulse is followed by a read pulse, and the operation pulse is only used to stimulate the artificial electronic synapse.

4. The method for regulating the weight of a phase-change memristor artificial electronic synapse according to claim 1, characterized in that: The step of designing and obtaining a nonlinear electrical pulse sequence based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor specifically includes: Based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor, the total number of pulses, the number of repetitions of sub-pulses, the interval between sub-pulses, the pulse amplitude and pulse width of the sub-pulses of the nonlinear electrical pulse sequence are designed; Among them, the sub-pulse voltage amplitude in the nonlinear electric pulse sequence shows a nonlinear increase or nonlinear decrease trend according to the intrinsic conductance distribution of the phase change memristor; the pulse width of the sub-pulse shows a nonlinear increase or nonlinear decrease trend; the interval between adjacent sub-pulses shows a nonlinear increase or nonlinear decrease trend; and the number of sub-pulse repetitions shows a nonlinear distribution trend.

5. The method for regulating the weight of a phase-change memristor artificial electronic synapse according to claim 1, characterized in that: Also includes: Establish a memristor synaptic model, the expression is: ； Where, Indicates the conductivity value, G LRS , G HRS Represent low conductance value and high conductance value respectively. represents the linearity parameter, represents the weight variable; Obtaining a normalized conductance value after conductance regulation and substituting it into the memristor synaptic model to perform linearity evaluation to obtain a linearity evaluation result; obtaining a continuity evaluation result based on the linearity evaluation result and the conductance-pulse number distribution obtained under nonlinear pulse train excitation; If there is a discontinuous area, the pulse amplitude and pulse repetition times in the nonlinear pulse sequence are redesigned for the electric pulses corresponding to the discontinuous area; After multiple iterations of optimization, the nonlinear electric pulse was finally determined.

6. A system for regulating the weight of a phase-change memristor artificial electronic synapse, characterized in that: include: A phase-change memristor type acquisition module, configured to acquire the type of the phase-change memristor to be regulated; wherein the types of the phase-change memristor include abrupt phase-change memristor and gradual phase-change memristor; a pulse sequence type determination module, configured to determine the type of pulse sequence based on the acquired phase-change memristor type; wherein, if the phase-change memristor is a sudden-change phase-change memristor, a write-only pulse sequence is used; and if the phase-change memristor is a gradual-change phase-change memristor, a write-read pulse sequence is used; A nonlinear electric pulse sequence acquisition module is used to design and obtain a nonlinear electric pulse sequence based on the determined pulse sequence type and the statistical switching characteristics of the phase-change memristor; based on the nonlinear electric pulse sequence, the weight of the artificial electronic synapse of the phase-change memristor is controlled; wherein the nonlinear electric pulse sequence includes a nonlinear electric pulse sequence for achieving synaptic enhancement and a nonlinear electric pulse sequence for achieving synaptic inhibition; in, Based on the determined pulse sequence type, according to the statistical switching characteristics of the phase change memristor, a nonlinear electric pulse sequence is designed; in the process of realizing the regulation of the artificial electronic synaptic weight of the phase change memristor based on the nonlinear electric pulse sequence, Based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence for achieving synaptic enhancement is designed. The steps of controlling the weight of the artificial electronic synapse of the phase-change memristor based on the nonlinear electric pulse sequence specifically include: Obtaining a resistance-voltage curve of the phase-change memristor, and based on the resistance-voltage curve, determining a voltage corresponding to when the high resistance begins to decrease as a starting pulse amplitude of the nonlinear pulse sequence; Obtaining a threshold voltage of a turn-on process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the turn-on process; wherein the termination pulse amplitude is lower than the threshold voltage of the turn-on process; Acquiring a conductance-pulse number curve of the phase-change memristor based on a nonlinear electric pulse sequence, adding sub-pulses between the amplitude of the starting pulse and the amplitude of the ending pulse based on the conductance-pulse number curve; and setting the number of repetitions of each sub-pulse based on the added sub-pulses to achieve refined conductance control; Based on the determined pulse sequence type and according to the statistical switching characteristics of the phase-change memristor, a nonlinear electric pulse sequence for achieving synaptic inhibition is designed. The steps of achieving the regulation of the artificial electronic synaptic weight of the phase-change memristor based on the nonlinear electric pulse sequence specifically include: Obtaining a low-resistance window region of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a starting pulse amplitude of a nonlinear electrical pulse sequence based on the low-resistance window region; wherein the starting pulse amplitude is higher than a voltage corresponding to the low-resistance window region; Obtaining a threshold voltage of a reset process of the phase-change memristor based on a resistance-voltage curve of the phase-change memristor, and determining a termination pulse voltage amplitude of a nonlinear electrical pulse sequence based on the threshold voltage of the reset process; wherein the termination pulse voltage amplitude is lower than the threshold voltage of the reset process; A conductance-pulse number curve of the phase-change memristor is obtained based on a nonlinear electric pulse sequence, and sub-pulses between the starting pulse amplitude and the ending pulse voltage amplitude are added based on the conductance-pulse number curve; based on the added sub-pulses, the number of repetitions of each sub-pulse is set to achieve refined conductance control.

7. The system for regulating the weight of a phase-change memristor artificial electronic synapse according to claim 6, characterized in that: The step of obtaining the type of the phase-change memristor to be regulated specifically includes: If there is a step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is judged to be a mutation-type phase-change memristor; If there is no step process during the turn-on process or the reset process of the resistance-voltage switching curve of the phase-change memristor, it is determined to be a gradual-change phase-change memristor.

8. The system for regulating the weight of a phase-change memristor artificial electronic synapse according to claim 6, characterized in that: The pulse sequence type is determined based on the acquired phase change memristor type; wherein, if it is a sudden phase change memristor, a write-only pulse sequence is used; if it is a gradual phase change memristor, a write-read pulse sequence is used. The write-only pulse sequence means that each operating pulse is a read pulse, and the operating pulse is used to stimulate the artificial electronic synapse and also to return the conductance value in real time; The write-read pulse sequence means that each operation pulse is followed by a read pulse, and the operation pulse is only used to stimulate the artificial electronic synapse.

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