A fast-start crystal oscillator circuit

Abstract

The present invention discloses a fast-start crystal oscillator circuit, belonging to the field of crystal oscillators, comprising: a first control switch controllably connected between a first end and an input end of the fast-start circuit under the action of an enable control signal; a second control switch controllably connected between a first end and an output end of the fast-start circuit under the action of an enable control signal; a second end of the fast-start circuit connected to the first control switch via a buffer, the buffer connected to the second control switch via a second inverter, and outputting an output signal under the action of a fast enable signal; and an output enable control signal. In the present invention, the fast-start circuit is added to increase the startup speed of the crystal oscillator circuit, reduce the oscillation start-up time, and reduce the circuit power consumption. Furthermore, after the output of the crystal oscillator circuit stabilizes, the fast-start circuit does not affect the circuit performance.

Description

Technical Field

[0001] The present invention relates to the field of crystal oscillators, and in particular to a fast-starting crystal oscillator circuit. Background Art

[0002] Crystal oscillators (CROs) are mostly Pierce oscillators combined with a quartz crystal to generate an oscillation signal. Quartz crystals offer stable frequencies and are relatively low cost, making them widely used in electronic devices to provide precise clock signals. However, crystal oscillator circuits require a significant startup time (start-up time) from power-up to outputting a stable oscillation signal. Crystal oscillator circuits with oscillation frequencies above 10 MHz have startup times exceeding 1ms, while other RF analog circuits have startup times in the microsecond range. This startup speed can limit the performance of electronic devices.

[0003] There are two main methods used in the prior art to accelerate startup. One is to select a suitable current at startup to achieve the optimal negative resistance of the driving circuit, thereby accelerating oscillation with the optimal driving capability. However, since the maximum value of the negative resistance is limited by the influence of the crystal oscillator and its load capacitance, the acceleration effect of this method is limited. The other is to directly drive both ends of the crystal oscillator with a clock with a frequency close to the crystal oscillator frequency at startup, and quickly enhance the initial oscillation current of the crystal oscillator by injection. This method requires that the driving clock frequency is very close to the frequency of the crystal oscillator itself, otherwise the driving effect will be greatly reduced. Due to factors such as process deviations and temperature and voltage, it is impossible to ensure that the driving clock frequency is always very close to the frequency of the crystal oscillator itself, so that the effectiveness of this method cannot be guaranteed. Therefore, in response to the above problems, there is an urgent need to design a fast-starting crystal oscillator circuit to meet the needs of actual use. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention provides a fast-start crystal oscillator circuit.

[0005] The technical problem solved by the present invention can be achieved by adopting the following technical solutions:

[0006] A fast-start crystal oscillator circuit, comprising a first inverter, a quartz crystal, and a resistor connected in parallel between an input terminal and an output terminal, wherein the input terminal is connected to a ground terminal via a first load capacitor, and the output terminal is connected to the ground terminal via a second load capacitor, and further comprising:

[0007] a first control switch controllably connected between a first terminal of a fast start-up circuit and the input terminal under the action of an enable control signal;

[0008] a second control switch controllably connected between the first terminal of the fast start-up circuit and the output terminal under the action of the enable control signal;

[0009] The second end of the fast start-up circuit is connected to the first control switch via a buffer, and the buffer is connected to the second control switch via a second inverter. Under the action of a fast enable signal, an output signal is output, the output signal is passed through the buffer to generate a first output signal, and the output signal is passed through the second inverter to generate a second output signal with a phase opposite to the first output signal; and the enable control signal is output.

[0010] Preferably, the fast start-up circuit includes:

[0011] a first control signal generating circuit, generating a first control signal under the action of the fast enable signal;

[0012] A ring oscillator outputs the output signal under the action of the first control signal.

[0013] Preferably, the first control signal generating circuit includes:

[0014] a first transistor, wherein a gate of the first transistor is connected to the fast enable signal, a source of the first transistor is connected to a power supply voltage, a drain of the first transistor is connected to a first node, and the first control signal is output from the first node;

[0015] a first capacitor and a first resistor, wherein the first capacitor and the first resistor are connected in parallel between the source and the drain of the first transistor;

[0016] A first current source is connected between the first node and the ground.

[0017] Preferably, it also includes:

[0018] a second transistor, wherein a gate of the second transistor is connected to the first control signal, and a source of the second transistor is connected to a ground terminal;

[0019] a third transistor, wherein a source of the third transistor is connected to the power supply voltage, and a gate and a drain of the third transistor are connected to the drain of the second transistor.

[0020] Preferably, the ring oscillator comprises an odd number of oscillation units connected in series, each of the oscillation units is connected between the power supply voltage and the ground terminal, and the output of the last stage oscillation unit is connected to the input of the first stage oscillation unit.

[0021] Preferably, each stage of the oscillation unit includes:

[0022] a fourth transistor, wherein a gate of the fourth transistor is connected to the gate of the third transistor, and a source of the fourth transistor is connected to the power supply voltage; and

[0023] a fifth transistor and a sixth transistor, wherein gates and drains of the fifth transistor and the sixth transistor are connected in parallel, and a source of the fifth transistor is connected to the drain of the fourth transistor;

[0024] a seventh transistor, wherein a gate of the seventh transistor is connected to the gate of the second transistor, a drain of the seventh transistor is connected to the source of the sixth transistor, and a source of the seventh transistor is connected to the ground terminal;

[0025] The gate of the fifth transistor of the oscillation unit of the latter stage is connected to the drain of the fifth transistor of the oscillation unit of the previous stage, and the drain of the fifth transistor of the oscillation unit of the last stage is connected to the output end of the ring oscillator, and the output end of the ring oscillator is connected to the gate of the fifth transistor of the oscillation unit of the first stage.

[0026] Preferably, the fast start circuit further includes:

[0027] a second control signal generating circuit, generating a second control signal under the action of the fast enable signal;

[0028] Three third inverters, the second control signal outputs the enable control signal after passing through the three third inverters.

[0029] Preferably, the second control signal generating circuit includes:

[0030] an eighth transistor, wherein a gate of the eighth transistor is connected to the fast enable signal, a source of the eighth transistor is connected to a power supply voltage, a drain of the eighth transistor is connected to a second node, and the second control signal is outputted from the second node;

[0031] a second capacitor and a second resistor, wherein the second capacitor and the second resistor are connected in parallel between the source and the drain of the first transistor;

[0032] A second current source is connected between the second node and the ground.

[0033] Preferably, the lowest voltage of the second node satisfies the following conditions:

[0034] VDD-I2*R2 <V0

[0035] Wherein, I2 represents the current flowing through the second current source;

[0036] R2 represents the resistance of the second resistor;

[0037] V0 represents the switching voltage of the three third inverters.

[0038] Preferably, the method further comprises: calculating the starting time of the crystal oscillator circuit using the following formula:

[0039]

[0040] Among them, T start-up Indicates the starting time of the crystal oscillator circuit;

[0041] Q represents the quality factor of the crystal oscillator circuit;

[0042] ω SS represents the oscillation frequency of the crystal oscillator circuit;

[0043] R N represents the equivalent negative resistance of the crystal oscillator circuit;

[0044] R m represents the crystal resistance;

[0045] i x (0) represents the initial current of the crystal oscillator circuit.

[0046] The beneficial effects of the present invention are:

[0047] The present invention increases the startup speed of the crystal oscillator circuit, reduces the circuit's oscillation start-up time, and reduces circuit power consumption by adding a simple quick startup circuit. The quick startup circuit is not affected by different process deviations, temperatures, and power supply voltages, and after the output of the crystal oscillator circuit stabilizes, the quick startup circuit does not affect the circuit performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 The circuit diagram of the Pierce oscillator in the prior art;

[0049] Figure 2 This is a circuit diagram of a fast-start crystal oscillator circuit in the present invention;

[0050] Figure 3 This is a schematic diagram of a circuit for generating an output signal in a quick start circuit of the present invention;

[0051] Figure 4 This is a schematic diagram of a circuit for generating an enable control signal in a fast startup circuit in the present invention. DETAILED DESCRIPTION

[0052] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0053] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0054] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0055] like Figure 1 Figure 1 shows a circuit diagram of a Pierce oscillator in the prior art. The Pierce oscillator consists of a first inverter INV1, a resistor R0, a quartz crystal XTAL, and two load capacitors (CL1 and CL2). The first inverter INV1, the quartz crystal XTAL, and the resistor R0 are connected in parallel between the input and output terminals. The input terminal is connected to the ground terminal via the first load capacitor CL1, and the output terminal is connected to the ground terminal via the second load capacitor CL2. The signals at the input and output terminals of the first inverter INV1 are anti-phase oscillation signals with a phase difference of 180 degrees.

[0056] The present invention further improves the existing Pierce oscillator by adding a fast start circuit 1, a buffer BUFFER, an inverter INV2 and two switches (SW1, SW2). The present invention provides a fast start crystal oscillator circuit, such as Figure 2 As shown, specifically including:

[0057] a first control switch SW1 controllably connected between the first terminal and the input terminal of the fast start-up circuit 1 under the action of an enable control signal EN_SW;

[0058] a second control switch SW2 controllably connected between the first terminal and the output terminal of the fast start-up circuit 1 under the action of an enable control signal EN_SW;

[0059] The second end of the fast startup circuit 1 is connected to the first control switch SW1 via a buffer BUFFER. The buffer BUFFER is connected to the second control switch SW2 via a second inverter INV2. In response to a fast enable signal EN_FAST, the fast startup circuit 1 outputs an output signal. The output signal is passed through the buffer BUFFER to generate a first output signal. The output signal is passed through the second inverter INV2 to generate a second output signal with a phase opposite to that of the first output signal. The fast startup circuit 1 also outputs the enable control signal EN_SW.

[0060] Specifically, in this embodiment, when the frequency of the inverting signal at both ends of the quartz crystal XTAL is the oscillation frequency ω SS When the quartz crystal XTAL is turned on, a large current will be generated in the quartz crystal XTAL. The fast start circuit 1 is turned on by the fast enable signal EN_FAST, and the frequency ω is generated in a very short time (about 50us). ss The output signal V OUT The output signal passes through the buffer BUFFER to generate an input signal XIN at the input end, and at the same time passes through the second inverter INV2 to generate an output signal XOUT at the output end. The phase difference between XIN and XOUT is 180 degrees.

[0061] Furthermore, due to the influence of process deviation, temperature and power supply voltage fluctuation, the output signal V OUT The frequency will fluctuate, so the output signal V OUT The frequency of the signal decreases monotonically with time, and the output signal V OUT The frequency range must in all cases include the oscillation frequency ω SS , so that the fast start-up circuit 1 can work normally under different process deviations, temperatures, and power supply voltages.

[0062] Furthermore, after the fast start circuit 1 injects the initial current ix(0) into the quartz crystal XTAL, the fast start circuit 1 changes the enable control signal EN_SW, disconnecting the first control switch SW1 and the second control switch SW2. At this time, the output of the fast start circuit 1 no longer affects the quartz crystal XTAL of the Pierce oscillator.

[0063] As a preferred embodiment, the fast start-up circuit 1 includes a circuit for generating an output signal V OUT An output signal generating module and an enabling module for generating an enable control signal EN_SW, the output signal generating module includes the following first control signal generating circuit and a ring oscillator, and the enabling module includes the following second control signal generating circuit and three third inverters.

[0064] As a preferred embodiment, the fast start circuit 1 includes:

[0065] a first control signal generating circuit, generating a first control signal under the action of a fast enable signal EN_FAST;

[0066] A ring oscillator outputs the output signal under the action of a first control signal.

[0067] Specifically, in this embodiment, the fast startup circuit 1 includes a first control signal generating circuit and a ring oscillator. Under the action of the fast enable signal EN_FAST, the first control signal generating circuit generates a first control signal Vctrl, the first control signal Vctrl generates an output signal through the ring oscillator, and is output through the first end of the fast startup circuit 1. The output signal V OUT The frequency is controlled by the voltage of the first control signal Vctrl. The larger the voltage of the first control signal is, the higher the output signal V OUT The higher the frequency.

[0068] As a preferred embodiment, Figure 3 As shown, the first control signal generating circuit includes:

[0069] a first transistor MP1, wherein a gate of the first transistor MP1 is connected to a fast enable signal EN_FAST, a source of the first transistor MP1 is connected to a power supply voltage VDD, a drain of the first transistor MP1 is connected to a first node J1, and a first control signal is outputted from the first node J1;

[0070] a first capacitor C1 and a first resistor R1, wherein the first capacitor C1 and the first resistor R1 are connected in parallel between the source and the drain of the first transistor;

[0071] A first current source is connected between the first node J1 and the ground.

[0072] Specifically, in this embodiment, a first control signal generating circuit is formed by a first transistor MP1, a first capacitor C1, a first resistor R1 and a first current source to generate a first control signal Vctrl. When the voltage value of the fast enable signal EN_FAST is 0, the fast start circuit 1 is turned off, the first transistor MP1 is turned on, and the first control signal Vctrl is equal to the power supply voltage VDD; when the voltage value of the fast enable signal EN_FAST is pulled from 0 to VDD, the fast start circuit 1 is turned on, the first transistor MP1 is turned off, and the first control signal Vctrl decreases from the power supply voltage VDD to VDD-I1*R1 after a first time t1, where I1 is the current flowing through the first current source and R1 is the resistance of the first resistor. Therefore, the discharge speed is determined by the first capacitor C1 and the current I1. The larger the value of the first capacitor C1 or the smaller the value of the current I1, the slower the discharge speed. The output frequency of the output signal Vout decreases along with the first control signal Vctrl, but its frequency variation range should include the operating frequency ω of the crystal oscillator. SS .

[0073] As a preferred embodiment, Figure 3 As shown, it also includes:

[0074] a second transistor MN1, wherein a gate of the second transistor MN1 is connected to the first control signal, and a source of the second transistor MN1 is connected to the ground;

[0075] a third transistor MP2 , wherein a source of the third transistor MP2 is connected to a power supply voltage, and a gate and a drain of the third transistor MP2 are connected to the drain of the second transistor MN1 .

[0076] As a preferred embodiment, the ring oscillator includes an odd number of oscillation units 2 connected in series, each oscillation unit 2 is connected between a power supply voltage VDD and a ground terminal, and the output of the last oscillation unit is connected to the input of the first oscillation unit.

[0077] As a preferred embodiment, Figure 3 As shown, each stage of the oscillation unit 2 includes:

[0078] a fourth transistor MP4 , wherein a gate of the fourth transistor MP4 is connected to the gate of the third transistor MP2 , and a source of the fourth transistor MP4 is connected to the power supply voltage VDD; and

[0079] a fifth transistor MP5 and a sixth transistor MN2, wherein gates and drains of the fifth transistor MP5 and the sixth transistor MN2 are connected in parallel, and a source of the fifth transistor MP5 is connected to a drain of the fourth transistor MP4;

[0080] a seventh transistor MN3 , wherein a gate of the seventh transistor MN3 is connected to the gate of the second transistor MN1 , a drain of the seventh transistor MN3 is connected to the source of the sixth transistor MN2 , and a source of the seventh transistor MN3 is connected to the ground;

[0081] The gate of the fifth transistor of the subsequent oscillation unit is connected to the drain of the fifth transistor of the previous oscillation unit, the drain of the fifth transistor of the last oscillation unit is connected to the output end of the ring oscillator, and the output end of the ring oscillator is connected to the gate of the fifth transistor of the first oscillation unit.

[0082] As a preferred embodiment, Figure 4 As shown, the quick start circuit 1 further includes:

[0083] a second control signal generating circuit, generating a second control signal under the action of the fast enable signal EN_FAST;

[0084] The three third inverters (INV31, INV32, INV33) output the enable control signal EN_SW after the second control signal passes through the three third inverters (INV31, INV32, INV33).

[0085] As a preferred embodiment, Figure 4 As shown, the second control signal generating circuit includes:

[0086] an eighth transistor MP3, wherein a gate of the eighth transistor MP3 is connected to a fast enable signal EN_FAST, a source of the eighth transistor MP3 is connected to a power supply voltage, a drain of the eighth transistor MP3 is connected to a second node J2, and a second control signal is outputted from the second node J2;

[0087] a second capacitor C2 and a second resistor R2, wherein the second capacitor C2 and the second resistor R2 are connected in parallel between the source and the drain of the first transistor MP1;

[0088] A second current source is connected between the second node J2 and the ground.

[0089] Specifically, in this embodiment, a second control signal generating circuit is formed by the eighth transistor MP3, the second capacitor C2, the second resistor R2 and the second current source to generate a second control signal, and then the second control signal passes through three third inverters (INV31, INV32, INV33) to generate an enable control signal EN_SW.

[0090] When the voltage of the fast enable signal EN_FAST is 0, the fast startup circuit 1 is turned off, the eighth transistor MP3 is turned on, and the voltage of the second control signal is equal to the power supply voltage VDD. When the voltage of the fast enable signal EN_FAST increases from 0 to VDD, the fast startup circuit 1 is turned on, the eighth transistor MP3 is turned off, and the voltage of the second control signal decreases from the power supply voltage VDD to VDD-I2*R2 after a second time t2, where I2 is the second current flowing through the second current source and R2 is the resistance of the second resistor. The speed of change of the second control signal voltage can be controlled by changing the values ​​of the second capacitor C2 and the second current I2.

[0091] As a preferred embodiment, the lowest voltage of the second node J2 satisfies the following conditions:

[0092] VDD-I2*R2 <V0

[0093] Wherein, I2 represents the current flowing through the second current source;

[0094] R2 represents the resistance of the second resistor;

[0095] V0 represents the flip voltage of the three third inverters.

[0096] Specifically, in this embodiment, in order to reverse the third inverter, the minimum voltage of the second control signal needs to meet VDD-I2*R2 <V0。

[0097] Furthermore, the first time t1 and the second time t2 must satisfy t1<t2, which can ensure that the output signal V OUTThe frequency range of the crystal oscillator in any case includes the frequency ω SS .

[0098] As a preferred embodiment, the method further includes: using the following formula to calculate the starting time of the crystal oscillator circuit:

[0099]

[0100] Among them, T start-up Indicates the start-up time of the crystal oscillator circuit;

[0101] Q represents the quality factor of the crystal oscillator circuit;

[0102] ω SS Indicates the oscillation frequency of the crystal oscillator circuit;

[0103] R N Represents the equivalent negative resistance of the crystal oscillator circuit;

[0104] R m represents the crystal resistance;

[0105] i x (0) represents the initial current of the crystal oscillator circuit.

[0106] Specifically, in this embodiment, the relationship between the start-up time of the crystal oscillator circuit and the various parameters in the circuit is as above, wherein the quality factor Q, the crystal resistance R m It is an inherent parameter of the quartz crystal XTAL and cannot be modified. Therefore, it can only be changed by changing the equivalent negative resistance R N and the initial current i x (0) Realize the adjustment of the crystal oscillator circuit. The present invention increases the initial current i x The value of (0) can be used to reduce the start-up time of the crystal oscillator, reducing the start-up time of the crystal oscillator from more than 1ms to less than 200us.

[0107] The beneficial effects of the present invention are as follows: the present invention increases the startup speed of the crystal oscillator circuit by adding a simple quick startup circuit, reduces the circuit's oscillation start-up time, and reduces the circuit's power consumption; the quick startup circuit is not affected by different process deviations, temperatures, and power supply voltages, and after the output of the crystal oscillator circuit stabilizes, the quick startup circuit does not affect the circuit performance.

[0108] The above description is only a preferred embodiment of the present invention and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the description and illustrations of the present invention should be included in the protection scope of the present invention.

Claims

1. A fast-start crystal oscillator circuit, comprising a first inverter, a quartz crystal, and a resistor connected in parallel between an input terminal and an output terminal, wherein the input terminal is connected to a ground terminal via a first load capacitor, and the output terminal is connected to the ground terminal via a second load capacitor, wherein: Also includes: a first control switch controllably connected between a first terminal of a fast start-up circuit and the input terminal under the action of an enable control signal; a second control switch controllably connected between the first terminal of the fast start-up circuit and the output terminal under the action of the enable control signal; A second end of the fast startup circuit is connected to the first control switch via a buffer, and the buffer is connected to the second control switch via a second inverter. The fast startup circuit outputs an output signal under the action of a fast enable signal. The output signal is passed through the buffer to generate a first output signal, and the output signal is passed through the second inverter to generate a second output signal with a phase opposite to that of the first output signal. and outputting the enable control signal; The fast start-up circuit comprises: a first control signal generating circuit, configured to generate a first control signal under the action of the fast enable signal, wherein the first control signal is passed through a ring oscillator to generate the output signal; The second control signal generating circuit generates a second control signal under the action of the fast enable signal, and the second control signal is converted into the enable control signal through three third inverters.

2. A fast-start crystal oscillator circuit according to claim 1, characterized in that: The first control signal generating circuit includes: a first transistor, wherein a gate of the first transistor is connected to the fast enable signal, a source of the first transistor is connected to a power supply voltage, a drain of the first transistor is connected to a first node, and the first control signal is output from the first node; a first capacitor and a first resistor, wherein the first capacitor and the first resistor are connected in parallel between the source and the drain of the first transistor; A first current source is connected between the first node and the ground.

3. The fast-start crystal oscillator circuit according to claim 1, wherein: Also includes: a second transistor, wherein a gate of the second transistor is connected to the first control signal, and a source of the second transistor is connected to a ground terminal; a third transistor, wherein a source of the third transistor is connected to a power supply voltage, and a gate and a drain of the third transistor are connected to the drain of the second transistor.

4. The fast-start crystal oscillator circuit according to claim 3, characterized in that: The ring oscillator includes an odd number of oscillation units connected in series, each of the oscillation units is connected between the power supply voltage and the ground terminal, and the output of the last stage oscillation unit is connected to the input of the first stage oscillation unit.

5. The fast-start crystal oscillator circuit according to claim 4, characterized in that: Each level of the oscillation unit includes: a fourth transistor, wherein a gate of the fourth transistor is connected to the gate of the third transistor, and a source of the fourth transistor is connected to the power supply voltage; and a fifth transistor and a sixth transistor, wherein gates and drains of the fifth transistor and the sixth transistor are connected in parallel, and a source of the fifth transistor is connected to the drain of the fourth transistor; a seventh transistor, wherein a gate of the seventh transistor is connected to the gate of the second transistor, a drain of the seventh transistor is connected to the source of the sixth transistor, and a source of the seventh transistor is connected to the ground terminal; The gate of the fifth transistor of the oscillation unit of the latter stage is connected to the drain of the fifth transistor of the oscillation unit of the previous stage, and the drain of the fifth transistor of the oscillation unit of the last stage is connected to the output end of the ring oscillator, and the output end of the ring oscillator is connected to the gate of the fifth transistor of the oscillation unit of the first stage.

6. The fast-start crystal oscillator circuit according to claim 1, characterized in that: The second control signal generating circuit includes: an eighth transistor, wherein a gate of the eighth transistor is connected to the fast enable signal, a source of the eighth transistor is connected to a power supply voltage, a drain of the eighth transistor is connected to a second node, and the second control signal is outputted from the second node; a second capacitor and a second resistor, wherein the second capacitor and the second resistor are connected in parallel between the source and the drain of the eighth transistor; A second current source is connected between the second node and the ground.

7. The fast-start crystal oscillator circuit according to claim 6, characterized in that: The lowest voltage of the second node satisfies the following conditions: ； Wherein, I2 represents the current flowing through the second current source; R2 represents the resistance of the second resistor; V0 represents the flip voltage of the three third inverters; VDD represents the power supply voltage.

8. The fast-start crystal oscillator circuit according to claim 1, characterized in that: The method further includes: calculating the starting time of the crystal oscillator circuit using the following formula: ； Among them, T start-up Indicates the starting time of the crystal oscillator circuit; Q represents the quality factor of the crystal oscillator circuit; ω SS represents the oscillation frequency of the crystal oscillator circuit; R N represents the equivalent negative resistance of the crystal oscillator circuit; R m represents the crystal resistance; i x (0) represents the initial current of the crystal oscillator circuit.

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