Semiconductor device and semiconductor device and method for manufacturing the same

Abstract

The present application relates to a semiconductor device comprising a wafer (1) having a preferably monolithic semiconductor substrate, in particular a silicon substrate (2), and at least one integrated electronic component (3) extending within and / or on the semiconductor substrate (2), wherein the wafer (1) comprises a front-end process (5) having the integrated electronic component (3) or at least one integrated electronic component, and a back-end process (6) and a photonic platform (8) located above the front-end process (5), the photonic platform (8) being fabricated at a side (9) of the wafer (1) facing away from the front-end process (5), the platform comprising at least one waveguide (12) and at least one electro-optical device (15), in particular at least one photodetector and / or at least one electro-optical modulator, wherein the electro-optical device (15) or at least one electro-optical device of the photonic platform (8) is connected to the integrated electronic component (3) or at least one integrated electronic component of the wafer (1).

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor device and a manufacturing method thereof. Furthermore, the present application relates to a semiconductor arrangement and a manufacturing method thereof. BACKGROUND

[0002] Data exchange within a chip and between chips is increasingly approaching the capacity limit. The number of possible connections is limited by the available chip area and technical factors that influence the manufacturability. Furthermore, the bandwidth of electrical connections is limited by electrical losses that increase sharply with frequency. For a wide range of applications, the demand for wideband I / O (input / output) interfaces is higher than the current capacity. Examples of applications are in the field of so-called edge computing, which in particular involves configurable networks of CPUs or GPUs and memories, CPU memory connections and Internet of Things networks for autonomous mobility, etc. In the above cases, very high bandwidths of Gb / s to Tb / s data transmission are often required.

[0003] At present, I / O interfaces are basically implemented electronically. This applies to the basic fields of memory connections, sensor networks (IoT) and data communication. The currently technically possible I / O bandwidth is often not sufficient to achieve the required transmission rates. Physical relationships with a fundamental limiting effect, such as the losses of electrical contacts and the minimum size, prevent a significant increase in performance. Electrical losses play an important role, in particular at high frequencies (e.g. 10 dB / m for coaxial lines in the range of around 50 GHz), while optical fibers have very small losses in the range of 0.1 dB / km. A change to optical interfaces can solve the problems of bandwidth and range. However, the manufacture of a large number of available, low-cost, high-performance components is a major challenge here. At present, only silicon technology can do this, but it has only limited photonic functionality. III-V semiconductors are more suitable, but cannot be monolithically integrated into silicon technology.

[0004] In addition to I / O interfaces, other application fields can also be considered. Optical systems for machine learning, such as optical filters, spectrometers or neural networks, can also be implemented. The close integration of photonics and electronics can enable new chip architectures.

[0005] By means of heterogeneous integration or bonding techniques of electronic and optical chips, optical interfaces for data communication are realized to some extent. This means that the optical and electronic chips are manufactured and connected using different technologies. For this purpose, optical circuits based on III-V transition semiconductors are usually bonded to a silicon wafer by means of an electronic control circuit. The advantage is that each circuit type can be manufactured in its optimum technology. However, a significant disadvantage is the high cost, the high sequence, so that the manufacturing process of the bonding (each chip has to be bonded to the wafer one after the other) and the interruption of the manufacturing line are time-consuming. After the individual chips have been combined with the wafer, the wafer cannot be further processed as a whole. The wafer is separated in the next step and the chips are completed individually (however, the main part of the manufacturing steps has already been completed).

[0006] Alternatively, silicon can be used as a starting material and electronic and photonic circuits can be obtained on one chip. However, in this case the technical combination of electronic and photonic circuits is fixed, since the optical and electronic circuits are manufactured in the same layer. Silicon electronics and photonics are located side by side on one wafer. This can be learned, for example, from the article "Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip", Nature 556, pages 349-354 (2018), doi: 10.1038 / s41586-018-0028-z. The advantage of this silicon combination technology compared to the bare crystal connection or bonding strategy of III-V semiconductors is that significant cost and time savings can be achieved. The disadvantage is that the performance of silicon photonic devices is generally inferior compared to III-V transition semiconductors. Another significant disadvantage is that the electronic and photonic technologies are fixed, so that only certain types of microchips can be reasonably manufactured for technical and economic reasons.

[0007] US 2014 / 0264400 A1 discloses a semiconductor device with integrated circuits. The device comprises a plurality of chips with integrated circuits which are fixed spaced apart from each other in recesses of a carrier substrate. A planar coating comprising waveguides and photonic devices is deposited on the chips as well as on the substrate surface, thereby providing optical intra-chip connections for the photonic devices of one chip or optical inter-chip connections for the photonic devices of different chips.

[0008] The previously known semiconductor devices have proven themselves in principle. However, there is still a need for alternative devices. In particular, there is a need for a device which enables a large number of individual chips with integrated photonics to be obtained with reasonable manufacturing effort and thus at reasonable cost. SUMMARY

[0009] It is an object of the present invention to provide alternative semiconductor devices in which the integration of electronic circuits and photonic components is achieved and which enable a large number of chips with integrated photons to be obtained with reasonable effort. Furthermore, it is an object of the present invention to obtain a method of manufacturing such a device.

[0010] The first-mentioned object is solved by a semiconductor device comprising a wafer having a preferably monolithic semiconductor substrate, in particular a silicon substrate, and at least one integrated electronic component extending in and / or on the semiconductor substrate, the wafer having a front-end-of-line and a back-end-of-line located above the front-end-of-line, wherein the front-end-of-line comprises the integrated electronic component or at least one of the integrated electronic components, and a photonic platform manufactured on a side of the wafer facing away from the front-end-of-line, the photonic platform comprising at least one waveguide and at least one electro-optical device, in particular at least one photodetector and / or at least one electro-optical modulator, wherein at least one of the electro-optical devices of the photonic platform is connected to the integrated electronic component or at least one of the integrated electronic components of the wafer.

[0011] The second-mentioned object is solved by a method of manufacturing a semiconductor device, the method comprising the following steps:

[0012] providing a wafer having a preferably monolithic semiconductor substrate, in particular a silicon substrate, and at least one integrated electronic component extending in and / or on the semiconductor substrate, the wafer having a front-end-of-line and a back-end-of-line located above the front-end-of-line, wherein the front-end-of-line comprises the integrated electronic component or at least one of the integrated electronic components,

[0013] manufacturing a photonic platform on a side of the wafer facing away from the front-end-of-line, the photonic platform comprising at least one waveguide and at least one electro-optical device, in particular at least one photodetector and / or at least one electro-optical modulator.

[0014] In other words, the basic idea of the present invention is to manufacture, in particular to build, the photonic platform with at least one waveguide and at least one electro-optical device directly on the back-end-of-line of the wafer.

[0015] In the prior art, a wafer is generally understood in a known manner as a component, element or device of a plurality of chips obtained by wafer dicing, also referred to as Wafer-Zerkleinern in German. The dicing or singulation can comprise, for example, (laser) dicing or sawing or scribing or breaking of the wafer. In English, a single or singular chip is also referred to as a die, or a plurality of chips is also referred to as dies or dies. It should be noted that some chips after dicing are also referred to as bare chips or dies. "Bare" means that the chips have not yet been placed in a package. The "bare" chips without a package are also referred to as chips.

[0016] If the wafer is viewed in cross-section, the vertical structure of the wafer can be divided into different sub-regions. The lowest part is the front-end-of-line, FEOL for short, which consists of one or more integrated electronic components. The integrated electronic components can be, for example, transistors and / or capacitors and / or resistors. Above the front-end-of-line is the back-end-of-line, BEOL for short, which usually contains various metal planes through which the integrated electronic components of the FEOL are interconnected.

[0017] The wafer comprises a plurality of regions, each of which forms a chip or a die after cutting / singulation / unification. These regions are also referred to as chip or die regions herein. Each chip region of the wafer preferably comprises a partial or local region of the single piece semiconductor substrate of the wafer. Preferably, each chip region also comprises one or more integrated electronic components extending within and / or on the respective region of the semiconductor substrate, when viewed in cross-section, in particular in the FEOL. It should be emphasized that the chip regions do not represent isolated chips, i.e. the wafer does not comprise isolated chips.

[0018] The integrated electronic components of some, in particular all, chip regions of the wafer can be identical. In this case, by cutting, a plurality of identical chips with a photonic platform manufactured thereon (or in each case a part thereof) can be obtained from the device according to the application.

[0019] There is one or more markings on the wafer along which cutting can or must be carried out.

[0020] In the context of the present application, the photonic platform can be established directly on the wafer, even before singulation (cutting) of the wafer into individual chips. Since in the device according to the application the photonic platform is manufactured, in particular built, on the wafer, a large number of chips with integrated photonics can subsequently be obtained by cutting alone. Cutting can be carried out in the same way as with conventional wafers without a photonic platform in the back-end-of-line. In particular, existing equipment or facilities can be used for this purpose. Thus, by reasonable effort, individual chips with photonics can also be produced in large quantities.

[0021] The side of the wafer facing away from the front-end-of-line on which the photonic platform is, or will be, manufactured can also be referred to as the side of the upper part of the wafer. In a useful embodiment, the device according to the application is characterized in that the photonic platform region manufactured thereon extends above the plurality of, in particular each, chip region of the wafer, each platform region expediently comprising at least one, preferably a plurality, of waveguides and at least one, preferably a plurality, of electro-optical devices connected to at least one integrated electronic component or circuit of the respective underlying chip region.

[0022] The photonic platform advantageously comprises a plurality of functional units, it is particularly preferred that at least one, in particular exactly one, of the functional units extending over the respective chip area is assigned to each chip area of the wafer.

[0023] According to the application, the photonic platform is manufactured in the back end of line of the wafer, in particular after the (conventional) wafer manufacturing process is completely finished. In particular in this case, it can be done without adjusting the (conventional) wafer manufacturing steps. The photonic platform manufacturing can also be done completely separately from the (conventional) wafer manufacturing. Thus, there is a high degree of flexibility.

[0024] The integrated electronic components extend in and / or on the semiconductor substrate of the wafer of the device according to the application, in particular meaning that they are arranged within and / or directly on the substrate. Of course, it can be that the integrated electronic components extend in parts within the substrate and directly on the substrate, for example directly on one or more sides of the substrate.

[0025] The semiconductor substrate of the semiconductor device according to the application is preferably monolithic. In particular, it is a monolithic substrate. The substrate can be manufactured in several layers.

[0026] The semiconductor substrate can also be characterized by a circumference. Alternatively or additionally, the diameter of the semiconductor substrate can be in the range of 600 mm to 50 mm, preferably 500 mm to 100 mm. Exemplary diameters include 150 mm, 200 mm, 300 mm and 450 mm.

[0027] The fact that the photonic platform is manufactured in the back end, not on the same level as the electronic devices of the front end, provides the great advantage that the photonic devices do not require additional space (also referred to as "board surface"). Thus, the problem of the sometimes existing limited board surface is not further aggravated in the front end.

[0028] The photonic platform is manufactured in the wafer, in particular meaning that it is directly in the wafer, which includes, for example, that the material is directly built up / deposited in the wafer. Preferably, the photonic platform is characterized in that it comprises a material deposited on the side of the wafer facing away from the front end. Thus, in the method according to the application, it can be provided that the manufacturing of the photonic platform comprises depositing a material on the side of the wafer facing away from the front end. In particular, the photonic platform is not or has not been manufactured independently of the wafer, for example on another substrate, then transferred to the wafer and bonded to the wafer, for example by bonding. Rather, the photonic platform is or has been obtained in the wafer.

[0029] The photonic platform of the semiconductor device of the application can not have a bonding layer in addition to the one or more electro-optical devices or components of at least one of them.

[0030] In a particularly advantageous embodiment, the photonic platform comprises a planarization coating of dielectric material. This is preferably manufactured on the side of the wafer facing away from the front-end-of-line. It is further preferred that the waveguide or at least one of the waveguides can be manufactured on the side of the planarization coating facing away from the wafer.

[0031] According to a more detailed feature of the method according to the application, the manufacturing of the photonic platform comprises manufacturing a planarization coating of dielectric material, in particular on the side of the wafer facing away from the front-end-of-line.

[0032] The planarization coating of the photonic platform provided according to these embodiments can form the basis of one or more photonic layers or planes, each preferably comprising at least one waveguide and / or at least one electro-optical device.

[0033] The waveguide or at least one of the waveguides can then further preferably be manufactured on the side of the planarization coating facing away from the wafer.

[0034] The manufacturing of the at least one waveguide can further comprise applying a waveguide material, preferably depositing or spin-coating or transferring, in particular on the side of the planarization coating facing away from the wafer, and then preferably structuring the deposited waveguide material, in particular by means of photolithography and / or reactive ion etching. For example, the same deposition processes described below in connection with the planarization coating can be used.

[0035] If the photonic platform comprises a planarization coating provided in the back-end-of-line, the planarization coating is not manufactured separately from the wafer (for example on another substrate) and then transferred to the wafer and bonded to the wafer by means of bonding (for example by means of bonding). Rather, the photonic platform is or has been obtained on. The planarization coating can then also be said to be a monolithic layer, in particular a layer which is monolithic with the wafer.

[0036] In a further detailed description, the planarization coating has a roughness of less than 2.0 nm RMS, preferably less than 1.0 nm RMS, particularly preferably less than 0.3 nm RMS, on the side thereof facing away from the wafer. For example, the lower limit can be 0.01 nm RMS. In other words, the roughness can for example be in the range of 2.0 nm RMS to 0.01 nm RMS, preferably in the range of 1.0 nm RMS to 0.01 nm RMS, particularly preferably in the range of 0.3 nm RMS to 0.01 nm RMS. The abbreviation nm stands here and below in the manner known per se for nanometer (10 -9 m). The abbreviation RMS stands for root mean square. The root mean square roughness is also referred to in German as “quadradische Rauheit”.

[0037] In another embodiment of the device according to the application, the planarization coating comprises or consists of spin-on glass and / or at least one polymer and / or at least one oxide, in particular silicon dioxide, and / or at least one nitride. The method according to the application can thus comprise manufacturing a planarization coating, which comprises or consists of spin-on glass and / or at least one polymer and / or at least one oxide, in particular silicon dioxide, and / or at least one nitride.

[0038] Spin-on glass is generally a liquid substance, which can coat a wafer by a spin-on glass coating. After the spin-on glass coating, a layer is formed on the wafer, the thickness of which depends on the surface profile. The recesses are thus partially compensated, the spin-on glass having a planarization effect. The spin-on glass is generally heated after deposition, thus forming a glass-like layer.

[0039] Alternatively or additionally, it can be provided that the planarization coating is formed by deposition, in particular chemical vapor deposition (CVD), preferably low-pressure chemical vapor deposition (LPCVD) and / or plasma-enhanced chemical vapor deposition (PECVD), and / or by physical vapor deposition of the coating material on the side of the wafer facing away from the front-end-of-line, and preferably by chemical-mechanical polishing and / or by resist planarization.

[0040] In the method according to the application, it can be provided accordingly that, as part of the manufacturing of the planarization coating, at least one coating material is deposited on the side of the wafer facing away from the front-end-of-line, in particular by chemical vapor deposition, preferably low-pressure chemical vapor deposition and / or plasma-assisted chemical vapor deposition, and / or by physical vapor deposition. Preferably, the deposited material is subsequently subjected to chemical-mechanical polishing and / or resist planarization on the side of the wafer facing away, in particular preferably in such a way that a roughness of less than 2.0 nm, preferably less than 1.0 nm RMS, particularly preferably less than 0.3 nm RMS, is obtained. The chemical-mechanical polishing and / or resist planarization can in particular be carried out in such a way that a roughness in the range from 2.0 nm RMS to 0.01 nm RMS, preferably in the range from 1.0 nm RMS to 0.01 nm RMS, particularly preferably in the range from 0.3 nm RMS to 0.01 nm RMS, is obtained.

[0041] It turns out that these regions are particularly suitable in terms of roughness. Said roughness is particularly advantageous for avoiding stresses and strains in the overlying layers. In this regard, reference is also made to the article "Identifying suitable substrates for high-quality graphene-based heterostructures" by L. Banszerus et al., 2D Mater., Vol. 4, No. 2, 025030, 2017.

[0042] An atomic force microscope (AFM) can be used as a measurement method for determining the roughness, in particular as described in EN ISO 25178. Atomic force microscopes are mainly discussed in Part 6 of this standard (EN ISO 25178-6:2010-01), which relates to measurement methods for roughness determination.

[0043] There are various prior art chemical vapor deposition processes, all of which can be used in the present application. Common to all of these processes is generally the chemical reaction of the introduced gases, which leads to the deposition of the desired material. In addition, with regard to physical vapor deposition, all variants known from the prior art can be used. By way of example only, mention can be made of electron beam evaporation (in which the material is melted and evaporated by an electron beam) and thermal evaporation (in which the material is heated to the melting point by a heater and evaporated to the target substrate) as well as sputter deposition (in which atoms are detached from a material carrier by a plasma and deposited on the target substrate).

[0044] As an alternative or in addition to the above-mentioned deposition processes, atomic layer deposition is also possible. In this process, insulating or conductive materials (dielectric, semiconducting or metallic) are deposited in atomic layers in sequence.

[0045] In chemical mechanical polishing, the object to be polished, for example a wafer, is polished by means of a rotational movement between a polishing pad. The polishing takes place on the one hand by chemical means and on the other hand by physical treatment by means of a polishing paste. By combining chemical and physical action, a smooth surface in the sub-nanometer range can be achieved.

[0046] In particular, the resist planarization comprises a single or repeated spin-on glass deposition and subsequent etching, preferably reactive ion etching (RIE). If a surface with height differences, for example a surface of Si02, is to be planarized, this can be achieved by spin-on glass deposition and etching. The spin-on glass coating partially compensates the height differences, i.e. after the spin-on glass coating, the valleys of the topography have a higher coating thickness than the adjacent hills. In a suitable RIE process, the etching rate of the spin-on glass and, for example, Si02, is similar or identical. "Suitable" here in particular means that the pressure, the gas flow, the composition of the gas mixture and the power are chosen accordingly. If the entire spin-on glass coating is etched with RIE after the spin-on glass coating, the height differences have already been reduced by the planarization effect of the spin-on glass coating. By repeating the described steps, the height differences can be further reduced. When depositing the Si02 coating, the consumed Si02 coating thickness must be taken into account in order to achieve the desired Si02 coating thickness after the final etching step. It should be emphasized that the resist planarization is not limited to Si02, but can also be considered for other materials. It is expedient if a material etching rate similar or at least essentially identical to the spin-on glass can be achieved. This is the case for Si02 and spin-on glass. It should be noted that, for example, a material etching rate that differs by a factor of 2 from the spin-on glass etching rate is also possible, in which case several steps are usually required. For example, Hydrogen silsesquioxane and / or polymers can be applied, in particular spin-coated, as liquid material. It vitrifies in a subsequent annealing process, which is why it is also referred to as spin-on glass. Hydrogen silsesquioxane (HSQ) is a class of inorganic compounds with the molecular formula [HSiO 3 / 2 ] n

[0047] In a further advantageous embodiment, the photonic platform comprises at least one further planarization coating. Then, at least one of the planarization coating or (in the case of multiple) the further planarization coating can preferably be made of the same material as the planarization coating. It can also be or be manufactured in the same way as the planarization coating. However, this is to be understood as optional and not limiting.

[0048] The further planarization coating (in the case of multiple) or one of the further planarization coatings can be arranged or manufactured at least one waveguide and / or the planarization coating.

[0049] In the method according to the application, it can be provided accordingly that the at least one further planarization coating is preferably manufactured after the at least one waveguide. The manufacture of the at least one further planarization coating in particular preferably comprises applying, in particular depositing, a coating material to the at least one waveguide and / or the planarization coating on the side facing away from the wafer.

[0050] ​In analogy to the planarization coating, the coating material of the further planarization coating can or has been planarized at least on its side facing away from the wafer, in particular chemically mechanically polished and / or resist planarized. Again, this is or has been preferably done in such a way that a roughness of the side facing away from the wafer of less than 2.0 nm, preferably less than 1.0 nm RMS, particularly preferably less than 0.3 nm RMS is obtained. Also with regard to the at least one further planarization coating, it is preferred that the chemical mechanical polishing and / or resist planarization is done in such a way that a roughness in the range of 2.0 nm RMS to 0.01 nm RMS, preferably in the range of 1.0 nm RMS to 0.01 nm RMS, particularly preferably in the range of 0.3 nm RMS to 0.01 nm RMS is obtained.

[0051] The manufacturing of the planarization coating and / or the further planarization coating can also comprise applying a further coating material to the treated side after the planarization treatment. The treated side can also be referred to as the upper side.

[0052] Furthermore, it can be provided that the planarization coating and / or the further planarization coating or the further planarization coating comprising one or more cover layers, which are preferably provided on the surface treated by planarization, and can be, for example, an aluminum dichloride layer or an aluminum dichloride heterostructure, or also a boron nitride layer. These materials are preferably deposited or transferred without the need for further chemical mechanical polishing or further resist planarization, although it is not excluded that such a treatment is carried out again.

[0053] Of course, the photonic platform can comprise further layers in addition to the one or more planarization coatings and / or the one or more top coatings.

[0054] The coating can comprise only one layer or several layers. The coating can consist of only one material or can comprise several materials. For example, the coating can have two or more layers of two or more different materials. Of course, the coating can also have multiple layers, but they can all be made of the same material. In particular, a coating with more than one layer can be obtained or present because multiple layers, for example multiple atomic layers, are provided or deposited for manufacturing the coating.

[0055] Furthermore, also with regard to the waveguides of the device according to the application, these waveguides are not bonded to the lower coating, but rather in the lower coating, in particular the planarization coating, or also in the wafer manufacturing. For example, the planarization coating provides or has provided a suitable waveguide material, for example in that the planarization coating is built up or deposited, and then, if necessary, can be structured, for example by means of lithography and / or etching, to obtain a waveguide. Lithography preferably comprises applying a light-sensitive resist in a manner known per se, in particular spin-coating and exposure, in particular to ultraviolet light. For the unexposed portions, it is convenient to cover with a mask. After development, the structure on the mask is transferred to the resist coating.

[0056] The waveguide or at least one or all of the waveguides can be embedded in a coating and / or extend between two coatings. For example, one or more waveguides can be considered to be embedded in at least one of a further planarization coating or a further planarization coating. For example, one or more waveguides extending between two coatings and embedded in a coating can be obtained by manufacturing the waveguide on the side of the planarization coating facing away from the wafer, and then manufacturing a further planarization coating on the waveguide, said manufacturing comprising applying, in particular depositing, a coating material on the waveguide and on the uncovered area of the underlying planarization coating.

[0057] In a preferred embodiment, the waveguide or at least one of the waveguides (in the case of several waveguides) of the photonic platform comprises or consists of at least one material which is transparent to electromagnetic radiation of 850 nm and / or 1310 nm and / or 1550 nm wavelength. It is particularly preferred that the material is transparent to electromagnetic radiation in the wavelength range of 800 nm to 900 nm and / or 1260 nm to 1360 nm (short for original band or O-band) and / or 1360 nm to 1460 nm (short for extended band or E-band) and / or 1460 nm to 1530 nm (short for short band or S-band) and / or 1530 nm to 1565 nm (short for conventional band or C-band) and / or 1565 nm to 1625 nm (short for long wave or L-band). These bands are known in the field of communications engineering.

[0058] In further advantageous embodiments, the waveguide or (in various cases) at least one of the waveguides of the photonic platform of the semiconductor device according to the application can comprise or consist of titanium dioxide and / or aluminum nitride and / or tantalum pentoxide and / or silicon nitride and / or aluminum oxide and / or silicon oxynitride and / or lithium niobate and / or silicon, in particular polysilicon and / or indium phosphide and / or gallium arsenide and / or indium gallium arsenide and / or aluminum gallium arsenide and / or at least one dichalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a chalcogenide glass and / or a resin or resin-containing material, in particular SU8, and / or a polymer or polymer-containing material, in particular OrmoComp, or consist of one or more of these materials. In the method according to the application, preferably at least one waveguide is manufactured which comprises or consists of one of these materials or consists of a combination of one or more of these materials.

[0059] The at least one waveguide advantageously comprises or consists of a material whose refractive index differs from the refractive index of the material or materials of the planarization coating and / or the further planarization coating, if present. In particular if the at least one waveguide has a common interface with the planarization coating and / or the further planarization coating.

[0060] Purely exemplary refractive index pairs comprise 3.4 (Si) for the waveguide and 1.5 (Si02) for the planarization coating, or in the case of a dielectric, 2.4 (Ti02) for the waveguide and 1.5 (Si02) for the planarization coating or 2 (SiN) for the waveguide and 1.47 for the planarization coating.

[0061] If at least one further planarization coating is provided, it can also be suitable for the further planarization coating, i.e. it consists of or comprises a material whose refractive index differs from the material of the at least one waveguide. This applies in particular to the case of contact with the at least one waveguide, i.e. having or forming a common interface with the latter.

[0062] It is particularly preferred that the refractive index of the waveguide material is at least 20%, preferably at least 30% greater than the refractive index of the material of the planarization coating and / or the further planarization coating.

[0063] In other words, in these embodiments a refractive index contrast has been or is being achieved between the at least one waveguide and the planarization coating and / or the at least one waveguide and the further planarization coating, if present.

[0064] A waveguide is an element or component that guides electromagnetic waves, in particular light. To guide the electromagnetic waves, a wavelength-dependent cross section of a material is advantageously provided, which is optically transparent at least for this wavelength and which is distinguished from adjacent materials that are also transparent for this wavelength by a refractive index contrast. If the refractive index of the surrounding material is lower, light is guided in regions of higher refractive index. For the special case of a slot mode, two regions of high refractive index are separated from a low refractive index region that is relatively narrow with respect to the wavelength, and light is guided in the low refractive index region. To achieve low scattering losses, a low sidewall roughness is advantageous.

[0065] With regard to the dimensions of the waveguide, the following can be particularly applicable. The thickness is preferably in the range of 150 nanometers to 10 micrometers. The width and the length of the waveguide, i.e. the lateral extent parallel to the wafer surface, can in particular be in the range of 100 nanometers and 10 micrometers.

[0066] For example, one or more waveguides can be designed as strip waveguides, which are characterized by having a rectangular or square cross section. Alternatively or additionally, one or more waveguides can be formed as ridge waveguides having a T-shaped cross section. Further alternatively or additionally, one or more waveguides can be given by a slotted waveguide.

[0067] One or more waveguides of a device according to the application can comprise (for example from a cross-sectional view) several sections or segments and can be formed in several sections, for example comprising or consisting of a first segment (for example lower or left) and a second segment (for example upper or right), in other words, a part or parts. One or more waveguide segments can have a rectangular or square cross section. If the waveguide comprises or consists of two or more segments, these segments can be adjacent or merged with one another or can be spaced apart from one another, for example forming a gap or a groove.

[0068] A photonic platform provided according to the application advantageously comprises a plurality of waveguides. It can then be further provided that at least two waveguides extend at least in sections one above the other. In other words, there are two or more waveguide planes, or are "stacked" on one another, whereby space can be further saved and more complex circuits with extended functionality can be obtained.

[0069] Furthermore, passive structures can be made from waveguides, for example multimode interference couplers (MMI), i.e. interference-based 50:50 splitters, or directional couplers, or directional couplers in which two waveguides run alongside one another over a certain length and couple light from one to the other. For example, a Mach-Zehnder interferometer (2x 50 / 50 MMI as splitter with two arms in between) can also be obtained.

[0070] Further embodiments feature that the photonic platform comprises, in addition to the at least one electro-optical device, at least one optical device, in particular at least one interferometer, e.g. a Mach-Zehnder interferometer, and / or at least one interference coupler, e.g. a multimode interference coupler, and / or at least one directional coupler and / or at least one polarization converter and / or at least one optical splitter and / or at least one ring resonator. The at least one optical device preferably comprises or is formed by one or more waveguides and / or waveguide sections. In particular, the optical device can comprise or consist of only a section or portion of a waveguide, respectively, seen in the longitudinal direction of the waveguide. An optical device formed as a ring resonator, the optical device advantageously comprises a preferably independent, ring-shaped waveguide forming the resonator, and a preferably straight waveguide section coupled to the waveguide. The coupling can be achieved by a directional coupler, which preferably comprises or is formed by a region in which the distance between the ring-shaped waveguide and the straight waveguide section is such that light is coupled between the two.

[0071] Thus, the method according to the present application features the fabrication of at least one optical device, in particular at least one interferometer, e.g. a Mach-Zehnder interferometer, and / or at least one interference coupler, e.g. a multimode interference coupler, and / or at least one directional coupler and / or at least one polarization converter and / or at least one optical splitter and / or at least one ring resonator.

[0072] Further, the photonic platform can comprise one or more thermo-optical devices. Such a device comprises e.g. a heating element and a section of a waveguide in the longitudinal direction of the waveguide, the heating element being arranged relative to the waveguide section such that it can heat the waveguide section. For example, the heating element can be an element that increases in temperature when an electric current is passed through it. For example, the heating element can be arranged in the vicinity of the waveguide. Heating the waveguide by the heating element can change the refractive index of the waveguide. For example, this effect can be used for phase matching. The thermo-optical device can also be associated with or form part of an interferometer of the photonic platform.

[0073] In further embodiments, the photonic platform has a passivation coating and / or cladding on its side facing away from the wafer. The photonic platform is preferably terminated by the passivation coating and / or cladding. In other words, the passivation coating and / or cladding form the last or top coating of the photonic platform.

[0074] The cladding is in particular adapted or designed such that the refractive index contrast is slightly lower so that the roughness of the sidewall does not have too much influence; typically the losses return into the waveguide.

[0075] The passivation coating is preferably used to protect the device or the electrical circuit from the environment, in particular from water. For example, the passivation coating can consist of a dielectric material. Aluminum oxide (AI2O3) and silicon dioxide (SiO2) have proven to be particularly suitable.

[0076] The final passivation coating of the upper layer advantageously has openings or interruptions to the contacts of the lower layer to enable electrical connections. The openings or interruptions in the passivation coating can or have been obtained by, for example, lithography and / or etching, in particular reactive ion etching.

[0077] Reactive ion etching is a dry etching process in which the substrate surface is selectively and directionally etched, usually by means of a special gas chemistry that is excited to form a plasma. Resist masks can be used to protect parts that are not to be etched. The etching chemistry and process parameters usually determine the selectivity of the process, i.e. the etching rates of different materials. This property is crucial for limiting the depth of the etching process and thus defining the coatings from one another.

[0078] In a further advantageous embodiment, the semiconductor device according to the application is characterized in that the back-end-of-line of the wafer and the photonic platform comprises interconnect elements, at least one of the integrated circuits of the wafer or the integrated circuits being connected to at least one of the electro-optical devices of the photonic platform by the interconnect elements.

[0079] Thus, in the method according to the application, in an advantageous further development, it can be provided that the back-end-of-line of the provided wafer comprises interconnect elements connected to at least one of the integrated circuits of the front-end-of-line, and that the interconnect elements are manufactured in the connected photonic platform, the interconnect elements being connected to the interconnect elements of the back-end-of-line on the one hand and to at least one of the electro-optical devices on the other hand.

[0080] The interconnect elements can in particular be vertical electrical interconnects, also known in English as vertical interconnects or Via or VIA. The VIA is usually defined by means of lithography and dry-chemical etching using RIE. After that, the metallization is preferably structured, and the metallized surface is structured by means of CMP (damascene process) or by means of lithography and RIE.

[0081] The interconnect elements advantageously comprise or consist of at least one electrically conductive material, in particular a metal, for example copper and / or aluminum and / or tungsten.

[0082] In a further embodiment, the electro-optical devices or at least parts thereof can also or have been manufactured on one or more waveguides and / or on the side of the planarization coating of the wafer and / or on the side of a further planarization coating of the wafer, if present.

[0083] The electro-optical devices of the semiconductor device according to the application can in principle be any device designed to generate and / or emit and / or receive optical signals. In particular, the electro-optical devices can or can be devices for optical data communication, and / or spectrometers, and / or tunable electro-optical filters and / or switches and / or attenuators, in particular for machine learning. Nonlinear optical elements can also be included.

[0084] The electro-optical device designed as a filter can comprise, for example, a ring resonator, preferably in combination with a modulator.

[0085] In practical embodiments, the electro-optical device or, in the case of a plurality, at least one or each electro-optical device comprises at least two contacts or contact elements, in particular for contacting the active element or, in each case, the active element with the interconnection element.

[0086] Preferably, the electro-optical device or, in the case of a plurality, at least one or each electro-optical device further comprises at least one active element. In addition to the at least one active element, the electro-optical device can comprise a section of a waveguide, in particular a longitudinal section. The active element of the electro-optical device or a section thereof can also form a waveguide or at least a section, in particular a longitudinal section, of a waveguide. It is also possible that several, for example two, active elements or sections thereof together form a waveguide or a section, in particular a longitudinal section, of a waveguide, for example a ridge waveguide. Advantageously, then, the active element or elements consist of a material that is transparent to electromagnetic radiation of at least one wavelength, preferably at least one wavelength range. Preferably, then, at least one material is applied that is transparent to electromagnetic radiation of 850 nm and / or 1310 nm and / or 1550 nm wavelength. Particularly preferably, the material is transparent to electromagnetic radiation of a wavelength range of 800 nm to 900 nm and / or 1260 nm to 1360 nm (short for original band or O band) and / or 1360 nm to 1460 nm (short for extended band or E band) and / or 1460 nm to 1530 nm (short for short band or S band) and / or 1530 nm to 1565 nm (short for conventional band or C band) and / or 1565 nm to 1625 nm (short for long wave or L band).

[0087] If at least one active element is provided, it is preferred that the active element comprises or consists of at least one material that absorbs electromagnetic radiation of at least one wavelength, preferably of at least one wavelength range, and that generates an electro-optical signal due to the absorption and / or its refractive index changes with the presence of a voltage and / or an electric charge and / or an electric field. Preferably, then, materials are suitable that can absorb electromagnetic radiation of a wavelength of 850 nm and / or 1310 nm and / or 1550 nm and generate an optical signal due to the absorption. Particularly preferred, the material can absorb electromagnetic radiation of a wavelength range of 800 nm to 900 nm and / or 1260 nm to 1360 nm (short for original band or O-band) and / or 1360 nm to 1460 nm (short for extended band or E-band) and / or 1460 nm to 1530 nm (short for short band or S-band) and / or 1530 nm to 1565 nm (so-called conventional band or short C-band) and / or from 1565 nm to 1625 nm (short for long band or L-band) and can generate an optical signal due to the absorption.

[0088] A change in the refractive index of the material is to be understood in particular as a change in its dispersion (in particular the refractive index) and / or the absorption. The dispersion or the refractive index is generally given by the real part of the complex refractive index, while the absorption is given by the imaginary part of the complex refractive index. Materials whose refractive index changes with the presence of a voltage and / or an electric charge and / or an electric field are understood herein as materials that have the characteristics of the Pockels effect and / or the Franz-Keldysh effect and / or the Kerr effect. In addition, materials with plasmonic dispersion effects are also considered to be such materials.

[0089] Exemplary materials for the active element are graphene, graphene possibly chemically modified, and / or germanium and / or lithium niobate and / or electro-optical polymers and / or silicon and / or compound semiconductors, such as III-V semiconductors and / or II-VI semiconductors, and / or dichalcogenides, in particular two-dimensional transition metal dichalcogenides, and / or heterostructures of two-dimensional materials. Thus, 2D materials other than graphene are also possible, optionally and additionally. Electro-optical polymers are to be understood in particular as polymers with a strong linear electro-optical coefficient (Pockels effect). A strong linear electro-optical coefficient is preferably understood to mean a value of at least 150 pm / V, preferably at least 250 pm / V. The electro-optical coefficient is at least five times that of lithium niobate.

[0090] There are different dichalcogenides. In the context of the present application, transition metal dichalcogenides have proven to be particularly suitable as two-dimensional materials, such as MoS2 or WSe2.

[0091] It should be noted that lithium niobate and electro-optic polymers are based on electro-optic, in particular Pockels effect, i.e. the electric field changes the refractive index (e.g. Pockels effect is applied to Pockels cells). In germanium it is Franz-Keldysh effect, i.e. the field moves the valence and conduction band edges relative to each other, thereby changing the optical properties. These effects are based on field effects. For silicon or graphene it is plasmonic dispersion effect based on charge carriers, i.e. charge carriers (electrons or holes) are introduced into the optical mode region (either in a device with a charged capacitor or a diode with a junction that is depleted and enriched). The refractive index (real part of the refractive index) and the absorption (imaginary part of the refractive index, leading to free carrier absorption) change with the charge carrier concentration.

[0092] III-V semiconductors are compound semiconductors composed of elements of main group III and V in a manner known per se. II-VI semiconductors are compound semiconductors composed of elements of main group II or group 12 and main group VI.

[0093] Among other materials, graphene has proven to be a particularly suitable material for active elements of electro-optical devices of the semiconductor device of the present application.

[0094] Many materials are characterized in that their refractive index changes with the presence of a voltage and / or an electric charge and / or an electric field, and that they absorb at least one wavelength of electromagnetic radiation and generate a photoelectric signal as a result of the absorption. This is the case, for example, with graphene. Graphene is therefore suitable as an active element for photodetectors and modulators. This also applies to dichalcogenides, such as two-dimensional transition metal dichalcogenides, heterostructures of two-dimensional materials, germanium, silicon, and compound semiconductors, in particular III-V semiconductors and / or II-VI semiconductors. Lithium niobate, for example, is generally only suitable for modulators. Since it is transparent, it does not have absorption properties and is therefore not suitable for photodetectors.

[0095] The at least one active element of the one or more electro-optical devices can be in the form of a film. The film is preferably characterized in a manner known per se, with a lateral extent that is significantly greater than the thickness. The at least one active element of the one or more electro-optical devices can also have a square cross-section or a rectangular cross-section.

[0096] The one or more active elements can comprise or can be formed from one or more layers or coatings of at least one material whose refractive index changes and / or whose absorption changes. In particular, it can be provided that the at least one active element is formed as a film comprising a plurality of coatings or layers of one or different materials.

[0097] A graphene film, possibly chemically modified graphene, or a dichalcogenide-graphene heterostructure consisting of at least one layer of graphene and at least one layer of dichalcogenide, or an array of at least one layer of boron nitride and at least one layer of graphene, has proven to be particularly suitable.

[0098] For example, the active element can also comprise or be provided by one or more silicon coatings. In this case, in particular, the one or more active elements or parts thereof can form a waveguide (part).

[0099] The active element can further be doped or have doped parts or regions, for example p-doped and / or n-doped or comprise corresponding parts or regions. There can also be or be provided p-doped regions and n-doped regions as well as preferably an intermediate undoped region. This is also referred to as pin diode, where i stands for intrinsic, i.e. undoped.

[0100] Further advantageous embodiments are characterized in that an active element is provided which has a p-doped region and an n-doped region, the two doped regions being adjacent to each other or an undoped region being located between them, and the two doped regions, optionally together with a possible intermediate undoped region, jointly form a waveguide or a part of such a waveguide.

[0101] Furthermore, an element or coating of an electro-optical polymer can be arranged between two active elements, for example active elements of doped silicon.

[0102] Furthermore, it can be provided that, in order to obtain active elements for a plurality of electro-optical devices, at least one film or coating (with one or several layers) is provided or has been provided, for example deposited, which optionally extends over the entire lateral extent of a wafer, and from this large film a plurality of smaller film-like or coating-like active elements for a plurality of devices adjacent to each other in one plane are obtained or have been obtained by a suitable structuring process, which can include, for example, photolithography and / or etching. Thus, by relatively little effort, a plurality of active elements can be obtained for many electro-optical devices.

[0103] Optionally or additionally, the active element or at least one of the active elements can be or has been provided by a transfer process. This means in particular that the individual elements are not monolithically manufactured on a wafer or on a coating thereon, but are manufactured separately and then transferred, in other words have been transferred. For example, a transfer process for graphene is described in the paper "Large-Area Synthesis of High-Quality and Uniform Graphene Films on Copper Foils" by Li et al., Science 324, 1312, (2009) and in "Roll-to-roll production of 30-inch graphene films for transparent electrodes" by Bae et al., Nature Nanotech 5, 574-578 (2010) or for LiNbO by the paper "Integrated lithium niobate electro-optic modulators operating at CMOS-compatible voltages", Nature volume 562, page 101104 (2018) or in particular for GaAs by the paper "Transfer print techniques for heterogeneous integration of photonic components", Advances in Quantum Electronics, Volume 52, March 2017, pages 1-17. One of these methods can also be used in the context of the present application to obtain one or more graphene or LiNbO or GaAs coatings / films.

[0104] The structuring can also follow a transfer process.

[0105] In a further embodiment, it is provided that at least one of the electro-optical device or the electro-optical device is provided by a modulator comprising an active element comprising or consisting of at least one material whose refractive index changes with the presence of a voltage and / or an electric charge and / or an electric field, and an active element or an electrode comprising or consisting of at least one material whose refractive index changes with the presence of a voltage and / or an electric charge and / or an electric field or electrode, the two active elements or the active element and the electrode preferably being spaced apart from each other and arranged offset to each other such that they are located one above the other in sections. The at least one respective material of the one or both active elements can be graphene and / or at least one chalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a heterostructure of two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optical polymer and / or silicon and / or at least one compound semiconductor, in particular at least one III-V semiconductor and / or at least one II-VI semiconductor.

[0106] In other words, one active element and one regular electrode are sufficient as a replacement for the two active elements. In particular, the electrode does not comprise at least one material whose refractive index changes, or does not comprise such a material, but comprises at least one electrically conductive material. If the electrode is provided instead of one of the active elements, it can be in the form of a film, possibly with multiple layers, for example a single-layer or multi-layer metal film, similar to the active elements.

[0107] Likewise in the case of the modulator, the active element preferably comprises graphene, optionally chemically modified graphene and / or at least one chalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a heterostructure of two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optical polymer and / or silicon and / or at least one compound semiconductor, in particular at least one III-V semiconductor and / or at least one II-VI semiconductor.

[0108] Preferably, the two active elements or the active element and the electrode are arranged offset to each other at a distance from each other and / or arranged offset to each other such that they are located one above the other in sections. In other words, then a section of one active element is aligned or overlaps with a section of the other active element or the electrode, if necessary even without these contacts. Preferably, at least in the region located above the other, in other words in the region of overlap, the two active elements or the active element and the electrode or the electrode extend at least substantially parallel to each other.

[0109] Furthermore, in the case of the modulator with one or two active elements and a regular electrode, it is also possible for the respective active element or the active element and the electrode to be formed as a film.

[0110] The electro-optical modulator can in particular be used for the coding of optical signals. The electro-optical modulator can also be designed as a ring modulator.

[0111] Optionally or additionally, the electro-optical device or at least one of the electro-optical devices can be given by a photodetector comprising one, preferably exactly one, active element, which comprises or consists of at least one material that absorbs electromagnetic radiation of at least one wavelength, preferably of at least one wavelength range, and generates a photoelectric signal as a result of the absorption, in particular graphene and / or at least one dichalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a heterostructure of a two-dimensional material and / or germanium and / or silicon and / or at least one compound semiconductor, in particular at least one III-V semiconductor and / or at least one II-VI semiconductor.

[0112] In the photodetector, at least one electro-optically active material is used for the absorption of light.

[0113] In particular, the photodetector can be used to convert a signal from the optical world back into the electronic world.

[0114] The electro-optical device or at least one of the electro-optical devices (in the case of modulators and detectors) can further be designed or (in the case of the method according to the application) be produced by plasmonic coupling.

[0115] Then, advantageously, at least one plasmonic structure is arranged on or above the active element or at least one of the active elements, which comprises or consists of a plasmonic active material, preferably gold and / or silver and / or aluminum and / or copper. The plasmonic structure preferably comprises at least one pair of plasmonic elements arranged next to each other and comprising or consisting of a plasmonic active material. The plasmonic elements can be characterized by a portion tapering in the direction of the respective other plasmonic element. For example, the plasmonic elements can be characterized by a triangle.

[0116] Preferably in the case of a modulator, elongated plasmonic elements can also be provided. The elongated plasmonic elements can / have been arranged at least substantially parallel to the waveguide. Then, in other words, the optical and plasmonic waveguides are guided in parallel through the active element, as described by Zhu et al. in "Efficient electro-optic modulation in low-loss graphene-plasmonic slot waveguides", Optics Communications (2019), doi: https: / / doi.org / 10.1016 / j.optcom.2019.124559.

[0117] The responsivity of photodetectors, in particular including graphene, can be enhanced by plasmonic enhanced absorption. For example, plasmonic structures are fabricated on graphene channels and disposed as active elements in waveguides as described by Ma et al. in "Plasmonically Enhanced Graphene Photodetector Featuring 100 Gbit / s Data Reception, High Responsivity, and Compact Size", ACS Photonics 2019, 6, pp. 154-161 (2018). The density fluctuations of the resonance in the plasmonic structure are excited by the optical mode. This collective movement of the electron distribution is called plasmon and propagates in the plasmonic structure. Characteristics include higher electric field strength compared to the optical mode. This enables a stronger absorption capacity of the graphene or generally of the absorbing material.

[0118] It can further be provided that the waveguide, on at least one side of the active element or of at least one of the active elements, has a tapered end portion in the direction of the active element or of the at least one active element, preferably ending in a tip. The tapered end portion can extend up to the active element or the at least one active element. Alternatively or additionally, a contact element can be provided on each of the two sides of the tapered portion, the contact element being connected to the active element and having a portion tapering in the opposite direction and being adjacent to the tapered end portion of the waveguide.

[0119] It can further be provided that the waveguide, on at least one side of the active element or of at least one of the active elements, has a tapered end portion in the direction of the active element or of the at least one active element, preferably ending in a tip. The tapered end portion can extend up to the active element or the at least one active element. Alternatively or additionally, a contact element can be provided on each of the two sides of the tapered portion, the contact element being connected to the active element and having a portion tapering in the opposite direction and being adjacent to the tapered end portion of the waveguide.

[0120] In particular, in this embodiment it can also be provided that the active element comprises or consists of at least one electro-optical polymer (see also the publication by Koos et al. "Silicon-Organic Hybrid (SOH) and Plasmonic-Organic Hybrid (POH) Integration", Journal of Lightwave Technology, Vol. 34, No. 2, 2016).

[0121] In other words, plasmonic coupling can also occur without a waveguide below the absorbing material, i.e. a conversion of the optical mode into a plasmonic mode occurs, which then interacts with the absorbing material. This is also described in the publication by Ding, Y., Cheng, Z., Zhu, X. et al. "Ultra-compact integrated graphene plasmonic photodetector with bandwidth above 110GHz" (in the context of a photodetector), Nanophotonics, doi: 10.1515 / nanoph-2019-0167. In the context of a modulator, reference is further made to the publication by Ding et al. "Efficient electro-optic modulation in low-loss graphene-plasmonic slot waveguides", Nanoscale, 2017, 9, 15576.

[0122] In particular, as a modulator, the electro-optical device can alternatively or additionally further comprise two active elements, each given by a silicon film or coating. For example, the active element can be one coating or a film comprising or consisting of polysilicon, it can be a film comprising or consisting of crystalline silicon. It can also be two active elements each comprising or consisting of polysilicon. Of these two active elements, one is preferably p-doped and the other is preferably n-doped. The different doping creates a capacitance. The two active elements are then preferably arranged offset to each other such that they overlap in the section. The overlapping region then preferably forms a waveguide or waveguide section. By applying a voltage, the charge carrier concentration of the region of the waveguide or waveguide section can be changed, i.e. in the operation of the optical mode, so that the optical signal can be encoded. A corresponding silicon-based modulator is also described in the paper by M. Webster et al. "An efficient MOS-capacitor based silicon modulator and CMOS drivers for optical transmitters", pages 1-2, 11th International Conference on Group IV Photonics (GFP), Paris, 2014, doi: 10.1109 / Group4.2014.6961998.

[0123] When the electro-optical device or at least one of the electro-optical devices is or becomes a modulator, it can further be provided that it comprises a diode or a capacitor. In particular, it can be an integrated III-V semiconductor modulator as described in the paper "Heterogeneously integrated III-V / Si MOS capacitor Mach-Zehnder modulator" by Hiaki, Nature Photonics, Volume 11, pages 482-485 (2017).

[0124] If a diode has been provided for the electro-optical device or at least one of the electro-optical devices, it can comprise, for example, a plurality of coating layers of different compositions, for example InGaAsP, in particular for creating a pn junction and two contact areas.

[0125] For example, the active element and the electrode, if applicable, of the electro-optical device can be arranged on the side of the planarization coating facing away from the wafer, or on a further planarization coating, in particular manufactured for the waveguide. The respective element can be connected to a contact or contact element on the side or the opposite side, respectively. The contact or contact element can be connected to the one or more electronic components from the front-end-of-line by means of an interconnection element, in particular a VIA. The interconnection element, in particular the VIA, can extend through the planarization coating, the further planarization coating, if present, and the semiconductor substrate to the one or more electronic elements. By connection is to be understood in particular an electrically conductive connection.

[0126] It is noted that, in particular in the case of a detector with only one active element, it can be provided that the active element, in particular for connection to the one or more electronic elements from the front-end-of-line, is in contact with two contacts or contact elements, preferably on opposite sides, and in the case of a modulator with two active elements or one active element and one electrode, it is provided that each of these elements, in particular for connection to the one or more electronic elements from the front-end-of-line, is in contact with one contact or contact element. Preferably, this is the case in those end regions, or in the end regions facing away from the region in which the elements overlap.

[0127] It is also possible to arrange at least one active element on the side of the one or more waveguides facing away from the wafer. This offers the advantage that the active element is closer to the waveguide. Then, more interaction between the active element and the optical mode in the waveguide can be achieved. Furthermore, since no further planarization coating is required in this case, a shorter assembly can be obtained and fewer process steps are required.

[0128] In another embodiment, the active element is arranged on the side of the one or more control electrodes facing away from the wafer, preferably on the side of the one or more control electrodes facing away from the wafer, the control electrode or the control electrodes being successively manufactured on the side of the one or more waveguides facing away from the wafer.

[0129] It should be noted that the side of the element facing away from the wafer can also be referred to as the side of its upper part. For example, the side of the planarization coating, the further planarization coating, the waveguide, the waveguide base, the deposited material, the graphene film, the control electrode and / or the photonic platform facing away from the wafer can also be referred to as the side of the upper part.

[0130] For modulators with two active elements or one active element and one electrode, it is also possible to provide a passivation coating between the two active elements or between the active element and the electrode. The passivation coating advantageously consists of a dielectric material. The passivation coating can therefore also be referred to as a dielectric coating. It can at the same time form an etch protection. Oxides or nitrides are particularly suitable materials for such a coating. Aluminum oxide, silicon nitride and hafnium oxide have proven to be particularly suitable. If a passivation coating is provided between the two active elements or between the active element and the electrode, there is preferably a sandwich-like structure with the active element, the passivation coating and the active element or the electrode, the two active elements or the active element and the electrode preferably being laterally offset from one another.

[0131] It is also possible for the active element and the electrode, if any, of the at least one electro-optical device to extend in part of the one or more waveguides and in part of the one or more planarization coatings or further planarization coatings or the one or more control electrodes.

[0132] Furthermore, it is possible to at least partially, and possibly completely, provide the one or more active elements within or in at least one of the waveguides or between two parts of the waveguide.

[0133] The active element or at least one of the active elements is advantageously arranged with respect to the at least one waveguide such that it is at least partially exposed to the evanescent field of the electromagnetic radiation guided by the waveguide. Preferably, the at least one active element is arranged at a distance of less than or equal to 50 nm, more preferably less than or equal to 30 nm, for example 10 nm, from the at least one waveguide.

[0134] In the waveguide, parts of the electromagnetic radiation, in particular light, are guided evanescently outside the waveguide. The interface of the waveguide is dielectric, so the intensity distribution is described by Maxwellian exponential decay boundary conditions. If an electro-optically active material, for example graphene, is brought into the waveguide or in the vicinity of the waveguide in the evanescent field, photons can interact with the electro-optically active material, in particular graphene.

[0135] The photodetector expediently has an active element which comprises or consists of at least one such material and two contacts.

[0136] There are four effects in graphene that lead to a photocurrent. One is the bolometric effect, according to which the absorbed energy increases the resistance of the graphene and reduces the applied direct current. The change in the direct current is the optical signal. Another effect is the photoconductivity. Here, because the resistance is proportional to the charge carrier concentration, the absorbed photons lead to an increase in the charge carrier concentration, and the additional charge carriers reduce the resistance of the graphene. The applied direct current increases, and its change is the optical signal. There is also the thermoelectric effect, according to which a thermoelectric voltage arises from the pn junction and the temperature gradient at the junction due to the different Seebeck coefficients of the p and n regions. The temperature gradient arises from the energy of the absorbed optical signal. This thermoelectric voltage is the signal. The fourth effect is that the electron-hole pairs excited at the pn junction are separated. The resulting photo current is the signal.

[0137] As mentioned above, in the case of a modulator, an electrical control electrode and an active element suitably insulated for this purpose can be provided, which comprises or consists of at least one material, in particular graphene, whose refractive index changes with a change in voltage or charge or electric field, or the electrode can also be made of a corresponding material, in particular graphene, so that in operation the two active elements are combined in the evanescent field and perform an electro-optical function. For example, graphene can change its optical properties by a control voltage. In the case of a graphene-dielectric-graphene arrangement, in particular, a capacitance arises, and the two films of graphene influence each other. The voltage charges the capacitance consisting of the graphene electrodes, which form the two active elements, and the electrons occupy states in the graphene. This leads to a shift of the Fermi energy, the energy of the last occupied state in the wafer, to higher energies (or to lower energies due to symmetry). When the Fermi energy reaches half the photon energy, they are no longer absorbed because the free states required for the absorption process are already occupied at the correct energy. Thus, in this state, the graphene is transparent because the absorption is forbidden. By changing the voltage, the graphene is switched back and forth between absorption and transparency. By modulating the intensity of a continuous-wave laser beam, it can be used for information transmission. Likewise, the real part of the refractive index changes with the control voltage. By changing the voltage, the phase of the laser can be modulated by changing the refractive index, so that a phase modulation is achieved. Preferably, the phase modulation is operated in a range in which all states are occupied above half the photon energy, so that the graphene is transparent and the real part of the refractive index is significantly shifted, and the change in absorption plays a minor role.

[0138] The electro-optical device or at least one electro-optical device can further comprise at least one, preferably two gate electrodes. In particular, in the case of an electro-optical device embodied as a photodetector, two gate electrodes can preferably be assigned to the active element. These gate electrodes are then preferably embodied and arranged in such a way that the charge carrier concentration in the active element, for example a graphene film, can be adjusted by means of these gate electrodes, so that, for example, a pn transition can be obtained. The gate electrodes are then preferably arranged at an appropriate distance from the active element and are electrically insulated from the active element, for example by means of a dielectric coating. The active element can be arranged on the dielectric coating and the gate electrodes are arranged on said dielectric coating.

[0139] A further particularly advantageous embodiment is characterized in that the semiconductor device according to the application, in particular its photonic platform, comprises at least one coupling device, which is associated with at least one, preferably exactly one, waveguide. The (respective) coupling device is then expediently used for coupling electromagnetic radiation, in particular electromagnetic radiation in the infrared and / or visible wavelength range, into and / or out of the at least one waveguide of the photonic platform associated with the (respective) coupling device. For this purpose, the coupling device can be appropriately embodied and arranged. It should be noted that for silicon photonics, due to the bandgap, it is generally only applicable in the infrared wavelength range, since all wavelengths shorter than 1100 nm are absorbed by silicon. This is generally not the case for dielectrics, which are also transparent in the visible wavelength range, which is why they are very suitable for spectroscopy.

[0140] It is particularly preferred that the coupling device or at least one of the coupling devices is embodied and arranged in such a way that electromagnetic radiation, in particular electromagnetic radiation in the infrared and / or visible wavelength range, can be coupled into at least one of the waveguides of the photonic platform from an optical fiber by means thereof and / or that said electromagnetic radiation, in particular electromagnetic radiation in the infrared and / or visible wavelength range, can be coupled into an optical fiber from at least one of the waveguides of the photonic platform by means thereof. Optical fibers generally have a larger diameter than waveguides, and the coupling device will further preferably be configured to enable coupling in and / or out in this case.

[0141] The coupling device can comprise a portion of the waveguide associated therewith, in particular an end portion, which is tapered or widened towards the end.

[0142] In a further detailed description, the at least one coupling device can have at least one grating structure, which is then designed and arranged in particular in its first diffraction order in the manner of a waveguide associated therewith. Such a coupling device can also be referred to simply as a grating coupling device or grating coupler. With regard to the design and operation of a grating coupler, reference is also made to the article "CMOS-compatible high efficiency double-etched apodized waveguide grating coupler", Optics Express 21, 7868-7874 2013.

[0143] If the at least one coupling device is provided by a grating coupler, it is further preferred that it comprises or is assigned a reflector. A reflector is particularly suitable because its arrangement can achieve maximum coupling. If there is no reflector, the interface between the back-end-of-line and the planarization coating usually automatically forms a reflector due to the presence of a refractive index jump. A reflector is also particularly advantageous if a grating coupler is provided, because this case (compared to the case of the interface) is precisely defined. For example, a metal foil or a thin metal coating or a dielectric coating stack can be used as a reflector, thereby creating a Bragg reflector.

[0144] The reflector is preferably arranged at the planarization coating. The reflector can consist of a metal, for example aluminum, and / or have a rectangular shape and / or be slightly larger than the grating coupler and / or be arranged at an appropriate distance, preferably below, from the grating coupler.

[0145] Alternatively or additionally, at least one of the coupling devices can be designed as a side coupling device (short: side coupler). The coupling device then advantageously has at least one coupling element, which is realized and arranged in such a way that electromagnetic radiation can be coupled in and / or out of the coupling element laterally. Lateral in particular means lateral with respect to the lateral extent of the wafer, in particular with respect to the side of the wafer facing away from the front-end-of-line.

[0146] With regard to the design and operation of a grating coupler, reference is also made to the article "Ultra-low-loss inverted taper coupler for silicon-on-insulator ridge waveguide", Optics Communications Volume 283, Issue 19, October 2010, Pages 3678-3682.

[0147] The grating coupling device can also be designed and arranged in such a way that the electromagnetic radiation to be coupled in can be incident from (oblique) above, in particular onto its grating, or the electromagnetic radiation to be coupled out is coupled out from (oblique) above, in particular from its grating. It can also be preferred to be implemented and arranged in such a way that the coupling can take place at an angle in the range of 0° to 30°, in particular 10°, with respect to the perpendicular to the side facing away from the front-of-line process of the wafer or device according to the application.

[0148] Compared to a side-coupler, a grating coupler with radiation entering or leaving from (oblique) above typically has the advantage that its functionality can be checked before dicing. On the other hand, in the case of a side-coupler, the side or edge of the element into which the electromagnetic radiation is to enter or from which it is to leave can not be exposed until after dicing, so that testing can only be carried out after dicing.

[0149] In a further development, at least two coupling devices can be provided, at least one being a side-coupling device (short: side-coupler) and at least one being a grating-coupling device (short: grating-coupler). If both types of couplers are provided, the grating-coupler can be used during the manufacturing process to measure the component, and then the side-coupler is used when everything is ready. Preferably, at least one waveguide has two couplers associated with it, one of each type.

[0150] The one or more coupling means are preferably manufactured together with the at least one waveguide associated with them. The manufacturing method can comprise defining them by means of photolithography (similar to the waveguide) and structuring them by means of etching, in particular dry-chemical etching.

[0151] The application also relates to a method for manufacturing at least one semiconductor device, said device having a semiconductor device according to the application provided therein and said device being fragmented, in other words diced. By means of the singulation / dicing, at least one chip, typically a plurality of chips, is obtained, on which the photonics is built, each chip representing a semiconductor device according to the application. This "bare" chip or these "bare" chips with photonics can be inserted into a package, respectively. It should be noted that the semiconductor device according to the application comprises a conventional chip with an integrated circuit and the part of the photonics platform built thereon, which can also be referred to as a chip.

[0152] Another object of the application is to provide a semiconductor device obtained by singulation, in other words dicing, of a semiconductor device according to the application.

[0153] A semiconductor device according to the application, obtained by dicing a semiconductor component according to the application, is characterized in that the lateral extent of the photonic platform or of the part thereof is at least substantially identical to the lateral extent of the underlying chip or semiconductor substrate. The photonic platform or the part thereof has the shape and extension thereof obtained by dicing as the underlying substrate.

[0154] It is possible to provide a housing which surrounds the semiconductor device. In this case, the device side on which the front-end process is located is preferably in contact with the interior of the housing. BRIEF DESCRIPTION OF DRAWINGS

[0155] Reference is made also to the dependent claims and to the following description of several embodiments with reference to the accompanying drawings, which are meant to explain the application.

[0156] As shown in the figures:

[0157] Fig. 1 shows a top view of an embodiment of a semiconductor device according to the application in a purely schematic representation;

[0158] Fig. 2 shows a partial sectional view of the semiconductor device of Fig. 1 in a purely schematic representation;

[0159] Fig. 3 shows a top view of the light detector in Figs. 2, 4 and 5 in a purely schematic representation;

[0160] Fig. 4 shows a partial sectional view of a second embodiment of a semiconductor component according to the application in a purely schematic representation;

[0161] Fig. 5 shows a partial sectional view of a third embodiment of a semiconductor component according to the application in a purely schematic representation;

[0162] Fig. 6 shows a partial sectional view of a fourth embodiment of a semiconductor component according to the application in a purely schematic representation;

[0163] Fig. 7 shows a partial sectional view of a fifth embodiment of a semiconductor component according to the application in a purely schematic representation;

[0164] Fig. 8 shows a partial sectional view of a sixth embodiment of a semiconductor component according to the application in a purely schematic representation;

[0165] Fig. 9 shows a top view of the modulator of Fig. 8 in a purely schematic representation;

[0166] Fig. 10 shows a partial sectional view of a seventh embodiment of a semiconductor component according to the application in a purely schematic representation;

[0167] Fig. 11 shows a partial sectional view of an eighth embodiment of a semiconductor component according to the application in a purely schematic representation;

[0168] Figs. 12 to 16 show five examples of possible contacts of active elements of electro-optical components of semiconductor components in a purely schematic representation;

[0169] Figure 17 shows in pure schematic view a partial cross-sectional view of a ninth embodiment of a semiconductor device according to the application;

[0170] Figure 18 shows in pure schematic view a partial cross-sectional view of a tenth embodiment of a semiconductor device according to the application;

[0171] Figure 19 shows in pure schematic view a partial cross-sectional view of an eleventh embodiment of a semiconductor device according to the application;

[0172] Figure 20 shows in pure schematic view a partial cross-sectional view of a twelfth embodiment of a semiconductor device according to the application;

[0173] Figure 21 shows in pure schematic view a top view of a first embodiment of a photodetector with plasma coupling;

[0174] Figure 22 shows in pure schematic view a top view of a second embodiment of a photodetector with plasma coupling;

[0175] Figure 23 shows in pure schematic view a top view of an embodiment of a modulator with plasma coupling;

[0176] Figure 24 shows in pure schematic view a top view of an example of a side coupling device;

[0177] Figure 25 is a cross-sectional schematic view of the side coupling device of figure 24;

[0178] Figure 26 shows in pure schematic view a top view of an example of a grating coupling device;

[0179] Figure 27 is a cross-sectional schematic view of the grating coupling device shown in figure 26;

[0180] Figure 28 shows steps of a method for manufacturing a device according to figure 1 ;

[0181] Figure 29 shows in pure schematic view a top view of three semiconductor devices according to the application; and

[0182] Figure 30 is a pure schematic cross-sectional view through a semiconductor device according to the application of figure 29.

[0183] In the drawings, identical or similar parts or elements are labeled with identical reference signs. DETAILED DESCRIPTION

[0184] Fig. 1 shows a semiconductor device according to the application in a highly simplified representation in a purely schematic top view. This comprises a wafer 1, which can also be seen in a cross section in the partial sectional view according to Fig. 2, and which comprises a single piece of a silicon substrate 2 and a plurality of integrated electronic components 3, which in the example shown extend into the semiconductor substrate 2. The integrated electronic components 3, which can in particular be transistors and / or resistors and / or capacitors, are represented in a simplified manner in the schematic Fig. 2 only by hatching with the reference numeral 3. A large number of integrated electronic components 3 are produced in a manner known per se at the respective locations in the substrate 2. These can also be components of a processor, for example a CPU and / or a GPU, or form such components in a likewise known manner.

[0185] The wafer 1 is a component or device from which a plurality of chips can be obtained by (wafer) dicing in a manner known per se in the prior art, which is also referred to in German as "Wafer-zerkleirnn". The dicing or singulation can be carried out, for example, by (laser) cutting or sawing or scribing or breaking the wafer 1. The wafer thus comprises a plurality of regions, each of which forms a chip after dicing. These regions are referred to as chip regions 4.

[0186] In Fig. 1, these are represented only schematically with thin lines. Each chip region 4 of the wafer 1 comprises a portion or partial region of the single piece of semiconductor substrate 2 and usually comprises at least one, preferably a plurality, of integrated electronic components 3. Depending on the design of the wafer 1 (depending on the specific application case), for example, up to ten or even several tens, hundreds or thousands of integrated electronic components 3 can be provided in each chip region 4. These can be arranged next to one another and / or overlap one another.

[0187] The wafer 1 has a front-end-of-line (FEOL) 5 in which the plurality of integrated electronic components 3 are arranged and an overlying back-end-of-line (BEOL) 6 in which or via which the integrated electronic components 3 of the front-end-of-line 5 are interconnected by different metal planes. The integrated electronic components 3 in the FEOL 5 and the associated interconnections in the BEOL 6 form an integrated circuit of the wafer 1 in a manner known per se. The FEOL 5 is also sometimes referred to as transistor front-end and the BEOL as metal back-end. The metal planes comprise a plurality of interconnection elements 7, which in the present case are given by so-called VIAs, which is an abbreviation for vertical interconnect access. The VIAs 7 are made of metal, for example copper, aluminum or tungsten.

[0188] The depicted semiconductor device 1 also comprises a photonic platform 8, which, as can be clearly seen in the cross-sectional view according to Fig. 2, is located above the wafer 1 and, according to the application, has been manufactured in the back-end-of-line 6 of the wafer 1, in particular directly built on the wafer 1. It should be noted that the chip area 4 in Fig. 1 is indicated with a thin line, since in the top view the chip area 4 is located below the photonic platform 8.

[0189] In the shown embodiment, the wafer 1 is characterized by a diameter of 200 mm. This is also the diameter of the photonic platform 8 and the semiconductor device as a whole (see Fig. 1), which comprises the wafer 1 and the photonic platform 8 manufactured above the wafer 1. The partial cross-sectional view according to Fig. 2 shows the entire device according to Fig. 1 in vertical direction with superimposed components or coatings or elements, but only a very small part of the device in horizontal direction, in particular only a small part or portion of one of the chip areas 4, which is very small compared to the overall extent of the device in horizontal direction. The same applies to the other partial cross-sectional views. In the present case, the chip areas 4 are characterized by a rectangular shape in plan view, with an edge length of 2 mm in one direction and 3 mm in the other direction in each case. It should be noted that the representation as a square in the purely schematic Fig. 1 is only for reasons of simplification.

[0190] As can be seen from Fig. 2, the photonic platform 8 provided according to the application comprises a planarization coating 10, which has been manufactured on the side 9 of the wafer 1 facing away from the front-end-of-line 5 and is made of a dielectric material. In the present case, the planarization coating 10 consists of silicon dioxide (Si02), although this is to be understood as exemplary, other materials can also be used.

[0191] In the shown embodiment, the planarization coating 10 is a coating which has been obtained by depositing the respective coating material (here: Si02) on the side 9 of the wafer 1 of the front-end-of-line 5 and subsequently planarizing the deposited material on the side 11 facing away from the wafer 1. The planarization coating 10 is characterized by a roughness of 0.2 nm RMS, which is due to the treatment on the side 11 facing away from the wafer 1, which can thus be understood as an example.

[0192] In the shown example, the planarization coating 10 extends to the entire side 9 of the wafer 1 facing away from the front-end-of-line 5. The material of the planarization coating 10 has been deposited on the entire surface of the side 9 of the wafer 1 facing away from the front-end-of-line 5. It is characterized by a diameter which at least substantially corresponds to the diameter of the wafer 1.

[0193] The photonic platform 8 further comprises a plurality of waveguides 12 fabricated at the side 11 of the planarization coating 10 facing away from the wafer 1. A dielectric, preferably titanium dioxide, which is also used in the illustrated embodiment, is particularly suitable as waveguide material. Alternatively or additionally, the waveguides 12 can be made of aluminum nitride and / or tantalum pentoxide and / or silicon nitride and / or aluminum oxide and / or silicon oxynitride and / or lithium niobate or also of a semiconductor such as silicon, indium phosphide, gallium arsenide, indium gallium arsenide, etc., arsenic gallium indium or a dichalcogenide or a chalcogenide glass or a polymer such as SU8 or OrmoComp can be provided.

[0194] The waveguides 12 have typical dimensions of a thickness of between 150 nm and 10 μιη and a lateral extension parallel to the wafer surface of a width of between 100 nm and 10 μιη. Purely by way of example, a thickness of 300 nm and a width of 1.1 μιη can be mentioned. The specific dimensions of the waveguides 12 can vary. In particular, the widths of the waveguides 12 vary depending on the function they perform.

[0195] In the present case, the photonic platform 8 further comprises a further planarization coating 13 which consists of the same material as the planarization coating 10, i.e. in the present case also of Si02. The further planarization coating 13 is characterized in that it has a roughness on its side 14 facing away from the wafer 1 which corresponds to the roughness of the planarization coating 10. It should be emphasized that the planarization coating 10 and the further planarization coating 13, as in the present case, are characterized in that they have the same material, the same range and the same roughness on their sides 11 and 14, respectively, facing away from the wafer 1, but this is not essential and should therefore not be understood as limiting.

[0196] The photonic platform 8 further comprises a plurality of electro-optical devices 15, which can in particular be photodetectors and / or modulators. In the illustrated embodiment, the photonic platform 8 comprises a plurality of photodetectors 15 and a plurality of modulators 15.

[0197] Fig. 2 shows an example of one electro-optical device, in particular a photodetector 15, purely schematically. Fig. 3 again shows a top view of a part of the device of Fig. 1 purely schematically, in particular of the photodetector 15 of Fig. 2.

[0198] Figs. 4 and 5 show exemplary partial sectional views of further embodiments of a semiconductor device according to the application, which correspond in plan view to the plan view of Fig. 1 and in each case a photodetector 15 and an underlying waveguide 12 can be seen, whereby in each case the photodetector 15 and / or the waveguide 12 can replace the photodetector and / or the waveguide 12 of Fig. 2. It should be noted that the schematic drawing of Fig. 3 also corresponds to the detector 15 of Figs. 4 and 5, but only shows the upper narrow portion of the waveguide with T-shaped cross section (cf. Figs. 4 and 5).

[0199] Figures 6 and 7 show partial sectional views of further embodiments of a semiconductor device according to the application. Here, the photodetector 15 is also provided as an electro-optical device, the structure of which differs from the electro-optical devices in Figures 2, 4 and 5.

[0200] Figures 8, 10 and 11 show partial sectional views of further embodiments of a semiconductor device according to the application, in each of which an electro-optical device embodied as a modulator 15 can be seen. Figure 9 shows a top view of the modulator 15 of Figure 8.

[0201] The photodetector 15 according to Figures 2 and 4 to 7 each comprises an active element 16 made of a material that absorbs electromagnetic radiation of at least one wavelength, preferably at least one wavelength range, and generates a photoelectric signal as a result of the absorption. In the examples of Figures 2 and 4 to 7, each active element 16 of the photodetector 15 is given by a graphene film 16. Graphene can also change its refractive index (refractive index and / or absorption) as a function of voltage and / or charge and / or electric field. The active element 16 can also be given by a film that comprises or consists of at least one other material, for example a film that comprises or consists of a dichalcogenide-graphene heterostructure comprising at least one layer of graphene and at least one layer of dichalcogenide, or a film that comprises at least one layer of boron nitride and at least one layer of graphene. There are different dichalcogenides, here transition metal dichalcogenides as two-dimensional materials, for example M0S2 or WSe2, are particularly suitable.

[0202] By way of comparison, the arrangements shown in Figures 2 and 4 differ only in the shape of the waveguide 12. While Figure 2 shows a strip waveguide 12 with a rectangular cross section, Figure 4, like Figure 5, shows a ridge waveguide 12 with a T-shaped cross section, which has a waveguide section 12a of a first, upper layer with a relatively narrow rectangular cross section and a waveguide section 12b of a second, lower layer with a significantly wider rectangular cross section. The example of Figure 5 differs from that of Figure 4 in that here no further planarization coating 13 is provided. It should be noted that the waveguide 12 in the embodiment according to Figure 2 can alternatively be embodied as a so-called slot waveguide, which has two waveguide sections spaced apart from one another to form a slot or gap, for example. If the waveguide 12 comprises more than one section 12a, 12b, it can be provided that all sections are made of the same material, as is the case here. However, this does not necessarily apply; the sections can also comprise or consist of different materials.

[0203] In the examples shown in Figures 2, 4 and 5, in each case the graphene film 16 of the respective electro-optical device 15 extends over the portion of the waveguide 12 visible in the figures which is in the longitudinal direction. This can also easily be seen from the top view shown in Figure 3. In the examples according to Figures 2 and 4, in each case the graphene film or one graphene film 16, 16a is produced or arranged on the side 14 of the further planarization coating 13 which faces away from the wafer 1. It can be seen that in each case the graphene film 16 extends within the area of the trapezoidal cross section of the latter further planarization coating 13, in particular as a result of the planarization of the resist. In the example shown in Figure 5, the graphene film 16 is located directly on the waveguide 12.

[0204] The examples shown in Figures 6 and 7 differ from Figures 2, 4 and 5 in that the graphene film 16 extends into (Figure 6) or under (Figure 7) the respective waveguide 12 instead of over it. In terms of the shape of the waveguide 12, they are again formed as ridge waveguides 12 having a T-shaped cross section. Thus, the waveguide 12 of the example of Figure 6 comprises a first, upper waveguide section 12a, an intermediate 12b and a lower waveguide section 12c. All waveguide sections 12a, 12b, 12c have a rectangular cross section, the intermediate and lower sections 12b, 12c being significantly wider. The intermediate waveguide section 12b is provided with the graphene film 16 and serves as a passivation coating for the graphene film 16 and the waveguide section 12b (also referred to as waveguide plate). In the present example, the section 12b which also serves as a passivation coating is made of aluminum oxide. Alternatively or additionally, said section 12b can also comprise or consist of a dichalcogenide and / or a dichalcogenide heterostructure and / or SiO2and / or boron nitride. The other two sections 12a, 12c can for example also comprise or consist of aluminum oxide or titanium dioxide.

[0205] The example in Figure 7 differs from the example in Figure 6 in that there is no lower waveguide section 12c. The graphene film 16 is arranged here directly on the side 11 of the planarization coating 10 which faces away from the wafer 5.

[0206] In the case of an electro-optical device which is embodied in particular as a photodetector 15, two gate electrodes can also be assigned to the active element 16. These are then preferably embodied and arranged in such a way that the charge carrier concentration in the active element, in this case the graphene film 16, can be adjusted by means of these gate electrodes, so that for example a pn junction can be obtained. For example, the gate electrodes can be arranged above the graphene film 16 and are electrically insulated from the graphene film 16 by means of a dielectric coating.

[0207] The modulators 15 according to Figures 8, 10 and 11 each comprise two active elements, specifically a lower 16a and an upper 16b, which are each provided by a graphene film 16. As is also the case for the modulators 15, the active elements can also be implemented in a different way, for example as a film comprising or consisting of at least one other material. The two graphene films 16a, 16b extend at a distance from one another and are not in electrical contact with one another. Instead, they are electrically insulated from one another by an intermediate coating 17 of dielectric material, which is preferably an oxide or nitride, at present aluminium oxide. The dielectric coating 17 also serves as a passivation and etch protection or barrier. As is apparent from a comparison of Figures 2 and 6, these arrangements are identical, except that the modulator 15 of Figure 8 comprises a second active element 16b and an additional dielectric coating 17 is provided.

[0208] The two graphene films 16a, 16b are arranged offset from one another, so that they overlap or overlap (without contact) one another in sections. In the region of the overlap, the two graphene films 16a, 16b or the respective sections thereof are further applied to extend at least substantially parallel to one another. It should be noted that the modulators 15 comprise two active elements 16a, 16b, an alternative being to provide an electrode made of an electrically conductive material, for example copper or aluminium, instead of one of the active elements.

[0209] In the example shown in Figure 8, the lower graphene film 16a (just like the single-layer graphene film 16 of the detector of Figures 2 and 4) is provided on the side 14 of the further planarization coating 13, likewise in the region of the trapezoidal section of the waveguide 12 above. The second, upper graphene film extends on the side 18 of the dielectric coating 17 facing away from the wafer 5.

[0210] Like the various examples in Figures 2, 4 and 5, the examples in Figures 8, 10 and 11 also differ in nature in that the waveguide 12 is characterized in that it has a different shape and there is no second planarization coating 13, which is not present in Figures 10 and 11 either. While the example of Figure 8 comprises a strip waveguide 12, the examples according to Figures 10 and 11 respectively comprise a ridge waveguide 12 having a T-shaped cross section or profile. The waveguide in Figure 10 comprises four waveguide sections 12a, 12b, 12c, 12d, and the waveguide in Figure 11 comprises three sections 12a, 12b, 12c, in cross section. All sections 12a to 12d have a rectangular cross section, although it is apparent from the figures that the width of the upper section 12a (similar to Figures 4 and 5) is significantly smaller than the width of the lower sections 12b, 12c and, in the case of Figure 11, 12d. In the examples shown, the two or three lower sections 12a, 12b, 12c each have the same width. The section 12d of the waveguide 12 in Figure 10 can also be regarded as a waveguide base.

[0211] In the example of Fig. 11, the lower graphene film 16a extends here between the single planarization coating 10 and the section 12c of the ridge waveguide 12 located at the planarization coating 10, and the upper graphene film 16b extends between the section 12b and the section 12c. Thus, the upper graphene film 16b extends within the waveguide 12. The lower graphene film 16a is manufactured or provided at the side 11 of the planarization coating facing away from the wafer 5, the upper graphene film 16b at the section 12c.

[0212] Each of the active elements 16, 16a, 16b of all detectors 15 and modulators 15 of the photonic platform 8 is arranged and associated with respect to the respective waveguide 12 identifiable in the figures, such that they are at least partially exposed to the evanescent field of the electromagnetic radiation guided by the respective waveguide 12. Preferably, at least a portion of the respective active element 16, 16a, 16b extends from the respective waveguide 12 at a distance of less than or equal to 50 nm, preferably less than or equal to 30 nm. For example, it can be seen in Fig. 2 that the further planarization coating 13 between the waveguide 12 and the graphene film 16 is correspondingly thin or "thinned" with respect to its thickness in the remaining area.

[0213] In the illustrated embodiment, each electro-optical device, in particular each photodetector 15 and each modulator 15, is further electrically conductively connected to at least one of the integrated electronic components 3 of the front-end process 5 of the respective wafer 1. As shown in Figs. 2 to 4 and 8, 10 and 11, the connection is achieved by a VIA 7 of the back-end process 6 of the wafer 1 and possibly a further VIA 7 extending through the planarization coating 10 and possibly further coatings or elements.

[0214] In particular, in the detector 15, the respective graphene film 16 is electrically conductively connected at opposite end regions via contact elements 19 to the upper end of a VIA 7 extending through the planarization coating 10 and possibly further through coatings or elements to the back-end process 6 of the wafer 1. In the top view of Fig. 3, the VIA 7 connected to the contact elements 19 (located below the contact elements 19) is indicated by a thin line.

[0215] In the modulator 15, each of the two graphene films 16a, 16b is connected at one end region to a contact element 19 and to a VIA 7 above the contact element 19.

[0216] In principle, the contact of the active elements (currently graphene films 16, 16a, 16b of the electro-optical devices 15) with the contact elements 19 can be designed differently. Figs. 12 to 16 show by way of example five different possibilities.

[0217] According to the option shown in Fig. 12, the end region of the graphene film 16, 16a, 16b is in contact with a portion of the bottom face of the contact element 19. Here, the contact element 19 is advantageously made of a metal optimized for graphene, such as nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver.

[0218] The example shown in Fig. 13 differs from the arrangement according to Fig. 10 only in that the contact element 19 comprises not only one but two metal layers 19a, 19b, whereby a better performance for further connections can be achieved, since the upper layer 19b can consist of a metal optimized for further connections. The lower layer 19a in contact with the graphene film 16, 16a, 16b advantageously again consists of a metal optimized for graphene. Preferably, the layer 19a consists of nickel and the layer 19b consists of aluminum or the layer 19a consists of titanium and the layer 19b consists of aluminum. Other combinations of nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver are also possible for active elements comprising or consisting of graphene as well as for active elements comprising or consisting of other electro-optically active materials.

[0219] In the example shown in Fig. 14, the contact element 19 also comprises a third, lower metal layer 19c which serves as a bonding agent. This layer 19c can consist of titanium or chromium or aluminum oxide, for example. The layer 19a consists of nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver, for example. The layer 19b can also consist of one of these metals or a combination thereof.

[0220] In the embodiments according to Figs. 15 and 16, the end region of the active element, in this case the graphene film 16, 16a, 16b, extends between a first, lower metal layer 19a optimized for graphene and a second, upper metal layer 19d of the contact element 19 also optimized for graphene. To this end, the end region of the active element 16 has an S-shaped cross section. The two layers 19a and 19d preferably consist of palladium or nickel or gold or platinum or a combination of nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver.

[0221] The example of Fig. 16 differs from the example of Fig. 15 in that, similar to Fig. 14, the contact element 19 comprises a third metal layer 19b optimized for further connections, which can consist of aluminum, for example, similar to the layer 19b of Fig. 13.

[0222] For all contact instances, the graphene film 16 can be covered by the contact element 19 or the layers 19a to 19d of the contact element 19, so that the current enters the graphene in a perpendicular transition from the contact element 19 or the layers of the contact element 19 (top contact), or the graphene film 16 can also end at the edge of the contact element 19 or the layers 19a to 19d of the contact element 19, so that the current enters the graphene film 16 laterally (side contact). For example, the arrangement according to Figure 13 can also be implemented as a top contact.

[0223] The passivation coating 25 is preferably provided above each active element, i.e. preferably above each graphene film 16. This can only be seen in Figures 12 to 16, each of which shows a part of the graphene film 16, 16a, 16b in an enlarged view. In the present example, the passivation coating 25 is made of aluminum oxide. Alternatively or in addition, such a passivation coating 25 can also consist of or comprise dichalcogenides and / or dichalcogenide heterostructures and / or SiO2and / or boron nitride. The passivation coating 25 passivates the active element, in this case the graphene film, and at the same time serves as an etch stop layer, so that a selective etching of the contact element 19 for connection to the VIA 7 is possible.

[0224] It should be noted that, in the case of the modulator 15, the dielectric coating 17 (see Figure 8) provided between the two active elements 16a, 16b can already serve to passivate the lower element 16b. In this case, it is also not necessary to assign a passivation coating 25 to it.

[0225] Furthermore, it should be noted that even in the example according to Figures 12 to 16, in which the active elements 16, 16a, 16b are given by graphene films, the shown embodiments are by no means limited to this material. Furthermore, for active elements 16 comprising or consisting of one or more other materials, the contacts can be designed accordingly.

[0226] Embodiments of a photodetector 15 or modulator 15 with active elements without graphene are shown in Figures 17 to 20.

[0227] In this regard, the embodiment of Fig. 17 comprises an active element 16 formed by a coating of polysilicon, which also forms the waveguide 12. It can be seen that the silicon coating 16 has the shape of a ridge waveguide with a T-shaped cross section. In the present case, the silicon coating forming the active element 16 and the waveguide 12 has two doped regions, namely a p-doped region 16p and an n-doped region 16n. It is noted that alternatively, a pin transition could also be present, i.e. an undoped region could also be located between the p-doped region and the n-doped region. The silicon coating 6 (similar to the active element 16 of the examples of Figs. 2 and 4 to 7) is connected to two contact elements 19. Depending on the polarity of the applied voltage, the charge carrier concentration in the barrier coating changes, and thus the absorption and the refractive index of the waveguide 12. It can also be said that here the waveguide 12 is designed as a diode to obtain a modulator.

[0228] Fig. 18 shows another example of a silicon modulator, also referred to as SISCAP (see also the publication "An efficient MOS-capacitor based silicon modulator and CMOS drivers for optical transmitters" by M. Webster et el, published at the 11th International Conference on Group IV Photonics (GFP), Paris, 2014, pp. 1-2. doi: 10.1109 / Group4.2014.6961998). Here, two active elements 16a, 16b are provided, each formed by a silicon coating, preferably by a wafer silicon or a polysilicon or an amorphous silicon. Here, the active element 16a is p-doped, while the element 16b is n-doped. The active elements 16a, 16b are further arranged offset to each other such that they are located on top of each other in an overlapping region, similar to the active elements 16 of the examples of Figs. 8, 10 and 11. The overlapping region here forms the waveguide 12. The charge carrier concentration can be adjusted within the overlapping region, thereby adjusting the optical properties of the waveguide 12.

[0229] Fig. 19 shows another example of a silicon modulator 15, which also comprises two active elements 16a, 16b formed by a p-type and n-type doped silicon coating, respectively. They are located next to each other in the plane and between them an element of an electro-optic polymer 26 is provided. The two active elements 16a, 16b and the element 29 of the electro-optic polymer form a ridge waveguide 12, the gap of which is formed by the element 26. In other words, the sidewalls of the gap here act as electrodes of a capacitor. The electric field in the gap influences the optical properties of the polymer and is able to modulate the optical signal.

[0230] Fig. 20 shows an example of a modulator with a diode 27 made of a compound semiconductor. The diode 27 consists of different layers 27a to 27d, for example InGaAsP, to form a pn junction and two contact areas. The contact areas are connected to the contact elements 19 and thus to the electrode 28 via the integrated electronic component 4.

[0231] The electro-optical device or at least one electro-optical device (in the case of the modulator 15 and the detector 15) can further be designed or manufactured to have plasmonic coupling.

[0232] Corresponding examples (in each case purely schematic) can be found in Figs. 21 to 23.

[0233] In this regard, Fig. 21 shows an example of a photodetector 15 in which a plasmonic structure 29 is provided, which comprises or consists of a plasmonically active material, in particular at the active element 16. In this example, the plasmonic structure 29 comprises three pairs of plasmonic elements 30 arranged next to each other and comprises or consists of a plasmonically active material. At present, the plasmonic elements consist of gold. Examples of other suitable materials include silver and / or aluminium and / or copper. The plasmonic elements 30 form a quasi-antenna on the waveguide 12 to increase absorption (see also Ma et al., "Plasmonically Enhanced Graphene Photodetector Featuring 100 Gbit / s Data Reception, High Responsivity, and Compact Size", ACS Photonics 2019, 6, pages 154 to 161 (2018)). Such a plasmonic structure can be provided at or become provided at the active element 16 of an arrangement according to Fig. 2, Fig. 4 or Fig. 5, for example.

[0234] Fig. 22 shows an example of a photodetector 15 in which no waveguide 12 or part of such a waveguide is provided below or above the active element 16, but in which the waveguide 12, which is preferably provided in the plane in which the active element 16 is located and to the side thereof, has a portion 31 which tapers V-shaped in the direction of the active element 16. In Fig. 22, the portion 31 tapers to a point which extends to the left of the active element 16 (for example a graphene film). It can be seen that the contact elements 19 here comprise a portion 19e which tapers in the opposite direction, i.e. in the direction away from the active element 16. In other words, the contact elements 19 follow the tapered end portion 31 of the waveguide 12 in sections, which enables plasmonic coupling.

[0235] Fig. 23 shows an analog modulator 15 with plasmonic coupling. It can be seen that on both opposite sides of the active element 16 waveguide sections 31, for example graphene films, are arranged which taper V-shaped in the direction of the active element 16 and for both associated waveguide sections 31 and 19e parts 19e of the contact element 19 are provided which taper in opposite directions. Thus, the coupling of the optical mode into the plasmonic mode and back into the optical mode is possible here. In particular, in the present embodiment, an active element can be further provided which comprises or consists of at least one electro-optical polymer (see also the publication of Kus et al. "Silicon-Organic Hybrid (SOH) and Plasmonic-Organic Hybrid (POH) Integration", Journal of Lightwave Technology, Vol. 34, No. 2, 2016).

[0236] The photonic platform 8 manufactured from the wafer 1 of the semiconductor device according to the application generally comprises a very large number of electro-optical devices 15 which can in particular be given by photodetectors and / or modulators. This is also the case in the illustrated embodiment. In particular, each section of the photonic platform 8 extending above the chip area 4 of the wafer 1 will already comprise a plurality of electro-optical devices 15 and a plurality of waveguides 12. For example, tens, hundreds or even thousands of electro-optical devices 15 and / or waveguides 12 can be provided per section of the photonic platform 8 extending above the chip area 4. In each case, this number can be chosen depending on the specific application.

[0237] In the illustrated embodiment of the semiconductor device according to the application, all electro-optical devices 15 and waveguides 12 of the photonic platform 8 are structurally identical. In this respect, the uniformity makes the manufacture particularly simple and fast. However, it should be emphasized that the semiconductor device according to the application can of course also comprise different instances as illustrated in Figs. 2, 4 to 8, 10, 11 and / or 17 to 23, for example, the detector 15 with the underlying waveguide 12 according to Fig. 2 and the modulator 15 and the waveguide 12 according to Fig. 8. According to Figs. 2, 4 to 8, 10, 11 and / or 17 to 23, there can also be more than two different instances, for example, all instances can also occur once or more than once, respectively.

[0238] In order to be able to implement arrangements with a further planarization coating 13 (see, for example, Figs. 2, 4 and 8) and arrangements without such a coating (see, for example, Figs. 5, 10 and 11) in the photonic platform 8, it can be provided that, after the further planarization coating 13 has been manufactured, preferably in two dimensions, this coating is again partially removed where arrangements without the further planarization coating are required (for example by means of photolithography and subsequent etching). For other coatings which are required only in certain places and not everywhere, a completely analogous procedure can or has been used.

[0239] The active elements 16, 16a, 16b of each electro-optical device can be electrically conductively connected to one or, in the case of a detector, to two contact elements 19 in any of the ways shown in Figures 12 to 16. It is possible for all active elements 16, 16a, 16b of a semiconductor device according to the application to be contacted in the same way with the contact elements 19. Alternatively, it is of course also possible for different active elements 16 of a device to be contacted in different ways.

[0240] In Figures 3 and 9, in addition to the active elements 16, 16a, 16b, the waveguides 12 and the contact elements 19, coupling means 32 of the photonic platform 8 are shown schematically, which serve to couple light into or out of the waveguides 12. One of the coupling means 32 is arranged at each of the opposite ends of the respective waveguide 12. In the present case, the coupling means 32 are each designed as a side or grating coupling means. Figures 24 to 27 show purely schematic views of such examples. Figures 24 and 25 show plan and sectional views of a side coupling means 32, and Figures 26 and 27 show plan and sectional views of a grating coupling means 32.

[0241] The coupling means 32 or two coupling means 32 can be associated with several waveguides 12 or with each waveguide 12 of the photonic platform 8. In particular, in the case where light is to be coupled in and out, two coupling means 32 are or can be associated with the waveguide 12. However, it is also possible that only the possible initial coupling is required. Then one coupling means 32 is sufficient.

[0242] The example of a side coupling device 32 shown in Figures 24 and 25 comprises a side coupling element 33, which is preferably composed of a resin or a resin- containing material (in particular SU8, or / and silicon nitride, or / and silicon oxynitride or a dielectric), whose refractive index is between that of the waveguide 12 (in particular n = 2.4) and the element 33 (SU8 n = 1.56) serving as a mode field transformer, for example aluminum oxide (n = 1.68). As can be seen, the latter is characterized by a width b and a height h, which in the respective directions exceed the extension of the waveguide 12, in the present case each case corresponds to a multiple thereof. The side coupling device 32 further comprises an end portion 34 of the waveguide 12, which extends into the side coupling element, which, as can easily be seen from Figure 24, tapers conically towards its end. It is noted that in Figure 24 the outer contour of the tapered portion 34 is indicated by a thin line, since it is obscured in the plan view by the cross section of the element 33. The element 33 matches the mode field from the diameter of the optical fiber (for example 5 to 15 μιη) to the dimensions of the waveguide 12 (for example 300 nm high, 1.1 μιη wide). The tapered tip 34 of the waveguide 12 causes an adiabatic adjustment of the effective refractive index in the region of the mode field, so that the optical mode is gradually transferred from the coupling structure into the waveguide 12.

[0243] As can be seen from the plan view of Figure 26, the grating coupling device 32 is formed by an end portion 35 of the waveguide 12, which widens conically towards the end and has a grating structure 36 on its side, as shown in the sectional view of Figure 27, which faces away from the wafer 5. This widening adapts the dimensions of the waveguide 12 (for example 300 nm high, 1.1 μιη wide) to the diameter of the mode field in the optical fiber (for example 5 to 15 μιη), thus improving the coupling efficiency. In the plan view according to Figure 26, the grating structure 36 is simplified by only a few parallel lines. The incident light is diffracted by the grating-like arrangement of refractive index steps. The dimensions of the grating are expediently calculated so that at a given angle of incidence the first diffraction order is located in the waveguide 12, so that the light is coupled into the waveguide 12.

[0244] The coupling device 32 and the respective waveguide 12 lie in one plane, i.e. they lie on the side 11 of the planarization coating 10 facing away from the wafer 5.

[0245] In Figures 21 to 23, which comprise a partial view, the waveguide 12, which is only partially shown, can also be provided at its end with a coupling device 32, which cannot be seen.

[0246] In addition to the electro-optical device 15, the photonic platform 8 can comprise one or more optical devices. These can be, for example, one or more interferometers, for example Mach-Zehnder interferometers, and / or MMIs and / or directional couplers and / or ring resonators and / or polarization converters and / or splitters. The optical devices are usually formed by portions of the waveguide 12, which are then arranged accordingly. In particular, they constitute passive structures of the waveguide 12 or of the longitudinal waveguide portions. The portions, in particular the longitudinal portions, i.e. the longitudinal portions of the waveguide 12, for example the waveguide 12 shown in Figures 2, 4 to 11, can in each case be components of such optical devices, in particular of portions which are located in front of or behind the electro-optical device 15 in the direction perpendicular to the drawing plane.

[0247] The photonic platform 8 can also comprise one or more thermo-optical devices. For example, one such device comprises a heating element and a longitudinal portion of the waveguide 12, the heating element being arranged relative to the waveguide portion such that the heating element can heat the waveguide portion. Heating the waveguide 12 by the heating element can change the refractive index in the longitudinal portion of the waveguide 12. This effect can be used for phase matching, for example. The thermo-optical device can also be associated with or constitute part of an interferometer of the photonic platform. For example, the longitudinal portions of the waveguide 12 shown in Figures 2, 4 to 11 can be portions of a thermo-optical device, also in the direction perpendicular to the drawing plane, located in front of or behind the electro-optical device 15.

[0248] The photonic platform 8 also comprises a passivation coating 37, which extends over the electro-optical device 15 and preferably forms the upper surface of the photonic platform 8 and of the semiconductor device (see Figure 1). The passivation coating 37 simultaneously constitutes a cladding. It should be noted that the passivation coating 37 is not shown in the views according to Figures 3 and 9, but only the underlying device 15 is shown.

[0249] In order to obtain the semiconductor device shown in Figure 1, in a first step S1 (see Figure 28), a wafer 1 is provided with an integrated circuit comprising the integrated electronic components 3 and a metallization comprising the VIA 7. The wafer 1 can be any conventional type of wafer 1 obtained by previously known manufacturing processes.

[0250] The photonic platform 8 is then manufactured in the BEOL 6 of the wafer 1.

[0251] In particular, in a second step S2, a planarization coating 10 is manufactured in the back end of line 6 of the wafer 1. For this purpose, a coating material, in this case silicon dioxide (Si02), is applied, which can be done by chemical vapor deposition, such as low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD), or physical vapor deposition, or also by spin-on glass spin-on. In the present example, PECVD is used. After deposition of the coating material, the side of the coating facing away from the wafer 5 is subjected to a planarization treatment (step S3), in this case resist planarization, whereby a side 11 facing away from the wafer 5 having a roughness of 0.2 nm RMS is obtained.

[0252] Resist planarization comprises a single or repeated spin-on glass deposition and subsequent etching, in this case reactive ion etching (RIE). The spin-on glass coating partially compensates for the height differences, i.e. after the spin-on glass coating, the valleys of the topography have a higher coating thickness than the adjacent elevations. If the entire spin-on glass coating is etched after the spin-on glass coating, for example by RIE, the height differences have already been reduced due to the planarization effect of the spin-on glass coating. By repeating the steps, the height differences can be further reduced until the desired roughness is obtained.

[0253] It should be noted that alternatively, the side 11 of the planarization coating 10 facing away from the wafer 5 having a correspondingly low roughness can be obtained, for example by chemical mechanical polishing (CMP).

[0254] In a next step S4, waveguides are manufactured. For this purpose, a waveguide material, in this case titanium dioxide (Ti02), is deposited, in particular over the entire surface 11 of the resulting planarization coating 10. As with the planarization coating, the material can be deposited by PVD or CVD, in particular PECVD or LPCVD, or by spin-on. Atomic layer deposition (ALD) or a transfer process can also be carried out. Similar to the planarization coating 10, LPCVD is used. Lithography and structuring, in particular by reactive ion etching (RIE), are carried out to obtain individual waveguides 12.

[0255] In order to obtain strip waveguides 12 (see, for example, Figures 3 and 8), the waveguide material is completely removed, in other words etched, in places where no strip waveguide 12 is to be left, in the planarization coating 10 underneath.

[0256] The coupling device 32, including its waveguide ends 34, 35 (see Figures 3, 9 and 24 to 27), is in this case manufactured together with the ridge waveguide 12 or the strip waveguide 12, wherein for the ridge waveguide 12 the lateral extension of the waveguide 12 in the region of the coupling point can be removed in a separate etching step in a dry-chemical manner. The waveguide 12 consisting of superimposed coatings can be structured after the coating structure has been completed with the uppermost coating 12a, and for the ridge waveguide 12 the lateral extension of the waveguide in the region of the coupling point can be removed in a separate etching step in a dry-chemical manner. In all cases, a mode converter can be defined between the ridge waveguide 12 and the strip waveguide 12, and parts of the ridge waveguide 12 can be formed as strip waveguides 12 using photolithography and RIE.

[0257] The grating coupler 32 with the grating structure 36 can be defined lithographically and structured dry-chemically.

[0258] For the side-coupling element (mode converter) 33, a dielectric and / or semiconductor and / or resin and / or polymer is deposited in one or more layers and structured by means of photolithography or / and RIE.

[0259] In a next step S5, a further planarization coating 13 is manufactured on the waveguide 12 and on the side 11 of the planarization coating 10. In this case, this is obtained in a manner completely analogous to the planarization coating 10 by using PECVD and resist planarization. Due to the resist planarization, the cross section of the further planarization coating 13 above the waveguide 12 is trapezoidal (see Figure 2).

[0260] Furthermore, with regard to the further planarization coating 13, other of the above-mentioned processes can be used in addition to LPCVD and CMP, and a further planarization treatment (e.g. CMP) and / or further planarization is possible, as described above for the planarization coating 10. If CMP is used, a planar surface is usually obtained, i.e. no trapezoidal portion above the waveguide 12, as shown in Figure 2 (e.g. Figures 4 and 9).

[0261] The planarization coating 10 and the further planarization coating 13 can comprise one or more cover layers, which are preferably provided on the surface treated planarly, and can be, for example, a dichalcogenide layer or a dichalcogenide heterostructure or a boron nitride layer. These materials are preferably deposited or transferred without the need for further chemical-mechanical polishing or further resist planarization, although a repetition of this process is not ruled out.

[0262] For the sake of completeness, it is noted that if the semiconductor device according to the application also has regions without the further planarization coating 13, for example regions in which the structure corresponds to that according to Fig. 5, Fig. 10 or Fig. 11, then the further planarization coating 13 (and any coating layers located thereon) is subsequently removed again partially, in particular by means of photolithography and etching.

[0263] In step S6, the VIA 7 is produced by means of the planarization coating 10 and the further planarization coating 13. In principle, this can be achieved in any manner known from the prior art. In particular, the regions which are to be extended are first of all defined, preferably by means of photolithography, and dry-chemically etched by means of RIE. Then, metallization is carried out and a metallization surface is constructed, for example by means of CMP (damascene process) or by means of photolithography and RIE. It is possible to produce the VIA 7 through the planarization coating 10, the further planarization coating 13 after the further planarization coating 13 has been completed, or to produce parts of the VIA 7 through the first planarization coating 10 after the first coating 10 has been completed and parts of the VIA 7 through the second coating 13 after the second planarization coating 13 has been completed.

[0264] Subsequently, the electro-optical device 15 is produced.

[0265] To this end, in step S7, the individual active elements of the detector given by the graphene film 16 are provided on the side 14 facing away from the further planarization coating 3 of the wafer 5, for example deposited on the side 14, and in step S8 the contact elements 19 (single-layer or multi-layer) are obtained.

[0266] The deposition of the graphene film 16 can take place, for example, by means of a transfer process as described in more detail above. Then, in particular, in each case, a graphene film produced on a separate substrate or on a separate metal foil or on a separate germanium sheet is transferred to the further planarization coating 13. It is also possible to prepare the graphene film directly on the further planarization coating 13. This can include, for example, material deposition.

[0267] If a transfer process is used, a passivation coating 25 can already be provided on the side of the respective graphene film 16 facing away from the wafer 5, for example the layer has been deposited thereon and is then transferred together therewith. Alternatively, the passivation coating 25 can also be deposited after the graphene film 16 has been transferred or produced.

[0268] It is also possible to first of all produce a full-area graphene film and / or a full-area passivation coating on the further planarization coating 13, which extends over the entire surface of the further planarization coating 13. In this case, a further structuring is then carried out, in particular by means of photolithography and RIE, in order to obtain the individual graphene films 16 as active elements of a plurality of electro-optical devices 16.

[0269] The contact elements 19 or their layers 19a to 19d are then preferably manufactured by depositing a layer (Fig. 12) or more layers (Figs. 13 to 16) of metal over the entire surface, then structuring by means of photolithography and RIE.

[0270] The contacting can be achieved in the manner described in terms of the manufacturing sequence first graphene film 16, then contact element 19, as shown in Figs. 12 to 14.

[0271] For the contact variants shown in Figs. 15 and 16, first only the lower layer of the metal layer 19c or the metal layer 19a of the contact element 19 is manufactured, followed by the graphene film 16, then by the further layer 19b, 19d or the further two layers 19a, 19b or 19d, 19b. This can also be done by full-area deposition of the appropriate metal and subsequent structuring by means of photolithography and RIE.

[0272] In the penultimate step S9, an upper passivation 37, preferably Al2O3 and SiO2, is deposited. In this passivation, openings are then made as appropriate by means of photolithography and RIE, in particular openings of the contact elements (step S10). Preferably, openings of the contact elements for connecting photonics and / or electronics to the outside are made.

[0273] By means of the above steps, a semiconductor device consisting of a strip waveguide 12 and an electro-optical component 15 can be obtained, as shown in Fig. 2.

[0274] If a semiconductor device is to be obtained which exclusively (or additionally) has a region configured as shown in Fig. 4, i.e. which comprises a ridge waveguide 12, it is only necessary to change the S4 step such that the section 12a is etched laterally only to a smaller depth, so that waveguide material remains in the lateral direction of the section 12a and sections 12b, 12c which do not have a strip waveguide are obtained.

[0275] In order to obtain the structure shown in Fig. 5, the further planarization coating 13 has to be removed again partially before the ridge waveguide 12 is manufactured. If the semiconductor device to be obtained does not have a further planarization coating 13 at any time, its manufacture can of course also be completely dispensed with.

[0276] In order to obtain the example shown in Fig. 6, the lower waveguide section 12c is first manufactured on the side of the planarization coating 10 facing away from the wafer using the above-described method (e.g. PECVD). The active element (in this case the graphene film 16) and the contact element 19 are then manufactured, the manufacturing sequence again depending on which contact variant shown in Figs. 12 to 16 is chosen. The passivation coating 25 is then prepared on the graphene film 16 (only shown in Figs. 12 to 16), then on the two sections 12b and 12a and the coating 37.

[0277] To obtain the arrangement shown in Fig. 7, a basically similar procedure can be followed, only the step of manufacturing the waveguide section 12c is omitted and the graphene film 16 is provided at the side 11 of the planarization coating 10 facing away from the wafer 5.

[0278] Furthermore, for the manufacturing of a semiconductor device according to the present application, which comprises one or more modulators 15 as electro-optical devices, the procedure differs partially from the procedure described above in connection with Fig. 2.

[0279] For example, for the example according to Fig. 8, the procedure can be identical up to the manufacturing of the further planarization coating 13 and the VIA 7 through the planarization coating 10 and the planarization coating 13, i.e. the steps S1 to S6 can be identical.

[0280] However, the manufacturing of the individual modulators 15 comprises first providing a lower graphene film 16a as one of the two active elements at the further planarization coating 13 and creating only one contact element 19 at an end region of the graphene film 16a pointing to the left side of Fig. 8. For one graphene film 16 and two contact elements 19, the manufacturing can be done in the same way as described above in connection with Fig. 2.

[0281] Subsequently, a dielectric coating 17 is provided, for example by deposition of preferably aluminum oxide. It is also possible to provide the dielectric coating 17 by a transfer process.

[0282] Then a second upper graphene film 16b is manufactured and a second contact element 19 is manufactured at an end region of the graphene film 16b pointing to the right side of Fig. 6. For one graphene film 16 and two contact elements 19, the manufacturing can again be done in the same way as described above in connection with Fig. 2.

[0283] Then, the passivation 37 of the upper layer and the opening therein can be obtained following the steps S8 and S9 described above.

[0284] For the structure according to Fig. 10, the steps S1 to S6 can also be performed identically, then the further planarization coatings 13 can again be partially removed. Alternatively, their production can be omitted (i.e. step S5) and only the VIA can be manufactured through the planarization coating 10 in step S6.

[0285] Then, at the side 11 of the planarization coating 10 facing away from the wafer 5, a section 12d (i.e. a waveguide base) is manufactured by deposition of an optically transparent, preferably dielectric coating or semiconductor and structuring thereof by lithography and RIE. In the present example, Ti02is deposited.

[0286] On the side of the waveguide base 12d facing away from the wafer 5, a lower graphene film 16a is manufactured, followed by its contact elements 19, on top of which is the waveguide section 12c, on top of which is the upper graphene film 16b with associated contact elements 19, on top of which is the waveguide section 12b, on top of which is the waveguide section 12a, which is characterized by a width that is significantly smaller than the other sections 12b, 12c, 12d. The material of the waveguide section 12b can be manufactured by, for example, ALD, or a chalcogenide coating obtained by CVD or transfer and ALD, and / or a dielectric or semiconducting material coating manufactured by PVD, and structured by means of lithography and RIE. Subsequently, the section 12a is provided, in which a dielectric or semiconducting material and / or a chalcogenide coating obtained by CVD or transfer is provided by means of ALD and / or PVD and / or PECVD and / or LPCVD, and structured using lithography and RIE.

[0287] The graphene films 16a, 16b and the contact elements 19 are manufactured in the same way as described above in connection with Fig. 2.

[0288] In this example, the upper graphene film 16 extends within the waveguide 12.

[0289] Finally, steps S9 and S10 can be performed, again obtaining a passivation coating 37 and an opening therein.

[0290] To obtain the arrangement according to Fig. 11, this can be done primarily in the same way as described above in connection with Fig. 10, with the only difference being that the manufacture of the lowermost waveguide section 12d in Fig. 10 is omitted, and the lower graphene film 16a is manufactured directly on the side 11 of the planarization coating 10.

[0291] To obtain the arrangement as shown in Fig. 17, the same procedure can again be followed until the planarization coating 10 is completed (steps S1 to S3). Then on its side 11 facing away from the wafer 5, a silicon coating 16 is manufactured as an active element. This can again comprise material deposition, for example by one of the aforementioned processes, such as a CVD or PVD process or spin coating, and subsequent structuring, for example lithography and RIE, to obtain a T-shape. The resulting ridge waveguide side is p-doped, the other side is n-doped, to obtain a 16p region and a 16n region. In this way, a pn junction is obtained. The contact elements 19 can then be manufactured.

[0292] For the modulator 15 shown in Fig. 18, which is designed as a so-called SISCAP, steps S1 to S3 can also be identical, then two silicon coatings 16a and 16b are manufactured, each forming an active element, the manufacturing process can also comprise material deposition, for example by one of the aforementioned processes, for example a CVD or PVD process or spin coating, and subsequent structuring, for example lithography and RIE, and the associated contact elements 19 are manufactured.

[0293] For Fig. 19, in principle an element 26 made of electro-optical polymer can be added between the two elements 16a and 16b as shown in Fig. 17.

[0294] In order to obtain a modulator 15 as shown in Fig. 20, steps S1 to S5 can be identical to those described above in connection with Fig. 2. Then, a first electrode 28 with associated contact elements 19 can be manufactured on the side 14 facing away from the further planarization coating 13 of the wafer 5, then a diode 27 with coatings 27a to 27d is manufactured, then a second electrode 28 with associated contact elements 19 is manufactured, in each case comprising material deposition and subsequent structuring.

[0295] Finally, in all examples of Figs. 17 to 20, the coating 37 can be prepared in a similar manner to the remaining examples.

[0296] As can be seen from the above, the photonic platform 8 is manufactured directly on the BEOL 6 of the wafer 1. It can also be said that the photonic platform 8 is monolithically manufactured on the wafer 1 or is a monolithic platform 8. In particular, the coatings 10, 13, 37 and the waveguide 12 are manufactured directly on the wafer 1 by depositing the appropriate material on the BEOL 6 of the wafer 1 or on the coating already manufactured thereon, respectively. There is no separate manufacturing of the coatings 10, 13, 37 or the waveguide 12 and subsequent connection by bonding.

[0297] It should be noted that the above-described method for manufacturing a semiconductor device according to the application is an embodiment of the method according to the application.

[0298] After the semiconductor device according to the application has been completed, a plurality of chips with integrated photonics can be obtained therefrom in a simple and rapid manner, in particular by means of cutting, in other words by singulation.

[0299] In the semiconductor device shown in Fig. 1, cutting can be carried out, which comprises, for example, (laser) cutting and / or sawing and / or breaking along the lines shown defining the chip area 4. In principle, the cutting can be carried out in any manner known from the prior art, in particular in a manner known from the prior art for conventional wafers 1.

[0300] Fig. 29 shows, by way of example and purely schematically, three chips with integrated photonics, which are obtained by such a cut in plan view. These represent embodiments of semiconductor devices 38 according to the application. Each of these semiconductor devices 38 comprises a chip 39, the extent of which corresponds to a chip region 4 of a wafer 1, and a portion 40 of a photonics platform 8 located thereon, the lateral extent of which, as a result of the cut, at least substantially coincides with the lateral extent of the chip 39 located thereunder. The chip 39 of the photonics platform 8 and the portion 40 thereover can be obtained from the purely schematic cross-sectional view shown in Fig. 30.

[0301] It is noted that, in this highly simplified illustration, only two superimposed regions defined by the chip 39 and the photonics device 40 are shown, without their coatings and components.

[0302] The chip 39 comprises, inter alia, a plurality of integrated electronic components 3, for example transistors and / or capacitors and / or resistors, which may, for example, be part of a processor of the chip 39, and the portion 40 of the photonics platform 8 comprises, inter alia, a plurality of electro-optical devices 15, for example as can be obtained in particular from Figs. 2 to 11 and Figs. 17 to 23.

[0303] The semiconductor devices 38 obtained by cutting the semiconductor devices according to the application, each represent a bare chip with monolithic integrated photonics, which can then be inserted into a package, as is known from conventional bare chips, and for further application.

[0304] The photonics platform portion 40 can be used, for example, to convert electrical signals from integrated electronic components of the chip 39 into optical signals, so that, for example, communication with other chips and / or other integrated electronic components 4 of the device 38 can be effected by optical means. To this end, for example, light can be modulated by a modulator 15 coupled to an integrated electronic component, for example a transistor 4, and a modulated optical signal can be received by a photodetector 15 coupled to another integrated electronic component, for example a transistor 4 of the same chip or a different chip.

Claims

1. A semiconductor device comprising a wafer (1) having a semiconductor substrate (2), and at least one integrated electronic component (3) extending in and / or on the semiconductor substrate (2), the wafer (1) having a front-end process (5) and a back-end process (6) located above the front-end process (5), the front-end process (5) including the integrated electronic component or including at least one of the integrated electronic components (3), and a photonic platform (8) fabricated on a side (9) of the wafer (1) opposite to the front-end process (5), the photonic platform (8) including at least one waveguide (12) and at least one electro-optic device (15), wherein the electro-optic device (15) of the photonic platform (8) or at least one of the electro-optic device (15) is connected to the integrated electronic component (3) of the wafer (1) or at least one of the integrated electronic components (3), wherein the photonic platform (8) includes a planarization coating (10) composed of a dielectric material and at least one additional planarization coating (13). Its features are, The planarization coating (10) has a roughness of less than 2.0 nm RMS on its side (11) away from the wafer (1), and / or at least one of the additional planarization coating (13) or additional planarization coating (14) has a roughness of less than 2.0 nm RMS on its side (14) away from the wafer (1).

2. The semiconductor device according to claim 1, characterized in that, The back-end process (6) of the wafer (1) and the photonic platform (8) include interconnect elements (7), and at least one of the integrated electronic components (3) of the wafer (1) is connected to an electro-optic device (15) of the photonic platform (8) or at least one of the electro-optic devices (15) via the interconnect elements (7).

3. The semiconductor device according to claim 1 or 2, characterized in that, The photonic platform (8) includes material deposited on the side (9) of the wafer (1) opposite to the front-end process (5).

4. The semiconductor device according to claim 3, characterized in that, The planarization coating (10) is a coating formed by deposition, and / or a coating formed by physical vapor deposition and / or atomic layer deposition of at least one coating material on the side (9) of the wafer (1) away from the front-end process (5), and the planarization coating (10) is further processed by chemical mechanical polishing and / or photoresist planarization on the side (11) away from the wafer (1) to follow up on the deposited material. And / or, the planarization coating (10) has a roughness of less than 1.0 nm RMS on its side (11) facing away from the wafer (1), And / or, the planarization coating (10) comprises or consists of spin-coated glass and / or at least one polymer and / or at least one oxide, and / or at least one nitride.

5. The semiconductor device according to claim 1, characterized in that, At least one of the additional planarization coatings (13) is made of the same material as the planarization coating (10).

6. The semiconductor device according to claim 1, characterized in that, The additional planarization coating (13) or at least one of the additional planarization coatings (13) is formed by deposition, and / or by physical vapor deposition and / or atomic layer deposition of at least one coating material on the side (9) of the wafer (1) away from the front-end process (5), and the deposited material is subsequently processed by chemical mechanical polishing and / or resist planarization on the side (14) away from the wafer (1). And / or, at least one of the additional planarization coatings (13) has a roughness of less than 1.0 nm RMS on its side (14) facing away from the wafer (1). And / or, at least one of the additional planarization coatings (13) or additional planarization coatings (13) comprises or consists of spin-coated glass and / or at least one polymer and / or at least one oxide, and / or at least one nitride.

7. The semiconductor device according to claim 1, characterized in that, At least one waveguide (12) comprises or is composed of titanium dioxide and / or aluminum nitride and / or tantalum pentoxide and / or silicon nitride and / or aluminum oxide and / or silicon oxynitride and / or lithium niobate and / or silicon, and / or indium phosphite and / or gallium arsenide and / or gallium arsenide indium and / or gallium arsenide aluminum and / or at least one dichalcogenide, and / or chalcogenide glass and / or resin or resin-containing material, and / or polymer-containing material.

8. The semiconductor device according to claim 7, characterized in that, The photonic platform (8) includes a plurality of waveguides (12), which extend at least in one portion above the other.

9. The semiconductor device according to claim 7, characterized in that, The photonic platform (8) includes at least one coupling device (32) associated with at least one of the waveguides (12), the at least one coupling device (32) being used to couple electromagnetic radiation into at least one associated waveguide (12) and / or couple electromagnetic radiation out of at least one associated waveguide (12).

10. The semiconductor device according to claim 1, characterized in that, The electro-optic device (15) or at least one of the electro-optic devices (15) includes at least one active element (16, 16a, 16b), the active element (16, 16a, 16b) comprising or composed of at least one material that absorbs electromagnetic radiation of at least one wavelength and generates an electro-optic signal due to absorption and / or the material’s refractive index changing with the presence of voltage and / or charge and / or electric field.

11. The semiconductor device according to claim 10, characterized in that, An electro-optic device (15) or at least one of the electro-optic devices (15) is provided by a modulator (15), the modulator (15) including an active element (16a), the active element (16a) having or being composed of at least one material whose refractive index changes with the presence of voltage and / or charge and / or electric field, the material including graphene and / or at least one dichalcogenide, and / or two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optic polymer and / or silicon heterostructure and / or at least one compound semiconductor. The modulator (15) includes additional active elements (16a) or electrodes, said additional active elements (16a) comprising or composed of at least one material whose refractive index varies with the presence of voltage and / or charge and / or electric field, said material comprising graphene and / or at least one dichalcogenide, and / or two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optic polymer and / or a heterostructure of silicon and / or at least one compound semiconductor. Two of the active elements (16a, 16b) or the active elements and electrodes are spaced apart from each other and / or offset from each other, such that they partially overlap.

12. The semiconductor device according to claim 10, characterized in that, The electro-optic device (15) or at least one of the electro-optic devices (15) is provided by a photodetector (15), the photodetector (15) including an active element (16), the active element (16) comprising or composed of at least one material that absorbs electromagnetic radiation of at least one wavelength and generates an electro-optic signal due to absorption, the material including graphene and / or at least one dichalcogenide, and / or two-dimensional material and / or heterostructure of germanium and / or silicon and / or at least one compound semiconductor.

13. The semiconductor device according to any one of claims 10 to 12, characterized in that, At least one plasma structure (29) is disposed on or above at least one of the active elements or active elements (16, 16a, 16b), the at least one plasma structure (29) comprising or composed of a plasma active material, the plasma structure (29) comprising at least a pair of plasma elements (30) arranged adjacent to each other, and the plasma elements (30) comprising or composed of a plasma active material, the plasma elements (30) having a portion that gradually tapers in the direction of the corresponding other plasma elements (30).

14. The semiconductor device according to claim 12, characterized in that, On at least one side of the active element or at least one active element (16, 16a, 16b), the waveguide (12) is provided with an end portion (31) that tapers gradually in the direction of the active element and terminates at a tip, wherein the taper end portion (31) extends to the active element or at least one active element (16, 16a, 16b), and / or wherein a contact element (19) is provided on each side of the taper portion (31), the contact element (19) being connected to the active element or at least one active element (16, 16a, 16b), and the contact element (19) having a portion (19a) that tapers gradually in the opposite direction, the portion (19a) being located next to the taper end portion (31) of the waveguide (12).

15. The semiconductor device according to claim 14, characterized in that, In each case, waveguides (12) are provided on both sides of an active element or at least one active element (16, 16a, 16b), the waveguides (12) having a terminal portion (31) that tapers gradually along the direction of the active element or at least one active element (16, 16a, 16b) and terminates at a tip, wherein the corresponding tapered terminal portion (31) extends to the active element or at least one active element (16, 16a, 16b), and / or wherein a contact element (19) is provided on each side of the corresponding tapered portion (31), the contact element (19) being connected to the active element or at least one active element (16, 16a, 16b), the contact element (19) having a portion (19a) that tapers gradually in the opposite direction, the portion (19a) being located next to the tapered terminal portion (31) of the corresponding waveguide (12).

16. A method for manufacturing a semiconductor device, comprising the following steps: A wafer (1) is provided, the wafer (1) having a semiconductor substrate (2), and at least one integrated electronic component (3) extending within and / or on the semiconductor substrate (2), the wafer (1) having a front-end process (5) and a back-end process (6) located above the front-end process (5), wherein the front-end process (5) includes the integrated electronic component (3) or at least one of the integrated electronic components (3). A photonic platform (8) is fabricated on the side (9) of the wafer (1) opposite to the front-end process (5). The photonic platform (8) includes at least one waveguide (12) and at least one electro-optic device (15). The fabrication of the photonic platform (8) includes fabricating a planarization coating (10), which includes applying a coating material to the side (9) of the wafer (1) opposite to the front-end process (5), and the fabrication of the photonic platform (8) includes fabricating at least one additional planarization coating (13). The feature is that the coating material of the planarization coating (10) is subsequently planarized at least on its side (11) away from the wafer (1) such that the roughness of the side is less than 2.0 nm RMS, and / or at least one of the additional planarization coating (13) or the additional planarization coating (13) is subsequently planarized at least on its side (11) away from the wafer (1) such that the roughness of the side is less than 2.0 nm RMS.

17. The method according to claim 16, characterized in that, The back-end process (6) of the provided wafer (1) includes interconnect elements (7) which are connected to the integrated electronic components (3) or at least one of the integrated electronic components (3) of the front-end process (5), and the interconnect elements (7) are fabricated in the photonic platform (8) which are connected to the interconnect elements (7) of the back-end process (6) on one hand and to the electro-optic device (15) or at least one of the electro-optic device (15) on the other hand.

18. The method according to claim 16 or 17, characterized in that, The fabrication of the photonic platform (8) includes depositing material on the side (9) of the wafer (1) away from the front-end process (5).

19. The method according to claim 16, characterized in that... The waveguide (12) or at least one of the waveguides (12) is fabricated on the side (11) of the planarization coating (10) opposite to the wafer (1).

20. The method according to claim 16, characterized in that, The fabrication of the planarization coating (10) involves the coating material being subsequently planarized at least on the side (11) of the planarization coating (10) facing away from the wafer (1) to obtain a side roughness of less than 1.0 nm RMS.

21. The method according to claim 19 or 20, characterized in that, After fabricating at least one waveguide (12), at least one additional planarization coating (13) is fabricated, the fabrication of the additional planarization coating (13) comprising coating material, depositing it onto the side (11) of the planarization coating (10) away from the wafer (1) and / or at least one waveguide (12), and then planarizing the coating material at least on the side (14) of the additional planarization coating (13) away from the wafer (1) in such a way as to obtain a side roughness of less than 1.0 nm RMS.

22. The method according to claim 21, characterized in that, The fabrication of the planarization coating (10) and / or the additional planarization coating (13) includes applying an additional coating material to the treated side after the planarization process.

23. The method according to claim 19, characterized in that, Fabrication of at least one waveguide (12) includes coating a waveguide material onto the side (11) of a planarization coating (10) facing away from the wafer (5), and then structuring the coated waveguide material by photolithography and / or reactive ion etching.

24. The method according to claim 16, characterized in that, For waveguide (12) or at least one waveguide (12), at least one coupling device (32) is manufactured for coupling electromagnetic radiation into the at least one waveguide (12) and / or for coupling electromagnetic radiation out of the at least one waveguide (12).

25. A method of manufacturing at least one semiconductor device (38), wherein a semiconductor device according to any one of claims 1 to 15 is provided and said semiconductor device is diced.

26. A semiconductor device (38) obtained by dividing a semiconductor device according to any one of claims 1 to 15.

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