A quantum random number generator

By packaging optical chips, analog IC chips, and digital IC chips on the same substrate, the problems of large size and high cost of existing quantum random number generators are solved, realizing a miniaturized and low-cost quantum random number generator suitable for devices such as mobile phones and cameras.

CN115048077BActive Publication Date: 2026-03-03HEFEI SIZHEN CHIP TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-11
Publication Date
2026-03-03

AI Technical Summary

Technical Problem

Existing quantum random number generators are large in size and expensive, making them unsuitable for mass production and difficult to apply to encryption scenarios in small devices such as mobile phones and cameras.

Method used

Optical chips, analog IC chips, and digital IC chips are packaged on the same substrate. The optical chip provides quantum entropy source signals, the analog IC chip processes the signals, and the digital IC chip generates quantum random numbers, thus realizing chip-based and integrated design.

Benefits of technology

It has achieved miniaturization, low cost and mass production of quantum random number generators, which are suitable for applications such as mobile phones and cameras.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a quantum random number generator, which uses an optical chip to replace a quantum optical system built by multiple independent optical components in an existing quantum random number generator to generate a quantum entropy source signal, meanwhile, uses an analog IC chip and a digital IC chip to replace signal processing parts such as an analog amplification filtering part, an analog-digital conversion part and a post-processing part built by multiple independent electronic chips in the existing quantum random number generator to process the quantum entropy source signal, and the optical chip, the analog IC chip and the digital IC chip are packaged on the same substrate, so that the quantum random number generator is chipped and integrated, that is, a quantum random number generator with small volume, low cost and large-scale production is provided, and can be applied to application scenarios such as mobile phones and camera encryption.
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Description

Technical Field

[0001] This application relates to the field of information security, and in particular to a quantum random number generator. Background Technology

[0002] Random numbers are a crucial resource in cryptography. Both classical and quantum cryptography have extremely strict requirements for the randomness of random numbers; in fact, the randomness of random numbers directly determines the security of most cryptographic systems. Furthermore, random numbers have wide applications outside of cryptography, playing a vital role in areas such as sampling statistics, Monte Carlo simulations, and various aspects of computational science.

[0003] Currently, based on the generation methods and characteristics of the output sequences, random number generation methods can be divided into two main categories: pseudo-random number generators and physical random number generators. Pseudo-random number generators are generally based on a preset mathematical algorithm, using available external information such as system time as a seed, and are implemented by a computer. This type of random number generator can stably output pseudo-random number sequences at extremely high speeds, and the algorithm guarantees that the output sequence has certain statistical properties. However, because pseudo-random numbers are generated based on deterministic algorithms, their randomness comes only from the randomness of the input seed. Therefore, when used frequently, it is theoretically possible to predict random numbers by statistically analyzing the generated random numbers.

[0004] Physical random number generators differ from traditional random number generators. The randomness of the random numbers they generate is based on the randomness of non-deterministic objective physical phenomena, such as atmospheric noise, electronic noise, and circuit jitter. Physical random number generators produce random numbers by detecting the results of these phenomena. If these objective physical phenomena are quantum phenomena, then this type of physical random number generator is called a quantum random number generator. In this case, these objective physical phenomena include quantum physical processes such as vacuum fluctuations, phase noise, and radiative decay. Due to the intrinsic randomness of quantum mechanics in quantum physical processes, the random numbers generated by quantum random number generators are generally considered to possess true randomness, are unpredictable, and represent an ideal form of random number generation.

[0005] However, current quantum random number generators are large and expensive, which is not conducive to large-scale production. Therefore, there is an urgent need for a small, low-cost quantum random number generator that can be mass-produced. Summary of the Invention

[0006] To address the aforementioned technical problems, this application provides a quantum random number generator, which is small in size, low in cost, and can be mass-produced.

[0007] To achieve the above objectives, the embodiments of this application provide the following technical solutions:

[0008] A quantum random number generator includes: an optical chip, an analog IC chip, and a digital IC chip packaged on the same substrate, wherein...

[0009] The analog IC chip provides a constant current source driving signal to the optical chip under the drive of the first driving signal, so that the optical chip generates a quantum entropy source signal and outputs it to the analog IC chip under the drive of the constant current source driving signal. The analog IC chip also processes the quantum entropy source signal output by the optical chip under the control of the first configuration signal to generate a first analog signal and output it to the digital IC chip.

[0010] The digital IC chip, driven by the second driving signal and controlled by the second configuration signal, processes the first analog signal to generate a quantum random number output.

[0011] Optionally, the analog IC chip includes: a first driving module, a first interface module, and a transimpedance filtering module, wherein,

[0012] Driven by the first driving signal, the first driving module provides the constant current source driving signal to the optical chip and the third driving signal to the transimpedance filtering module.

[0013] The first interface module is used to receive the first configuration signal and output the first configuration signal to the transimpedance filtering module;

[0014] Driven by the third driving signal and controlled by the first configuration signal, the transimpedance filtering module processes the quantum entropy source signal output by the optical chip to generate the first analog signal, which is then output to the digital IC chip.

[0015] Optionally, the first driving module includes: a first reference signal generation module, an optical chip driving module, and a transimpedance filter driving module, wherein,

[0016] The first reference signal generation module generates a first reference signal under the drive of the first driving signal, and outputs the first reference signal to the optical chip driving module and the transimpedance filter driving module;

[0017] The optical chip driving module provides the constant current source driving signal to the optical chip under the drive of the first reference signal;

[0018] The transimpedance filter driving module provides the third driving signal to the transimpedance filter module under the drive of the first reference signal.

[0019] Optionally, the transimpedance filtering module includes a transimpedance module and a filtering module, and the third driving signal includes a first sub-driving signal and a second sub-driving signal;

[0020] Driven by the first sub-driving signal and controlled by the first configuration signal, the transimpedance module amplifies the quantum entropy source signal output by the optical chip and generates a second analog signal to be output to the filtering module.

[0021] Driven by the second sub-driving signal and controlled by the first configuration signal, the filtering module filters the second analog signal to generate the first analog signal, which is then output to the digital IC chip.

[0022] Optionally, the digital IC chip includes: a second driving module, an analog-to-digital conversion module, a processing module, and a second interface module, wherein,

[0023] Driven by the second driving signal, the second driving module provides a fourth driving signal to the analog-to-digital conversion module and a fifth driving signal to the processing module.

[0024] Driven by the fourth driving signal, the analog-to-digital conversion module converts the first analog signal output by the analog IC chip into a first digital signal and outputs it to the processing module.

[0025] The second interface module is used to receive the second configuration signal and output the second configuration signal to the processing module;

[0026] The processing module, driven by the fifth driving signal and controlled by the second configuration signal, processes the first digital signal to generate a quantum random number, which is then output through the second interface module.

[0027] Optionally, the second driving module includes a second reference signal generation module, an analog-to-digital conversion driving module, and a processing driving module, wherein,

[0028] The second reference signal generation module generates a second reference signal under the drive of the second drive signal, and outputs the second reference signal to the analog-to-digital conversion drive module and the processing drive module;

[0029] The analog-to-digital conversion driver module provides the fourth driving signal to the analog-to-digital conversion module under the drive of the second reference signal;

[0030] The processing drive module provides the fifth drive signal to the processing module under the drive of the second reference signal.

[0031] Optionally, the processing module includes a processing unit and a state register unit, wherein,

[0032] The status register unit stores various working status instructions of the processing module. Under the control of the second configuration signal, the status register unit calls the working status instructions of the processing module to indicate that the processing module is in different working states.

[0033] When the second configuration signal is the first target signal, the processing module is in normal working condition. The processing unit receives the first digital signal output by the analog-to-digital conversion module, processes the first digital signal, and generates a quantum random number to be output to the second interface module.

[0034] Optionally, the processing module further includes: a random number detection unit and a data output switch unit;

[0035] When the second configuration signal is the first target signal and the processing module is in normal working condition, the quantum random number generated by the processing unit is first input to the data output switch unit and the random number detection unit. If the random number detection unit detects that the quantum random number meets the first preset condition, the data output switch unit outputs the quantum random number to the second interface module.

[0036] If the random number detection unit detects that the quantum random number does not meet the first preset condition, the data output switch unit turns off the output.

[0037] Optionally, the processing module further includes: an entropy source detection unit;

[0038] When the second configuration signal is the first target signal and the processing module is in normal working condition, the entropy source detection unit also receives the first digital signal output by the analog-to-digital conversion module. If the entropy source detection unit detects that the first digital signal meets the second preset condition and the random number detection unit detects that the quantum random number meets the first preset condition, then the data output switch unit outputs the quantum random number to the second interface module.

[0039] If the entropy source detection unit detects that the first digital signal does not meet the second preset condition, and / or the random number detection unit detects that the quantum random number does not meet the first preset condition, then the data output switch unit shuts off the output.

[0040] Optionally, the processing module further includes: a non-random sequence generation unit;

[0041] When the second configuration signal is the second target signal, the processing module is in the first detection state, the processing unit and the entropy source detection unit stop working, and the non-random sequence generation unit generates a non-random sequence and outputs it to the random number detection unit and the data output switch unit to detect whether the random number detection unit is working properly.

[0042] Optionally, when the second configuration signal is the third target signal, the processing module is in the second detection state, and the processing unit, the entropy source detection unit, the random number detection unit, and the data output switch unit all stop working. The first digital signal output by the analog-to-digital conversion module is directly output by the second interface module to detect the first digital signal outside the quantum random number generator.

[0043] Optionally, the digital IC chip further includes a third interface module, which is used to output the working status of the processing module and the detection results of the random number detection unit and the entropy source detection unit under different working states of the processing module.

[0044] Compared with existing technologies, the above technical solution has the following advantages:

[0045] The quantum random number generator provided in this application uses an optical chip to replace the quantum optical system, which is built from multiple independent optical components, in existing quantum random number generators to generate quantum entropy source signals. Simultaneously, it uses analog IC chips and digital IC chips to replace the signal processing sections, such as analog amplification and filtering sections, analog-to-digital conversion sections, and post-processing sections, which are built from multiple independent electronic chips in existing quantum random number generators, to process the quantum entropy source signals. Specifically, the analog IC chip provides a constant current source drive signal to the optical chip and processes the quantum entropy source signal output by the optical chip to generate a first analog signal, which is then output to the digital IC chip. The digital IC chip processes the first analog signal to generate quantum random number outputs. Furthermore, by packaging the optical chip, analog IC chip, and digital IC chip on the same substrate, the quantum random number generator is chip-based and integrated, thus providing a small-sized, low-cost, and mass-producible quantum random number generator. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 A schematic diagram of the internal architecture of a quantum random number generator provided in one embodiment of this application;

[0048] Figure 2 A schematic diagram of the internal architecture of an analog IC chip in a quantum random number generator provided in one embodiment of this application;

[0049] Figure 3 A schematic diagram of the internal architecture of an analog IC chip in a quantum random number generator provided in another embodiment of this application;

[0050] Figure 4 A schematic diagram of the internal architecture of a digital IC chip in a quantum random number generator provided in one embodiment of this application;

[0051] Figure 5 A schematic diagram of the internal architecture of a digital IC chip in a quantum random number generator provided in another embodiment of this application;

[0052] Figure 6 A schematic diagram of the internal architecture of the digital IC chip in a quantum random number generator provided in yet another embodiment of this application;

[0053] Figure 7 A schematic diagram of the internal architecture of the digital IC chip in a quantum random number generator provided in another embodiment of this application;

[0054] Figure 8 A schematic diagram of the internal architecture of the digital IC chip in a quantum random number generator provided in yet another embodiment of this application;

[0055] Figure 9 A schematic diagram of the internal architecture of the digital IC chip in a quantum random number generator provided in another embodiment of this application;

[0056] Figure 10 A schematic diagram of the internal architecture of the digital IC chip in a quantum random number generator provided in yet another embodiment of this application;

[0057] Figure 11 This is a schematic diagram of the internal architecture of the digital IC chip in a quantum random number generator provided in another embodiment of this application. Detailed Implementation

[0058] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0059] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0060] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0061] As described in the background section, current quantum random number generators are large in size and expensive, which is not conducive to large-scale production. Therefore, there is an urgent need for a quantum random number generator that is small in size, low in cost, and can be mass-produced.

[0062] The inventors discovered that existing quantum random number generators consist of an entropy source and a signal processing section. The signal processing section includes analog amplification and filtering, analog-to-digital conversion, and post-processing. The entropy source is typically a quantum optical system built from multiple independent optical components. The analog amplification and filtering, analog-to-digital conversion, and post-processing sections are usually built on a board using multiple independent electronic chips. This undoubtedly requires a large size. For example, the analog amplification and filtering section can be built from transimpedance chips and filter chips. Furthermore, although the post-processing section can be implemented using a Field Programmable Gate Array (FPGA), FPGAs achieve programmability through repeated burning of gates. Therefore, FPGAs have many redundant designs, which also makes the post-processing section large in size, expensive, and less stable. As a result, existing quantum random number generators are typically sold as half-height or full-height PCIe boards or desktop devices. It is evident that existing quantum random number generators suffer from problems such as large size, high cost, and high power consumption, making them unsuitable for large-scale production and application scenarios such as encryption in mobile phones and cameras.

[0063] Based on the above research, this application provides a quantum random number generator, such as... Figure 1 As shown, the quantum random number generator includes: an optical chip 100, an analog IC chip 200, and a digital IC chip 300 packaged on a substrate, wherein...

[0064] Driven by the first driving signal, the analog IC chip 200 provides a constant current source driving signal to the optical chip 100, so that the optical chip 100 generates a quantum entropy source signal and outputs it to the analog IC chip 200. Under the control of the first configuration signal, the analog IC chip 200 processes the quantum entropy source signal output by the optical chip 100 and generates a first analog signal and outputs it to the digital IC chip 300.

[0065] The digital IC chip 300, driven by the second driving signal and controlled by the second configuration signal, processes the first analog signal to generate a quantum random number output.

[0066] It should be noted that, since the optical chip 100, which serves as a quantum entropy source, has poor compatibility with general CMOS processes, and both the analog IC chip 200 and the digital IC chip 300 need to be fabricated using CMOS processes, in this embodiment, the optical chip 100 needs to be fabricated separately. That is, the optical chip 100 is not fabricated together with the analog IC chip 200 and the digital IC chip 300 in the CMOS process.

[0067] Furthermore, considering that the analog circuits in the analog IC chip 200 are relatively sensitive and easily interfered with by digital circuits, in this embodiment, the analog IC chip 200 and the digital IC chip 300 are fabricated as two separate chips.

[0068] Finally, the optical chip 100, the analog IC chip 200, and the digital IC chip 300 are packaged together on the same substrate to form the quantum random number generator provided in the embodiments of this application.

[0069] Comparing the quantum random number generator provided in this application embodiment with existing quantum random number generators, it can be seen that, firstly, the optical chip 100 is significantly smaller in size than a quantum optical system built from multiple independent optical components; secondly, compared to signal processing parts such as analog amplification and filtering sections, analog-to-digital conversion sections, and post-processing sections built from multiple electronic chips, the analog IC chip 200 and digital IC chip 300 are not only smaller in size, but also have lower costs and power consumption, and are suitable for large-scale production, realizing chip-based and integrated operation. This allows the quantum random number generator to be applied in scenarios such as mobile phones and camera encryption.

[0070] Furthermore, compared with the post-processing part of the quantum random number generator implemented by FPGA in the prior art, the quantum random number generator provided in this application embodiment uses digital IC chip 300 to implement the post-processing part. Since the digital IC chip 300 is specifically designed for the quantum random number generator, it does not require a lot of redundant design. Therefore, the digital IC chip in the quantum random number generator provided in this application embodiment is smaller in size, lower in cost, faster in speed, and has a significantly reduced power consumption.

[0071] It should also be noted that, in this embodiment, the optical chip 100, the analog IC chip 200, and the digital IC chip 300 can be integrated on the same chip packaging substrate through common hybrid packaging methods such as gold wire bonding and flip-chip bonding to realize the function of a complete quantum random number generator. The manufacturing process is simple and the cost is low.

[0072] Therefore, the quantum random number generator provided in this application embodiment uses an optical chip 100 to replace the quantum optical system built from multiple independent optical components in existing quantum random number generators to generate quantum entropy source signals. Simultaneously, it uses an analog IC chip 200 and a digital IC chip 300 to replace the signal processing sections such as analog amplification and filtering sections, analog-to-digital conversion sections, and post-processing sections built from multiple independent electronic chips in existing quantum random number generators to process the quantum entropy source signals. Specifically, the analog IC chip 200 provides a constant current source drive signal to the optical chip 100 and processes the quantum entropy source signal output by the optical chip 100 to generate a first analog signal, which is then output to the digital IC chip 300. The digital IC chip 300 processes the first analog signal to generate quantum random number outputs. Furthermore, by packaging the optical chip 100, analog IC chip 200, and digital IC chip 300 on the same substrate, the quantum random number generator is chip-based and integrated. In other words, this application embodiment provides a small-sized, low-cost, and mass-producible quantum random number generator.

[0073] The specific details of the optical chip 100, analog IC chip 200, and digital IC chip 300 in the quantum random number generator provided in the embodiments of this application will be described below.

[0074] The optical chip 100 can be either a quantum vacuum fluctuation-based optical chip or a spontaneously amplified radiation noise-based optical chip. This application does not limit the specific type of optical chip, as long as it can generate a quantum entropy source signal. It should be noted that the quantum entropy source signal generated by the optical chip 100 is a random simulated signal based on physical phenomena such as quantum vacuum fluctuations and spontaneously amplified radiation noise.

[0075] For analog IC chip 200, such as Figure 2As shown, the analog IC chip 200 includes: a first driving module 210, a first interface module 220, and a transimpedance filtering module 230, wherein,

[0076] The first driving module 210 provides a constant current source driving signal to the optical chip 100 and a third driving signal to the transimpedance filter module 230 under the drive of the first driving signal.

[0077] The first interface module 22 is used to receive the first configuration signal and output the first configuration signal to the transimpedance filter module 230;

[0078] Driven by the third driving signal and controlled by the first configuration signal, the transimpedance filter module 230 processes the quantum entropy source signal output by the optical chip 100 and generates a first analog signal to be output to the digital IC chip 300.

[0079] In this embodiment, the first driving signal can be provided by an external power source. That is, the external power source provides the first driving signal to the first driving module 210, so that the first driving module 210 provides a constant current source driving signal to the optical chip 100 and a third driving signal to the transimpedance filter module 230 under the drive of the first driving signal.

[0080] In this embodiment, the first interface module 220 is used to receive the first configuration signal and output the first configuration signal to the transimpedance filtering module 230. The first interface module can be a common chip configuration interface such as SPI interface, UART interface, I2C interface, etc.

[0081] Optionally, in one embodiment of this application, such as Figure 3 As shown, the first driving module 210 includes: a first reference signal generation module 211, an optical chip driving module 212, and a transimpedance filter driving module 213, wherein,

[0082] The first reference signal generation module 211 generates a first reference signal under the drive of the first driving signal, and outputs the first reference signal to the optical chip driving module 212 and the transimpedance filter driving module 213.

[0083] The optical chip driver module 212 provides a constant current source drive signal to the optical chip 100 under the drive of the first reference signal;

[0084] The transimpedance filter drive module 213 provides a third drive signal to the transimpedance filter module 230 under the drive of the first reference signal.

[0085] In this embodiment, since both the optical chip driving module 212 and the transimpedance filter driving module 213 require stable driving signals, the first reference signal generation module 211 generates a first reference signal under the drive of the first driving signal. The first reference signal may include a reference voltage and / or a reference current, so that the optical chip driving module 212 provides a constant current source driving signal to the optical chip 100 under the stable drive of the first reference signal, and the transimpedance filter driving module 213 provides a third driving signal to the transimpedance filter module 230 under the stable drive of the first reference signal.

[0086] In this embodiment, the optical chip driving module 212, driven by the first reference signal, provides a constant current source driving signal to the optical chip 100 according to the specific structure of the optical chip 100 and the required form and quantity of driving signals. The optical chip driving module 212 includes several current source and voltage source driving circuits.

[0087] Optionally, in one embodiment of this application, the following continues... Figure 3 As shown, the transimpedance filtering module 230 includes a transimpedance module 231 and a filtering module 232, and the third driving signal includes a first sub-driving signal and a second sub-driving signal.

[0088] Driven by the first sub-driving signal and controlled by the first configuration signal, the transimpedance module 231 amplifies the quantum entropy source signal output by the optical chip 100 and generates a second analog signal to be output to the filter module 232.

[0089] Driven by the second sub-driving signal and controlled by the first configuration signal, the filtering module 232 filters the second analog signal and generates a first analog signal to be output to the digital IC chip 300.

[0090] In this embodiment, the amplification factor of the quantum entropy source signal output by the transimpedance module 231 to the optical chip 100 is adjusted according to the first configuration signal. The filtering range of the second analog signal amplified by the transimpedance module 231 is also adjusted according to the first configuration signal. That is, the first configuration signal controls the transimpedance module 231 to amplify the quantum entropy source signal output by the optical chip 100 by a preset amplification factor, and controls the filtering module 232 to filter the analog signal output by the transimpedance module 231 by a preset filtering range, so as to ensure that the amplitude, bandwidth and other properties of the first analog signal output by the analog IC chip 200 match the input of the subsequent digital IC chip 300.

[0091] For digital IC chip 300, such as Figure 4 As shown, the digital IC chip 300 includes a second driving module 310, an analog-to-digital conversion module 320, a processing module 330, and a second interface module 340, wherein...

[0092] The second driving module 310, driven by the second driving signal, provides a fourth driving signal to the analog-to-digital conversion module 320 and a fifth driving signal to the processing module 330.

[0093] Driven by the fourth driving signal, the analog-to-digital conversion module 320 converts the first analog signal output by the analog IC chip 200 into a first digital signal and outputs it to the processing module 330.

[0094] The second interface module 340 is used to receive the second configuration signal and output the second configuration signal to the processing module 300;

[0095] Driven by the fifth driving signal and controlled by the second configuration signal, the processing module 330 processes the first digital signal to generate a quantum random number, which is then output through the second interface module 340.

[0096] In this embodiment, the second driving signal can be provided by an external power source. That is, the external power source provides the second driving signal to the second driving module 310, so that the second driving module 310 provides a fourth driving signal to the analog-to-digital conversion module 320 and a fifth driving signal to the processing module 330 under the drive of the second driving signal.

[0097] In this embodiment, the second interface module 340 is used to receive the second configuration signal and output the second configuration signal to the processing module 330. It is also used to output the quantum random number generated by the processing module 330. The second interface module 340 can be a common chip configuration interface such as SPI interface, UART interface, I2C interface, etc.

[0098] Optionally, in one embodiment of this application, such as Figure 5 As shown, the second driving module 310 includes a second reference signal generation module 311, an analog-to-digital conversion driving module 312, and a processing driving module 313, wherein...

[0099] The second reference signal generation module 311 generates a second reference signal under the drive of the second driving signal, and outputs the second reference signal to the analog-to-digital conversion driving module 312 and the processing driving module 313.

[0100] The analog-to-digital conversion driver module 312 provides a fourth driving signal to the analog-to-digital conversion module 320 under the drive of the second reference signal;

[0101] The processing drive module 313 provides a fifth drive signal to the processing module 330 under the drive of the second reference signal.

[0102] In this embodiment, since both the analog-to-digital conversion driving module 312 and the processing driving module 313 require stable driving signals, the second reference signal generation module 311 generates a second reference signal under the drive of the second driving signal. The second reference signal may include a reference voltage and / or a reference current, thereby enabling the analog-to-digital conversion driving module 312 to provide a fourth driving signal to the analog-to-digital conversion module 320 under the stable drive of the first reference signal, and enabling the processing driving module 313 to provide a fifth driving signal to the processing module 330 under the drive of the second reference signal.

[0103] Optionally, in one embodiment of this application, the following continues... Figure 5 As shown, the processing module 330 includes a processing unit 331 and a status register unit 332, wherein,

[0104] The status register unit 332 stores various working status instructions of the processing module 330. Under the control of the second configuration signal, the status register unit 332 calls the working status instructions of the processing module 330 to indicate that the processing module 330 is in different working states.

[0105] When the second configuration signal is the first target signal, the processing module 330 is in normal working state. At this time, the processing unit 331 receives the first digital signal output by the analog-to-digital conversion module 320, processes the first digital signal, and generates a quantum random number to be output to the second interface module 340.

[0106] In this embodiment, when the second configuration signal is the first target signal and the processing module is in normal working condition, the digital IC chip 300 normally generates quantum random number output. At this time, the processing unit 331 runs a standard quantum random number post-processing program. Commonly used post-processing algorithms include Trevisan extractor, Toeplitz extractor, m-LSB method, etc., thereby processing the first digital signal output by the analog-to-digital conversion module 320 and generating quantum random numbers to be output to the second interface module 340, which then outputs the quantum random numbers.

[0107] Further research by the inventors revealed that since the quantum random numbers generated by a quantum random number generator directly determine the security of most cryptographic systems, it is usually necessary to perform real-time testing on the quantum random number generator, including testing the output quantum random numbers and the quantum entropy source. In existing technologies, the quantum random number generator is typically tested directly using probes from an oscilloscope and a spectrum analyzer. However, this testing method is not only relatively simple in terms of test points, but it is also not permitted within the IC chip. In other words, existing testing methods cannot test the quantum random number generator provided in this application embodiment. Therefore, the inventors further designed the internal working mode of the quantum random number generator provided in this application embodiment to enable the required testing of the quantum random number generator provided in this application embodiment, which will be described in detail below.

[0108] Based on the above embodiments, optionally, in one embodiment of this application, such as Figure 6 As shown, the processing module 330 also includes: a random number detection unit 333 and a data output switch unit 334;

[0109] When the second configuration signal is the first target signal and the processing module 330 is in normal working state, the quantum random number generated by the processing unit 331 is first input to the data output switch unit 334 and the random number detection unit 333. If the random number detection unit 333 detects that the quantum random number meets the first preset condition, the data output switch unit 334 outputs the quantum random number to the second interface module 340.

[0110] If the random number detection unit 333 detects that the quantum random number does not meet the first preset condition, the data output switch unit 334 turns off the output.

[0111] In this embodiment, when the second configuration signal is the first target signal and the processing module 330 is in normal working condition, the processing unit 331 in the processing module 330 receives the first digital signal output by the analog-to-digital converter 320, processes the first digital signal to generate a quantum random number, and outputs it to the data output switch unit 334 for output. Simultaneously, it also outputs the generated quantum random number to the random number detection unit 333, which detects whether the quantum random number to be output meets the first preset condition. It should be noted that the first preset condition can be a nationally published general standard for quantum random numbers, or a higher standard set based on the nationally published general standard for quantum random numbers, depending on the specific circumstances.

[0112] If the random number detection unit 333 detects that the quantum random number to be output meets the first preset condition, that is, the detection result of the random number detection unit 333 is qualified, then the random number detection unit 333 can send an instruction signal to the data output switch unit 334, instructing the data output switch unit 334 to output the quantum random number to be output to the second interface module 340, and then output it; if the random number detection unit 333 detects that the quantum random number to be output does not meet the first preset condition, that is, the detection result of the random number detection unit 333 is unqualified, then the random number detection unit 333 can also send an instruction signal to the data output switch unit 334, instructing the data output switch unit 334 to turn off the output.

[0113] Specifically, the random number detection unit 333 may include a power-on detection unit, a single-use detection unit, and a periodic detection unit. The power-on detection unit is used to automatically perform random number detection when the quantum random number generator is powered on. The single-use detection unit and the periodic detection unit are both used to perform random number detection during the use of the quantum random number generator. The single-use detection unit is a random number detection that is automatically performed before each use of the random number generator, and the periodic detection unit is a random number detection that is automatically performed at certain time intervals.

[0114] In the above embodiments, a random number detection unit is used to detect the quantum random number to be output. As is known from the foregoing, the detection of the quantum random number generator should also include the detection of the quantum entropy source. Therefore, based on the above embodiments, in one embodiment of this application, such as... Figure 6 As shown, the processing module 330 also includes: an entropy source detection unit 335;

[0115] When the second configuration signal is the first target signal and the processing module 330 is in normal working condition, the entropy source detection unit 335 also receives the first digital signal output by the analog-to-digital conversion module 320. If the entropy source detection unit 335 detects that the first digital signal meets the second preset condition and the random number detection unit 333 detects that the quantum random number meets the first preset condition, then the data output switch unit 334 outputs the quantum random number to the second interface module 340.

[0116] If the entropy source detection unit 335 detects that the first digital signal does not meet the second preset condition, and / or the random number detection unit 333 detects that the quantum random number does not meet the first preset condition, then the data output switch unit 334 shuts down the output.

[0117] In this embodiment, when the second configuration signal is the first target signal and the processing module 330 is in normal working condition, the first digital signal output by the analog-to-digital conversion module 320 is transmitted not only to the processing unit 331 but also to the entropy source detection unit 335. The entropy source detection unit is used to detect whether the first digital signal meets the second preset condition. Since the first digital signal is a digital signal converted from the quantum entropy source signal generated by the optical chip 100 after transimpedance amplification and filtering by the analog IC chip 200, detecting the first digital signal using the entropy source detection unit 335 is equivalent to detecting the optical chip 100, which is the entropy source part. That is, the detection of the first digital signal using the entropy source detection unit 335 can be used to determine whether the optical chip 100, which is the entropy source part, is working normally. The detection algorithm used by the entropy source detection unit 335 includes publicly available algorithms such as the adaptation ratio test or the repetition counting test algorithm. It should be noted that the second preset condition can be a nationally published general standard for quantum entropy sources or a higher standard set based on the nationally published general standard for quantum entropy sources, depending on the specific circumstances.

[0118] In this embodiment, while the entropy source detection unit 335 detects the first digital signal, the random number detection unit 333 continues to detect the quantum random number to be output. Only when the entropy source detection unit 335 detects that the first digital signal meets the second preset condition, and the random number detection unit 333 detects that the quantum random number to be output meets the first preset condition, that is, when the detection results of the entropy source detection unit 335 and the random number detection unit 333 are both qualified, will the data output switch unit 334 output the quantum random number to be output to the second interface module and then output it. If either the entropy source detection unit 335 or the random number detection unit 333 fails to detect the first digital signal, the data output switch unit 334 will turn off the output.

[0119] Specifically, when the detection results of both the entropy source detection unit 335 and the random number detection unit 333 are qualified, both the entropy source detection unit 335 and the random number detection unit 333 can send instruction signals to the data output switch unit 334, instructing the data output switch unit 334 to output the quantum random number to be output to the second interface module 340. However, when the detection result of either the entropy source detection unit 335 or the random number detection unit 333 is unqualified, the entropy source detection unit 335 and / or the random number detection unit 333 that shows the unqualified detection result can send instruction signals to the data output switch unit 334, instructing the data output switch unit 334 to turn off the output.

[0120] Alternatively, the data output switch unit 334 can receive the detection results from the entropy source detection unit 335 and the random number detection unit 333. The data output switch unit 334 determines whether the received detection results from the entropy source detection unit 335 and the random number detection unit 333 are both qualified. Only when the received detection results from the entropy source detection unit 335 and the random number detection unit 333 are both qualified will it instruct itself to output the quantum random number to be output to the second interface module 340, and then output it. In other cases, it instructs itself to turn off the output.

[0121] In the above embodiments, the specific working conditions inside the processing module are described when the second configuration signal is the first target signal and the processing module is in normal working condition. However, in practical applications, in order to ensure the accuracy of the detection of the quantum random number generator, it is also necessary to detect the random number detection unit 333. Therefore, based on the above embodiments, optionally, in one embodiment of this application, such as... Figure 7 As shown, the processing module 330 also includes a non-random sequence generation unit 336;

[0122] When the second configuration signal is the second target signal, the processing module 330 is in the first detection state. At this time, both the processing unit 331 and the entropy source detection unit 335 stop working. Figure 7 (Not shown in the figure) The non-random sequence generation unit 336 generates a non-random sequence and outputs it to the random number detection unit 333 and the data output switch unit 334 to detect whether the random number detection unit 333 is working properly.

[0123] In this embodiment, the non-random sequence may be pre-stored in the non-random sequence generation unit 336, or it may be generated in real time based on preset computer instructions. This application does not limit this, and it depends on the specific situation.

[0124] In this embodiment, after the non-random sequence generation unit 336 outputs the non-random sequence to the random number detection unit 333 and the data output switch unit 334, if the random number detection unit 333 is working normally, it will detect that the non-random sequence does not meet the first preset condition, i.e., the detection result is unqualified. In this case, the data output switch unit will turn off the output. If the random number detection unit 333 is not working normally, it may also detect the non-random sequence as qualified. In this case, the data output switch unit may output the non-random sequence, thus verifying that the random number detection unit 333 is not working normally. At this time, an error needs to be reported and the quantum random number generator should be stopped.

[0125] As previously known, the random number detection unit 333 may include a power-on detection unit 10, a single-time detection unit 20, and a periodic detection unit 30. Therefore, in this embodiment, the first detection mode may also be subdivided into multiple sub-modes based on the separate detection of the power-on detection unit, the single-time detection unit, and the periodic detection unit.

[0126] Optionally, in one embodiment of this application, such as Figure 8 As shown, only the power-on detection unit 10 in the random number detection unit 333 is detected; this is the power-on detection function test mode.

[0127] Optionally, in another embodiment of this application, such as Figure 9 As shown, only the single-time detection unit 20 in the random number detection unit 333 is detected; this is the single-time detection function test mode.

[0128] Optionally, in another embodiment of this application, such as Figure 10 As shown, only the period detection unit 30 in the random number detection unit 333 is detected; this is the period detection function test mode.

[0129] It should be noted that all three detection modes above perform statistical analysis on the input quantum random number and then compare it with a predetermined threshold to determine whether the quantum random number is qualified. However, the statistical methods and thresholds of these three detection modes may be different. Therefore, the first preset condition for judging whether a quantum random number is qualified needs to be adapted accordingly.

[0130] Considering that in practical applications, it is also necessary to output the raw entropy source data collected by the analog-to-digital conversion module 320 to the outside of the quantum random number generator for related tests, therefore, optionally, in one embodiment of this application, as... Figure 11 As shown, when the second configuration signal is the third target signal, the processing module 330 is in the second detection state. At this time, the processing unit 331, the entropy source detection unit 335, the random number detection unit 333, and the data output switch unit 334 all stop working. The first digital signal output by the analog-to-digital conversion module is directly output by the second interface module 340 to detect the first digital signal outside the quantum random number generator.

[0131] Based on any of the above embodiments, in one embodiment of this application, such as Figures 6-11 As shown, the digital IC chip also includes a third interface module 350, which is used to output the working status of the processing module 330, as well as the detection results of the random number detection unit 333 and the entropy source detection unit 335 under different working states of the processing module 330.

[0132] Specifically, such as Figure 6As shown, when the second configuration signal is the first target signal and the processing module 330 is in normal working condition, the third interface module 350 outputs information indicating that the processing module 330 is in normal working condition, such as the corresponding number "000", and outputs whether the detection results of the random number detection unit 333 and the entropy source detection unit 335 are qualified when the processing module 330 is in normal working condition. Once the detection result of the random number detection unit 333 or the entropy source detection unit 335 shows that it is unqualified, the unqualified detection result is output as an error through the third interface module.

[0133] like Figures 7-10 As shown, when the second configuration signal is the second target signal and the processing module 330 is in the first test state, the third interface module 350 outputs information indicating that the processing module 330 is in the first test state, such as the corresponding number "001". At this time, the random number detection unit 333 inputs a non-random sequence. If the random number detection unit is working normally, its detection result should be unqualified. If the random number detection unit is not working normally, its detection result may show qualified. The third interface module 350 also outputs the detection result of the random number detection unit 333 to determine whether the random number detection unit 333 is working normally based on the detection result output by the third interface module 350. Specifically, when the power-on detection unit 10, the single detection unit 20, and the periodic detection unit 30 in the random number detection unit 333 are tested one by one, the third interface module 350 outputs the detection results of the power-on detection unit 10, the single detection unit 20, and the periodic detection unit 30.

[0134] like Figure 11 As shown, when the second configuration signal is the third target signal and the processing module 330 is in the second test state, the first digital signal output by the analog-to-digital converter module 320 is directly output by the second interface module 340. At this time, the third interface module 350 outputs information about the processing module 330 being in the second test state, such as the corresponding number "002".

[0135] In this embodiment, the third interface module 350 may be a UART interface.

[0136] It should be noted that when the second configuration signal is the first target signal, the processing module 330 is in normal working condition, which means that the digital IC chip 300 is in normal working condition.

[0137] When the second configuration signal is the second target signal, and the processing module 330 is in the first test state (i.e., the digital IC chip 300 is in the first test state), since it is not necessary to process the quantum entropy source signal output by the optical chip 100 at this time, the analog IC chip 200 can be in a low-power state under the control of the first configuration signal. Specifically, as shown... Figure 3As shown, the first configuration signal can be transmitted through the first interface module 220 to the optical chip driver module 212 and the transimpedance filter driver module 213. Figure 3 (Not shown in the diagram), so that both the optical chip driver module 212 and the transimpedance filter driver module 213 are in a low-power, or even non-operating, state; similarly, as Figures 7-10 As shown, at this time, the digital IC chip 300 can put the analog-to-digital conversion driver module 312 in a low-power state under the control of the second configuration signal. Specifically, the second configuration signal is transmitted to the analog-to-digital conversion driver module 312 through the second interface module 340 so that the analog-to-digital conversion driver module 312 is in a low-power state or even in a non-working state.

[0138] When the second configuration signal is the third target signal, the processing module 330 is in the second test state, which means that the digital IC chip 300 is in the second test state.

[0139] It should also be noted that when the second configuration signal is the fourth target signal, the processing module 330 is in a sleep state. At this time, all units in the processing module 330 stop working, and the digital IC chip 300 is in a low-power state under the control of the second configuration signal, that is, the digital IC chip 300 is also in a sleep state. For details, please refer to [reference needed]. Figure 6 As shown, the second configuration signal is transmitted to the analog-to-digital conversion driver module 312 and the processing driver module 313 through the second interface module 340, so that both the analog-to-digital conversion driver module 312 and the processing driver module 313 are in a low-power state. Similarly, the analog IC chip 200 is also in a low-power state under the control of the first configuration signal, that is, the analog IC chip 200 is also in a sleep state. For details, refer to... Figure 3 As shown, the first configuration signal is transmitted to the optical chip driver module 212 and the transimpedance filter driver module 213 through the first interface module 220, so that the optical chip driver module 212 and the transimpedance filter driver module 213 are both in a low-power state, waiting for the first interface module 220 to input a new first configuration signal, and the second interface module 340 to input a new second configuration signal, so as to re-wake up the analog IC chip 200 and the digital IC chip 300, so that the optical chip driver module 212 and the transimpedance filter driver module 213 in the analog IC chip 200 resume normal operation, and the analog-to-digital conversion driver module 312 and the processing driver module 313 in the digital IC chip 300 also resume normal operation, that is, both the analog IC chip 200 and the digital IC chip 300 are working normally.

[0140] In summary, the quantum random number generator provided in this application uses an optical chip to replace the quantum optical system built from multiple independent optical components in existing quantum random number generators to generate quantum entropy source signals. Simultaneously, it uses analog IC chips and digital IC chips to replace the signal processing sections such as analog amplification and filtering sections, analog-to-digital conversion sections, and post-processing sections built from multiple independent electronic chips in existing quantum random number generators to process the quantum entropy source signals. Furthermore, by packaging the optical chip, analog IC chip, and digital IC chip on the same substrate, the quantum random number generator is chip-based and integrated, thus providing a small-sized, low-cost, and mass-producible quantum random number generator that can be applied to applications such as mobile phones and camera encryption.

[0141] The various parts of this manual are described in a combination of parallel and progressive methods. Each part focuses on the differences between the other parts, and the same or similar parts can be referred to each other.

[0142] The features described above regarding the disclosed embodiments can be substituted or combined with each other to enable those skilled in the art to implement or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A quantum random number generator, characterized in that, include: Optical chips, analog IC chips, and digital IC chips are packaged on the same substrate, among which... The analog IC chip provides a constant current source driving signal to the optical chip under the drive of the first driving signal, so that the optical chip generates a quantum entropy source signal and outputs it to the analog IC chip under the drive of the constant current source driving signal. The analog IC chip also processes the quantum entropy source signal output by the optical chip under the control of the first configuration signal to generate a first analog signal and output it to the digital IC chip. The digital IC chip, driven by the second driving signal and controlled by the second configuration signal, processes the first analog signal to generate quantum random number output. The analog IC chip includes: a first driving module, a first interface module, and a transimpedance filtering module, wherein, Driven by the first driving signal, the first driving module provides the constant current source driving signal to the optical chip and the third driving signal to the transimpedance filtering module. The first interface module is used to receive the first configuration signal and output the first configuration signal to the transimpedance filtering module; The transimpedance filtering module, driven by the third driving signal and controlled by the first configuration signal, processes the quantum entropy source signal output by the optical chip to generate the first analog signal and output it to the digital IC chip. The first driving module includes: a first reference signal generation module, an optical chip driving module, and a transimpedance filter driving module, wherein, The first reference signal generation module generates a first reference signal under the drive of the first driving signal, and outputs the first reference signal to the optical chip driving module and the transimpedance filter driving module; The optical chip driving module provides the constant current source driving signal to the optical chip under the drive of the first reference signal; The transimpedance filter driving module provides the third driving signal to the transimpedance filter module under the drive of the first reference signal.

2. The quantum random number generator according to claim 1, characterized in that, The transimpedance filtering module includes a transimpedance module and a filtering module, and the third driving signal includes a first sub-driving signal and a second sub-driving signal; Driven by the first sub-driving signal and controlled by the first configuration signal, the transimpedance module amplifies the quantum entropy source signal output by the optical chip and generates a second analog signal to be output to the filtering module. Driven by the second sub-driving signal and controlled by the first configuration signal, the filtering module filters the second analog signal to generate the first analog signal, which is then output to the digital IC chip.

3. The quantum random number generator according to claim 1, characterized in that, The digital IC chip includes: a second driver module, an analog-to-digital conversion module, a processing module, and a second interface module, wherein... Driven by the second driving signal, the second driving module provides a fourth driving signal to the analog-to-digital conversion module and a fifth driving signal to the processing module. Driven by the fourth driving signal, the analog-to-digital conversion module converts the first analog signal output by the analog IC chip into a first digital signal and outputs it to the processing module. The second interface module is used to receive the second configuration signal and output the second configuration signal to the processing module; The processing module, driven by the fifth driving signal and controlled by the second configuration signal, processes the first digital signal to generate a quantum random number, which is then output through the second interface module.

4. The quantum random number generator according to claim 3, characterized in that, The second driving module includes a second reference signal generation module, an analog-to-digital conversion driving module, and a processing driving module, wherein, The second reference signal generation module generates a second reference signal under the drive of the second drive signal, and outputs the second reference signal to the analog-to-digital conversion drive module and the processing drive module; The analog-to-digital conversion driver module provides the fourth driving signal to the analog-to-digital conversion module under the drive of the second reference signal; The processing drive module provides the fifth drive signal to the processing module under the drive of the second reference signal.

5. The quantum random number generator according to claim 3, characterized in that, The processing module includes a processing unit and a status register unit, wherein, The status register unit stores various working status instructions of the processing module. Under the control of the second configuration signal, the status register unit calls the working status instructions of the processing module to indicate that the processing module is in different working states. When the second configuration signal is the first target signal, the processing module is in normal working condition. The processing unit receives the first digital signal output by the analog-to-digital conversion module, processes the first digital signal, and generates a quantum random number to be output to the second interface module.

6. The quantum random number generator according to claim 5, characterized in that, The processing module further includes: a random number detection unit and a data output switch unit; When the second configuration signal is the first target signal and the processing module is in normal working state, the quantum random number generated by the processing unit is first input to the data output switch unit and the random number detection unit. If the random number detection unit detects that the quantum random number meets the first preset condition, the data output switch unit outputs the quantum random number to the second interface module. If the random number detection unit detects that the quantum random number does not meet the first preset condition, the data output switch unit turns off the output.

7. The quantum random number generator according to claim 6, characterized in that, The processing module further includes: an entropy source detection unit; When the second configuration signal is the first target signal and the processing module is in normal working condition, the entropy source detection unit also receives the first digital signal output by the analog-to-digital conversion module. If the entropy source detection unit detects that the first digital signal meets the second preset condition and the random number detection unit detects that the quantum random number meets the first preset condition, then the data output switch unit outputs the quantum random number to the second interface module. If the entropy source detection unit detects that the first digital signal does not meet the second preset condition, and / or the random number detection unit detects that the quantum random number does not meet the first preset condition, then the data output switch unit shuts off the output.

8. The quantum random number generator according to claim 7, characterized in that, The processing module further includes: a non-random sequence generation unit; When the second configuration signal is the second target signal, the processing module is in the first detection state, the processing unit and the entropy source detection unit stop working, and the non-random sequence generation unit generates a non-random sequence and outputs it to the random number detection unit and the data output switch unit to detect whether the random number detection unit is working properly.

9. The quantum random number generator according to claim 7, characterized in that, When the second configuration signal is the third target signal, the processing module is in the second detection state, and the processing unit, the entropy source detection unit, the random number detection unit and the data output switch unit all stop working. The first digital signal output by the analog-to-digital conversion module is directly output by the second interface module to detect the first digital signal outside the quantum random number generator.

10. The quantum random number generator according to claim 7, 8 or 9, characterized in that, The digital IC chip also includes a third interface module, which is used to output the working status of the processing module and the detection results of the random number detection unit and the entropy source detection unit under different working states of the processing module.

Citation Information

Patent Citations

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