A method for preparing a probe card

Abstract

The present invention provides a method for preparing a probe card. The present invention forms etching holes with basically the same structure on the substrate by an etching process, so as to make full preparations for the subsequent manufacture of the probes with basically the same specifications. The first conductive layer including a base layer and a probe part located at the etching hole is formed on the surface of the substrate, and the base layer is etched to obtain a base connected to the probe part, and then the first insulating layer is filled with the etched part of the base layer, and the second conductive layer is formed on the surface of the first insulating layer, and then the second conductive layer is etched to obtain a circuit connected to the base, and then a second insulating layer is formed on the surface of the circuit and the part etched by the second conductive layer, and finally the substrate is separated to obtain the probe card, thereby better controlling the manufacturing cost.

Description

Technical Field

[0001] The present invention relates to the technical field of probe preparation, and in particular to a method for preparing a probe card. Background Art

[0002] Wafer testing refers to the electrical testing of the wafer before the chip is packaged to confirm whether its electrical characteristics and logical functions meet the specifications and prevent subsequent packaging waste. The equipment used in wafer testing includes a tester, a probe station and a probe card. In wafer testing, the test signal sent by the tester is transmitted to the probe card on the tester via the communication interface. The probes on the probe card contact the pads of the chip on the wafer for communication. The tester compares the data returned by the chip to complete the test. The probes on the probe card need to frequently press the pads on the chip, which will cause wear of the probes. Therefore, the probe card is an indispensable consumable in wafer testing. In the prior art, the probe card in wafer testing can be divided into blade probe cards, cantilever beam probe cards, thin film probe cards and vertical probe cards according to their shapes. Among them, when the probe card tests the wafer, it is required to produce small needle marks, meet the requirements of parallel testing, array arrangement, etc., and also have good contact characteristics and high-frequency transmission characteristics. However, due to the manufacturing process of the probe card, some current probes are prepared by the copper electroplating process, which leads to a high cost of the probe card. Summary of the invention

[0003] In view of this, it is necessary to provide an environmentally friendly and cost-effective probe card preparation method.

[0004] The present invention provides a method for preparing a probe card, the method comprising the following steps:

[0005] Etching a surface of the substrate to obtain an etching hole for subsequently forming a probe;

[0006] Forming a first conductive layer on the surface; wherein the first conductive layer includes a base layer and a probe portion located at the etched hole;

[0007] Etching the base layer to obtain a base portion, wherein the base portion is connected to the probe portion;

[0008] Filling the etched portion of the base layer with a first insulating layer;

[0009] forming a second conductive layer on a surface of the first insulating layer;

[0010] etching the second conductive layer to obtain a circuit connected to the base;

[0011] forming a second insulating layer on the surface of the circuit and on the portion of the second conductive layer etched away;

[0012] The substrate is separated to obtain the probe card.

[0013] The present invention also provides another method for preparing a probe card, the method comprising the following steps:

[0014] Etching a surface of the substrate to obtain an etching hole for subsequently forming a probe;

[0015] forming a sacrificial layer on the surface, wherein the sacrificial layer covers the etched hole;

[0016] Forming a first conductive layer on the surface of the sacrificial layer; wherein the first conductive layer includes a base layer and a probe portion located at the etched hole;

[0017] Etching the base layer to obtain a base portion, wherein the base portion is connected to the probe portion;

[0018] Filling the etched portion of the base layer with a first insulating layer;

[0019] forming a second conductive layer on a surface of the first insulating layer;

[0020] etching the second conductive layer to obtain a circuit connected to the base;

[0021] forming a second insulating layer on the surface of the circuit and on the portion of the second conductive layer etched away;

[0022] The substrate is separated to obtain the probe card.

[0023] Furthermore, after the etching portion of the base layer is filled with the first insulating layer, the preparation method further comprises:

[0024] The sacrificial layer is removed by an ultrasonic water washing process to separate the substrate.

[0025] Furthermore, the sacrificial layer is formed of a high molecular polymer film material that is easily soluble in water.

[0026] Furthermore, the sacrificial layer is sodium polystyrene sulfonate.

[0027] Furthermore, the first conductive layer and the second conductive layer are respectively nano-copper and / or nano-copper alloy.

[0028] Furthermore, both the first insulating layer and the second insulating layer have a certain elasticity.

[0029] Furthermore, the first insulating layer and the second insulating layer are both polyimide layers.

[0030] Furthermore, the thickness of the polyimide layer is 15-30 μm.

[0031] Furthermore, the thickness of the circuit is 2-10 μm.

[0032] Compared with the prior art, the present invention has the following beneficial effects: the present invention forms the etched holes with basically the same structure on the substrate through an etching process, thereby making full preparations for the subsequent manufacture of the probes with basically the same specifications, and forms the first conductive layer including the base layer and the probe part located at the etched holes on the surface of the substrate, etches the base layer to obtain the base connected to the probe part, fills the etched part of the base layer with the first insulating layer, forms the second conductive layer on the surface of the first insulating layer, etches the second conductive layer to obtain a circuit connected to the base, forms a second insulating layer on the surface of the circuit and the part etched by the second conductive layer, and finally separates the substrate to obtain the probe card, thereby better controlling the manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 The present invention is a flowchart of a method for preparing a probe card.

[0034] Figure 2 A schematic diagram corresponding to a portion of a probe card preparation method of the present invention.

[0035] Figure 3 Another partial schematic diagram corresponding to a method for preparing a probe card of the present invention.

[0036] Figure 4 The present invention is a flowchart of another method for preparing a probe card. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the protection scope of the present invention. It is understood that the drawings are only provided for reference and illustration, and are not used to limit the present invention. The connection relationship shown in the drawings is only for the convenience of clear description and does not limit the connection method.

[0038] It should be noted that when a component is considered to be "connected" to another component, it can be directly connected to another component, or there may be an intermediate component at the same time. Unless otherwise defined, all technical and scientific terms used in this document have the same meaning as those generally understood by technicians in the technical field of the present invention. It should also be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or the internal connection of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0039] It should also be noted that in the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0040] See also Figure 1-3 The present invention provides a method for preparing a probe card, the method comprising the following steps:

[0041] Etching a surface of the substrate 10 to obtain an etching hole 11 for subsequent formation of a probe (S10);

[0042] forming a first conductive layer 20 on the surface; wherein the first conductive layer 20 comprises a base layer 21 and a probe portion 22 located at the etched hole 11 (S20);

[0043] The base layer 21 is etched to obtain a base portion 211, wherein the base portion 211 is connected to the probe portion 22 (S30);

[0044] Filling the etched portion of the base layer 21 with a first insulating layer 30 (S40);

[0045] forming a second conductive layer 40 on a surface of the first insulating layer 30 (S50);

[0046] Etching the second conductive layer 40 to obtain a circuit 50 connected to the base 211 (S60);

[0047] forming a second insulating layer 60 on the surface of the circuit 50 and on the etched portion of the second conductive layer 40 (S70);

[0048] The substrate 10 is separated to obtain the probe card 70 ( S80 ).

[0049] See also Figure 4 , and combined with Figure 2-3 The present invention also provides another method for preparing a probe card, the method comprising the following steps:

[0050] Etching a surface of the substrate 10 to obtain an etching hole 11 for subsequent formation of a probe (S10);

[0051] forming a sacrificial layer 80 on the surface; wherein the sacrificial layer 80 covers the etched hole 11 (S110);

[0052] A first conductive layer 20 is formed on the surface of the sacrificial layer 80; wherein the first conductive layer 20 includes a base layer 21 and a probe portion 22 located at the etched hole 11 (S120);

[0053] The base layer 21 is etched to obtain a base portion 211, wherein the base portion 211 is connected to the probe portion 22 (S30);

[0054] Filling the etched portion of the base layer 21 with a first insulating layer 30 (S40);

[0055] forming a second conductive layer 40 on a surface of the first insulating layer 30 (S50);

[0056] Etching the second conductive layer 40 to obtain a circuit 50 connected to the base 211 (S60);

[0057] forming a second insulating layer 60 on the surface of the circuit 50 and on the etched portion of the second conductive layer 40 (S70);

[0058] The substrate 10 is separated to obtain the probe card 70 ( S80 ).

[0059] In the above two probe card preparation methods, the substrate 10 is a metal substrate or a silicon substrate.

[0060] Before etching a surface of the substrate 10 to obtain an etching hole 11 for subsequently forming a probe, the preparation method further includes:

[0061] Thermally oxidizing the substrate 10 so as to form a first oxide layer 12 on the surface of the substrate 10 (S11);

[0062] The first oxide layer 12 is etched to form an opening penetrating the first oxide layer 12, wherein the shape and size of the opening are etched according to the structure of the probe part 22, and the shape of the opening can be a triangle, a rectangle, a circle or other shapes (S12);

[0063] Etching the unoxidized substrate 10 from the opening to form a tapered hole, wherein the opening and the tapered hole constitute the etched hole 11 (S13);

[0064] The tapered hole is thermally oxidized to form a second oxide layer 13 on the inner surface of the tapered hole; wherein the second oxide layer 13 is connected to the first oxide layer 12 (S14).

[0065] By forming a uniform oxide layer on the surface of the substrate 10 and the surface of the etching hole 11 , the service life of the substrate 10 is increased, so that the substrate 10 can be reused.

[0066] In some embodiments, the thickness of the substrate 10 is 0.3-0.6 mm, and the thickness of the first oxide layer 12 and the second oxide layer 13 is 0.5 μm. A hole penetrating the photoresist is obtained by coating a photoresist on the surface of the first oxide layer 12, exposing and developing the photoresist, and etching the first oxide layer 12 using the developed photoresist as a mask to obtain the opening, and then etching the unoxidized substrate using the etched first oxide layer 12 as a mask to obtain the conical hole.

[0067] After the etched portion of the base layer 21 is filled with the first insulating layer 30 (S40), the preparation method further includes:

[0068] The sacrificial layer 80 is removed by an ultrasonic water washing process, so that the substrate 10 is separated ( S90 ).

[0069] The sacrificial layer 80 is formed of a high molecular polymer film material that is easily soluble in water, so that the sacrificial layer 80 can be removed in an environmentally friendly manner by using an ultrasonic water washing process, thereby reducing the pollution to the environment during the preparation of the probe card 70 .

[0070] In a preferred solution, the sacrificial layer 80 is sodium polystyrene sulfonate.

[0071] The first conductive layer 20 and the second conductive layer 40 are respectively made of metal materials. Preferably, the metal materials are nano copper and / or nano copper alloy.

[0072] In one embodiment, the metal material is made by a pressure sintering process.

[0073] Preferably, the first conductive layer 20 and the second conductive layer 40 are made of nano-copper pressure sintering process. Compared with other conductive metal materials, nano-copper has lower raw material input cost and lower sintering process temperature to save production cost. In the preparation process, pressure-assisted processing is used to shorten the preparation process and increase production efficiency. In addition, the use of nano-copper as raw material can effectively avoid the generation of polluted waste liquid during the preparation process, making the production process more environmentally friendly.

[0074] In some implementations, the metal material may also be an alloy of nano copper and other metals, so that the prepared probe portion 22 may have different properties to meet the testing requirements of different chips.

[0075] The first insulating layer 30 and the second insulating layer 60 both have a certain elasticity, so that the probe part 22 of the manufactured probe card 70 has a certain buffering effect during testing, so that each probe part 22 can fully contact the chip on the wafer, so as to improve the sensitivity of the probe card 70 in contact with the chip, and make the probe part 22 produce smaller needle marks when contacting the chip, so that the service life of the probe card 70 is longer, and the area of ​​the needle marks produced by the probe part 22 on the chip is reduced.

[0076] Furthermore, the first insulating layer 30 and the second insulating layer 60 are both polyimide layers. The polyimide layers are formed by liquid phase coating and then thermal curing.

[0077] Preferably, the thickness of the polyimide layer is 15-30 μm. The thickness of the circuit 50 is 2-10 μm, so that the circuit 50 can be completely covered between the first insulating layer 30 and the second insulating layer 60, thereby better protecting the circuit 50 and the base 211, thereby improving the service life of the probe card 70.

[0078] In the specification and claims of the present application, the words "include / comprise" and the words "have / include" and their variations are used to specify the existence of stated features, values, steps or components, but do not exclude the existence or addition of one or more other features, values, steps, components or combinations thereof.

[0079] Some features of the present invention are described in different embodiments for clarity of description, however, these features may also be described in combination in a single embodiment. Conversely, some features of the present invention are described in only a single embodiment for brevity, however, these features may also be described in different embodiments alone or in any suitable combination.

[0080] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a probe card, characterized in that: The preparation method comprises the following steps: Etching a surface of the substrate to obtain an etching hole for subsequently forming a probe; Forming a first conductive layer on the surface; wherein the first conductive layer includes a base layer and a probe portion located at the etched hole; Etching the base layer to obtain a base portion, wherein the base portion is connected to the probe portion; Filling the etched portion of the base layer with a first insulating layer; forming a second conductive layer on a surface of the first insulating layer; etching the second conductive layer to obtain a circuit connected to the base; forming a second insulating layer on the surface of the circuit and on the portion of the second conductive layer etched away; The substrate is separated to obtain the probe card.

2. A method for preparing a probe card according to claim 1, characterized in that: The first conductive layer and the second conductive layer are respectively nano copper and / or nano copper alloy.

3. A method for preparing a probe card according to claim 1, characterized in that: The first insulating layer and the second insulating layer both have certain elasticity. The first insulating layer and the second insulating layer are both polyimide layers. The thickness of the polyimide layer is 15-30 μm.

4. The method for preparing a probe card according to claim 1, characterized in that: The thickness of the circuit is 2-10 μm.

5. A method for preparing a probe card, characterized in that: The preparation method comprises the following steps: Etching a surface of the substrate to obtain an etching hole for subsequently forming a probe; forming a sacrificial layer on the surface, wherein the sacrificial layer covers the etched hole; Forming a first conductive layer on the surface of the sacrificial layer; wherein the first conductive layer includes a base layer and a probe portion located at the etched hole; Etching the base layer to obtain a base portion, wherein the base portion is connected to the probe portion; Filling the etched portion of the base layer with a first insulating layer; forming a second conductive layer on a surface of the first insulating layer; etching the second conductive layer to obtain a circuit connected to the base; forming a second insulating layer on the surface of the circuit and on the portion of the second conductive layer etched away; The substrate is separated to obtain the probe card.

6. A method for preparing a probe card according to claim 5, characterized in that: After the etching portion of the base layer is filled with the first insulating layer, the preparation method further comprises: The sacrificial layer is removed by an ultrasonic water washing process to separate the substrate.

7. A method for preparing a probe card according to claim 6, characterized in that: The sacrificial layer is formed of a high molecular polymer film material that is easily soluble in water.

8. A method for preparing a probe card according to claim 7, characterized in that: The sacrificial layer is sodium polystyrene sulfonate.

9. The method for preparing a probe card according to claim 5, characterized in that: The first insulating layer and the second insulating layer both have certain elasticity. The first insulating layer and the second insulating layer are both polyimide layers. The thickness of the polyimide layer is 15-30 μm.

10. The method for preparing a probe card according to claim 5, characterized in that: The thickness of the circuit is 2-10 μm.

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