Photomask for semiconductor lithography process, method of manufacturing the same, lithography method and photomask process

Abstract

A photomask for a semiconductor lithography process, a method of manufacturing the photomask, a lithography method, and a photomask process. The photomask for a semiconductor lithography process includes a substrate, a photomask pattern disposed on the substrate, and a light absorbing border surrounding the photomask pattern. The light absorbing border is inserted from at least two edges of the substrate to define a surrounding area outside the light absorbing border. In some designs, a first surrounding area extends from a periphery of the light absorbing border to a first edge of the substrate, and a second surrounding area extends from the periphery of the light absorbing border to a second edge of the substrate, where the first edge of the substrate and the second edge of the substrate are on opposite sides of the photomask pattern.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a photomask and a photomask process for semiconductor lithography. BACKGROUND

[0002] The following relates to semiconductor manufacturing, photomasks for semiconductor lithography processes, photomask manufacturing methods, deep ultraviolet (UV) semiconductor lithography, and related technology. SUMMARY

[0003] In some embodiments, a method of manufacturing a photomask for use in a semiconductor lithography process performed using light of a lithography wavelength is provided. The method includes the steps of providing a substrate coated with a light absorbing layer that absorbs light of the lithography wavelength, and removing portions of the light absorbing layer to form a photomask pattern and a light absorbing border on the substrate. The light absorbing border surrounds the photomask pattern. The light absorbing border includes portions of the light absorbing layer that are not removed. The step of removing includes the step of removing portions of the light absorbing layer on at least two sides of the light absorbing border to define a surrounding region.

[0004] In some embodiments, a semiconductor lithography method is provided, including the steps of mounting the aforementioned photomask on a photomask stage, wherein the surrounding region contacts a plurality of support pads of the photomask stage, performing a semiconductor lithography using light of the lithography wavelength that passes through the photomask, and removing the photomask from the photomask stage after performing the semiconductor lithography.

[0005] In some embodiments, a photomask process is provided, including the steps of providing a substrate coated with a light absorbing layer and a resist layer, and performing an exposure / development cycle and an etching step to remove portions of the light absorbing layer to define (i) a non-absorbing pattern region of the photomask pattern surrounded by the light absorbing border and (ii) a surrounding region outside the light absorbing border in which the light absorbing layer is removed by the exposure / development cycle.

[0006] In some embodiments, a photomask for use in a semiconductor lithography process is provided. The photomask includes a substrate, a photomask pattern disposed on the substrate, and a light absorbing border surrounding the photomask pattern. The light absorbing border includes a light absorbing layer disposed on the substrate that absorbs light of a lithography wavelength. A surrounding region is located outside the light absorbing border on at least two sides of the light absorbing border. The light absorbing layer is not disposed on the substrate in the surrounding region. BRIEF DESCRIPTION OF DRAWINGS

[0007] The various features illustrated in the drawings can not be drawn to scale. Accordingly, the dimensions of the various features can be arbitrarily expanded or reduced for the clarity of discussion.

[0008] Figure 1A A lithography system including a lithography mask is schematically illustrated;

[0009] Figure 1B A schematic illustration of a lithography mask is schematically illustrated in Figure 1A

[0010] Figure 2 A plan view of a lithography mask is schematically illustrated;

[0011] Figure 3 A plan view of a lithography mask is schematically illustrated in Figure 2 , wherein a support pad of the reticle stage is schematically indicated;

[0012] Figure 4 A plan view of a lithography mask having reduced light absorbing borders is schematically illustrated;

[0013] Figure 5 A plan view of a lithography mask having reduced light absorbing borders is schematically illustrated in Figure 4 , wherein a support pad of the reticle stage is schematically indicated;

[0014] Figure 6 A reticle manufacturing method is schematically illustrated.

[0015]

List of Symbols

[0016] 10: light source system

[0017] 12: reticle stage

[0018] 14: imaging system

[0019] 16: wafer stage

[0020] 20, 20 A : reticle

[0021] 22: semiconductor wafer

[0022] 24: double arrow

[0023] 30, 32: support pad

[0024] 34: opening

[0025] 36: central opening

[0026] 40: substrate

[0027] 40 E1 ~ 40 E4 : edge

[0028] 42: reticle pattern

[0029] ​50: light absorbing boundary

[0030] 52: opening

[0031] 60: light absorbing boundary

[0032] 62, 64: peripheral region

[0033] 66, 68: light absorbing region

[0034] 80: photomask blank

[0035] 82: light absorbing layer

[0036] 84: resist layer

[0037] 90: exposure / development cycle

[0038] 92: etching step

[0039] 94: operation

[0040] FV: direction

[0041] L: light

[0042] V-V: line segment DETAILED DESCRIPTION

[0043] The following disclosure provides many different embodiments, or examples, for implementing various characteristics of the provided subject matter. Each example should be taken not to limit the present disclosure but to provide illustrations of the many possible ways of implementing the various features of the present disclosure. For example, although the following description describes forming a first feature over or on a second feature, this can include embodiments where the first and second features are formed in direct contact, and can also include embodiments where additional features are formed between the first and second features such that the first and second features can not be in direct contact. Furthermore, the present disclosure can repeat certain elements or / and letters in various examples. This repetition is for simplicity and clarity and does not itself dictate a relationship between the various embodiments or configurations discussed.

[0044] In addition, spatially relative terms, such as "beneath", "below", "lower", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptions used herein interpreted accordingly.

[0045] Referring to Figure 1A With Figure 1B Wherein Figure 1AA lithography system including a lithography mask is schematically illustrated. Figure 1B A schematic view of a lithography mask in Figure 1A is schematically illustrated. The semiconductor lithography apparatus includes a light source system 10, a mask stage 12 (sometimes also referred to as a reticle stage 12 or other similar nomenclature), an imaging system 14, and a wafer stage 16. Light L generated using the light source system 10 is used to perform semiconductor lithography at a lithography wavelength selected based on factors such as the feature size to be lithographically transferred from a mask 20 (sometimes also referred to as a reticle 20 or similar nomenclature) mounted on the mask stage 12 to a semiconductor wafer 22 mounted on the wafer stage 16. For example, the lithography process can use light L in the visible wavelength range, in which case the lithography wavelength is in the range of 400 nm to 700 nm (corresponding to a photon energy range of 1.77 eV to 3.10 eV), or the lithography wavelength is ultraviolet (UV) light below 400 nm (corresponding to a photon energy greater than 3.10 eV). In some non-limiting illustrative embodiments, the lithography process is a deep UV semiconductor lithography process, such as using a lithography wavelength of 193 nm in one non-limiting illustrative example, or a lithography wavelength of 248 nm in another non-limiting illustrative example. In some non-limiting illustrative embodiments, the lithography wavelength is 280 nm or less.

[0046] The light source system 10 includes a light source suitable for generating light L at the design reference lithography wavelength. As a non-limiting example, for 193 nm deep UV semiconductor lithography, an excimer laser with argon fluoride (ArF) is a suitable light source. As another non-limiting example, for 248 nm deep UV semiconductor lithography, an excimer laser with krypton fluoride (KrF) is a suitable light source. The light source system 10 optionally also includes optics for shaping the light L to uniformly illuminate the mask 20 mounted on the mask stage 12.

[0047] Continuing with reference to Figure 1A and Figure 1B , Figure 1B A schematic view of a lithography mask in Figure 1A is schematically illustrated. The view in the downward direction indicated by the line segment V-V in O . As Figure 1BAs shown in FIG. 1, the reticle stage 12 includes two support pads 30, 32 that support the reticle 20 on the reticle stage 12. Optionally, a securing mechanism is provided to secure the reticle 20 on the support pads 30, 32. For example, the illustrative reticle stage 20 includes an opening 34 that is connected to a vacuum pump (not shown) to secure the reticle 20 on the support pads 30, 32. This securing mechanism is sometimes referred to as a vacuum chuck. In other embodiments, the reticle 20 can be secured on the support pads 30, 31 via an electrostatic chuck that includes electrodes embedded in or formed by the support pads 30, 32. In other embodiments, an adhesive or the like is used to secure the reticle 20 on the support pads 30, 31. The reticle stage 12 further includes a central opening 36 that is aligned with a central region of the reticle 20, as seen by the alignment of the central opening 36 of the reticle stage 20 with the reticle 20 O .

[0048] Returning Figure 1A to show the reticle 20 in a schematic side cross-sectional view, the reticle 20 includes a substrate 40 on which a reticle pattern 42 is disposed. The substrate 40 is transmissive to the light L such that the light L is transmitted through the substrate 40 and the reticle pattern 42. For example, in some non-limiting illustrative embodiments, the substrate can be quartz, titanium dioxide (Ti02), doped silicon dioxide (Si02), or another material that is transparent to the lithography wavelength L. Typically, the reticle pattern 42 includes a patterned light-absorbing layer, such as a metal layer, such that the light L is transmitted through regions of the reticle pattern 42 where the light-absorbing layer has been removed. For example, in some non-limiting illustrative embodiments, the light-absorbing layer of the reticle pattern 42 can be a metal layer such as chromium, CrN, CrON, CrCON, or another material that absorbs the lithography wavelength L. The imaging system 14 typically includes an objective lens and / or other optical elements, such as additional lenses and / or mirrors, to image the reticle pattern 42 onto the surface of the semiconductor wafer 22.

[0049] The semiconductor wafer 22 can be a silicon wafer, a silicon germanium wafer, a gallium arsenide wafer, an indium phosphide wafer, etc. (these are merely some non-limiting illustrative examples). Depending on the stage of the semiconductor process, the surface of the semiconductor wafer 22 can include various layers, such as thermal or deposited oxide layers, epitaxially deposited layers, metal layers, various combinations, etc., which can be variously patterned and shaped according to a particular semiconductor device process workflow, of which the semiconductor lithography process is a part. For the semiconductor lithography process of the present disclosure, the surface of the semiconductor wafer 22 is typically coated with a resist (e.g., a photoresist) that is sensitive to the lithography wavelength of light L, such that the photomask pattern is photochemically imprinted onto the resist, which is imaged onto the resist-coated surface of the semiconductor wafer 22 by the imaging system 14. Following this exposure in the semiconductor lithography workflow, the semiconductor wafer 22 is removed from the wafer stage 16, and the resist is then developed using a suitable developer formulation to form openings in the resist by removing the portions of the resist that were exposed to the light L (in the case of a positive resist) or by removing the portions of the resist that were not exposed to the light L (in the case of a negative resist). The openings thus formed in the developed resist are congruent with the imaged photomask pattern 42. Following the development step, further semiconductor processing steps can be performed, such as etching the underlying layers via the openings in the developed resist, or applying a coating that adheres in the openings of the developed resist, etc., and then stripping the resist. This is merely one non-limiting illustrative example of a possible semiconductor lithography process workflow, and variations of this workflow are contemplated.

[0050] In some non-limiting embodiments, the semiconductor lithography process is performed in a step-and-shoot sequence to form an array of photochemical imprints of the photomask pattern 42 on the surface of the semiconductor wafer 22. This approach is suitable, for example, as part of a semiconductor process for forming an array of semiconductor dies on the semiconductor wafer 22. To implement this step-and-shoot sequence, the wafer stage 16 is suitably a step-and-scan stage, which is schematically indicated by the double arrow 24. Typically, a step-and-scan stage operates in two orthogonal directions (e.g., x and y directions), but the double arrow 24 indicates only one of these two orthogonal stage movements. At each stage position, a shutter (not shown) is opened to briefly expose a location on the surface of the semiconductor wafer 22 to form a photochemical imprint of the imaged photomask pattern 42 at that location; the wafer stage 24 then steps the wafer 22 to the next location and repeats the process to form an array of photochemical imprints of the imaged photomask pattern 42 extending across the surface of the semiconductor wafer 22.

[0051] Figure 1A With Figure 1BOnly illustrative aspects of certain illustrative versions of a typical semiconductor lithography apparatus are presented. Additional and / or different aspects can be included, depending on the particular type of semiconductor lithography being performed. For example, the lithography system can be an immersion lithography system in which a purified water or other fluid is disposed in the space between the objective lens and the surface of the semiconductor wafer 22, for example to provide improved index matching. Alternatively, the lithography system can be a non-immersion lithography system that does not use an immersion fluid. As another non-limiting illustrative variation, if the lithography wavelength is strongly absorbed by air, then an EUV lithography system suitably further includes a vacuum chamber in which the light source system 10, the reticle stage 12, the imaging system 14, and the wafer stage 16 are disposed. Such a vacuum environment is useful, for example, in extreme ultraviolet (EUV) lithography in which the lithography wavelength is in the EUV range (10-124 nm, corresponding to a photon energy range of 10-124 eV).

[0052] With continued reference to Figure 1A , Figure 1B , the reticle 20 optionally further includes a pellicle (not shown) disposed over the reticle pattern 42. The purpose of the optional pellicle is to isolate any particles that land on the surface of the reticle from the reticle pattern 42 that is imaged onto the semiconductor wafer 22. Thus, the pellicle keeps any such particles out of the focal plane, thereby reducing the impact of any such particles on the photochemical imprinting of the reticle pattern.

[0053] As previously mentioned, the reticle stage 12 includes a central opening 36, as can be seen in Figure 1A , Figure 1B , the central opening 36 is aligned with a central region of the reticle 20 (as shown, the central opening 36 of the reticle stage 20 is aligned with the reticle outline 20 Figure 1B in O ). More specifically, the central opening 36 of the reticle stage 20 is aligned with the reticle pattern 42 to allow light L that is transmitted through the reticle pattern 42 to pass through the opening 36 to the imaging system 14. In some embodiments, instead of the central opening 36, the reticle stage 12 can include a continuous transparent plate (not shown) made of a material that is transparent to the lithography light L, in which case the transparent plate can extend over the area of the central opening 36.

[0054] Referring now to Figure 2 , Figure 2 , an illustrative reticle 20 A can be mounted on a reticle stage 12 of an illustrative semiconductor lithography apparatus of Figure 1A , Figure 1B . Figure 2 The view in A is an upward view of the reticle 20 Figure 1A in the direction FV indicated. That is, Figure 2Figure 1 is a front view of a reticle 20 A having a reticle pattern 42 disposed on a surface of a substrate 40. (Hereinafter, for convenience, the surface is referred to as the front surface of the substrate 40.) In addition to the reticle pattern 42, the reticle 20 A further includes a light absorbing border 50 disposed on the same front surface of the substrate 40 as the reticle pattern 42. The light absorbing border 50 surrounds the reticle pattern 42.

[0055] The light absorbing border 50 comprises a light absorbing layer disposed on the substrate 40 that absorbs the lithography wavelength of light L. For example, in some non-limiting illustrative embodiments, the light absorbing layer of the light absorbing border 50 can be a metal layer, such as chromium, CrN, CrON, CrCON; or another material that absorbs the lithography wavelength L. In some embodiments, the light absorbing layer that makes up the light absorbing border 50 is also the same material that makes up the absorbing regions of the reticle pattern 42, where both features are formed in a single lithography exposure / development cycle. For example, starting with a substrate coated with a blanket light absorbing layer and at least one resist layer, a lithography exposure / development cycle step can be performed to remove portions of the blanket light absorbing layer to define the non-absorbing pattern regions of the reticle pattern 42, while leaving other portions of the blanket light absorbing layer to define the absorbing pattern regions, and also leaving portions of the blanket light absorbing layer to define the light absorbing border 50. As shown in Figure 2 The light absorbing border can include one or more isolated openings (i.e., isolated non-absorbing regions) 52 for various purposes, such as to provide a window for optical sensors (not shown) of the reticle stage 12, such as a transmission image sensor (TIS), an integrated lens interferometer at sensor (ILIAS).

[0056] In the illustrative reticle 20 A , the light absorbing border 50 extends to all of the outermost edges 40 E1 , 40 E2 , 40 E3 , 40 E4 (notice that the substrate 40 is shown in side cross-sectional view in Figure 1A ; in the front view of Figure 2 , the edges 40 E1 , 40 E2 , 40 E3 , 40 E4). The light absorbing border 50 provides certain benefits. For example, when using a step-and-repeat sequence to form an array of photochemical imprints of the reticle pattern 42 on the surface of the semiconductor wafer 22, the light absorbing border 50 blocks light L at the edges of the reticle pattern 42 to inhibit optical cross-talk between adjacent photochemical imprints of the reticle pattern 42 on the surface of the semiconductor wafer 22. Another benefit is that the light absorbing border 50 blocks light from any sensors or other components of the reticle stage 12 that are exposed to light L, which light can have an adverse effect on operation and / or operational lifetime.

[0057] extending the light absorbing border 50 to all edges 40 E1 , 40 E2 , 40 E3 , 40 E4 Also, reticle manufacturing time can be reduced. For example, consider a case where the reticle fabrication process begins with a substrate coated with a blanket light absorbing layer and a resist layer, where the lithographic exposure step uses e-beam writing to expose the resist regions to be removed. In this case, designing the light absorbing border 50 to extend to all edges 40 E1 , 40 E2 , 40 E3 , 40 E4 substantially reduces e-beam writing time, since in this case exposure to the e-beam is only within the reticle pattern 42. In this case, no e-beam exposure is performed on the relatively large outer region occupied by the light absorbing border 50, except for any isolation apertures 52 that can be formed in the light absorbing border 50 to accommodate optical sensors, etc.

[0058] However, with reference to Figure 3 it is recognized herein that Figure 2 a reticle 20 A has the disadvantage of having a light absorbing border 50 that extends to all edges 40 E1 , 40 E2 , 40 E3 , 40 E4 of the substrate 40. Figure 3 depicts a reticle 20 A along a viewing direction represented by arrow FV in Figure 1A , where the two support pads 30, 32 on which the reticle is supported on the reticle stage 12 are also represented by Figure 3The shaded area is schematically indicated. It can be seen that the two support pads 30, 32 contact a large area of ​​the light-absorbing boundary 50. It is understood herein that the two support pads 30, 32 can adhere to the light-absorbing boundary 50. For example, if the support pads 30, 32 are metal, and the light-absorbing boundary 50 is made of metal or a metal alloy, such as chromium, CrN, CrON, CrCON, a cold weld can form between the metal support pads 30, 32 and the light-absorbing boundary 50. This may wear down and / or damage the photomask 20 in various ways. A and / or photomask stage 12. For example, when photomask 20 A When the photomask stage 12 is unloaded, some metal or metal alloy at the light absorption boundary 50 may remain on the support pads 30 and 32. This will affect the photomask 20. A Undesirable openings are left in the light absorption boundary 50, where metal or metal alloys are stripped away, and metal or metal alloy residues are also left on the support pads 30 and 32 of the photomask stage 12. If the photomask 20 is... A If the photomask is cold-welded to the photomask stage 12, the cold weld may break, potentially leading to the application of excessive force to the photomask 20. A Forced uninstallation. This excessive force may cause the photomask to 20... A Fracture, and / or may cause the photomask stage 12 to fracture or be subjected to stress, thereby reducing the lifespan of the photomask stage. Cold solder fracture may also remove particles from the photomask and / or the photomask stage, which may contaminate the lithography system.

[0059] Reference Figure 4 The image shows a photomask 20, which reduces or eliminates the light absorption boundary 50, resulting in... Figure 2 Photomask 20 A The problem lies with the support pads 30 and 32, which are cold-welded or otherwise bonded to the photomask stage 12. Figure 2 Photomask 20 A Same, Figure 4 The photomask 20 includes a substrate 40 (see Figure 1A and Figure 1B The photomask pattern 42 is on the substrate 40, and includes a light absorption boundary 60 surrounding the photomask pattern 42. The light absorption boundary 60 also includes a light absorption layer disposed on the substrate 40, which absorbs light L of the lithography wavelength. However, Figure 4 Photomask 20 and Figure 2 Photomask 20 A The difference lies in the light absorption boundary 60 from the two edges 40 of the substrate 40. E1 40 E2 Peripheral regions 62 and 64 are inserted to define the area outside the light absorption boundary 60. Peripheral regions 62 and 64 do not include the light absorption layer constituting the light absorption boundary 60. Illustratively, peripheral regions 62 and 64 extend from the outer periphery of the light absorption boundary 60 to the edge 40 of the substrate 40.E1 40 E2 In some non-limiting illustrative embodiments, with Figure 2 Photomask 20 A Same, Figure 4 The light absorption boundary 60 of the photomask 20 may be made of chromium, CrN, CrON, CrCON, or another material that absorbs the lithography wavelength L. In some embodiments, the light absorption layer constituting the light absorption boundary 60 is also the same material constituting the absorption region of the photomask pattern 42, wherein two features are produced in a single lithography exposure / development cycle. For example, starting from a substrate coated with a blanket light absorption layer and at least one resist layer, a lithography exposure / development cycle may be performed to remove portions of the blanket light absorption layer to define the non-absorbing pattern region of the photomask pattern 42 and the surrounding regions 62, 64, while leaving other portions of the blanket light absorption layer to define the absorption pattern region of the photomask pattern 42, and also leaving portions of the blanket light absorption layer to define the light absorption boundary 60.

[0060] Reference Figure 5 , Figure 4 The photomask 20 again along Figure 1A The observation direction, indicated by arrow FV, is shown in the diagram, where the two support pads 30 and 32 supporting the photomask 20 on the photomask stage 12 are also... Figure 5 The shaded areas are schematically indicated. It can be seen that, in the case of photomask 20, the photomask 20 is in contact with the support pads 30 and 32. A The area of ​​the light absorption boundary 50 is much larger than that of the light absorption boundary 60 at the contact of the two support pads 30, 32 (see [reference]). Figure 3 The reduced contact area is also in Figure 1A and Figure 1B The diagram schematically indicates that the reduced width of the photomask 20 is shown in a schematic side sectional view.

[0061] exist Figure 5 In the illustrative example, there is some overlap between the light absorption boundary 60 and the support pads 30 and 32, but this area is larger than... Figure 2 Photomask 20 A The overlap between the light absorption boundary 50 and the support pads 30, 32 is much smaller. Although not shown, in some variations, it is expected that there may be no overlap at all between the light absorption boundary 60 and the support pads 30, 32.

[0062] Due to the two edges 40 of the substrate 40 aligned with the support pads 30 and 32 E1 40 E2 The contact area between the inserted photomask 20 and the light absorption boundary 60 is greatly reduced, and the photomask 20 ACompared to the wider boundary 50, the likelihood of the light absorption boundary 60 of the photomask 20 forming a cold solder joint or otherwise adhering to the support pads 30, 32 is greatly reduced. Most of the contact area between the photomask 20 and the support pads 30, 32 is occupied by the surrounding regions 62, 64. In the surrounding regions 62, 64, the support pads 30, 32 contact the substrate 40, or possibly an optional overlay (not shown) disposed on the substrate, which is transmissive to the lithography wavelength L. In some non-limiting illustrative embodiments, the substrate material is quartz, TiO2, doped SiO2, etc. These (and most other typical) substrate materials are not metallic and generally do not form a cold solder joint with the metallic support pads 30, 32, and generally do not adhere to the support pads 30, 32. Therefore, reducing or eliminating the problem of the light absorption boundary causing the photomask to form a cold solder joint or otherwise adhere to the support pads of the photomask stage is significantly reduced compared to the photomask 20. A This reduces wear and / or damage to the photomask 20 and / or photomask stage 12.

[0063] In an illustrative example, the photomask stage 12 has two illustrative support pads 30, 32 that support the photomask 20 on the stage 12. This is a typical configuration because the two support pads 30, 32 supporting the photomask 20 are close to the opposite edges 40 of the photomask 20. E1 40 E2 Sufficient and balanced support is provided for the photomask 20 on the photomask stage 12. Therefore, in the illustrative embodiment, from these two edges 40... E1 40 E2 Inserting the light absorption boundary 60 is sufficient, so that the two illustrative surrounding regions 62 and 64 are close to the two edges 40. E1 40 E2 .

[0064] like Figure 4 and Figure 5 As shown, the light absorption boundary 60 does not originate from the other two edges 40. E3 40 E4 Insertion, because the light absorption boundary 60 is close to these edges 40 E3 40 E4 The portion should not contact the support pads 30 and 32. Keep it close to these edges 40. E3 40 E4It is advantageous to have intact boundary portions, as this reduces manufacturing time. In embodiments where the photomask pattern 42 and surrounding regions 62, 64 are created in a single lithography exposure / development cycle, the cycle involves electron beam writing to expose the resist region to be removed, with the surrounding regions 62, 64 being electron beam written. Therefore, in these embodiments, it is advantageous to provide two surrounding regions 62, 64 in which the support pads 30, 32 contact the photomask 20, but the light-absorbing boundary 60 extends upward to the edge 40. E3 40 E4 The support pad does not contact the photomask 20, as this reduces the electron beam writing time.

[0065] On the other hand, if a variable photomask stage with contact pads is used, the contact pads contacting areas near three or even all four edges of the photomask, then the light absorption boundary can be inserted from each of the three or four edges near the contact pads, leaving three or even four surrounding areas (variations not shown).

[0066] Figure 4 The light absorption boundary 60 of the photomask 20 is parallel to the substrate edge 40. E1 40 E2 The side profile Figure 2 Photomask 20 A The corresponding side of the light absorption boundary 50 is narrow. However, Figure 4 The light absorption boundary 60 of the photomask 20 should perform the same as... Figure 2 Photomask 20 A The light absorption boundary 50 has the same function. These functions include blocking light L at the edge of the photomask pattern 42 to suppress optical crosstalk between adjacent photochemical imprints of the photomask pattern 42 on the surface of the semiconductor wafer 22 when using a step sequence; and blocking light from any sensor or other element of the photomask stage 12 that is exposed to light L, which may adversely affect operation and / or operating life.

[0067] To achieve the primary function of suppressing crosstalk between adjacent photochemical imprints, the light absorption boundary 60 appropriately surrounds the photomask pattern 42 on all four sides, as shown below. Figure 4 As shown. Furthermore, the width of the light absorption boundary 60 on each side should be sufficient to provide crosstalk suppression. The minimum width providing crosstalk suppression can be determined by the ray tracing model of the lithography system, or empirically by fabricating several test masks with different boundary widths and performing a test step-by-step lithography sequence to determine the optimal minimum width. In some non-limiting illustrative embodiments, the light absorption boundary 60 extends from its outer periphery to the edge 40 of the substrate. E1 40 E2The width of the surrounding areas 62, 64 is at least three times the width of the light absorbing border 60. In some non-limiting illustrative embodiments, the area of the surrounding areas 62, 64 is at least two times the area of the light absorbing border 60.

[0068] To achieve the second function of blocking light L from any light shielded sensor or other component of the reticle stage 12, one or more isolated light absorbing regions 66 are optionally located in the surrounding areas 62, 64, wherein each isolated light absorbing region 66 is surrounded by the surrounding areas 62, 64. Thus, a light absorbing layer comprising the light absorbing border 60 is disposed on the substrate 40 in each isolated light absorbing region 66. The fabrication of the isolated light absorbing regions 66 can be suitably accomplished during the exposure / development cycle that defines the reticle pattern 42 and the light absorbing border 60 by not performing e-beam writing in regions that become the isolated light absorbing regions 66. In a variant approach, one or more such light absorbing regions 68 can be connected with, rather than isolated from, the light absorbing border 60. Although the optional isolated and / or connected light absorbing regions 66, 68 increase the contact area with the support pads 30, 32, the total contact area is greatly reduced compared to the wider light absorbing border 50 of the prior art. Figure 2 the reticle 20 A The total contact area is greatly reduced compared to the wider light absorbing border 50 of the prior art.

[0069] Reference is now made to Figure 6 An illustrative method for fabricating a reticle having a substrate 40, a reticle pattern 42 disposed on the substrate, and a light absorbing border 60 surrounding the reticle pattern 42 is described, wherein the light absorbing border 60 comprises a light absorbing layer disposed on the substrate 40 that absorbs light L of a lithography wavelength, and wherein surrounding areas 62, 64 are located outside the light absorbing border 60 on at least two sides of the light absorbing border 60, wherein the surrounding areas are free of the light absorbing layer on the substrate. The method comprises the steps of: providing a reticle blank 80 comprising a substrate 40 coated with a light absorbing layer 82 and a resist layer 84, the substrate 40 being the substrate 40 of the fabricated reticle 20.

[0070] The exposure / development cycle 90 is performed as follows. Electron beam writing is performed to expose selected portions of the resist layer 84. Optionally, a post-exposure bake (PEB) is then performed, which may depend on the type of resist constituting the resist layer 84. After electron beam writing and the optional PEB, the resist is developed using a chemical developer designed to develop the type of resist constituting the resist layer 84. If the resist layer 84 is a positive resist, the chemical developer removes the resist from those areas exposed to the electron beam during electron beam writing. Alternatively, if the resist layer 84 is a negative resist, the chemical developer removes the resist from those areas not exposed to the electron beam during electron beam writing. In a variation, electron beam writing is replaced by a lithography step, in which light is applied to expose selected portions of the resist layer 84. (In this variation, the resist layer 84 contains photoresist). Exposure / development cycle 90 is operated to form an opening in resist layer 84 to selectively expose light-absorbing layer 82 in areas of photomask pattern 42 and surrounding areas 62, 64, which will be opened (i.e., uncoated with light-absorbing layer).

[0071] Continue to refer to Figure 6 In etching step 92, portions of the light-absorbing layer 82 are removed, exposed by openings in the resist layer 84, which are formed by exposure / development cycle 90. Etching step 92 can be performed using chemical etching, plasma etching (e.g., reactive-ion etching, RIE), or any other etching technique operable to etch chromium, CrN, CrON, CrCON, or other materials constituting the light-absorbing layer 82. Thus, etching step 92 forms the area to be opened (i.e., uncoated with the light-absorbing layer) of the photomask pattern 42 and the surrounding areas 62, 64. After etching step 92, in operation 94, the resist is stripped, leaving the photomask 20, which includes the patterned area 42 and the light-absorbing boundary 60, and the surrounding areas 62, 64 located at least on both sides of the light-absorbing boundary 60 outside the light-absorbing boundary 60.

[0072] Advantageously, Figure 6 The method forms the desired surrounding regions 62, 64 using the same process sequence 90, 92, 94 as the photomask pattern 42. Therefore, the photomask fabrication time is increased only by the additional electron beam writing time involved in the area to be removed in etching step 92 to form the light-absorbing layer 82 of the surrounding regions 62, 64. Advantageously, the formation of the surrounding regions 62, 64 does not require additional exposure / development cycles and does not require additional etching steps.

[0073] The photomask process for fabricating photomask 20 is a simplified illustrative example, and a given photomask process can optionally include additional fabrication steps. As one non-limiting example, if photomask pattern 42 is fabricated as an attenuated phase shift mask (APSM) pattern in which a photoabsorbing layer disposed in the absorptive pattern region is non-uniform in thickness, then additional photomask fabrication steps can precede the illustrated exposure / development cycle 90. These prior fabrication steps can include a first exposure / development cycle (preceding exposure / development cycle 90) in which openings are formed in a resist, through which the photoabsorbing layer 82 is thinned in some regions of the photomask pattern to produce a variation in thickness of the photoabsorbing layer in the photomask pattern. In the final APSM photomask pattern, the variation in thickness provides an interference with light L that increases the contrast of the photochemical imprint of photomask pattern 42 on the surface of semiconductor wafer 22.

[0074] In the following, some additional embodiments are described.

[0075] In non-limiting illustrative embodiments, a method of fabricating a photomask for use in a semiconductor lithography process performed using a lithography wavelength of light includes providing a substrate coated with a photoabsorbing layer that absorbs the light of the lithography wavelength, and removing portions of the photoabsorbing layer to form a photomask pattern and a photoabsorbing border on the substrate. The photoabsorbing border surrounds the photomask pattern, and the photoabsorbing border includes a portion of the photoabsorbing layer that is not removed. The step of removing includes removing the portions of the photoabsorbing layer on at least two sides of the photoabsorbing border to define a surrounding region.

[0076] In some embodiments, the surrounding region extends from an outer perimeter of the photoabsorbing border to an edge of the substrate.

[0077] In some embodiments, a width of the surrounding region from the outer perimeter of the photoabsorbing border to the edge of the substrate is at least three times a width of the photoabsorbing border.

[0078] In some embodiments, the surrounding region includes a first surrounding region extending from the outer perimeter of the photoabsorbing border to a first edge of the substrate, and a second surrounding region extending from the outer perimeter of the photoabsorbing border to a second edge of the substrate, wherein the first edge of the substrate and the second edge of the substrate are on opposite sides of the photomask pattern.

[0079] In some embodiments, an area of the surrounding region is at least twice an area of the photoabsorbing border.

[0080] In some embodiments, the step of removing forms one or more isolated photoabsorbing regions, each isolated photoabsorbing region surrounded by the surrounding region, in which the photoabsorbing layer is not removed.

[0081] In some embodiments, the lithography wavelength is 280 nm or less.

[0082] In some embodiments, the substrate is transparent to light of the lithography wavelength.

[0083] In some embodiments, the light absorbing layer is a metal layer.

[0084] In some embodiments, the light absorbing layer comprises chromium.

[0085] In some embodiments, the substrate comprises quartz, titanium dioxide (TiO2), or doped silicon dioxide (SiO2).

[0086] In some embodiments, the removing step forms a mask pattern comprising a plurality of absorbing patterned regions of the light absorbing layer that are not removed and a plurality of non-absorbing regions of the light absorbing layer that are removed by the removing step.

[0087] In some embodiments, the method further comprises, prior to the removing step, performing an exposure / development cycle and an etch to create a thickness variation of the light absorbing layer in the mask pattern. The mask pattern comprises a decaying phase shift mask pattern in which the thickness of the light absorbing layer disposed in the absorbing patterned regions is non-uniform.

[0088] In some embodiments, a semiconductor lithography method is provided, comprising the steps of: mounting the aforementioned mask on a mask stage, wherein the surrounding regions contact a plurality of support pads of the mask stage; performing a semiconductor lithography using light of a lithography wavelength that passes through the mask; and removing the mask from the mask stage after performing the semiconductor lithography.

[0089] In non-limiting illustrative embodiments, a mask for a semiconductor lithography process performed using light of a lithography wavelength is disclosed. The mask includes a substrate, a mask pattern disposed on the substrate, and a light absorbing border surrounding the mask pattern. The light absorbing border comprises a light absorbing layer disposed on the substrate, the light absorbing layer absorbing light of the lithography wavelength. A surrounding region is located outside the light absorbing border on at least two sides of the light absorbing border. The light absorbing layer is not disposed on the substrate in the surrounding region.

[0090] In some embodiments, the light absorbing border is inserted from at least two edges of the substrate to define the surrounding region outside the light absorbing border.

[0091] In some embodiments, the surrounding region comprises a first surrounding region extending from an outer periphery of the light absorbing border to a first edge of the substrate and a second surrounding region extending from the outer periphery of the light absorbing border to a second edge of the substrate. The first edge of the substrate and the second edge of the substrate are located on opposite sides of the mask pattern.

[0092] In some embodiments, the light absorbing border includes a metal layer disposed on the substrate.

[0093] In non-limiting illustrative embodiments, a lithography system for performing a semiconductor lithography process using light of a lithography wavelength is disclosed. The lithography system includes a mask as described in the previous paragraph, a wafer table to hold a semiconductor wafer, a mask table to secure the mask to the mask table in a surrounding area, and a light source system to image a mask pattern of the mask secured on the mask table onto the semiconductor wafer held by the wafer table.

[0094] In non-limiting illustrative embodiments, a mask for use in a semiconductor lithography process performed using light of a lithography wavelength is disclosed. The mask includes a substrate, a mask pattern disposed on the substrate, and a light absorbing border surrounding the mask pattern. The light absorbing border includes a light absorbing layer disposed on the substrate, the light absorbing layer absorbing light of the lithography wavelength. A surrounding area is outside the light absorbing border on at least two sides of the light absorbing border. The light absorbing layer is not disposed on the substrate in the surrounding area. The surrounding area extends from a periphery of the light absorbing border to an edge of the substrate.

[0095] In non-limiting illustrative embodiments, a mask process includes the steps of providing a substrate coated with a light absorbing layer and a resist layer, and performing an exposure / development cycle and an etching step to remove portions of the light absorbing layer to define (i) a non-absorbing pattern area of the mask pattern surrounded by the light absorbing border and (ii) a surrounding area outside the light absorbing border in which the light absorbing layer is removed by the exposure / development cycle.

[0096] In some embodiments, the mask process is a diminishing phase shift mask process, the diminishing phase shift mask process further including performing a first exposure / development cycle and a first etching step prior to the exposure / development cycle, the first exposure / development cycle and the first etching step creating a thickness variation of the light absorbing layer in the mask pattern.

[0097] In non-limiting illustrative embodiments, a mask for use in a semiconductor lithography process is disclosed. The mask includes a substrate, a mask pattern disposed on the substrate, and a light absorbing border surrounding the mask pattern. The light absorbing border is inset from at least two edges of the substrate to define a surrounding area outside the light absorbing border.

[0098] In a non-limiting illustrative embodiment, a method of manufacturing a mask for use in a semiconductor lithography process performed using light of a lithography wavelength is disclosed. The method includes the steps of: providing a substrate coated with a light absorbing layer that absorbs light of the lithography wavelength; and removing portions of the light absorbing layer to form a mask pattern and a light absorbing border on the substrate. The light absorbing border surrounds the mask pattern. The light absorbing border includes portions of the light absorbing layer that are not removed. The step of removing includes the step of removing portions of the light absorbing layer on at least two sides of the light absorbing border to define a surrounding region.

[0099] A semiconductor lithography method includes the steps of: mounting the mask manufactured according to the previous paragraph on a mask stage, wherein the surrounding region contacts a support pad of the mask stage; performing semiconductor lithography using light of the lithography wavelength that passes through the mask; and removing the mask from the mask stage after performing the semiconductor lithography. Advantageously, removing the light absorbing layer in the surrounding region reduces or eliminates the possibility of cold welding between the mask and the contact support pad.

[0100] The features of the embodiments described above can be used as a basis for the design or modification of other processes and structures for achieving the same purposes and / or achieving the same advantages of the embodiments introduced herein. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific embodiments described herein. It is therefore to be understood that the application can be practiced otherwise than specifically described, without materially departing from the spirit and scope of the application.

Claims

1. A method for manufacturing a photomask for use in a semiconductor lithography process performed using light of a lithography wavelength, characterized in that, The method comprises the steps of: providing a substrate coated with a light-absorbing layer that absorbs the light at the lithography wavelength; and removing portions of the light-absorbing layer to form a photo mask pattern and a light-absorbing border on the substrate; wherein the light-absorbing border surrounds the photo mask pattern, the light-absorbing border comprises a portion of the light-absorbing layer that is not removed; wherein the removing step comprises the step of removing the portions of the light-absorbing layer on both sides of the light-absorbing border to define a surrounding area, the surrounding area comprises a first surrounding area extending from an outer perimeter of the light-absorbing border to a first edge of the substrate and a second surrounding area extending from the outer perimeter of the light-absorbing border to a second edge of the substrate, wherein the first edge of the substrate and the second edge of the substrate are on opposite sides of the photo mask pattern, wherein the light-absorbing border extends to a third edge of the substrate and extends to a fourth edge of the substrate, wherein the third edge of the substrate and the fourth edge of the substrate are on other opposite sides of the photo mask pattern.

2. The method of claim 1, wherein, The surrounding area does not extend from the outer perimeter of the light-absorbing border to the third edge of the substrate, and the surrounding area does not extend from the outer perimeter of the light-absorbing border to the fourth edge of the substrate.

3. The method of claim 2, wherein, A width of the surrounding area extending from the outer perimeter of the light-absorbing border to the first edge of the substrate is at least three times a width of the light-absorbing border, and a width of the surrounding area extending from the outer perimeter of the light-absorbing border to the second edge of the substrate is at least three times a width of the light-absorbing border.

4. The method of claim 1, wherein, The step of removing portions of the light-absorbing layer to form a photo mask pattern and a light-absorbing border on the substrate comprises: depositing a positive resist on the light-absorbing layer; exposing portions of the positive resist corresponding to the portions of the light-absorbing layer to be removed using an e-beam writer; after the e-beam writer, developing the positive resist to form openings in the positive resist, and the openings correspond to the portions of the light-absorbing layer to be removed; and etching the portions of the light-absorbing layer to be removed through the openings in the positive resist.

5. The method of claim 1, wherein, An area of the surrounding area is at least two times an area of the light-absorbing border.

6. The method of claim 1, wherein, The removing step forms one or more isolated light-absorbing regions, each of the one or more isolated light-absorbing regions is surrounded by the surrounding area, and the light-absorbing layer is not removed in the one or more isolated light-absorbing regions.

7. The method of claim 1, wherein, The lithography wavelength is 280 nm or less.

8. The method of claim 1, wherein, The substrate is transmissive to light at the lithography wavelength.

9. The method of claim 1, wherein, The light-absorbing layer is a metal layer.

10. The method of claim 1, wherein, The light-absorbing layer comprises chromium.

11. The method of claim 10, wherein, A substrate material of the substrate comprises quartz, titanium dioxide (TiO2), or doped silicon dioxide (SiO2).

12. The method of claim 1, wherein, The removing step forms the photo mask pattern, the photo mask pattern comprises a plurality of absorbing pattern regions of the light-absorbing layer that are not removed and a plurality of non-absorbing regions of the light-absorbing layer that are removed by the removing step.

13. The method of claim 12, wherein, Further comprising, prior to the removing step, performing an exposure / development cycle and an etch to create a thickness variation of the light absorbing layer in the mask pattern, wherein the mask pattern comprises a phase-shift mask pattern, in which the thickness of the light absorbing layer disposed in the absorber pattern region is non-uniform.

14. A semiconductor lithography method, characterized by, Comprising the steps of: mounting the mask manufactured according to claim 1 on a mask stage, wherein the first peripheral region contacts a first support pad of the mask stage and the second peripheral region contacts a second support pad of the mask stage; performing a semiconductor lithography using the light of the lithography wavelength through the mask; and removing the mask from the mask stage after performing the semiconductor lithography.

15. A photomask process, comprising: Comprising the steps of: providing a substrate coated with a light absorbing layer and a resist layer; and performing an exposure / development cycle and an etch step to remove portions of the light absorbing layer to define (i) a plurality of non-absorber pattern regions of a mask pattern surrounded by a light absorbing border and (ii) a peripheral region outside the light absorbing border in which the light absorbing layer is removed by the exposure / development cycle; wherein the peripheral region includes a first peripheral region extending from an outer periphery of the light absorbing border to a first edge of the substrate and a second peripheral region extending from the outer periphery of the light absorbing border to a second edge of the substrate, wherein the first edge of the substrate and the second edge of the substrate are on opposite sides of the mask pattern; and wherein the peripheral region does not extend from the outer periphery of the light absorbing border to a third edge of the substrate and the peripheral region does not extend from the outer periphery of the light absorbing border to a fourth edge of the substrate, wherein the third edge of the substrate and the fourth edge of the substrate are on other opposite sides of the mask pattern.

16. The photomask process of claim 15, wherein, The mask process is a phase-shift mask process, the phase-shift mask process further comprising performing a first exposure / development cycle and a first etch step prior to the exposure / development cycle, the first exposure / development cycle and the first etch step creating a thickness variation of the light absorbing layer in the mask pattern.

17. A reticle for use in a semiconductor lithography process, wherein the reticle comprises: The mask comprises: a substrate having a first edge, a second edge, a third edge, and a fourth edge, wherein the first edge and the second edge are opposite sides of the substrate, the third edge and the fourth edge are other opposite sides of the substrate; a patterned light absorbing layer to define a mask pattern disposed on the substrate and a light absorbing border surrounding the mask pattern, wherein the light absorbing layer absorbs light of a lithography wavelength; wherein a peripheral region is on an outer side of the light absorbing border on both sides of the light absorbing border, the light absorbing layer is not disposed on the substrate in the peripheral region; wherein the light absorbing border is inset from the first edge and the second edge of the substrate to define the peripheral region on an outer side of the light absorbing border; and wherein the light absorbing border is not inset from the third edge and the fourth edge of the substrate.

18. The reticle of claim 17, wherein, The light absorbing layer is a metal layer.

19. The reticle of claim 17, wherein, The photomask pattern includes a phase-shift photomask pattern, wherein a thickness of the light-absorbing layer in the photomask pattern is not uniform.

20. The reticle of claim 17, wherein, The light-absorbing border includes a metal layer disposed on the substrate.

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