A data acquisition device and method

Abstract

The present invention relates to the technical field of data acquisition, and discloses a data acquisition device and method. The data acquisition device includes an MCU main control unit, an AD input buffer unit, a PWM input buffer unit, a storage unit, and a trigger unit; the AD input buffer unit and the PWM input buffer unit are configured to receive an analog signal to be recorded and a PWM signal to be recorded and send the received signals to the MCU main control unit; the MCU main control unit is electrically connected to the storage unit and the trigger unit respectively; the trigger unit is configured to send a trigger signal to the MCU main control unit, and the trigger signal is used to start and stop recording; in actual use, by using the present invention, data can be automatically acquired and stored, and the acquired data can be sent to a host computer, without manual recording, which is convenient for testing.

Description

Technical Field

[0001] The present invention relates to the technical field of data acquisition, and particularly to a data acquisition device and method. Background Art

[0002] During the R & D process of electronic products, it is necessary to test the hardware circuit and software program to detect whether the functions or signal outputs of the electronic products are correct. Taking the test of a single-chip microcomputer chip as an example, a single-chip microcomputer is a control chip integrated with various functional modules such as a timer, a counter, a serial port module, an ADC module, a DAC module, and an IO module. Among them, testing the output signal of the single-chip microcomputer includes testing whether the analog signal output is correct, and testing whether the period and duty cycle of the PWM signal output by its IO port are correct. However, the existing tests for such signals are all observed and recorded through an artificial oscilloscope, which not only has high equipment costs, consumes labor for long-term recording, and is prone to errors in manual recording. Summary of the Invention

[0003] In view of the deficiencies in the background art, the present invention provides a data acquisition device and method that can record test data without manual operation.

[0004] To solve the above technical problems, in a first aspect, the present invention provides a data acquisition device, including an MCU main control unit, an AD input buffer unit, a PWM input buffer unit, a storage unit, and a trigger unit;

[0005] The AD input buffer unit is configured to receive the analog signal to be recorded and send the received analog signal to the MCU main control unit;

[0006] The PWM input buffer unit is configured to receive the PWM signal to be recorded and send the received PWM signal to the MCU main control unit;

[0007] The MCU main control unit is electrically connected to the storage unit and the trigger unit respectively; the trigger unit is configured to send a trigger signal to the MCU main control unit, and the trigger signal is used to start and stop recording.

[0008] In a certain embodiment of the first aspect, the present invention further includes a USB interface and a data conversion unit. The MCU main control unit is electrically connected to the data conversion unit, and the data conversion unit is electrically connected to the USB interface, and is configured to convert USB data into TTL level data or convert TTL level data into USB data.

[0009] In a certain embodiment of the first aspect, the AD input buffer unit includes a first operational amplifier unit, a second operational amplifier unit, a third operational amplifier unit, a reference voltage adjustment unit, and a magnification adjustment unit;

[0010] The positive input terminals of the first operational amplifier unit and the second operational amplifier unit are configured to receive an input analog signal; the negative input terminals of the first operational amplifier unit and the second operational amplifier unit are electrically connected to the amplification factor adjustment unit, and the amplification factor adjustment unit is configured to adjust the resistance value between the negative input terminals of the first operational amplifier unit and the second operational amplifier unit and the ground terminal. The output terminal of the first operational amplifier unit is electrically connected to the negative input terminal of the third operational amplifier unit, the output terminal of the second operational amplifier unit is electrically connected to the positive input terminal of the third operational amplifier unit, and the output terminal of the third operational amplifier unit is electrically connected to the MCU main control unit;

[0011] The reference voltage adjustment unit is electrically connected to the MCU main control unit, receives the PWM control signal sent by the MCU main control unit, and outputs a reference voltage with a varying amplitude based on the duty cycle of the PWM control signal. The reference voltage is input to the negative input terminal of the third operational amplifier unit.

[0012] In a certain implementation manner of the first aspect, the first operational amplifier unit includes an operational amplifier U1B, a resistor R5, and a resistor R6. The output terminal of the operational amplifier U1B is sequentially electrically connected to the negative input terminal of the operational amplifier U1B through the resistor R5 and the resistor R6; the positive input terminal of the operational amplifier U1B is further respectively electrically connected to one end of a capacitor C3, one end of a bidirectional diode D1, and one end of a resistor R1. The other end of the bidirectional diode D1 and the other end of the capacitor C3 are both grounded;

[0013] The second operational amplifier unit includes an operational amplifier U1A, a resistor R9, and a resistor R10. The output terminal of the operational amplifier U1A is sequentially electrically connected to the negative input terminal of the operational amplifier U1A through the resistor R9 and the resistor R10; the positive input terminal of the operational amplifier U1A is further respectively electrically connected to one end of a capacitor C6, one end of a bidirectional diode D5, and one end of a resistor R20. The other end of the bidirectional diode D5 and the other end of the capacitor C6 are both grounded;

[0014] The positive input terminal of the operational amplifier U1A is further respectively electrically connected to one end of a capacitor C4 and one end of a bidirectional diode D2. The other end of the capacitor C4 and the other end of the bidirectional diode D2 are electrically connected to the positive input terminal of the operational amplifier U1A;

[0015] The third operational amplifier unit includes an operational amplifier U1C, a resistor R3, and a resistor R4. The output terminal of the operational amplifier U1C is electrically connected to the negative input terminal of the operational amplifier U1C through the resistor R3 and the resistor R4 in sequence. The positive input terminal of the operational amplifier U1C is electrically connected to the output terminal of the operational amplifier U1A through a resistor R17, and the negative input terminal of the operational amplifier U1C is electrically connected to the output terminal of the operational amplifier U1B through a resistor R2. The output terminal of the operational amplifier U1C is also electrically connected to one end of a resistor R11. The other end of the resistor R11 is respectively electrically connected to one end of a resistor R13 and one end of a resistor R12. The other end of the resistor R12 is respectively electrically connected to one end of a capacitor C5, the positive electrode of a diode D3, and the negative electrode of a diode D4. The negative electrode of the diode D3 is electrically connected to the power supply. The positive electrode of the diode D4, the other end of the capacitor C5, and the other end of the resistor R13 are all grounded.

[0016] In a certain implementation manner of the first aspect, the reference voltage adjustment unit includes an operational amplifier U1D. The positive input terminal of the operational amplifier U1D is respectively electrically connected to one end of a capacitor C7 and one end of a resistor R14. The other end of the resistor R14 is respectively electrically connected to one end of a capacitor C8 and one end of a resistor R15. The other end of the resistor R15 is respectively electrically connected to one end of a capacitor C9 and the MCU main control unit. The other ends of the capacitor C7, the capacitor C8, and the capacitor C9 are all grounded. The negative input terminal of the operational amplifier U1D is respectively electrically connected to one end of a resistor R7 and one end of a resistor R8. The other end of the resistor R8 is grounded. The other end of the resistor R7 is respectively electrically connected to the output terminal of the operational amplifier U1D and one end of a resistor R19. The other end of the resistor R9 is electrically connected to the negative input terminal of the third operational amplifier unit through a resistor R18.

[0017] In a certain implementation manner of the first aspect, the magnification adjustment unit includes a switch chip U2. The first pin of the switch chip U2 is electrically connected to the twelfth pin of the switch chip U2 through a resistor R26 and a resistor R21 in sequence. The second pin of the switch chip U2 is electrically connected to the fifteenth pin of the switch chip U2 through a resistor R28 and a resistor R23 in sequence. The fourth pin of the switch chip U2 is electrically connected to the eleventh pin of the switch chip U2 through a resistor R29 and a resistor R24 in sequence. The fifth pin of the switch chip U2 is electrically connected to the fourteenth pin of the switch chip U2 through a resistor R27 and a resistor R22 in sequence. The third pin of the switch chip U2 is electrically connected to the negative input terminal of the second operational amplifier unit. The thirteenth pin of the switch chip U2 is electrically connected to the negative input terminal of the first operational amplifier unit. The ninth pin and the tenth pin of the switch chip U2 are electrically connected to the MCU main control unit. The sixteenth pin of the switch chip U2 inputs the power supply. The sixth pin and the eighth pin of the switch chip U2 are both grounded.

[0018] In a certain implementation manner of the first aspect, the PWM input buffer unit includes an operational amplifier U20. The positive input terminal of the operational amplifier U20 is electrically connected to one end of a bidirectional diode D80 and one end of a bidirectional diode D81 respectively. The other end of the bidirectional diode D80 is connected to a first power supply, and the other end of the bidirectional diode D81 is grounded. The negative input terminal of the operational amplifier U20 is electrically connected to one end of a resistor R80 and one end of a resistor R81 respectively. The other end of the resistor R80 is grounded. The other end of the resistor R81 is electrically connected to one end of a resistor R83 and one end of a resistor R84 respectively through a resistor R82. The other end of the resistor R83 is connected to a second power supply. The other end of the resistor R84 is electrically connected to one end of a resistor R85 and the output terminal of the operational amplifier U20 respectively. The other end of the resistor R85 is electrically connected to one end of a capacitor C80, the positive electrode of a diode D82, the negative electrode of a diode D83, and one end of a resistor R86 respectively. The other end of the capacitor C80 and the positive electrode of the diode D83 are both grounded. The negative electrode of the diode D82 is connected to a third power supply. The other end of the resistor R86 is connected to the MCU main control unit.

[0019] In a certain implementation manner of the first aspect, the present invention further includes a power supply unit. The power supply unit includes a voltage input terminal, a boost unit, a negative voltage generation unit, an ADC reference voltage generation unit, and an LDO voltage regulation unit. The voltage input terminal is electrically connected to the boost unit, the negative voltage generation unit, the ADC reference voltage generation unit, and the LDO voltage regulation unit respectively. The voltage output terminal of the boost unit is electrically connected to the positive voltage input terminal of the first operational amplifier unit, the positive voltage input terminal of the second operational amplifier unit, the positive voltage input terminal of the third operational amplifier unit, the positive voltage input terminal of the operational amplifier U20, and the power supply pin of the amplification factor adjustment unit respectively. The voltage output terminal of the negative voltage generation unit is electrically connected to the negative voltage input terminal of the first operational amplifier unit, the negative voltage input terminal of the second operational amplifier unit, the negative voltage input terminal of the third operational amplifier unit, and the negative voltage input terminal of the operational amplifier U20 respectively. The LDO voltage regulation unit provides operating voltages to the storage unit and the MCU main control unit respectively. The ADC reference voltage generation unit provides an ADC sampling reference voltage to the MCU main control unit.

[0020] In the second aspect, the present invention further provides a data acquisition method, which is applied to the above data acquisition device, and includes the following steps:

[0021] S1: Use a host computer to configure information for the MCU main control unit, set the amplification factor, data source, acquisition period, recording duration, data reporting interval, and acquisition start / stop method of the AD input buffer unit. The acquisition start / stop method includes start / stop triggered by a trigger unit and start / stop triggered by a host computer.

[0022] S2: Connect the signal to be collected to the AD input buffer unit and the PWM input buffer unit. When the MCU main control unit receives the start collection signal according to the configured collection start / stop method, the MCU main control unit collects data at the set collection period within the set recording duration and stores the collected data in the storage unit, and periodically sends the collected data to the host computer according to the set data reporting interval. When the data reporting interval is not set in step S1, the MCU main control unit sends the collected data to the host computer after the data collection is completed. When the MCU main control unit receives the stop collection signal according to the configured collection start / stop method, the MCU main control unit stops collecting data.

[0023] The beneficial effects of the present invention compared with the prior art are: By using the present invention, data can be automatically collected and stored, and the collected data can be sent to the host computer without manual recording, which is convenient for testing. Brief Description of the Drawings

[0024] Figure 1 Structural schematic diagram of the present invention in the embodiment;

[0025] Figure 2 Structural schematic diagram of the AD input buffer unit in the embodiment;

[0026] Figure 3 Circuit diagram of the first operational amplifier unit, the second operational amplifier unit and the third operational amplifier unit in the embodiment;

[0027] Figure 4 Circuit diagram of the amplification factor adjustment unit in the embodiment;

[0028] Figure 5 Circuit diagram of the reference voltage adjustment unit in the embodiment;

[0029] Figure 6 Circuit diagram of the PWM input buffer unit in the embodiment;

[0030] Figure 7 Second structural schematic diagram of the present invention in the embodiment;

[0031] Figure 8 Structural schematic diagram of the power supply unit. Detailed Description of the Invention

[0032] Now, the present invention will be further described in detail with reference to the accompanying drawings. These drawings are all simplified schematic diagrams, only illustrating the basic structure of the present invention in a schematic manner, so they only show the components related to the present invention.

[0033] As Figure 1As shown in the figure, a data acquisition device includes an MCU main control unit 1, an AD input buffer unit 2, a PWM input buffer unit 3, a storage unit 4, and a trigger unit 5;

[0034] The AD input buffer unit 2 is configured to receive the analog signal to be recorded and send the received analog signal to the MCU main control unit 1;

[0035] The PWM input buffer unit 3 is configured to receive the PWM signal to be recorded and send the received PWM signal to the MCU main control unit 1;

[0036] The MCU main control unit 1 is electrically connected to the storage unit 4 and the trigger unit 5 respectively; the trigger unit 5 is configured to send a trigger signal to the MCU main control unit 1, and the trigger signal is used to start and stop recording.

[0037] In this embodiment, the trigger unit 5 can be a button. When the button is pressed, the level state of the signal input from the button to the MCU main control unit 1 changes. The change in the level state can be that the trigger signal becomes a high level state or the trigger signal becomes a low level state; when the MCU main control unit 1 receives the trigger signal without starting data acquisition, the MCU main control unit 1 starts data acquisition, and when the MCU main control unit 1 receives the trigger signal during data acquisition, the MCU main control unit 1 stops data acquisition;

[0038] In this embodiment, the model of the single-chip microcomputer of the MCU main control unit 1 can be selected according to actual needs, as long as it can support IO output, analog data reception, and communication interfaces.

[0039] In this embodiment, the model of the storage unit 4 can be selected according to the storage capacity and storage type (power-off retention and non-power-off retention).

[0040] In addition, the present invention further includes a USB interface 7 and a data conversion unit 6. The MCU main control unit 1 is electrically connected to the data conversion unit 6, and the data conversion unit 6 is electrically connected to the USB interface 7, and is configured to convert USB data into TTL level data or convert TTL level data into USB data. In actual use, since the signal level output by the MCU main control unit 1 is inconsistent with the signal level of the host computer such as a computer, the data conversion unit 6 is required to perform data conversion.

[0041] In actual use, the host computer can send a start acquisition command and a stop acquisition command to the MCU main control unit 1 through the USB interface 7 and the data conversion unit 6. The MCU main control unit 1 starts acquiring data when it receives the start acquisition command sent by the host computer and stops acquiring data when it receives the stop acquisition command.

[0042] Such as Figure 2As shown, in this embodiment, the AD input buffer unit 2 includes a first operational amplifier unit 20, a second operational amplifier unit 21, a third operational amplifier unit 22, a reference voltage adjustment unit 23, and a magnification adjustment unit 24;

[0043] The positive input terminals of the first operational amplifier unit 20 and the second operational amplifier unit 21 are configured to receive an input analog signal; the negative input terminals of the first operational amplifier unit 20 and the second operational amplifier unit 21 are electrically connected to the magnification adjustment unit 24, and the magnification adjustment unit 24 is configured to adjust the resistance value between the negative input terminals of the first operational amplifier unit 20 and the second operational amplifier unit 21 and the ground terminal. The output terminal of the first operational amplifier unit 20 is electrically connected to the negative input terminal of the third operational amplifier unit 22, the output terminal of the second operational amplifier unit 21 is electrically connected to the positive input terminal of the third operational amplifier unit 22, and the output terminal of the third operational amplifier unit 22 is electrically connected to the MCU main control unit 1;

[0044] The reference voltage adjustment unit 23 is electrically connected to the MCU main control unit 1, receives the PWM control signal sent by the MCU main control unit 1, and outputs a reference voltage with a changing amplitude based on the duty cycle of the PWM control signal. The reference voltage is input to the negative input terminal of the third operational amplifier unit 22; where the changing amplitude means that the magnitude of the reference voltage changes with the duty cycle of the PWM control signal.

[0045] In actual use, by setting the first operational amplifier unit 20, the second operational amplifier unit 21, and the third operational amplifier unit 22, the input impedance of the AD input buffer unit 2 can be increased; by adjusting the resistance value between the negative input terminals of the first operational amplifier unit 20 and the second operational amplifier unit 21 and the ground terminal through the magnification adjustment unit 24, the magnification of the first operational amplifier unit 20 and the second operational amplifier unit 21 can be adjusted. Changing the magnification of the first operational amplifier unit 20 and the second operational amplifier unit 21 can amplify the detection signal with a relatively small voltage amplitude, thereby improving the detection accuracy; by changing the magnitude of the reference voltage input to the negative input terminal of the third operational amplifier unit 22, the measured voltage can be lifted, so that negative voltage signals can be detected;

[0046] Specifically, as Figure 3 shown, the first operational amplifier unit 20 includes an operational amplifier U1B, a resistor R5, and a resistor R6. The output terminal of the operational amplifier U1B is sequentially electrically connected to the negative input terminal of the operational amplifier U1B through the resistor R5 and the resistor R6; the positive input terminal of the operational amplifier U1B is also respectively electrically connected to one end of a capacitor C3, one end of a bidirectional diode D1, and one end of a resistor R1. The other end of the bidirectional diode D1 and the other end of the capacitor C3 are both grounded;

[0047] The second operational amplifier unit 21 includes an operational amplifier U1A, a resistor R9, and a resistor R10. The output terminal of the operational amplifier U1A is sequentially electrically connected to the negative input terminal of the operational amplifier U1A through the resistor R9 and the resistor R10; the positive input terminal of the operational amplifier U1A is also respectively electrically connected to one end of a capacitor C6, one end of a bidirectional diode D5, and one end of a resistor R20. The other end of the bidirectional diode D5 and the other end of the capacitor C6 are both grounded;

[0048] The positive input terminal of the operational amplifier U1A is also respectively electrically connected to one end of a capacitor C4 and one end of a bidirectional diode D2. The other end of the capacitor C4 and the other end of the bidirectional diode D2 are electrically connected to the positive input terminal of the operational amplifier U1A;

[0049] The third operational amplifier unit 22 includes an operational amplifier U1C, a resistor R3, and a resistor R4. The output terminal of the operational amplifier U1C is sequentially electrically connected to the negative input terminal of the operational amplifier U1C through the resistor R3 and the resistor R4; the positive input terminal of the operational amplifier U1C is electrically connected to the output terminal of the operational amplifier U1A through a resistor R17, and the negative input terminal of the operational amplifier U1C is electrically connected to the output terminal of the operational amplifier U1B through a resistor R2; the output terminal of the operational amplifier U1C is also electrically connected to one end of a resistor R11. The other end of the resistor R11 is respectively electrically connected to one end of a resistor R13 and one end of a resistor R12. The other end of the resistor R12 is respectively electrically connected to one end of a capacitor C5, the positive electrode of a diode D3, and the negative electrode of a diode D4. The negative electrode of the diode D3 is electrically connected to the power supply. The positive electrode of the diode D4, the other end of the capacitor C5, and the other end of the resistor R13 are all grounded;

[0050] Among them, the bidirectional diodes D1, D2, and D5 are all bidirectional TVS tubes, which can protect the input ports Vin_1 and Vin_2 from being damaged by spike pulses or static electricity, and ensure the normal operation of the operational amplifiers U1A and U1B; the capacitors C3, C4, and C6 are used for filtering to reduce the noise of the input signal; the diodes D3 and D4 are used to prevent the output voltage of the operational amplifier U1C from being too high and damaging the input port of the MCU main control unit 1.

[0051] The working process of the AD input buffer unit 2 of the present invention is as follows: The two ends of the measured signal are respectively input to the resistor R1 and the resistor R20, and after being filtered by the capacitors C3, C4, and C6, they are respectively input to the operational amplifier U1B and the operational amplifier U1A. The measured signal is buffered by the operational amplifier U1A and the operational amplifier U1B and then input to the operational amplifier U1C. After being amplified by the operational amplifier U1C, it is output to the resistor R11 and the resistor R13. The resistors 11 and 13 are used for voltage division, and finally the divided signal is input to the MCU main control unit 1.

[0052] Such asFigure 4 As shown, the magnification adjustment unit 24 includes a switch chip U2. The first pin of the switch chip U2 is electrically connected to the twelfth pin of the switch chip U2 through a resistor R26 and a resistor R21 in sequence. The second pin of the switch chip U2 is electrically connected to the fifteenth pin of the switch chip U2 through a resistor R28 and a resistor R23 in sequence. The fourth pin of the switch chip U2 is electrically connected to the eleventh pin of the switch chip U2 through a resistor R29 and a resistor R24 in sequence. The fifth pin of the switch chip U2 is electrically connected to the fourteenth pin of the switch chip U2 through a resistor R27 and a resistor R22 in sequence. The third pin of the switch chip U2 is electrically connected to the negative input terminal of the second operational amplifier unit. The thirteenth pin of the switch chip U2 is electrically connected to the negative input terminal of the first operational amplifier unit. The ninth and tenth pins of the switch chip U2 are electrically connected to the MCU main control unit. The sixteenth pin of the switch chip U2 inputs power supply, and the sixth and eighth pins of the switch chip U2 are both grounded.

[0053] Among them, the resistor R21 and the resistor R26 form a resistor branch. The resistor R22 and the resistor R27 form a resistor branch. The resistor R23 and the resistor R28 form a resistor branch. The resistor R24 and the resistor R29 form a resistor branch. The MCU main control unit 1 can connect the negative input terminals of the operational amplifier U1B and the operational amplifier U1A to different resistor branches through the switch chip U2, so as to adjust the magnification of the operational amplifier U1B and the operational amplifier U1A.

[0054] As Figure 5 shown, the reference voltage regulation unit 23 includes an operational amplifier U1D. The positive input terminal of the operational amplifier U1D is electrically connected to one end of a capacitor C7 and one end of a resistor R14 respectively. The other end of the resistor R14 is electrically connected to one end of a capacitor C8 and one end of a resistor R15 respectively. The other end of the resistor R15 is electrically connected to one end of a capacitor C9 and the MCU main control unit respectively. The other ends of the capacitor C7, the capacitor C8 and the capacitor C9 are all grounded. The negative input terminal of the operational amplifier U1D is electrically connected to one end of a resistor R7 and one end of a resistor R8 respectively. The other end of the resistor R8 is grounded. The other end of the resistor R7 is electrically connected to the output terminal of the operational amplifier U1D and one end of a resistor R19 respectively. The other end of the resistor R9 is electrically connected to the negative input terminal of the third operational amplifier unit through a resistor R18.

[0055] Among them, the resistor R16 and the capacitor C9 form a first-order filter circuit. The resistor 15 and the capacitor C8 form a second-order filter circuit. The resistor R14 and the resistor C7 form a third-order filter circuit. Through these three filter circuits, the PWM signal input by the MCU main control unit 1 can be converted into a stable voltage signal to automatically adjust the reference.

[0056] As Figure 6As shown, in this embodiment, the PWM input buffer unit 3 includes an operational amplifier U20. The positive input terminal of the operational amplifier U20 is electrically connected to one end of a bidirectional diode D80 and one end of a bidirectional diode D81 respectively. The other end of the bidirectional diode D80 is connected to a first power supply, and the other end of the bidirectional diode D81 is grounded. The negative input terminal of the operational amplifier U20 is electrically connected to one end of a resistor R80 and one end of a resistor R81 respectively. The other end of the resistor R80 is grounded, and the other end of the resistor R81 is electrically connected to one end of a resistor R83 and one end of a resistor R84 respectively through a resistor R82. The other end of the resistor R83 is connected to a second power supply, and the other end of the resistor R84 is electrically connected to one end of a resistor R85 and the output terminal of the operational amplifier U20 respectively. The other end of the resistor R85 is electrically connected to one end of a capacitor C80, the positive electrode of a diode D82, the negative electrode of a diode D83 and one end of a resistor R86 respectively. The other end of the capacitor C80 and the positive electrode of the diode D83 are both grounded. The negative electrode of the diode D82 is connected to a third power supply, and the other end of the resistor R86 is electrically connected to the MCU main control unit.

[0057] Similarly, the diodes D82 and D83 can prevent the output voltage of the operational amplifier U20 from being too high and damaging the input port of the MCU main control unit 1. The bidirectional diodes D80 and D81 can protect the input port COMP_IN_1 from being damaged by spike pulses or static electricity, ensuring the normal operation of the operational amplifier U20.

[0058] In addition, in Figure 6 In the circuit of the PWM input buffer unit 3 shown, the operational amplifier U20, the resistor R2, the resistor R3 and the resistor R5 constitute a voltage follower, which improves the input impedance and reduces the influence on the measured signal.

[0059] As Figure 7 shown, the present invention further includes a power supply unit 8, and the power supply unit 8 is used to provide the working voltages required for the AD input buffer unit 2, the PWM input buffer unit 3, the storage unit 4, the MCU main control unit 1 and the data conversion unit 6 to work. The working voltage of the storage unit 4 in this embodiment is 3.3V, the working voltage of the MCU main control unit is 3.3V, and the operational amplifiers U1A, U1B, U1C and U20 require working voltages of +15V and -15V.

[0060] As Figure 8 shown, the power supply unit 8 includes a voltage input terminal VIN, a boost unit 80, a negative voltage generation unit 81, an ADC reference voltage generation unit 82 and an LDO voltage regulation unit 83;

[0061] The voltage input terminal VIN is electrically connected to a boost unit 80, a negative voltage generation unit 81, an ADC reference voltage generation unit 82, and an LDO voltage regulation unit 83 respectively; the boost unit 80 is used to boost the 5V input voltage to 15V, the negative voltage generation unit 81 is used to convert the 5V voltage into a -15V voltage, the ADC reference voltage generation unit 82 is used to convert the 5V voltage into a 3V voltage, and the LDO voltage regulation unit 83 is used to convert the 5V voltage into a 3.3V voltage;

[0062] Among them, the voltage output terminal of the boost unit 80 is electrically connected to the positive voltage input terminal of the first operational amplifier unit 20, the positive voltage input terminal of the second operational amplifier unit 21, the positive voltage input terminal of the third operational amplifier unit 22, the positive voltage input terminal of the operational amplifier U20, and the power supply pin of the amplification factor adjustment unit 24 respectively. The voltage output terminal of the negative voltage generation unit 81 is electrically connected to the negative voltage input terminal of the first operational amplifier unit 20, the negative voltage input terminal of the second operational amplifier unit 21, the negative voltage input terminal of the third operational amplifier unit 22, and the negative voltage input terminal of the operational amplifier U20 respectively. The LDO voltage regulation unit 83 supplies the working voltage to the storage unit 4 and the MCU main control unit 1 respectively. The ADC reference voltage generation unit 82 supplies the ADC sampling reference voltage to the MCU main control unit. In this embodiment, the voltage input terminal VIN is the power supply terminal of the USB interface 7.

[0063] When the present invention is actually used, the MCU main control unit 1 can store the data received through the AD input buffer unit 2 and the PWM input buffer unit 3 into the storage unit 4, without manual recording, with high efficiency. In addition, the collected data can also be sent to the host computer through the data conversion unit 6 and the USB interface 7 for easy viewing.

[0064] In addition, the present invention provides a data acquisition method, which applies the above data acquisition device, and includes the following steps:

[0065] S1: Use the host computer to configure information for the MCU main control unit 1, set the amplification factor, data source, acquisition period, recording duration, data reporting interval, and acquisition start / stop method of the AD input buffer unit 2. The acquisition start / stop method includes triggering start / stop by the trigger unit 4 and triggering start / stop by the host computer;

[0066] S2: Connect the signal to be collected to the AD input buffer unit 2 and the PWM input buffer unit 3. When the MCU main control unit 1 receives the start collection signal according to the configured collection start / stop method, the MCU main control unit 1 collects data at the set collection period within the set recording duration and stores the collected data in the storage unit 4, and periodically sends the collected data to the host computer according to the set data reporting interval. When the data reporting interval is not set in step S1, the MCU main control unit 1 sends the collected data to the host computer after the data collection is completed. When the MCU main control unit 1 receives the stop collection signal according to the configured collection start / stop method, the MCU main control unit 1 stops collecting data.

[0067] When it is stated in step S2 that the data reporting interval is not set in step S1, it means that the data reporting interval is set to 0.

[0068] Inspired by the present invention, through the above description, relevant staff can make various changes and modifications within the scope not deviating from the technical idea of this invention. The technical scope of this invention is not limited to the content in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A data acquisition device, characterized in that, It includes an MCU main control unit, an AD input buffer unit, a PWM input buffer unit, a storage unit, and a trigger unit; The AD input buffer unit is configured to receive an analog signal to be recorded and send the received analog signal to the MCU main control unit; The PWM input buffer unit is configured to receive a PWM signal to be recorded and send the received PWM signal to the MCU main control unit; The MCU main control unit is electrically connected to the storage unit and the trigger unit respectively; the trigger unit is configured to send a trigger signal to the MCU main control unit, and the trigger signal is used to start and stop recording; It further includes a USB interface and a data conversion unit. The MCU main control unit is electrically connected to the data conversion unit, and the data conversion unit is electrically connected to the USB interface and is configured to convert USB data into TTL level data or convert TTL level data into USB data; The AD input buffer unit includes a first operational amplifier unit, a second operational amplifier unit, a third operational amplifier unit, a reference voltage adjustment unit, and a gain adjustment unit; The positive input terminals of the first operational amplifier unit and the second operational amplifier unit are configured to input an analog signal; the negative input terminals of the first operational amplifier unit and the second operational amplifier unit are electrically connected to the gain adjustment unit, and the gain adjustment unit is configured to adjust the resistance value between the negative input terminals of the first operational amplifier unit and the second operational amplifier unit and the ground terminal. The output terminal of the first operational amplifier unit is electrically connected to the negative input terminal of the third operational amplifier unit, the output terminal of the second operational amplifier unit is electrically connected to the positive input terminal of the third operational amplifier unit, and the output terminal of the third operational amplifier unit is electrically connected to the MCU main control unit; The reference voltage adjustment unit is electrically connected to the MCU main control unit, receives the PWM control signal sent by the MCU main control unit, and outputs a reference voltage with a changing amplitude based on the duty cycle of the PWM control signal. The reference voltage is input to the negative input terminal of the third operational amplifier unit.

2. The data acquisition device according to claim 1, characterized in that The first operational amplifier unit includes an operational amplifier U1B, a resistor R5, and a resistor R6. The output terminal of the operational amplifier U1B is sequentially electrically connected to the negative input terminal of the operational amplifier U1B through the resistor R5 and the resistor R6; the positive input terminal of the operational amplifier U1B is also electrically connected to one end of a capacitor C3, one end of a bidirectional diode D1, and one end of a resistor R1. The other end of the bidirectional diode D1 and the other end of the capacitor C3 are both grounded; The second operational amplifier unit includes an operational amplifier U1A, a resistor R9, and a resistor R10. The output terminal of the operational amplifier U1A is sequentially electrically connected to the negative input terminal of the operational amplifier U1A through the resistor R9 and the resistor R10; the positive input terminal of the operational amplifier U1A is also electrically connected to one end of a capacitor C6, one end of a bidirectional diode D5, and one end of a resistor R20. The other end of the bidirectional diode D5 and the other end of the capacitor C6 are both grounded; The positive input terminal of the operational amplifier U1A is also electrically connected to one end of the capacitor C4 and one end of the bidirectional diode D2, and the other end of the capacitor C4 and the other end of the bidirectional diode D2 are electrically connected to the positive input terminal of the operational amplifier U1A; The third operational amplification unit includes an operational amplifier U1C, a resistor R3, and a resistor R4. The output terminal of the operational amplifier U1C is sequentially electrically connected to the negative input terminal of the operational amplifier U1C through the resistor R3 and the resistor R4; the positive input terminal of the operational amplifier U1C is electrically connected to the output terminal of the operational amplifier U1A through the resistor R17, and the negative input terminal of the operational amplifier U1C is electrically connected to the output terminal of the operational amplifier U1B through the resistor R2; the output terminal of the operational amplifier U1C is also electrically connected to one end of the resistor R11. The other end of the resistor R11 is respectively electrically connected to one end of the resistor R13 and one end of the resistor R12. The other end of the resistor R12 is respectively electrically connected to one end of the capacitor C5, the positive electrode of the diode D3, and the negative electrode of the diode D4. The negative electrode of the diode D3 is electrically connected to the power supply, and the positive electrode of the diode D4, the other end of the capacitor C5, and the other end of the resistor R13 are all grounded.

3. A data acquisition device according to claim 1 or 2, characterized in that, The amplification factor adjustment unit includes a switch chip U2. The first pin of the switch chip U2 is sequentially electrically connected to the twelfth pin of the switch chip U2 through the resistor R26 and the resistor R21. The second pin of the switch chip U2 is sequentially electrically connected to the fifteenth pin of the switch chip U2 through the resistor R28 and the resistor R23. The 4th pin of the switch chip U2 is sequentially electrically connected to the eleventh pin of the switch chip U2 through the resistor R29 and the resistor R24. The fifth pin of the switch chip U2 is sequentially electrically connected to the fourteenth pin of the switch chip U2 through the resistor R27 and the resistor R22. The third pin of the switch chip U2 is electrically connected to the negative input terminal of the second operational amplification unit. The thirteenth pin of the switch chip U2 is electrically connected to the negative input terminal of the first operational amplification unit. The ninth pin and the tenth pin of the switch chip U2 are electrically connected to the MCU main control unit. The sixteenth pin of the switch chip U2 inputs the power supply, and the sixth pin and the eighth pin of the switch chip U2 are both grounded.

4. A data acquisition device according to claim 1 or 2, characterized in that, The reference voltage adjustment unit includes an operational amplifier U1D. The positive input terminal of the operational amplifier U1D is respectively electrically connected to one end of the capacitor C7 and one end of the resistor R14. The other end of the resistor R14 is respectively electrically connected to one end of the capacitor C8 and one end of the resistor R15. The other end of the resistor R15 is respectively electrically connected to one end of the capacitor C9 and the MCU main control unit. The other ends of the capacitor C7, the capacitor C8, and the capacitor C9 are all grounded; the negative input terminal of the operational amplifier U1D is respectively electrically connected to one end of the resistor R7 and one end of the resistor R8. The other end of the resistor R8 is grounded. The other end of the resistor R7 is respectively electrically connected to the output terminal of the operational amplifier U1D and one end of the resistor R19. The other end of the resistor R9 is electrically connected to the negative input terminal of the third operational amplification unit through the resistor R18.

5. The data acquisition device according to claim 1, characterized in that The PWM input buffer unit includes an operational amplifier U20. The positive input terminal of the operational amplifier U20 is electrically connected to one end of a bidirectional diode D80 and one end of a bidirectional diode D81 respectively. The other end of the bidirectional diode D80 is connected to a first power supply, and the other end of the bidirectional diode D81 is grounded; the negative input terminal of the operational amplifier U20 is electrically connected to one end of a resistor R80 and one end of a resistor R81 respectively. The other end of the resistor R80 is grounded, and the other end of the resistor R81 is electrically connected to one end of a resistor R83 and one end of a resistor R84 respectively through a resistor R82. The other end of the resistor R83 is connected to a second power supply, and the other end of the resistor R84 is electrically connected to one end of a resistor R85 and the output terminal of the operational amplifier U20 respectively. The other end of the resistor R85 is electrically connected to one end of a capacitor C80, the positive electrode of a diode D82, the negative electrode of a diode D83 and one end of a resistor R86 respectively. The other end of the capacitor C80 and the positive electrode of the diode D83 are both grounded. The negative electrode of the diode D82 is connected to a third power supply, and the other end of the resistor R86 is connected to the MCU main control unit.

6. The data acquisition device according to claim 5, characterized in that It further includes a power supply unit. The power supply unit includes a voltage input terminal, a boost unit, a negative voltage generation unit, an ADC reference voltage generation unit and an LDO voltage regulation unit. The voltage input terminal is electrically connected to the boost unit, the negative voltage generation unit, the ADC reference voltage generation unit and the LDO voltage regulation unit respectively. The voltage output terminal of the boost unit is electrically connected to the positive voltage input terminal of the first operational amplifier unit, the positive voltage input terminal of the second operational amplifier unit, the positive voltage input terminal of the third operational amplifier unit, the positive voltage input terminal of the operational amplifier U20 and the power supply pin of the amplification factor adjustment unit respectively. The voltage output terminal of the negative voltage generation unit is electrically connected to the negative voltage input terminal of the first operational amplifier unit, the negative voltage input terminal of the second operational amplifier unit, the negative voltage input terminal of the third operational amplifier unit and the negative voltage input terminal of the operational amplifier U20 respectively. The LDO voltage regulation unit provides operating voltages to the storage unit and the MCU main control unit respectively. The ADC reference voltage generation unit provides an ADC sampling reference voltage to the MCU main control unit.

7. A data acquisition method, characterized in that, Applying the data acquisition device according to any one of claims 1-6, comprising the following steps: S1: Use a host computer to configure information for the MCU main control unit, set the amplification factor, data source, acquisition period, recording duration, data reporting interval and acquisition start / stop mode of the AD input buffer unit. The acquisition start / stop mode includes start / stop triggered by a trigger unit and start / stop triggered by a host computer. S2: Connect the signal to be collected to the AD input buffer unit and the PWM input buffer unit. When the MCU main control unit receives the start collection signal according to the configured collection start / stop method, the MCU main control unit collects data at the set collection period within the set recording duration and stores the collected data in the storage unit, and sends the collected data to the host computer periodically according to the set data reporting interval. When no data reporting interval is set in step S1, the MCU main control unit sends the collected data to the host computer after the data collection is completed. When the MCU main control unit receives the stop collection signal according to the configured collection start / stop method, the MCU main control unit stops collecting data.

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