A server memory training method, system, device and readable storage medium

Abstract

The present invention proposes a server memory training method, system, device and readable storage medium, the method comprising: powering on the server AC; in the PEI stage of BIOS startup, judging whether the server is powered on by AC after power failure by detecting the register of the south bridge chip; if so, setting the value of the memory initialization status register, setting the memory to execute the cold boot process; after the memory enters the initialization stage, reading the flag bit of the memory initialization status register, and judging whether it is set to execute the cold boot process; if so, controlling the memory initialization to execute the cold boot process, and performing memory training. The present invention realizes that when the server is powered on after AC power failure, the memory initialization executes the cold boot process, performs complete memory training, and tunes the memory signal.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and more specifically to a server memory training method, system, device and readable storage medium. Background Art

[0002] BIOS (Basic Input Output System) is a program embedded in a ROM chip on the computer motherboard. It initializes the central processing unit (CPU), memory, chipset, and various input and output devices on the server motherboard during the startup process, providing the computer with the lowest-level and most direct hardware settings and control.

[0003] For X86 servers, the memory reference code (MRC) integrated in the BIOS code is mainly responsible for initializing the memory, including memory detection, memory training, memory testing, setting memory-related parameters, etc. Memory detection mainly detects the in-place information of memory devices and initializes the memory controller registers. Memory training mainly trains memory signals in order to adjust memory timing and improve memory signal integrity, obtain a set of alignment, compensation and reference voltage parameters, balance and offset line differences and signal noise, and improve memory stability in the system. After memory initialization and memory training, the memory signal quality can be adjusted to the optimal level. At the same time, faulty memory can be detected and reported or disabled in a timely manner to avoid affecting the subsequent operation of the operating system.

[0004] Generally, the server will be set to fast boot. When the server is powered on for the first time after assembly, a complete memory training will be performed and the results will be retained for subsequent restarts or DC / AC power-on. Only when the server processor (CPU) or memory is changed will a complete memory training be performed again in order to save boot time. When the server is fully equipped with memory, the time spent on complete memory training and memory initialization is 2-3 times or even longer than the time spent on simple memory initialization. Therefore, generally, the server will be set to enable fast boot, and only partial memory training will be performed during memory initialization. If the memory is used for a long time, the server will start quickly every time it is rebooted and powered on by DC / AC. Without complete memory training, the signal quality of the memory cannot be guaranteed to be in the optimal state, and memory failures may be reported as the operating system runs. Summary of the invention

[0005] In view of the above problems, the purpose of the present invention is to provide a server memory training method, system, device and readable storage medium, which realizes that when the server is powered on after AC power off, the memory initialization executes the cold boot process, performs complete memory training, and tunes the memory signal.

[0006] To achieve the above object, the present invention is implemented through the following technical solutions: a server memory training method, comprising:

[0007] Power on the server AC;

[0008] In the PEI stage of BIOS startup, the register of the south bridge chip is detected to determine whether the server is powered on by AC after power failure;

[0009] If yes, then set the value of the memory initialization status register and set the memory to execute the cold boot process; after the memory enters the initialization phase, read the flag bit of the memory initialization status register and determine whether it is set to execute the cold boot process;

[0010] If so, the control memory initialization executes the cold boot process and performs memory training.

[0011] Further, in the PEI stage of BIOS startup, determining whether the server is powered on by AC after power failure by detecting the register of the south bridge chip includes:

[0012] In the PEI phase of BIOS startup, the value of bit 1 of the GEN_PMCON_B register of the power management controller of the south bridge chip is read to determine whether the server is powered on by AC after power failure;

[0013] If the bit value is 1, it indicates that the server is powered on by AC after power failure; if the bit value is 0, it indicates that the server is powered on by AC without power failure.

[0014] Further, the setting of the value of the memory initialization status register to set the memory to execute the cold boot process includes:

[0015] By setting the value of the CMOS MRC Status register to 1, the memory is initialized to execute the cold boot process.

[0016] Further, the flag bit of the memory initialization status register is read, and determining whether to set to execute the coldboot process includes:

[0017] Read the value of the CMOS MRC Status register. If the read value is 1, the memory is initialized to execute the cold boot process.

[0018] Correspondingly, the present invention also discloses a server memory training system, comprising:

[0019] The startup unit is used to control the server AC power-on;

[0020] The status detection unit is used to determine whether the server is powered on by AC after power failure by detecting the register of the south bridge chip during the PEI stage of BIOS startup;

[0021] A setting unit is used to set the value of the memory initialization status register and set the memory to execute the cold boot process;

[0022] A judgment unit, used to read the flag bit of the memory initialization status register after the memory enters the initialization phase, and judge whether it is set to execute the cold boot process;

[0023] The execution unit is used to control the memory initialization to execute the cold boot process and perform memory training.

[0024] Further, the state detection unit is specifically used to: in the PEI stage of BIOS startup, determine whether the server is powered on by AC after power failure by reading the value of bit 1 of the GEN_PMCON_B register of the power management controller of the south bridge chip;

[0025] If the bit value is 1, it indicates that the server is powered on by AC after power failure; if the bit value is 0, it indicates that the server is powered on by AC without power failure.

[0026] Furthermore, the setting unit is specifically used to: set the value of the CMOS MRC Status register to 1, so that the memory is initialized to execute the cold boot process.

[0027] Furthermore, the judgment unit is specifically used to: read the value of the CMOS MRC Status register, and if the read value is 1, the memory is initialized to execute the cold boot process.

[0028] Accordingly, the present invention discloses a server memory training device, comprising:

[0029] A memory, used for storing a server memory training program;

[0030] A processor is used to implement the steps of the server memory training method as described in any one of the above items when executing the server memory training program.

[0031] Correspondingly, the present invention discloses a readable storage medium, on which a server memory training program is stored. When the server memory training program is executed by a processor, the steps of the server memory training method as described in any one of the above items are implemented.

[0032] Compared with the prior art, the beneficial effect of the present invention lies in: the present invention discloses a server memory training method, system, device and readable storage medium, which can determine whether the server is AC powered by detecting the Power Failure bit of the GEN_PMCON_B register of the PCH in the early stage of BIOS startup PEI, and then set the CMOS MRC Status register to set the MRC memory initialization Cold boot flag, so that the memory initialization executes the cold boot process, performs complete memory training, and tunes the memory signal to ensure that after the AC is restarted, the memory signal is retrained and the signal quality reaches the optimal state.

[0033] The present invention realizes that when the server is powered on after AC power failure, the memory is initialized to execute the cold boot process, complete memory training is performed, and memory signals are tuned to ensure that after AC restart, the memory signals are retrained and the signal quality reaches the optimal state. At the same time, memory failures are detected in time during the POST stage to avoid affecting the business operation of the operating system.

[0034] It can be seen that compared with the prior art, the present invention has outstanding substantive features and significant progress, and the beneficial effects of its implementation are also obvious. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0036] Figure 1 It is a method flow chart of a specific implementation mode of the present invention.

[0037] Figure 2 It is a system structure diagram of a specific implementation mode of the present invention.

[0038] In the figure, 1. Start unit; 2. Status detection unit; 3. Setting unit; 4. Judgment unit; 5. Execution unit. DETAILED DESCRIPTION

[0039] The core of the present invention is to provide a server memory training method. In the prior art, when the server is fully equipped with memory, the time spent on complete memory training memory initialization is 2-3 times or even longer than the time spent on simple memory initialization. Therefore, the general server will be set to enable fast boot, and only partial memory training will be performed during memory initialization. If the memory is used for a long time, each time the server is rebooted and the DC / AC is powered on, the server will start quickly. Without complete memory training, the signal quality of the memory cannot be guaranteed to be in the optimal state, and memory failures may be reported as the operating system runs.

[0040] The server memory training method provided by the present invention is that first, the server AC is powered on; and in the PEI stage of BIOS startup, the register of the south bridge chip is detected to determine whether the server is powered on by AC after power failure. If so, the value of the memory initialization status register is set, and the memory is set to execute the cold boot process. At this time, after the memory enters the initialization stage, the flag bit of the memory initialization status register is read, and it is determined whether it is set to execute the cold boot process. If so, the memory initialization is controlled to execute the cold boot process, and memory training is performed. It can be seen that the present invention adopts fast boot for memory initialization in response to server reboot and DC power-on situations, saving startup time. In response to the situation where the server AC is powered off and started, the memory initialization executes the cold boot process, performs complete memory training, and optimizes the memory signal.

[0041] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0042] Embodiment 1:

[0043] like Figure 1 As shown, this embodiment provides a server memory training method, comprising the following steps:

[0044] S1: The server AC is powered on.

[0045] Specifically, when the server is powered on by AC, during the BIOS POST process, it is necessary to first detect whether the server is powered on by AC, and exclude the server reboot and DC power-on states.

[0046] S2: In the PEI stage of BIOS startup, the register of the south bridge chip is detected to determine whether the server is powered on by AC after power failure.

[0047] Specifically, in the PEI stage of BIOS startup, the value of bit 1 of the GEN_PMCON_B register of the power management controller of the south bridge chip is read to determine whether the server is powered on by AC after power failure; if the bit value is 1, it means that the server is powered on by AC after power failure; if the bit value is 0, it means that the server is powered on by AC without power failure.

[0048] It is important to note that bit 1 of the GEN_PMCON_B register in the PCH's Power Management Controller can be used to determine whether the server is powered on with AC power off.

[0049] Bit 1 of the GEN_PMCON_B register indicates Power Failure. If the bit value is 1, it means the server is powered off. If the bit value is 0, it means the server is not powered off. It should be noted that this register needs to be tested in the early PEI stage of the BIOS startup process to be effective. If the GEN_PMCON_B register bit 1 is tested in other stages, it may be cleared to 0, and it is impossible to accurately determine whether the server is AC powered off.

[0050] S3: If yes, set the value of the memory initialization status register and set the memory to execute the cold boot process.

[0051] When it is determined that the server is powered on by AC after power failure, the value of the CMOS MRC Status register is set to 1 to initialize the memory and execute the cold boot process.

[0052] When the server AC is powered on, a restart will be performed during the BIOS startup process. Common variables are set in the early stage of PCH and will be reset after the restart. Therefore, we choose to use the CMOS register to save the server power-on status. After the CMOS register is powered on, if it is not read or written, it will not be reset.

[0053] In addition, through analysis, it is found that CMOS register 0x47 is used to indicate MRC status. For example, during the Intel MRC memory initialization phase, when the memory initialization executes the cold boot process, the CMOS register value will be set to 1, otherwise the CMOS register value will be set to 0.

[0054] S4: After the memory enters the initialization phase, the flag bit of the memory initialization status register is read to determine whether it is set to execute the cold boot process.

[0055] As an example, after the memory enters the initialization phase, the value of the CMOS MRC Status register is read. If the read value is 1, the memory initialization executes the cold boot process.

[0056] S5: If yes, control the memory initialization to execute the cold boot process and perform memory training.

[0057] It can be seen that the execution process of this method can be summarized as follows:

[0058] In the early stage of PEI, if the PCH initialization part detects that bit 1 of the GEN_PMCON_B register indicating PowerFailure is 1, the value of the CMOS 0X47 register is set to 1, otherwise the CMOS0X47 register is not set.

[0059] In the memory initialization MemStart phase, the value of the current CMOS MRC Status register is detected. If the value is 1, the memory initialization executes the cold boot process and the memory is fully retrained. Otherwise, it is determined whether to fully train the memory based on the memory options attemptfast boot and attempt fast cold boot settings or other situations.

[0060] This embodiment provides a server memory training method, which can determine whether the server is powered on by AC by detecting the Power Failure bit of the GEN_PMCON_B register of the PCH in the early stage of BIOS startup PEI, and then set the CMOS MRC Status register to set the MRC memory initialization Cold boot flag, so that the memory initialization executes the coldboot process, performs complete memory training, and tunes the memory signal to ensure that after the AC is restarted, the memory signal is retrained and the signal quality reaches the optimal state.

[0061] Embodiment 2:

[0062] Based on the first embodiment, Figure 2 As shown, the present invention also discloses a server memory training system, including: a startup unit 1, a state detection unit 2, a setting unit 3, a judgment unit 4 and an execution unit 5.

[0063] The startup unit 1 is used to control the server AC to power on.

[0064] The state detection unit 2 is used to determine whether the server is powered on by AC after power failure by detecting the register of the south bridge chip during the PEI stage of BIOS startup. The state detection unit 2 is specifically used to: during the PEI stage of BIOS startup, determine whether the server is powered on by AC after power failure by reading the value of bit 1 of the GEN_PMCON_B register of the power management controller of the south bridge chip; if the bit value is 1, it indicates that the server is powered on by AC after power failure; if the bit value is 0, it indicates that the server is powered on by AC without power failure.

[0065] The setting unit 3 is used to set the value of the memory initialization status register and set the memory to execute the cold boot process. The setting unit 3 is specifically used to: set the value of the CMOS MRC Status register to 1, so that the memory is initialized to execute the cold boot process.

[0066] The judgment unit 4 is used to read the flag bit of the memory initialization status register after the memory enters the initialization phase, and judge whether it is set to execute the cold boot process. The judgment unit 4 is specifically used to: read the value of the CMOS MRC Status register, if the read value is 1, the memory is initialized to execute the cold boot process.

[0067] The execution unit 5 is used to control the memory initialization to execute the cold boot process and perform memory training.

[0068] This embodiment provides a server memory training system, which implements the cold boot process of memory initialization when the server is powered on after AC power failure, performs complete memory training, and optimizes the memory signal to ensure that after the AC is restarted, the memory signal is retrained and the signal quality reaches the optimal state. At the same time, memory failures are detected in time during the POST stage to avoid affecting the business operation of the operating system.

[0069] Embodiment three:

[0070] This embodiment discloses a server memory training device, including a processor and a memory; wherein the processor implements the following steps when executing a server memory training program stored in the memory:

[0071] 1. Power on the server AC.

[0072] 2. In the PEI stage of BIOS startup, the register of the south bridge chip is detected to determine whether the server is powered on by AC after power failure.

[0073] 3. If yes, set the value of the memory initialization status register and set the memory to execute the cold boot process.

[0074] 4. After the memory enters the initialization phase, read the flag bit of the memory initialization status register and determine whether it is set to execute the cold boot process.

[0075] 5. If yes, control the memory initialization to execute the cold boot process and perform memory training.

[0076] Furthermore, the server memory training device in this embodiment may also include:

[0077] The input interface is used to obtain the server memory training program imported from the outside and save the obtained server memory training program to the memory. It can also be used to obtain various instructions and parameters transmitted by the external terminal device and transmit them to the processor so that the processor can use the above various instructions and parameters to carry out corresponding processing. In this embodiment, the input interface can specifically include but is not limited to a USB interface, a serial interface, a voice input interface, a fingerprint input interface, a hard disk reading interface, etc.

[0078] The output interface is used to output various data generated by the processor to the terminal device connected thereto, so that other terminal devices connected to the output interface can obtain various data generated by the processor. In this embodiment, the output interface may specifically include but is not limited to a USB interface, a serial interface, etc.

[0079] The communication unit is used to establish a remote communication connection between the server memory training device and the external server so that the server memory training device can mount the image file to the external server. In this embodiment, the communication unit may specifically include but is not limited to a remote communication unit based on wireless communication technology or wired communication technology.

[0080] The keyboard is used to obtain various parameter data or instructions input by the user by tapping the keycaps in real time.

[0081] The display is used to display the relevant information of the server power supply line short circuit locating process in real time.

[0082] The mouse can be used to assist users in inputting data and simplify user operations.

[0083] Embodiment 4:

[0084] This embodiment also discloses a readable storage medium, where the readable storage medium includes a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable hard disk, a CD-ROM, or any other form of storage medium known in the technical field. The readable storage medium stores a server memory training program, and when the server memory training program is executed by a processor, the following steps are implemented:

[0085] 1. Power on the server AC.

[0086] 2. In the PEI stage of BIOS startup, the register of the south bridge chip is detected to determine whether the server is powered on by AC after power failure.

[0087] 3. If yes, set the value of the memory initialization status register and set the memory to execute the cold boot process.

[0088] 4. After the memory enters the initialization phase, read the flag bit of the memory initialization status register and determine whether it is set to execute the cold boot process.

[0089] 5. If yes, control the memory initialization to execute the cold boot process and perform memory training.

[0090] In summary, the present invention realizes that when the server is powered on after AC power failure, the memory is initialized to execute the coldboot process, complete memory training is performed, and memory signals are tuned.

[0091] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. As for the method disclosed in the embodiment, since it corresponds to the system disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0092] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0093] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, systems and methods can be implemented in other ways. For example, the system embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of systems or units, which can be electrical, mechanical or other forms.

[0094] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0095] In addition, each functional module in each embodiment of the present invention may be integrated into one processing unit, or each module may exist physically separately, or two or more modules may be integrated into one unit.

[0096] Similarly, each processing unit in each embodiment of the present invention may be integrated into one functional module, or each processing unit may exist physically, or two or more processing units may be integrated into one functional module.

[0097] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0098] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0099] The server memory training method, system, device and readable storage medium provided by the present invention are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A server memory training method, characterized in that: include: Power on the server AC; During the BIOS POST process, check whether the server is powered on by AC, and exclude the server reboot and DC power-on states; In the PEI stage of BIOS startup, the register of the south bridge chip is detected to determine whether the server is powered on by AC after power failure; If yes, then set the value of the memory initialization status register and set the memory to execute the cold boot process; After the memory enters the initialization phase, the flag bit of the memory initialization status register is read to determine whether it is set to execute the cold boot process; If yes, the memory initialization is controlled to execute the cold boot process and perform memory training; In the PEI stage of BIOS startup, determining whether the server is powered on by AC after power failure by detecting the register of the south bridge chip includes: In the PEI phase of BIOS startup, the value of bit 1 of the GEN_PMCON_B register of the power management controller of the south bridge chip is read to determine whether the server is powered on by AC after power failure; If the bit value is 1, it means that the server is powered on by AC after power failure. If the bit value is 0, it means that the server is powered on by AC without power failure. The step of setting the value of the memory initialization status register and setting the memory to execute the cold boot process includes: By setting the value of the CMOS MRC Status register to 1, the memory is initialized to execute the cold boot process; The step of reading the flag bit of the memory initialization status register and determining whether to set the cold boot process to be executed includes: Read the value of the CMOS MRC Status register. If the read value is 1, the memory is initialized to execute the cold boot process.

2. A server memory training system, characterized in that: include: The startup unit is used to control the server AC power-on; The status detection unit is used to determine whether the server is powered on by AC after power failure by detecting the register of the south bridge chip during the PEI stage of BIOS startup; A setting unit is used to set the value of the memory initialization status register and set the memory to execute the cold boot process; A judgment unit, used to read the flag bit of the memory initialization status register after the memory enters the initialization phase, and judge whether it is set to execute the cold boot process; The execution unit is used to control the memory initialization to execute the cold boot process and perform memory training; The state detection unit is specifically used to: in the PEI stage of BIOS startup, determine whether the server is powered on by AC after power failure by reading the value of bit 1 of the GEN_PMCON_B register of the power management controller of the south bridge chip; If the bit value is 1, it means that the server is powered on by AC after power failure. If the bit value is 0, it means that the server is powered on by AC without power failure. The setting unit is specifically used for: By setting the value of the CMOS MRC Status register to 1, the memory is initialized to execute the cold boot process; The judging unit is specifically used for: Read the value of the CMOS MRC Status register. If the read value is 1, the memory is initialized to execute the cold boot process.

3. A server memory training device, characterized in that: include: A memory, used for storing a server memory training program; A processor is used to implement the steps of the server memory training method as described in claim 1 when executing the server memory training program.

4. A readable storage medium, characterized in that: The readable storage medium stores a server memory training program, and when the server memory training program is executed by the processor, the steps of the server memory training method according to claim 1 are implemented.

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