A method for checking redundant loops of timing signal traces
By establishing inspection tools in PCB design and using straight line equations and data structure analysis to automatically identify redundant loops, the problem of human error in printed line design is solved, and the signal transmission integrity and design quality are improved.
Patent Information
- Application Number
- CN202210667165.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-14
- Publication Date
- 2025-09-05
- Estimated Expiration
- 2042-06-14
AI Technical Summary
In PCB design, redundant loops in printed lines can easily be caused by human error or collaboration among multiple people, affecting the transmission integrity of high-speed timing signals and the design quality.
By establishing an inspection tool, the printed line information of high-speed timing signals can be automatically judged and screened. By using the geometric principles of straight line equations or data structure analysis, redundant loop endpoints can be identified and highlighted to remind designers to make corrections.
The transmission integrity and design quality of high-speed timing signals are improved, and the impact of unnecessary loops caused by design errors is reduced.
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Figure CN115081376B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of PCB design, and more particularly to a method for inspecting redundant loops of a timing signal printed line. Background Art
[0002] Due to growing societal demands and technological advancements, electronic products are becoming increasingly complex and operating at increasingly faster speeds. This necessitates a sharp increase in signal transmission rates, making the traces on printed circuit boards (PCBs), the primary signal carriers, increasingly crucial. Among the various signals transmitted by these traces, timing signals, such as 10G optical ports, DDR4 data signals, and PCIE 4.0 transmission signals, are often designed in a serpentine pattern during PCB design to ensure equal timing for high-speed differential and parallel data lines within the same group.
[0003] However, during the design process, existing technologies are usually designed and operated manually by designers, which is prone to human errors. This can cause redundant loops in the printed lines that transmit timing signals. For example, if the human operator is not careful, additional circuits may be set. Or, when multiple people collaborate on parallel design, multiple people design the same printed line, resulting in redundant circuits when merging and importing sub-drawings, etc.
[0004] From a signal integrity perspective, the impact of unwanted loops on signal impedance and timing is magnified at high transmission rates. These loops can affect the actual path length of the timing signal traces, leading to unequal signal timing. Furthermore, the actual impedance of unwanted loops is lower than that of normal paths, creating impedance discontinuity when signals are transmitted through these loops. Therefore, the presence of unwanted loops can compromise high-speed signal integrity, reducing performance and design quality. Summary of the Invention
[0005] In order to reduce unnecessary loops caused by design errors or design process problems, reduce the impact on high-speed timing signals, and improve performance and design quality, the present invention provides a method for inspecting unnecessary loops in timing signal printed lines. The inspection tool automatically detects the existence of unnecessary loops and reminds designers to make corrections.
[0006] The technical solution of the present invention is as follows:
[0007] A method for inspecting redundant loops of a timing signal printed line, the inspection steps comprising:
[0008] Step S1. Establish an inspection tool;
[0009] Step S2. Through the user interface, the inspection tool reads the electronic design information of the printed circuit board;
[0010] Step S3. The inspection tool determines and filters the high-speed timing signal in the electronic design information;
[0011] Step S4. The inspection tool converts the electronic design information of the high-speed timing signal into an analysis model;
[0012] Step S5. The inspection tool analyzes the analysis model to obtain loop endpoints, and obtains redundant loops based on the loop endpoints.
[0013] In the above-mentioned method for checking redundant loops of a timing signal trace, the user interaction interface includes a target type selection bar, a filter name input bar, a filter bar, and a selection object bar.
[0014] The above-mentioned method for checking redundant loops of a timing signal printed line includes, in step S4,
[0015] Step A1. The inspection tool obtains the printed line of the high-speed timing signal and establishes a working set;
[0016] Step A2. In the working set, the inspection tool obtains a plurality of endpoints of the printed line, and obtains a plurality of line segments formed by any two adjacent endpoints according to the distribution of the endpoints;
[0017] Step A3. The inspection tool extracts the value of the endpoint name, or assigns a new name to the endpoint and extracts the value of the new endpoint name.
[0018] Then, the values of the names of the endpoints at both ends are combined to form the value corresponding to the line segment;
[0019] Step A4. The inspection tool establishes a first data structure and a second data structure in the working set, wherein the first data structure stores the values of the line segments, and the inspection tool flattens the values of all the line segments and stores them in the second data structure;
[0020] Step A5. Determine and filter the values of the names of the endpoints that are repeated three times or more in the second data structure, and set the corresponding endpoints as the loop endpoints.
[0021] Furthermore, in step A2, the line segments are all straight line segments.
[0022] Furthermore, in step A3, along the transmission direction of the high-speed timing signal, as the length of the transmission path increases, the value of the endpoint name gradually increases, and in the value of the line segment, the value of the endpoint name is arranged in order of name size, and in step A4, in the first data structure, the value of the line segment is arranged in order of name size.
[0023] Furthermore, in step A5, the values of all the line segments constituting the same redundant loop are continuous in the first data structure.
[0024] Furthermore, in step A3, along the transmission direction of the high-speed timing signal, as the length of the transmission path increases, the value of the endpoint name gradually increases, and in the value of the line segment, the value of the endpoint name is arranged in order of name size, and in the second data structure, the value of the endpoint name is expanded and arranged in the arrangement order of the value of the line segment in the first data structure.
[0025] Furthermore, the values of the names of all the endpoints constituting the same redundant loop are continuous in the second data structure.
[0026] The above-mentioned method for checking redundant loops of a timing signal printed line includes, in step S4,
[0027] Step B1. The inspection tool obtains the printed line of the high-speed timing signal and establishes a working set;
[0028] Step B2. In the working set, the inspection tool obtains a plurality of endpoints of the printed line, and obtains a plurality of line segments formed by any two adjacent endpoints according to the distribution of the endpoints;
[0029] Step B3. The inspection tool introduces a three-dimensional coordinate system, converts the line segment into a straight line equation, and uses the endpoints as the range of the solution of the straight line equation;
[0030] Step B4-1. The inspection tool solves the equations of any two straight lines in the working set to obtain the coordinates of the intersection of any two line segments, and obtains the corresponding endpoints according to the electronic design information;
[0031] Step B5-1. Establish a calculation set and record the corresponding endpoints in the calculation set, filter and record the endpoints in the calculation set that are repeated twice or more as the loop endpoints;
[0032] or,
[0033] Step B4-2. The inspection tool solves the equations of any three lines in the working set to obtain the coordinates of the intersection of any three line segments and the corresponding endpoints;
[0034] Step B5-2. Create a calculation set and record the corresponding endpoint in the calculation set, where the corresponding endpoint is the loop endpoint.
[0035] In the above-mentioned method for inspecting redundant loops of a timing signal trace, in step S5, all line segments between the loop endpoints are connected along the transmission path of the high-speed timing signal to form the redundant loop.
[0036] The above-mentioned method for checking redundant loops of a timing signal printed line further includes the following steps:
[0037] Step S6: Highlight the redundant loop.
[0038] The present invention according to the above scheme has the beneficial effect that the present invention realizes the inspection of redundant loops by establishing an inspection tool in the design program. The inspection tool obtains the printed line information of the high-speed timing signal from the design file, and uses the geometric principle or data structure of the straight line equation. The former calculates the solution of the straight line equation group to obtain the loop endpoints, and the latter analyzes and judges the loop endpoints based on the number of repetitions of the endpoints in the data structure, feeds the results of the loop endpoints back to the line segment information, obtains the line segment composition between the loop endpoints, and thus obtains the composition of the redundant loops. The inspection tool reminds the designer through a report or a highlighted warning means, so that the designer can make corrections to maintain the integrity of the high-speed timing signal and improve the performance and design quality. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0040] Figure 1 This is a flow chart of the inspection method according to the first embodiment of the present invention.
[0041] Figure 2 This is a flow chart of the inspection method according to the second embodiment of the present invention.
[0042] Figure 3 A structural diagram of the user interface of the inspection tool.
[0043] Figure 4 FIG. 1 is a diagram illustrating a high-speed timing signal trace in an embodiment.
[0044] Among them, the reference numerals in the figures are:
[0045] P0. Initial point; P1. First endpoint; P2. Second endpoint; P3. Third endpoint; P4. Fourth endpoint; P5. Fifth endpoint; P6. Sixth endpoint; P0P1. First line segment; P1P2. Second line segment; P2P3. Third line segment; P2P5. Fourth line segment; P3P4. Fifth line segment; P4P5. Sixth line segment; P5P6. Seventh line segment. DETAILED DESCRIPTION
[0046] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0047] A method for checking redundant loops of timing signal traces, such as Figure 1 As shown, the inspection steps include:
[0048] Step S1. Create an inspection tool.
[0049] Step S2: Through the user interaction interface, the inspection tool reads the electronic design information of the printed circuit board.
[0050] like Figure 3 As shown, the user interaction interface includes a target type selection bar, a filter name input bar, a filter bar, and a selection object bar. Among them, the target type selection bar is used to select the type of electronic design information to be read from the printed circuit board, and narrow the scope of screening and judgment by limiting the target object to be read. In the filter name input bar, when designing timing signals, the timing signal design names in the industry are relatively common, such as DDR..._DQ..., etc., among which the "..." part can be replaced by * for input, and the electronic design information extraction range can be directly locked by name through the built-in program of the design software. A move button is provided between the filter name input bar and the selection object bar. The filter bar displays all the filter object names filtered by the keywords entered in the filter name input bar. The filter object in the filter bar is moved to the selection object bar by the move button to lock the target object of the electronic design information to be extracted by the inspection tool.
[0051] Step S3: The inspection tool determines and screens the high-speed timing signals in the electronic design information.
[0052] Step S4. The inspection tool converts the electronic design information of the high-speed timing signal into an analysis model. The inspection tool obtains information about redundant loops by judging and analyzing the established analysis model.
[0053] The process of establishing the analysis model is as follows.
[0054] Example 1: Analyze and calculate using data structure.
[0055] like Figure 1 As shown, step A1. The inspection tool obtains the traces of the high-speed timing signal and establishes a working set.
[0056] The inspection tool obtains all electronic design information related to the high-speed timing signal DDR3_DQ0 from the PCB design file. This electronic design information forms a working set. The inspection tool creates a separate working set for each high-speed timing signal. Subsequent steps extract relevant information from the working set, and the data and calculations generated during the work process are all performed in the working set. In this way, the content related to a single high-speed timing signal is stored in the same set.
[0057] Step A2: In the working set, the inspection tool obtains a plurality of endpoints of the printed line, and obtains a plurality of line segments formed by any two adjacent endpoints according to the distribution of the endpoints.
[0058] The inspection tool obtains the printed line information about the high-speed timing signal in the working set, obtains the information of each endpoint of the printed line, and forms a straight line segment from two adjacent endpoints according to the shape of the printed line to obtain the endpoint information and line segment information about the printed line of the high-speed timing signal.
[0059] Step A3. The inspection tool extracts the value of the endpoint name, or assigns a new name to the endpoint and extracts the value of the new endpoint name, and then combines the values of the endpoint names at both ends to form the value of the corresponding line segment.
[0060] To facilitate the establishment and calculation of analysis models, the inspection tool extracts the value of the endpoint name. Alternatively, it assigns new names to each endpoint according to a pre-set naming convention and extracts the value of the new endpoint name. Based on geometric relationships, a common naming convention in this process is that the value of the endpoint name gradually increases as the length of the transmission path increases along the direction of high-speed timing signal transmission. For example, if the endpoints are named p0, p1, p3, ..., pn, the corresponding line segment values are P0P1, P1P2, P2P3, ..., Pn-1Pn.
[0061] Specifically, in this embodiment, the printed line corresponding to the high-speed timing signal DDR3_DQ0 is as follows: Figure 4As shown in the figure, the left half of the trace is named. From left to right, there are the initial point P0, the first endpoint P1, the second endpoint P2, the third endpoint P3, the fourth endpoint P4, the fifth endpoint P5, and the sixth endpoint P6, which respectively form the first line segment P0P1, the second line segment P1P2, the third line segment P2P3, the fourth line segment P2P5, the fifth line segment P3P4, the sixth line segment P4P5, and the seventh line segment P5P6. The high-speed timing signal DDR3_DQ0 is transmitted from left to right, starting from the initial point P0 and transmitting to the sixth endpoint P6. The endpoint names are P0, P1, P2, P3, P4, P5, and P6, respectively, and the line segment values are P0P1, P1P2, P2P3, P2P5, P3P4, P4P5, and P5P6.
[0062] Step A4. The inspection tool establishes a first data structure and a second data structure in the working set. The first data structure stores the values of the line segments. The inspection tool flattens the values of all the line segments and stores them in the second data structure.
[0063] In this embodiment, the first data structure is composed of
[0064] {P0P1, P1P2, P2P3, P2P5, P3P4, P4P5, P5P6},
[0065] The second data structure consists of
[0066] {P0, P1, P1, P2, P2, P3, P2, P5, P3, P4, P4, P5, P5, P6}.
[0067] As shown above, the values of the line segments of the first data structure are flattened in the second data structure, that is, the values of the names of the two endpoints of the original value constituting the line segment are separated and directly used as the constituent elements of the second data structure.
[0068] Step A5: Determine and filter the values of the names of endpoints that are repeated three times or more in the second data structure, and set the corresponding endpoints as loop endpoints.
[0069] According to naming conventions, the value of a line segment is a combination of the values of the endpoints' names. Based on the analytical model principle, the second data structure flattens the line segment values, meaning that all endpoints forming the line segment are displayed one by one, with the number of occurrences of an endpoint equal to the number of times it serves as an endpoint. This provides a basis for determining how many line segments a single endpoint connects. In this example, it can be seen that the values P2 and P5 appear more than twice, each appearing three times. Clearly, there are branching line segments at the second endpoint P2 and the fifth endpoint P5.
[0070] Step S5: The inspection tool analyzes the analysis model to obtain loop endpoints, and obtains redundant loops based on the loop endpoints.
[0071] Along the transmission path of the high-speed timing signal, all line segments between the loop endpoints are connected to form a redundant loop. Based on the two values P2 and P5 obtained in step S4, the second endpoint P2 and the fifth endpoint P5 are obtained as loop endpoints. Based on the transmission path of the high-speed timing signal, all line segments between the second endpoint P2 and the fifth endpoint P5 are obtained to form a redundant loop, namely, the third line segment P2P3, the fourth line segment P2P5, the fifth line segment P3P4, and the sixth line segment P4P5.
[0072] In this embodiment, since the first data structure arranges the line segments in ascending order, all line segments with the same endpoint must be listed first, followed by the line segments with the next endpoint. Therefore, in the first data structure, all values between the first line segment starting with P2 and the last line segment ending with P5 represent line segments that constitute the redundant loop. Similarly, in the second data structure, since the data is expanded in the same order as the first data structure, the endpoints represented by all values between P2 and P5 are located between the second endpoint P2 and the fifth endpoint P5, i.e., the endpoints of the line segments in the redundant loop. Thus, from the first data structure, it can be determined that the line segments of the redundant loop include the third line segment P2P3, the fourth line segment P2P5, the fifth line segment P3P4, and the sixth line segment P4P5. From the second data structure, it can be determined that all endpoints in the redundant loop: the second endpoint P2, the third endpoint P3, the fourth endpoint P4, and the fifth endpoint P5. The former directly obtains the line segments of the redundant loop, while the latter can obtain all line segments between the second endpoint P2 and the fifth endpoint P5 from the working set. All line segments between the second endpoint P2 and the fifth endpoint P5 are connected to form a closed loop structure to form a redundant loop.
[0073] Example 2: Using the geometric principle of straight line equation.
[0074] During this process, the inspection tool accesses the electronic design information in the working set, introduces a three-dimensional coordinate system, and converts each trace into a linear equation. Since the present invention focuses on high-speed timing signal traces on the same layer, a two-dimensional coordinate system is introduced, representing each point forming a trace in (X, Y) coordinate form. This allows each trace to form a linear equation. Specifically, the traces for a single high-speed timing signal in the working set are converted into a set of linear equations (linear equations). According to linear equation theory, a solution between two linear equations means that the lines represented by these equations intersect, while a solution between two linear equations means that the lines represented by these equations do not intersect. In other words, for any two linear equations in the same high-speed timing signal trace (working set), a solution between these two equations means that the line segments represented by these two linear equations are adjacent. Applying the concept of Example 1, when the solutions between any two equations overlap, it means that at least three line segments are connected at the endpoints corresponding to the solutions. On the other hand, following the idea of solving linear equations, if there are more than two, that is, three, linear equations with two variables that have solutions, it means that there is a branch point on one of the three line segments represented by these three linear equations, that is, there is an unnecessary loop.
[0075] Therefore, if Figure 2 As shown, in this embodiment, step S4 includes
[0076] Step B1. The inspection tool obtains the traces of the high-speed timing signal and creates a working set.
[0077] Step B2: In the working set, the inspection tool obtains a plurality of endpoints of the printed line, and obtains a plurality of line segments formed by any two adjacent endpoints according to the distribution of the endpoints.
[0078] Step B3. The inspection tool introduces a three-dimensional coordinate system and converts the line segment into a straight line equation, with the endpoints as the range of solutions for the straight line equation. During the calculation of the straight line equation system, the solution needs to be found within the restricted range.
[0079] Step B4-1. The inspection tool solves any two line equations in the working set, obtains the coordinates of the intersection of the two line segments, and obtains the corresponding endpoints based on the electronic design information. This loop continuously reads any two line equations in the working set and obtains the intersection of the two line segments.
[0080] Step B5-1. Create a calculation set and record the corresponding endpoints in the calculation set, and filter and record the endpoints in the calculation set that are repeated more than or equal to twice as loop endpoints.
[0081] or,
[0082] Step B4-2. Check that the tool solves any three straight line equations in the work set and obtains the coordinates of the intersection and corresponding endpoints of any three line segments.
[0083] Step B5-2. Create a calculation set and record the corresponding endpoint in the calculation set. The corresponding endpoint is a loop endpoint.
[0084] Step S6: Highlight redundant loops.
[0085] As an inspection tool, the investigation tool enables the designer to identify and know the location of the redundant loop. The investigation tool calls the highlight command in the design program to highlight the redundant loop obtained in step S5.
[0086] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A method for inspecting redundant loops of a timing signal printed line, characterized in that: The inspection steps include: Step S1. Establish an inspection tool; Step S2. Through the user interface, the inspection tool reads the electronic design information of the printed circuit board; Step S3. The inspection tool determines and filters the high-speed timing signal in the electronic design information; Step S4. The inspection tool converts the electronic design information of the high-speed timing signal into an analysis model; In step S4, Step A1. The inspection tool obtains the printed line of the high-speed timing signal and establishes a working set; Step A2. In the working set, the inspection tool obtains a plurality of endpoints of the printed line, and obtains a plurality of line segments formed by any two adjacent endpoints according to the distribution of the endpoints; Step A3. The inspection tool extracts the value of the endpoint name or assigns a new name to the endpoint and extracts the value of the new endpoint name. Then, the values of the names of the endpoints at both ends are combined to form the value corresponding to the line segment; Step A4. The inspection tool establishes a first data structure and a second data structure in the working set, wherein the first data structure stores the values of the line segments, and the inspection tool flattens the values of all the line segments and stores them in the second data structure; In step S4, including Step B1. The inspection tool obtains the printed line of the high-speed timing signal and establishes a working set; Step B2. In the working set, the inspection tool obtains a plurality of endpoints of the printed line, and obtains a plurality of line segments formed by any two adjacent endpoints according to the distribution of the endpoints; Step B3. The inspection tool introduces a three-dimensional coordinate system, converts the line segment into a straight line equation, and uses the endpoints as the range of the solution of the straight line equation; Step B4-1. The inspection tool solves the equations of any two straight lines in the working set to obtain the coordinates of the intersection of any two line segments, and obtains the corresponding endpoints according to the electronic design information; Step B5-1. Establish a calculation set and record the corresponding endpoints in the calculation set, filter and record the endpoints in the calculation set that are repeated twice or more as the loop endpoints; or, Step B4-2. The inspection tool solves the equations of any three lines in the working set to obtain the coordinates of the intersection of any three line segments and the corresponding endpoints; Step B5-2. Establish a calculation set and record the corresponding endpoint in the calculation set, where the corresponding endpoint is the loop endpoint; Step A5. Determine and filter the value of the name of the endpoint that is repeated three times or more in the second data structure, and set the corresponding endpoint as the loop endpoint; Step S5. The inspection tool analyzes the analysis model to obtain loop endpoints, and obtains redundant loops based on the loop endpoints; in step S5, all line segments between the loop endpoints are connected along the transmission path of the high-speed timing signal to form the redundant loop.
2. The method for detecting redundant loops of a timing signal trace according to claim 1, wherein: In step A2, the line segments are all straight line segments.
3. The method for detecting redundant loops of a timing signal trace according to claim 1, wherein: In step A3, along the transmission direction of the high-speed timing signal, as the length of the transmission path increases, the value of the endpoint name gradually increases, and in the value of the line segment, the value of the endpoint name is arranged in order of name size. In step A4, in the first data structure, the value of the line segment is arranged in order of name size.
4. The method for detecting redundant loops of a timing signal trace according to claim 3, wherein: In step A5, the values of all the line segments constituting the same redundant loop are continuous in the first data structure.
5. The method for detecting redundant loops of a timing signal trace according to claim 1, wherein: In step A3, along the transmission direction of the high-speed timing signal, as the length of the transmission path increases, the value of the endpoint name gradually increases, and in the value of the line segment, the value of the endpoint name is arranged in order of name size, and in the second data structure, the value of the endpoint name is expanded and arranged in the arrangement order of the value of the line segment in the first data structure.
6. The method for inspecting redundant loops of a timing signal trace according to claim 5, wherein: The values of the names of all the endpoints constituting the same redundant loop are continuous in the second data structure.
7. The method for detecting redundant loops of a timing signal trace according to claim 1, wherein: The inspection steps also include Step S6: Highlight the redundant loop.
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