Semiconductor device having a crack detection ring and a crack detection structure

Abstract

This application relates to a semiconductor device having a crack detection ring and a crack detection structure. A semiconductor device includes a crack detection ring and a crack detection structure. The semiconductor device includes: a first sealing ring surrounding a circuit region; a crack detection ring surrounding the first sealing ring; a second sealing ring surrounding the first sealing ring and the crack detection ring; a connection portion connecting the first sealing ring and the crack detection ring; and a crack detection structure disposed in the circuit region and electrically connected to the crack detection ring.

Description

Technical Field

[0001] This patent document relates to semiconductor devices, and more particularly, to semiconductor devices including a crack detection ring and a crack detection structure. Background Art

[0002] As semiconductor devices are more densely integrated, problems such as cracks or peeling caused by the sawing process or external forces are being gradually recognized. Preventing cracks or peeling in semiconductor devices and tracking the location of cracks or peeling are important factors in semiconductor manufacturing processes for improving productivity and reducing costs. Summary of the Invention

[0003] Various embodiments of the present invention provide a semiconductor device including a crack detection ring and a crack detection structure.

[0004] According to an embodiment of the present invention, a semiconductor device may include: a first sealing ring surrounding a circuit region; a crack detection ring surrounding the first sealing ring; a second sealing ring surrounding the first sealing ring and the crack detection ring; a connection portion connecting the first sealing ring and the crack detection ring; and a crack detection structure disposed in the circuit region and electrically connected to the crack detection ring.

[0005] According to another embodiment of the present invention, a semiconductor device may include: a first sealing ring surrounding a circuit region; a crack detection ring surrounding the first sealing ring; a second sealing ring surrounding the first sealing ring and the crack detection ring; and a plurality of controllers and a plurality of operators disposed inside the circuit region and electrically connected to the crack detection ring; wherein the plurality of controllers supply current or voltage to the crack detection ring, and the plurality of operators include a comparator that compares the current or voltage passing through the crack detection ring with a reference current or a reference voltage, respectively.

[0006] According to various embodiments of the present invention, the propagation of cracks or peeling can be prevented, and the location where cracks or peeling occur can be estimated relatively accurately. Therefore, the productivity of semiconductor devices can be improved and the manufacturing cost can be reduced. Brief Description of the Drawings

[0007] Figure 1 is a top view of a sealing ring structure of a semiconductor device illustrating an embodiment of the present disclosure.

[0008] Figure 2 is Figure 1 an enlarged top view of region A of

[0009] Figure 3 is a longitudinal cross-sectional view taken along line I-I′ of Figure 2

[0010] Figure 4 is taken along​Figure 2 Longitudinal sectional view taken along line II-II'.

[0011] Figures 5A to 5E is along Figure 2 Longitudinal sectional view taken along line III-III'.

[0012] Figure 6 is along Figure 2 Longitudinal sectional view taken along line IV-IV'.

[0013] Figure 7 is along Figure 2 Longitudinal sectional view taken along line V-V'.

[0014] Figure 8 is a top view illustrating the electrical connection of a seal ring structure according to an embodiment of the present disclosure.

[0015] Figure 9 is an illustration of a semiconductor device having a Figure 8 seal ring structure according to an embodiment of the present disclosure, longitudinal sectional view.

[0016] Figure 10 conceptually illustrates Figure 8 and Figure 9 3D circuit diagram of a crack detection ring and a crack detection structure.

[0017] Figure 11 is a top view illustrating the electrical connection of a seal ring structure according to another embodiment of the present disclosure.

[0018] Figure 12 and Figure 13 respectively conceptually illustrate Figure 11 3D circuit diagram of a crack detection ring and a crack detection structure.

[0019] Figure 14 illustrates Figure 13 circuit diagram of a selector. Detailed Description

[0020] Figure 1 is a top view illustrating the seal ring structure 200 of the semiconductor device 100 according to an embodiment of the present disclosure. Referring to Figure 1 , the semiconductor device 100 according to this embodiment of the present disclosure may include a seal ring structure 200 surrounding the circuit region CA in, for example but not limited to, a frame shape. The seal ring structure 200 may generally have a closed-loop shape disposed near the edge of the semiconductor device 100. The corners of the seal ring structure 200 may have a chamfered shape. The seal ring structure 200 may have the function of preventing and detecting cracks or peeling of the semiconductor device 100.

[0021] Figure 2 is Figure 1 an enlarged top view of region A. Referring to Figure 2 , according to one embodiment of the present disclosure, a seal ring structure 200 includes an inner seal ring 210, an intermediate seal ring 220, an outer seal ring 230, a crack detection ring 250, an inner groove ring 270, and an outer groove ring 280 that surround a circuit region CA. The crack detection ring 250 can surround the inner seal ring 210, the intermediate seal ring 220 can surround the crack detection ring 250, the inner groove ring 270 can surround the intermediate seal ring 220, the outer seal ring 230 can surround the inner groove ring 270, and the outer groove ring 280 can surround the outer seal ring 230. For example, the crack detection ring 250 can be disposed between the inner seal ring 210 and the intermediate seal ring 220.

[0022] The inner seal ring 210, the intermediate seal ring 220, the outer seal ring 230, the inner groove ring 270, and the outer groove ring 280 can have a closed-loop structure. The crack detection ring 250 can be an open-loop structure. In other embodiments, the intermediate seal ring 220, the outer seal ring 230, the inner groove ring 270, and the outer groove ring 280 can be optionally omitted.

[0023] The seal ring structure 200 can further include a connection portion 215. The connection portion 215 can electrically connect a first end of the crack detection ring 250 to the inner seal ring 210. In another embodiment, the first end of the crack detection ring 250 can be electrically connected to the intermediate seal ring 220. That is, the connection portion 215 can electrically connect the first end of the crack detection ring 250 to the intermediate seal ring 220. In another embodiment, the first end of the crack detection ring 250 can be electrically connected to both the inner seal ring 210 and the intermediate seal ring 220.

[0024] The seal ring structure 200 can further include an input pad 255 and an extension portion 251 as structures for detecting cracks. A second end of the crack detection ring 250 can be connected to the input pad 255 through the extension portion 251. The extension portion 251 can cross the inner seal ring 210. The extension portion 251 and the inner seal ring 210 may not be directly connected. The input pad 255 can be disposed in the circuit region CA. Voltage or current can be provided to the crack detection ring 250 from the input pad 255 through the extension portion 251. The voltage or current passing through the crack detection ring 250 can be provided to the inner seal ring 210 or the intermediate seal ring 220 through the connection portion 215. The voltage or current passing through the inner seal ring 210 or the intermediate seal ring 220 can be grounded.

[0025] Figure 3 is a longitudinal cross-sectional view taken along line I-I′ of Figure 2 . Referring to Figure 3, according to one embodiment of the present disclosure, the inner sealing ring 210 may include an inner doping region 11, a multi-layered inner via pattern 12a to 12d, and a multi-layered inner wiring pattern 13a to 13d. The inner doping region 11 may be formed in the upper substrate 111. The upper substrate 111 may include a single crystal silicon layer. In one embodiment, the upper substrate 111 may be a silicon layer on which a photodiode of an image sensor is formed. The inner doping region 11 may include N-type ions or P-type ions. The inner doping region 11 may be formed at the same height as the common source region of the image sensor.

[0026] The inner wiring patterns 13a to 13d formed in the upper interlayer insulating layer 115 formed on the surface of the upper substrate 111 may be arranged to extend parallel to each other in the horizontal direction. The inner via patterns 12a to 12d may extend parallel to each other in the vertical direction to electrically connect the inner wiring patterns 13a to 13d to each other. The inner via patterns 12a to 12d may include a first inner via pattern 12a, a second inner via pattern 12b, a third inner via pattern 12c, and a fourth inner via pattern 12d that are vertically aligned, and the inner wiring patterns 13a to 13d may include a first inner wiring pattern 13a, a second inner wiring pattern 13b, a third inner wiring pattern 13c, and a fourth inner wiring pattern 13d. Each of the inner via patterns 12a to 12d and the inner wiring patterns 13a to 13d may include a metal.

[0027] The inner doping region 11 and the inner wiring patterns 13a to 13d may extend in the horizontal direction in the shape of parallel tracks or lines. The inner doping region 11, the inner via patterns 12a to 12d, and the inner wiring patterns 13a to 13d may form a grid shape. The inner sealing ring 210 may be surrounded by the upper interlayer insulating layer 115. The upper interlayer insulating layer 115 may include an insulating material such as silicon oxide or silicon nitride.

[0028] In one embodiment, the semiconductor device 100 may further include an inner grid wiring 19. The inner grid wiring 19 may be disposed on the upper surface of the semiconductor device 100, for example, on the upper surface of the upper substrate 111. The inner grid wiring 19 may be parallel to the inner sealing ring 210. For example, the inner grid wiring 19 and the inner sealing ring 210 may vertically overlap. The inner grid wiring 19 may include the same material as the grid pattern that divides the unit pixels of the image sensor device. The inner grid wiring 19 and the grid pattern may be formed at the same height.

[0029] Some of the fourth inner via pattern 12d and the fourth inner wiring pattern 13d may be omitted so that an extension portion 251 may be provided.

[0030] Figure 4 is a longitudinal cross-sectional view taken along line II-II′. Refer to Figure 2 of. Figure 4, according to an embodiment of the present disclosure, the crack detection ring 250 may have a serpentine cascade. The crack detection ring 250 may include a crack detection doped region 51, crack detection via patterns 52a to 52d, and crack detection pad patterns 53a to 53d. The crack detection doped region 51 may be formed in the upper substrate 111. The crack detection doped region 51 may include N-type ions or P-type ions. For example, the crack detection via patterns 52a to 52d may include a first crack detection via pattern 52a, a second crack detection via pattern 52b, a third crack detection via pattern 52c, and a fourth crack detection via pattern 52d that are vertically aligned. The crack detection pad patterns 53a to 53d may include a first crack detection pad pattern 53a, a second crack detection pad pattern 53b, a third crack detection pad pattern 53c, and a fourth crack detection pad pattern 53d. The crack detection via patterns 52a to 52d and the crack detection pad patterns 53a to 53d may each include a metal.

[0031] The crack detection via patterns 52a to 52d and the crack detection pad patterns 53a to 53d may provide vertical electrical connections. The crack detection doped region 51 and the lowermost fourth crack detection pad pattern 53d among the crack detection pad patterns 53a to 53d may provide horizontal electrical connections.

[0032] Each crack detection doped region 51 may electrically connect two adjacent first crack detection via patterns 52a horizontally. Each of the fourth crack detection pad patterns 53d spaced apart from the upper substrate 111 may electrically connect two adjacent fourth crack detection via patterns 52d horizontally.

[0033] For example, each first crack detection via pattern 52a may vertically electrically connect the crack detection doped region 51 to the first crack detection pad pattern 53a. Each second crack detection via pattern 52b may vertically electrically connect the first crack detection pad pattern 53a to the second crack detection pad pattern 53b. Each third crack detection via pattern 52c may vertically electrically connect the second crack detection pad pattern 53b to the third crack detection pad pattern 53c. Each fourth crack detection via pattern 52d may vertically electrically connect the third crack detection pad pattern 53c to the fourth crack detection pad pattern 53d. In another embodiment, the number of the crack detection via patterns 52a to 52d and the crack detection pad patterns 53a to 53d may be greater than the number shown in the drawings.

[0034] The crack detection via patterns 52a to 52d and the crack detection pad patterns 53a to 53d can be filled with the upper interlayer insulating layer 115. Since the crack detection ring 250 can have an open-loop structure, the fourth crack detection pad pattern 53d may not be horizontally connected to the adjacent fourth crack detection via pattern 52d in some regions. In another embodiment, the crack detection doped region 51 may not be horizontally connected to the adjacent first crack detection via pattern 52a in some regions.

[0035] Figures 5A to 5E is a longitudinal cross-sectional view taken along the Figure 2 line III-III'. Referring to Figures 5A to 5E , the seal ring structure 200 according to an embodiment of the present disclosure may include an inner seal ring 210, an intermediate seal ring 220, and a crack detection ring 250. As described above, the inner seal ring 210 may include an inner doped region 11, inner via patterns 12a to 12d, and inner wiring patterns 13a to 13d. The intermediate seal ring 220 may include an intermediate doped region 21, intermediate via patterns 22a to 22d, and intermediate wiring patterns 23a to 23d. The plurality of intermediate via patterns 22a to 22d may be respectively disposed at the same height. The plurality of intermediate via patterns 22a to 22d may be commonly connected to the same intermediate wiring patterns 23a to 23d, and the intermediate wiring patterns 23a to 23d are respectively disposed at upper and lower portions.

[0036] The inner via patterns 12a to 12d and the intermediate via patterns 22a to 22d may form a plurality of multi-layer column shapes. The inner wiring patterns 13a to 13d and the intermediate wiring patterns 23a to 23d may form a plurality of multi-layer strip shapes parallel to the horizontal direction. Therefore, in a top view, the inner via patterns 12a to 12d and the intermediate via patterns 22a to 22d may have the shape of islands arranged in a lattice structure, and the inner wiring patterns 13a to 13d and the intermediate wiring patterns 23a to 23d may have long strip or loop shapes.

[0037] Referring to Figure 5A , the inner doped region 11 and the crack detection doped region 51 may be electrically connected. For example, the connection portion 215a may electrically connect the inner doped region 11 and the crack detection doped region 51. In another embodiment, the connection portion 215a may be omitted. For example, the inner doped region 11 and the crack detection doped region 51 may be electrically connected through the upper substrate 111.

[0038] Referring to Figure 5B , the first inner wiring pattern 13a and the first crack detection pad pattern 53a may be electrically connected. For example, the connection portion 215b may electrically connect the first inner wiring pattern 13a and the first crack detection pad pattern 53a.

[0039] Referring to Figure 5C, the second inner wiring pattern 13b and the second crack detection pad pattern 53b can be electrically connected. For example, the connection portion 215c can electrically connect the second inner wiring pattern 13b and the second crack detection pad pattern 53b.

[0040] Referring to Figure 5D , the third inner wiring pattern 13c and the third crack detection pad pattern 53c can be electrically connected. For example, the connection portion 215d can electrically connect the third inner wiring pattern 13c and the third crack detection pad pattern 53c.

[0041] Referring to Figure 5E , the fourth inner wiring pattern 13d and the fourth crack detection pad pattern 53d can be electrically connected. For example, the connection portion 215e can electrically connect the fourth inner wiring pattern 13d and the fourth crack detection pad pattern 53d.

[0042] The inventive concept of the present disclosure shown can be applied exclusively or selectively. In one embodiment, Figures 5A to 5E Two or more technical features of the present disclosure shown can be combined. As described above, in other embodiments, the first intermediate wiring pattern 23a to the fourth intermediate wiring pattern 23d can be selectively electrically connected to the first crack detection pad pattern 53a to the fourth crack detection pad pattern 53d, respectively. [[ID=�5]]Figures 5A to 5E

[0043] Figure 6 Figure 2 is a longitudinal sectional view taken along line IV-IV' of Figure 6 . Referring to Figures 1 to 6 , the crack detection ring 250 according to an embodiment of the present disclosure can be electrically connected to the input pad 255. For example, the fourth crack detection pad pattern 53d and the input pad 255 can be connected through the extension portion 251. In some regions, the fourth inner through-hole pattern 12d and the fourth inner wiring pattern 13d of the inner sealing ring 210 can be partially removed for the extension portion 251. Referring to , the voltage or current provided from the input pad 255 can be supplied to the upper substrate 111 through the crack detection ring 250 and the inner sealing ring 210, and can be grounded through the upper substrate 111. Therefore, cracks or delamination of the semiconductor device 100 can be detected by measuring the voltage or current released from the input pad 255 to the upper substrate 111. When cracks or delamination occur in the semiconductor device 100, the current supplied to the semiconductor device 100 necessarily flows around the crack or delamination region, disrupting the voltage distribution from the crack-free or delamination-free structure. The deviation of the measured voltage distribution from the normal condition (i.e., the deviation from the crack-free or delamination-free structure) provides a method for detecting the presence of cracks or delamination in the semiconductor device 100. Additionally, by measuring the voltage or current level under normal conditions, the degree of cracks and delamination can also be predicted.

[0044] Figure 7 is a longitudinal sectional view taken along line V-V' Figure 2 . Referring to Figure 7 , the seal ring structure 200 of the semiconductor device 100 according to an embodiment of the present disclosure may include an inner seal ring 210, an intermediate seal ring 220, an outer seal ring 230, a crack detection ring 250, an inner trench ring 270, and an outer trench ring 280.

[0045] The intermediate seal ring 220 and the outer seal ring 230 may have the same vertical cross-sectional structure as the inner seal ring 210. For example, the outer seal ring 230 may include an outer doped region 31, outer via patterns 32a to 32d, and outer wiring patterns 33a to 33d. Further referring back to Figures 5A to 5E and Figure 6 , the fourth via patterns 22d and 32d and the fourth wiring patterns 23d and 33d of the intermediate seal ring 220 and the outer seal ring 230 may not be omitted. Accordingly, the semiconductor device 100 may further include an intermediate grid wiring 29 vertically aligned with the intermediate seal ring 220, and may include an outer grid wiring 39 vertically aligned with the outer seal ring 230.

[0046] The inner trench ring 270 and the outer trench ring 280 may each have a plurality of fully deep trench isolation (FDTI) structures. The FDTI structure may include a trench that completely penetrates from the top to the bottom of the upper substrate 111 and is filled with an insulating material inside. The inner trench ring 270 and the outer trench ring 280 may absorb and block physical and chemical erosion applied to the upper substrate 111, such as crack propagation. Accordingly, the inner trench ring 270 and the outer trench ring 280 may prevent and mitigate cracks in the upper substrate 111.

[0047] Figure 8 is a top view illustrating the electrical connection of the seal ring structure 200B according to an embodiment of the present disclosure. To better explain the technical features of the present disclosure, the inner trench ring 270 and the outer trench ring 280 of Figure 2 have been omitted.

[0048] Referring to Figure 8 , the seal ring structure 200B according to an embodiment of the present disclosure includes an inner seal ring 210, an intermediate seal ring 220, an outer seal ring 230, a crack detection ring 250, and a plurality of crack detection structures 60a to 60d. The crack detection ring 250 may have a closed-loop structure. Referring to Figure 2 and Figures 5A to 5E, the crack detection ring 250 and the inner seal ring 210, or the crack detection ring 250 and the intermediate seal ring 220 can be electrically connected. In another embodiment, the crack detection ring 250 and the inner seal ring 210, or the crack detection ring 250 and the intermediate seal ring 220 may not be electrically connected. For example, the seal ring structure 200B is shown having first to fourth crack detection structures 60a to 60d respectively connected to four sides (i.e., the upper side, the lower side, the left side, and the right side) of the crack detection ring 250. Each of the first to fourth crack detection structures 60a to 60d can independently supply voltage or current to the crack detection ring 250. Each of the first to fourth crack detection structures 60a to 60d can independently detect and measure the voltage or current from the crack detection ring 250. In one embodiment, the first to fourth crack detection structures 60a to 60d can be spaced apart from each other at equal intervals or at other predetermined intervals. The seal ring structure 200B can selectively include two or more of the crack detection structures 60a to 60d. In another embodiment, the seal ring structure 200B can include more crack detection structures than the crack detection structures 60a to 60d shown in the drawings.

[0049] Figure 9 is a longitudinal cross-sectional view of a semiconductor device 100 having a Figure 8 seal ring structure 200B according to an embodiment of the present disclosure. Referring to Figure 9 , the semiconductor device 100 according to this embodiment of the present disclosure may include an inner seal ring 210, an intermediate seal ring 220, an outer seal ring 230, and a crack detection ring 250, an inner trench ring 270 and an outer trench ring 280, and a crack detection structure 60. The crack detection structure 60 may be formed on the lower substrate 112. The crack detection structure 60 may include a control unit for supplying voltage or an operation unit for detecting voltage. Thus, the crack detection structure 60 may include a plurality of transistors. Additionally, the crack detection structure 60 may be electrically connected to the input pad 255 through a via plug 259. The via plug 259 may vertically penetrate the interlayer insulating layer 116 and the bonding insulating layer 117 to electrically connect the lower substrate 112 and the input pad 255. The lower substrate 112 may include a single crystal silicon layer. The interlayer insulating layer 116 may include an insulating material such as, for example, silicon oxide or silicon nitride. The bonding insulating layer 117 may include silicon oxide, such as, for example, high density plasma oxide (HDP oxide).

[0050] Further referring to Figure 8, the crack detection operation for detecting and estimating the crack position may include operating one of the first crack detection structure 60a to the fourth crack detection structure 60d in a voltage supply mode and operating three of the first crack detection structure 60a to the fourth crack detection structure 60d in an operation and measurement mode. For example, the crack detection operation may selectively perform a first crack detection operation, a second crack detection operation, a third crack detection operation, and a fourth crack detection operation. The first crack detection operation uses the first crack detection structure 60a as a voltage supplier and uses the second crack detection structure 60b to the fourth crack detection structure 60d as voltmeters. The second crack detection operation uses the second crack detection structure 60b as a voltage supplier and uses the first crack detection structure 60a, the third crack detection structure 60c, and the fourth crack detection structure 60d as voltmeters. The third crack detection operation uses the third crack detection structure 60c as a voltage supplier and uses the first crack detection structure 60a, the second crack detection structure 60b, and the fourth crack detection structure 60d as voltmeters. The fourth crack detection operation uses the fourth crack detection structure 60d as a voltage supplier and uses the first crack detection structure 60a to the third crack detection structure 60c as voltmeters. For example, in the operation and measurement mode, the first crack detection structure 60a to the fourth crack detection structure 60d may operate as comparators. Therefore, the first crack detection structure 60a to the fourth crack detection structure 60d may have a voltage supply function and a voltage measurement function. For example, each of the first crack detection structure 60a to the fourth crack detection structure 60d may include a pull-up transistor for providing a voltage and a comparator for measuring the voltage. The crack detection operation may include at least two or more of the first crack detection operation to the fourth crack detection operation. For example, the position of the crack may be detected or estimated by only two crack detection operations.

[0051] Figure 10 conceptually illustrates Figure 8 and Figure 9 a three-dimensional circuit diagram of the crack detection ring 250 and the crack detection structures 60a to 60d. Referring to Figure 10 , the crack detection ring 250 may have a closed-loop structure, and the crack detection structures 60a to 60d may be respectively connected to four points of the crack detection ring 250. Figure 8The first crack detection structure 60a to the fourth crack detection structure 60d may include corresponding control units 61a to 61d (i.e., corresponding controllers or control circuits) and corresponding operation units 62a to 62d (i.e., corresponding arithmetic units or arithmetic circuits). As described above, the control units 61a to 61d may include transistors connected to the power supply unit V to supply voltage or current to the crack detection ring 250. The pull-up transistors may include one or more of PMOS or NMOS. For example, it is assumed that each of the control units 61a to 61d includes one NMOS transistor. The operation units 62a to 62d may include comparators for detecting and measuring the voltage or current from the crack detection ring 250. For example, each comparator may include a positive (+) input terminal for receiving a reference voltage or reference current, a negative (-) input terminal for receiving the detected voltage or detected current from the crack detection ring 250, and an output terminal. Accordingly, the difference between the reference voltage and the detected voltage received from the crack detection ring 250 or the difference between the reference current and the detected current received from the crack detection ring 250 may be output at the output terminal.

[0052] In addition, the first crack detection structure 60a to the fourth crack detection structure 60d may further include first load resistors Ra to fourth load resistors Rd connected between the negative (-) input terminal of the comparator and the ground. The first load resistors Ra to the fourth load resistors Rd may have the same resistance value or other known resistance values.

[0053] For example, the crack position may be estimated by the following operations.

[0054] Perform the first crack detection operation

[0055] First control unit 61a: ON, first operation unit 62a: OFF

[0056] Second control unit 61b: OFF, second operation unit 62b: ON

[0057] Third control unit 61c: OFF, third operation unit 62c: ON

[0058] Fourth control unit 61d: OFF, fourth operation unit 62d: ON

[0059] By turning on the first control unit 61a, voltage or current may be supplied from the power supply unit V to the crack detection ring 250. The voltage or current passing through the crack detection ring 250 may be measured by turning on the second operation unit 62b to the fourth operation unit 62d. By comparing the measured values, the position of the crack may be estimated.

[0060] For example, if the voltage or current measured at the second operation unit 62b is higher than the voltage or current measured at the fourth operation unit 62d, it can be estimated that a crack has occurred in the region (a) of the crack detection ring 250 disposed between the first crack detection structure (60a; 61a, 62a) and the fourth crack detection structure (60d; 61d, 62d) or in the region (c) of the crack detection ring 250 disposed between the second crack detection structure (60b; 61b, 62b) and the third crack detection structure (60c; 61c, 62c). If a crack has occurred in the region (a) of the crack detection ring 250, the voltage or current passing through the region (b) of the crack detection ring 250 will be measured at the second operation unit 62b, and the voltage or current passing through the regions (b), (c), and (d) of the crack detection ring 250 will be measured at the fourth operation unit 62d. Therefore, the voltage or current measured at the fourth operation unit 62d can be lower than the voltage or current measured at the second operation unit 62b.

[0061] If a crack occurs in the region (c) of the crack detection ring 250, the second operation unit 62b will measure the voltage or current that has passed through the region (b) of the crack detection ring 250, and since the fourth operation unit 62d needs to supply voltage or current to the third operation unit 62c, the voltage or current measured at the fourth operation unit 62d will be lower than the voltage or current measured at the second operation unit 62b.

[0062] Perform the second crack detection operation

[0063] First control unit 61a: Off, first operation unit 62a: On

[0064] Second control unit 61b: On, second operation unit 62b: Off

[0065] Third control unit 61c: Off, third operation unit 62c: On

[0066] Fourth control unit 61d: Off, fourth operation unit 62d: On

[0067] The second control unit 61b can be turned on to supply voltage or current from the power supply unit V to the crack detection ring 250. The first operation unit 62a, the third operation unit 62c, and the fourth operation unit 62d can be turned on to measure the voltage or current that has passed through the crack detection ring 250. By comparing the measured values, the location of the crack can be estimated more accurately.

[0068] For example, if the voltage or current measured at the first operation unit 62a is higher than the voltage or current measured at the third operation unit 62c, it can be estimated that a crack has occurred in the region (a) of the crack detection ring 250 between the first crack detection structure (60a; 61a, 62a) and the fourth crack detection structure (60d; 61d, 62d). If a crack has occurred in the region (a) of the crack detection ring 250, the voltage or current that has passed through the region (b) of the crack detection ring 250 will be measured at the first operation unit 62a. Since the third operation unit 62c needs to supply voltage or current to the fourth operation unit 62d, the voltage or current measured at the third operation unit 62c will be lower than the voltage or current measured at the first operation unit 62a.

[0069] Conversely, if the voltage or current measured at the third operation unit 62c is higher than the voltage or current measured at the first operation unit 62a, it can be estimated that a crack has occurred in the region (c) of the crack detection ring 250 between the second crack detection structure (60b; 61b, 62b) and the third crack detection structure (60c; 61c, 62c).

[0070] By further performing the third crack detection operation and the fourth crack detection operation, the crack location can be estimated more accurately. The crack location can be accurately estimated based on this measurement principle. Specifically, since a comparator is used in the technical features of the present disclosure, the size of the generated crack can be further estimated based on the detected voltage or current.

[0071] Figure 11 is a top view showing the electrical connection of the seal ring structure 200C according to another embodiment of the present disclosure. The inner groove ring 270 and the outer groove ring 280 of Figure 2 have been omitted. Refer to Figure 11, the seal ring structure 200C according to this embodiment of the present disclosure may include an inner seal ring 210, an intermediate seal ring 220, an outer seal ring 230, and a crack detection ring 250, as well as a plurality of crack detection structures 61a to 61d and 62a to 62d. For example, the plurality of crack detection structures 61a to 61d and 62a to 62d may include a first control unit 61a to a fourth control unit 61d and a first operation unit 62a to a fourth operation unit 62d. In one embodiment, the first control unit 61a to the fourth control unit 61d and the first operation unit 62a to the fourth operation unit 62d may be spaced apart from each other at equal intervals or at other known intervals. Each of the first control unit 61a to the fourth control unit 61d may independently supply voltage or current to the crack detection ring 250 and may independently detect the voltage or current from the crack detection ring 250. In another embodiment, the plurality of crack detection structures 61a to 61d and 62a to 62d may include at least four control units 61a to 61d and at least four operation units 62a to 62d.

[0072] Figure 12 conceptually illustrates Figure 11 the three-dimensional circuit diagram of the crack detection ring 250 and the crack detection structures 61a to 61d and 62a to 62d. Refer to Figure 12 , the crack detection ring 250 may have a closed-loop structure. The first control unit 61a to the fourth control unit 61d and the first operation unit 62a to the fourth operation unit 62d may be respectively connected to a plurality of points of the crack detection ring 250. The connection points between the first control unit 61a to the fourth control unit 61d and the crack detection ring 250 and the connection points between the first operation unit 62a to the fourth operation unit 62d and the crack detection ring 250 may be arranged alternately at equal intervals. That is, in one embodiment, the distances between the connection points may be the same.

[0073] As described above, the control units 61a to 61d may supply voltage or current from the power supply unit V to the crack detection ring 250. For example, it is assumed that each of the control units 61a to 61d includes one NMOS transistor. In another embodiment, the control units 61a to 61d may include PMOS transistors. The operation units 62a to 62d may include comparators for detecting and measuring the voltage or current from the crack detection ring 250. For example, the comparator may include a positive (+) input terminal to which a reference voltage is input, a negative (-) input terminal to which the voltage from the crack detection ring 250 is input, and output terminals out1 to out4 for outputting a comparison value. In addition, the operation units 62a to 62d may further include load resistors Ra to Rd connected to the crack detection ring 250 and the negative (-) input terminal. The load resistors Ra to Rd may have the same resistance value and may be grounded.

[0074] Figure 12 The crack detection ring 250 shown may include eight divided regions a1, a2, b1, b2, c1, c2, d1, and d2 located between the control units 61a to 61d and the operation units 62a to 62d. The crack detection operation may include selectively performing a first crack detection operation to a fourth crack detection operation. For example, the first crack detection operation may include applying a voltage or current to the crack detection ring 250 by turning on the first control unit 61a and turning off the second control unit 61b to the fourth control unit 61d, and measuring the voltage or current by turning on the first operation unit 62a to the fourth operation unit 62d. The second crack detection operation may include applying a voltage or current to the crack detection ring 250 by turning on the second control unit 61b and turning off the first control unit 61a, the third control unit 61c, and the fourth control unit 61d, and measuring the voltage or current by turning on the first operation unit 62a to the fourth operation unit 62d. The third crack detection operation may include applying a voltage or current to the crack detection ring 250 by turning on the third control unit 61c and turning off the first control unit 61a, the second control unit 61b, and the fourth control unit 61d, and measuring the voltage or current by turning on the first operation unit 62a to the fourth operation unit 62d. The fourth crack detection operation may include applying a voltage or current to the crack detection ring 250 by turning on the fourth control unit 61d and turning off the first control unit 61a to the third control unit 61c, and measuring the voltage or current by turning on the first operation unit 62a to the fourth operation unit 62d. For example, the crack position may be detected or estimated by performing the operations described below.

[0075] Perform the first crack detection operation

[0076] First control unit 61a: Turned on

[0077] Second control unit 61b to fourth control unit 61d: Turned off

[0078] First operation unit 62a to fourth operation unit 62d: Turned on

[0079] If the voltage or current measured at the first operation unit 62a is greater than the voltage or current measured at the fourth operation unit 62d, it may be estimated that a crack has occurred in the region (a2), region (b1), or region (d2) of the crack detection ring 250. Alternatively, if the voltage or current measured at the first operation unit 62a is lower than the voltage or current measured at the fourth operation unit 62d, it may be estimated that a crack has occurred in the region (a1), region (c2), or region (d1).

[0080] Perform the second crack detection operation

[0081] Second control unit 61b: ON

[0082] First control unit 61a, third control unit 61c, fourth control unit 61d: OFF

[0083] First operation unit 62a to fourth operation unit 62d: ON

[0084] If the voltage or current measured at the first operation unit 62a in the first crack detection operation is greater than the voltage or current measured at the fourth operation unit 62d, and the voltage or current measured at the first operation unit 62a in the second crack detection operation is greater than the voltage or current measured at the second operation unit 62b, then it can be estimated that a crack has occurred in region (b1) or region (d2) of the crack detection ring 250. In other words, it can be estimated that no crack has occurred in region (a). Alternatively, if the voltage or current measured at the first operation unit 62a in the first crack detection operation is greater than the voltage or current measured at the fourth operation unit 62d, and the voltage or current measured at the first operation unit 62a is lower than the voltage or current measured at the second operation unit 62b, then it can be estimated that a crack has occurred in region (a2) of the crack detection ring 250.

[0085] Perform the third crack detection operation

[0086] Third control unit 61c: ON

[0087] First control unit 61a, second control unit 61b, fourth control unit 61d: OFF

[0088] First operation unit 62a to fourth operation unit 62d: ON

[0089] If the voltage or current measured at the first operation unit 62a in the first crack detection operation is greater than the voltage or current measured at the fourth operation unit 62d, the voltage or current measured at the first operation unit 62a in the second crack detection operation is greater than the voltage or current measured at the second operation unit 62b, and the voltage or current measured at the second operation unit 62b in the third crack detection operation is greater than the voltage or current measured at the third operation unit 62c, then it can be estimated that a crack has occurred in region (b1) of the crack detection ring.

[0090] Alternatively, after performing the second crack detection operation, the third crack detection operation can be omitted, and the fourth crack detection operation can be performed.

[0091] Perform the fourth crack detection operation

[0092] Fourth control unit 61d: ON

[0093] First control unit 61a to third control unit 61c: OFF

[0094] First operation unit 62a to fourth operation unit 62d: ON

[0095] If the voltage or current measured at the first operation unit 62a in the first crack detection operation is greater than the voltage or current measured at the fourth operation unit 62d, the voltage and current measured at the first operation unit 62a in the second crack detection operation are greater than the voltage or current measured at the second operation unit 62b, and the voltage or current measured at the third operation unit 62c is lower than the voltage or current measured at the fourth operation unit 62d, then it can be estimated that a crack has occurred in the region (d2) of the crack detection ring.

[0096] Even when cracks occur at multiple positions, the accurate crack position can be estimated by comparing the voltages or currents measured at the first operation unit 62a to the fourth operation unit 62d according to the above crack detection operations.

[0097] Figure 13 Conceptually illustrates Figure 11 The three-dimensional circuit diagram of the crack detection ring 250 and the crack detection structures 61a to 61d and 62a to 62d. Refer to Figure 13 In addition, the semiconductor device 100 may further include a decoding unit 61 for controlling the first control unit 61a to the fourth control unit 61d and a selector 65 for providing a reference voltage to the positive (+) input terminals of the first operation unit 62a to the fourth operation unit 62d. The decoding unit 61 can independently turn on and off each of the four control units 61a to 61d by receiving a two-bit control signal. The decoding unit 61 can reduce the number of routing wirings for independently controlling the control units 61a to 61d. The selector 65 can adjust the level of the reference voltage provided to the operation units 62a to 62d (e.g., the positive (+) input terminals of the comparators) in various ways.

[0098] Figure 14 Conceptually illustrates Figure 13 The circuit diagram of the selector 65. Refer to Figure 14, the selector 65 may include a resistor string 66, an active transistor 67, a switch SW, a switch controller 68, and a self - biasing transistor 69. The resistor string 66 and the active transistor 67 may be connected in series between a power supply unit V and ground. The resistor string 66 may include a plurality of resistor elements R0 to R5. The resistor string 66 may divide the power supply voltage into a plurality of levels. The active transistor 67 may be turned on to activate the selector 65. For example, when the active transistor 67 is turned on, voltage or current may be supplied to the resistor elements R0 to R5 of the resistor string 66, and the nodes between the resistor elements R0 to R5 may have a plurality of voltage levels. The switch SW may be respectively connected to the nodes between the resistor elements R0 to R5 of the resistor string 66. The switch controller 68 may selectively turn on the switch SW. Accordingly, various voltage levels of the nodes between the resistor elements R0 to R5 of the resistor string 66 may be selectively supplied to the positive (+) input terminal of the operation unit 62. The switch controller 68 may also perform a decoding operation. Accordingly, the number of wiring routings for turning on the switch SW may be minimized. The gate electrode of the self - biasing transistor 69 may be electrically connected to one of the nodes between the resistor elements R0 to R5 of the resistor string 66. For example, the gate electrode of the self - biasing transistor 69 may be connected to the node between the base resistor element R0 and the first resistor element R1. The first source / drain electrode of the self - biasing transistor 69 may be connected to the current source node of the operation unit 62, and the second source / drain electrode of the self - biasing transistor 69 may be grounded. Accordingly, various levels of reference voltage may be input to the positive (+) input terminal of the operation unit 62, and the output of the operation unit 62 may have one of a plurality of voltage levels. That is, the operation unit 62 according to the present disclosure may perform an analog operation.

[0099] Although the present invention has been specifically described according to the above - mentioned preferred embodiments, it should be noted that the above embodiments are for illustrative purposes only and are not intended to limit. In addition, those of ordinary skill in the art will understand that various embodiments may be possible within the scope of the present invention.

[0100] Cross - reference to related applications

[0101] This application claims the priority of Korean Patent Application No. 10 - 2021 - 0033175, filed on March 15, 2021, the entire contents of which are incorporated herein by reference.

Claims

1. A semiconductor device, the semiconductor device comprising: A first sealing ring that surrounds a circuit region; A crack detection ring that surrounds the first sealing ring; A second sealing ring that surrounds the first sealing ring and the crack detection ring; A connection portion that connects the first sealing ring and the crack detection ring; And A crack detection structure that is disposed in the circuit region and electrically connected to the crack detection ring, Wherein, the crack detection structure includes a control unit and an operation unit, Wherein, the control unit supplies a voltage or a current to the crack detection ring, and Wherein, a comparator included in the operation unit compares the detected voltage or the detected current of the crack detection ring with a reference voltage or a reference current.

2. The semiconductor device according to claim 1, Among them, The crack detection ring includes: A crack detection doped region formed in an upper substrate; A multi-layer crack detection pad pattern formed on a first surface of the upper substrate; and A multi-layer crack detection via pattern that electrically connects the crack detection doped region and the crack detection pad pattern, Wherein, the crack detection doped region is horizontally electrically connected to two adjacent crack detection via patterns among the crack detection via patterns, and Wherein, one crack detection pad pattern that is farthest from the upper substrate among the crack detection pad patterns is horizontally electrically connected to two adjacent crack detection via patterns among the crack detection via patterns.

3. The semiconductor device according to claim 2, the semiconductor device further includes an extension portion and an input pad for supplying a voltage or a current to the crack detection ring, Among them, The input pad is disposed in the circuit region, Wherein, the extension portion intersects the first sealing ring and connects the crack detection ring and the input pad, and Wherein, the extension portion is insulated from the first sealing ring.

4. The semiconductor device according to claim 1, Among them, The crack detection structure includes a plurality of control units and a plurality of operation units, and Wherein, the plurality of control units and the plurality of operation units are alternately disposed to be connected to the crack detection ring.

5. The semiconductor device according to claim 4, Among them, Nodes between the plurality of control units and the crack detection ring, and nodes between the plurality of operation units and the crack detection ring are alternately disposed at equal intervals.

6. The semiconductor device according to claim 2, the semiconductor device further includes: An upper interlayer insulating layer formed on the first surface of the upper substrate and surrounding the first sealing ring, the second sealing ring, and the crack detection ring; A bonding insulating layer located on a surface of the upper interlayer insulating layer; A lower interlayer insulating layer located on a surface of the bonding insulating layer; and A lower substrate located on a surface of the lower interlayer insulating layer, Wherein, the control unit and the operation unit are disposed on the lower substrate.

7. The semiconductor device according to claim 1, Among them, wherein the comparator includes: a first input terminal that receives the reference voltage or the reference current; a second input terminal that receives the detected voltage or the detected current from the crack detection ring; and an output terminal that outputs the difference between the reference voltage and the detected voltage or the difference between the reference current and the detected current.

8. The semiconductor device according to claim 7, Among them, wherein the crack detection structure further includes a load resistor connected between the second input terminal and the ground.

9. The semiconductor device according to claim 7, Among them, wherein the crack detection structure further includes a selector connected to the first input terminal of the comparator, and wherein the selector includes: a resistor string that divides the reference voltage or the reference current into multiple levels; and a plurality of switches that input one of the multiple levels of the divided voltage or the divided current to the first input terminal.

10. The semiconductor device according to claim 9, Among them, wherein the selector further includes an active transistor and a self - biasing transistor, wherein the active transistor is connected in series with the resistor string, and wherein the self - biasing transistor includes a gate electrode connected to one of the nodes between the plurality of resistors in the resistor string, a drain electrode connected to the current source node of the comparator, and a source electrode grounded.

11. The semiconductor device according to claim 2, Among them, wherein the first sealing ring includes: a first doped region formed inside the upper substrate; a multi - layer first wiring pattern formed on the first surface of the upper substrate; and a multi - layer first via pattern that electrically connects the first doped region and the first wiring pattern.

12. The semiconductor device according to claim 11, Among them, wherein the second sealing ring includes: a second doped region formed inside the upper substrate; a multi - layer second wiring pattern formed on the first surface of the upper substrate; and a multi - layer second via pattern that electrically connects the second doped region and the second wiring pattern.

13. The semiconductor device according to claim 12, Among them, wherein the first wiring pattern and the second wiring pattern extend parallel to each other in the horizontal direction, wherein the first via pattern and the second via pattern extend parallel to each other in the vertical direction, and wherein the first sealing ring and the second sealing ring have a grid - shaped vertical cross - section.

14. The semiconductor device according to claim 12, the semiconductor device further includes a first grid wiring and a second grid wiring disposed on the second surface of the upper substrate, Among them, wherein the first grid wiring is parallel to the first sealing ring, and wherein the second grid wiring is parallel to the second sealing ring.

15. The semiconductor device according to claim 2, further comprising: A third sealing ring that surrounds the second sealing ring; A first trench ring that is disposed between the second sealing ring and the third sealing ring; And A second trench ring that is disposed outside the third sealing ring, wherein the first trench ring and the second trench ring have a fully deep trench isolation structure formed inside the upper substrate.

16. A semiconductor device, comprising: A first sealing ring that surrounds a circuit region; A crack detection ring that surrounds the first sealing ring; A second sealing ring that surrounds the first sealing ring and the crack detection ring; And A plurality of controllers and a plurality of operators, the plurality of controllers and the plurality of operators being disposed inside the circuit region and electrically connected to the crack detection ring, wherein the plurality of controllers supply current or voltage to the crack detection ring, and the plurality of operators include comparators that respectively compare the current or voltage passing through the crack detection ring with a reference current or a reference voltage.

17. The semiconductor device according to claim 16, further comprising a connection portion that electrically connects the first sealing ring and the crack detection ring.

18. The semiconductor device according to claim 16, Among them, Nodes between the plurality of controllers and the crack detection ring and nodes between the plurality of operators and the crack detection ring are alternately arranged at equal intervals.

19. The semiconductor device according to claim 16, Among them, The first sealing ring includes: A first doped region formed inside the upper substrate; and A multi-layer first wiring pattern and a plurality of first via patterns, the multi-layer first wiring pattern and the plurality of first via patterns being formed inside an interlayer insulating layer on the upper substrate, wherein the first doped region and the first wiring pattern extend parallel to each other in a horizontal direction, wherein the second sealing ring includes: A second doped region formed inside the upper substrate; and A multi-layer second wiring pattern and a plurality of second via patterns, the multi-layer second wiring pattern and the plurality of second via patterns being formed inside the interlayer insulating layer, wherein the second doped region and the second wiring pattern extend parallel to each other in a horizontal direction, and wherein the crack detection ring includes: A crack detection doped region formed inside the upper substrate; and A multi-layer crack detection pad pattern and a plurality of crack detection via patterns, the multi-layer crack detection pad pattern and the plurality of crack detection via patterns being formed inside the interlayer insulating layer, wherein the plurality of controllers and the plurality of operators are formed on a lower substrate.

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