A packaging design method for a PCB board

Abstract

The present invention provides a packaging design method for a PCB board, comprising: obtaining parameter information of a connector to be packaged; drawing a preset number of plug holes and at least two fool-proof holes in line form at preset positions on a first layer based on the parameter information; generating the plug holes and / or fool-proof holes in the first layer in outline form on a second layer according to a preset packaging design method, or generating neither the plug holes nor the fool-proof holes in the first layer on the second layer; and using the generated result of the second layer as the packaging design of the PCB board. The packaging design method for a PCB board provided by the present invention can provide different PCB boards for packaging simply by changing whether the second layer has plug holes and / or fool-proof holes. The entire modification process does not require the participation of other design links, thereby reducing modification time and improving modification efficiency.

Description

Technical Field

[0001] The present invention relates to the field of PCB board packaging, and in particular to a PCB board packaging design method. Background Art

[0002] As demand for electronic products continues to grow, the design and selection of electronic products are becoming more diverse. During the production of electronic products, their internal connectors need to be packaged using PCBs. In existing technologies, space limitations on PCBs make wiring difficult, increasing time costs and inefficiencies. When designing PCBs, a project often needs to create multiple PCB packaging options based on material selection and package size, depending on pinout differences, assembly methods, and the presence of anti-foolproofing features. If there are any mid-design changes, the relevant person in charge needs to switch back and forth between design documents, such as BOM changes, schematic changes, and accompanying PCB board changes. This entire modification process is time-consuming, labor-intensive, and inefficient.

[0003] Therefore, how to provide a PCB board packaging design method to overcome the above-mentioned defects in the prior art has become one of the technical problems that technicians in this field urgently need to solve. Summary of the Invention

[0004] The present invention aims to provide a packaging design method for a PCB board, so as to solve the problem in the prior art that a PCB board has multiple packaging methods due to differences in the number of pins, assembly methods, and whether there is a foolproof function, resulting in multiple design links needing to be modified when the design changes in the middle.

[0005] In order to achieve the above object, the present invention provides a PCB board packaging design method, comprising:

[0006] Get parameter information of the connector to be packaged;

[0007] According to the parameter information, a preset number of plug holes and at least two fool-proof holes are drawn in line form at preset positions of the first layer;

[0008] According to a preset package design method, the plug hole and / or the fool-proof hole in the first layer are generated in the second layer in outline form, or the plug hole and the fool-proof hole in the first layer are not generated in the second layer;

[0009] The generated result of the second layer is used as the package design of the PCB board.

[0010] Optionally, obtaining parameter information of the connector to be packaged includes:

[0011] The positions of the first pins, the number of the first pins, and the distances between the first pins in the connector to be packaged are obtained.

[0012] Optionally, drawing a preset number of plug holes in line form at preset positions on the first layer includes:

[0013] Drawing second pins corresponding to the first pins on the first layer according to the acquired positions of the first pins, the number of the first pins, and the distances between the first pins;

[0014] A plug hole is drawn in line form at each second pin position on the first layer.

[0015] Optionally, the connector to be packaged includes a male connector and a female connector that can be connected;

[0016] Wherein, when there is no PCB board between the male connector and the female connector, the connector to be packaged is in a plug-in manner;

[0017] When there is a PCB board between the male connector and the female connector, the connector to be packaged is in a reverse plug-in manner.

[0018] Optionally, the preset package design method includes:

[0019] When the connector to be packaged adopts a foolproof plug-in method, the foolproof hole in the first layer is generated in the second layer in the form of the outline;

[0020] When the connector to be packaged adopts a foolproof reverse insertion method, the plug hole and the foolproof hole in the first layer are generated in the second layer in the form of the outline;

[0021] When the connector to be packaged adopts a non-foolproof plug-in method, the plug-in hole and the foolproof hole in the first layer are not generated in the second layer;

[0022] When the connector to be packaged adopts a non-foolproof reverse plugging method, the plugging hole in the first layer is generated in the second layer in the form of the outline.

[0023] Optionally, the plug hole and the fool-proof hole are drawn in a cadence program, the first layer includes an assembly layer, and the second layer includes a contour layer.

[0024] Optionally, the cadence program is further provided with a copy command, and the plug hole and / or the fool-proof hole in the first layer are automatically positioned and generated in the second layer by executing the copy command.

[0025] Optionally, when the plug hole and / or the fool-proof hole in the first layer is generated in the second layer in the form of the outline, the method includes:

[0026] Automatically positioning and generating the plug holes and / or fool-proof holes in the first layer in the second layer in the form of lines by executing the copy command;

[0027] In the second layer, the plug hole and / or the fool-proof hole are converted from the line form to the outline form for generation.

[0028] Optionally, when the plug hole and / or the fool-proof hole in the first layer is generated in the second layer in the form of the outline, the method includes:

[0029] Converting the plug hole and / or the foolproof hole from the line form to the outline form in the first layer;

[0030] By executing the copy command, the plug hole and / or the fool-proof hole in the first layer are automatically positioned and generated in the second layer in the form of outline.

[0031] Optionally, the fool-proof hole and the plug hole made on the PCB board are non-metallic holes.

[0032] Compared with the prior art, the PCB packaging design method provided by the present invention has the following beneficial effects:

[0033] The present invention provides a PCB packaging design method. The method first obtains parameter information of a connector to be packaged. Then, based on the parameter information, a preset number of plug holes and at least two fool-proof holes are drawn in line form at preset positions on a first layer. Then, according to a preset packaging design method, the plug holes and / or the fool-proof holes in the first layer are generated in outline form on a second layer, or the plug holes and the fool-proof holes in the first layer are not generated in the second layer. Finally, the generated result of the second layer is used as the packaging design of the PCB board. The PCB packaging design method provided by the present invention draws the fool-proof holes and the plug holes in line form on the first layer. Since the presence of the plug holes and / or the fool-proof holes on the PCB board during packaging depends on whether the plug holes and / or the fool-proof holes are present in outline form on the second layer, when the PCB board is packaged, various PCB packaging designs can be achieved by selecting whether the plug holes and / or the fool-proof holes are generated in the second layer or whether neither the plug holes nor the fool-proof holes are generated. Therefore, the PCB board packaging design method provided by the present invention can provide different PCB boards for packaging by simply changing whether the second layer has the plug hole and / or the fool-proof hole after the packaging method of the connector to be packaged is changed. The entire modification process does not require the participation of other design links, thereby reducing modification time and improving modification efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A flowchart of a PCB package design method provided in one embodiment of the present invention;

[0035] Figure 2 A schematic diagram of a connector to be packaged provided in accordance with an embodiment of the present invention is provided in a plug-in manner;

[0036] Figure 3 A schematic diagram of a reverse plug-in method for a connector to be packaged provided in one embodiment of the present invention;

[0037] Figure 4 A schematic diagram of a fool-proof plug-in method of a connector to be packaged provided in one embodiment of the present invention;

[0038] Figure 5 A schematic diagram of a connector to be packaged according to an embodiment of the present invention is provided for foolproof reverse insertion;

[0039] Figure 6 A schematic diagram of a non-foolproof plug-in method of a connector to be packaged provided in one embodiment of the present invention;

[0040] Figure 7 A schematic diagram of a non-foolproof reverse insertion method of a connector to be packaged provided in one embodiment of the present invention;

[0041] The accompanying drawings are numerals as follows:

[0042] 100-PCB board, 200-female socket, 300-male connector, 400-second pin, 500-anti-foolproof hole, 600-connection hole. DETAILED DESCRIPTION

[0043] The specific embodiments of the present invention will be described in more detail below with reference to the schematic diagrams. The advantages and features of the present invention will become clearer based on the following description. It should be noted that the drawings are all in very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention. It should be understood that the drawings in the specification do not necessarily show the specific structure of the present invention in proportion, and that the illustrative features used to illustrate certain principles of the present invention in the drawings in the specification may also be drawn in a slightly simplified manner. The specific design features of the present invention disclosed herein, including, for example, specific dimensions, directions, positions and shapes, will be determined in part by the specific environment in which they are to be applied and used. In addition, in the embodiments described below, the same figure mark is sometimes used in common between different drawings to represent the same part or a part with the same function, and its repeated description is omitted. In this specification, similar numbers and letters are used to represent similar items, so once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0044] This embodiment provides a packaging design method for a PCB board 100. For details, see the attached Figure 1 , which schematically provides a flow chart of a packaging design method for a PCB board 100, from Figure 1 It can be seen that the packaging design method of the PCB board 100 includes:

[0045] Get parameter information of the connector to be packaged;

[0046] According to the parameter information, a preset number of plug holes 600 and at least two fool-proof holes 500 are drawn in line form at preset positions of the first layer;

[0047] According to a preset package design method, the plug hole 600 and / or the fool-proof hole 500 in the first layer are generated in the second layer in outline form, or the plug hole 600 and the fool-proof hole 500 in the first layer are not generated in the second layer;

[0048] The generated result of the second layer is used as the package design of the PCB board 100.

[0049] With this arrangement, the packaging design method for the PCB board 100 provided by the present invention draws the foolproof hole 500 and the plug hole 600 in line form on the first layer. Since the presence of the plug hole 600 and / or the foolproof hole 500 on the PCB board 100 during packaging depends on whether the plug hole 600 and / or the foolproof hole 500 are outlined on the second layer, when different packaging design methods are used, various packaging designs for the PCB board 100 can be achieved by selecting whether the plug hole 600 and / or the foolproof hole 500 are generated in the second layer, or whether neither the plug hole 600 nor the foolproof hole 500 is generated. Therefore, the packaging design method of the PCB board 100 provided by the present invention can provide different PCB boards 100 for packaging by simply changing whether the second layer has the plug hole 600 and / or the fool-proof hole 500 after the packaging method of the connector to be packaged is changed. The entire modification process does not require the participation of other design links, thereby reducing modification time and improving modification efficiency.

[0050] Preferably, obtaining parameter information of the connector to be packaged includes: obtaining the position of the first pin (not marked in the figure), the number of the first pins, and the distance between each first pin in the connector to be packaged. Drawing a preset number of plug holes 600 in the form of lines at preset positions on the first layer includes: drawing second pins 400 corresponding to each first pin on the first layer based on the obtained position of the first pin, the number of the first pins, and the distance between each first pin; and drawing a plug hole 600 in the form of a line at the position of each second pin 400 on the first layer. Thus, by obtaining the position and number information of the first pin, the corresponding second pin 400 is drawn in the first layer, and the position and number of the plug holes 600 are determined accordingly.

[0051] Please see the attached Figure 2 -Attached Figure 3 ,in, Figure 2 A schematic diagram of the plug-in method of the connector to be packaged is provided schematically; Figure 3 The schematic diagram of the connector to be packaged is provided as a reverse plug-in method; Figure 2 and Figure 3 As can be seen, the connector to be packaged includes a male connector 300 and a female connector 200 that can be connected. When there is no PCB board 100 between the male connector 300 and the female connector 200, the connector to be packaged is in a plug-in mode. When there is a PCB board 100 between the male connector 300 and the female connector 200, the connector to be packaged is in a reverse plug-in mode. Therefore, the connector to be packaged can adopt different connection modes according to different packaging requirements.

[0052] Please continue to see the attached Figure 4 -Attached Figure 7 ,in, Figure 4 A schematic diagram of the anti-mute plug-in method of the connector to be packaged is provided; Figure 5 A schematic diagram of the anti-foolproof reverse insertion method of the connector to be packaged is provided;

[0053] Figure 6 A schematic diagram of the non-foolproof plug-in method of the connector to be packaged is provided; Figure 7 The schematic diagram of the connector to be packaged is provided as a non-foolproof reverse insertion method; Figure 4-Figure 7 It can be seen that the preset package design method includes:

[0054] When the connector to be packaged adopts a foolproof plug-in method, the foolproof hole 500 in the first layer is generated in the second layer in the form of the outline;

[0055] When the connector to be packaged adopts the foolproof reverse insertion method, the plug hole 600 and the foolproof hole 500 in the first layer are generated in the second layer in the form of the outline;

[0056] When the connector to be packaged adopts a non-foolproof plug-in method, the plug hole 600 and the foolproof hole 500 in the first layer are not generated in the second layer;

[0057] When the connector to be packaged adopts a non-foolproof reverse plugging method, the plug hole 600 in the first layer is generated in the second layer in the form of the outline.

[0058] Thus, when the connector to be packaged adopts a different connection method, the corresponding generation of the plug hole 600 and the foolproof hole 500 is generated in the second layer. This ensures that the connector to be packaged can be properly connected after the PCB board 100 is packaged. Furthermore, if the packaging method of the connector to be packaged is changed, different PCB boards 100 can be packaged simply by changing whether the plug hole 600 and / or the foolproof hole 500 are present in the second layer. This modification process does not require the involvement of other design steps, thus reducing modification time and improving modification efficiency.

[0059] Preferably, the plug hole 600 and the foolproof hole 500 are drawn in a cadence program, wherein the first layer includes an assembly layer (ASSEMBLY_TOP) and the second layer includes an outline layer (Outline). Those skilled in the art will appreciate that drawing the plug hole 600 and the foolproof hole 500 as lines (Line) on the assembly layer and as outlines (Shape) on the outline layer can both be achieved using the cadence program.

[0060] Preferably, the cadence program is further provided with a copy command, and by executing the copy command, the plug hole 600 and / or the fool-proof hole 500 in the first layer is automatically positioned and generated in the second layer. In one preferred embodiment, when the plug hole 600 and / or the fool-proof hole 500 in the first layer is generated in the second layer in the form of the outline, it includes: automatically positioning and generating the plug hole 600 and / or the fool-proof hole 500 in the first layer in the form of the line in the second layer by executing the copy command; and converting the plug hole 600 and / or the fool-proof hole 500 in the second layer from the line form to the outline form for generation. In another preferred embodiment, when the plug hole 600 and / or the fool-proof hole 500 in the first layer are generated in the second layer in the form of the outline, the process includes: converting the plug hole 600 and / or the fool-proof hole 500 in the first layer from the line form to the outline form; and automatically positioning and generating the plug hole 600 and / or the fool-proof hole 500 in the first layer in the form of the outline in the second layer by executing the copy command. Thus, through the copy command, the plug hole 600 and / or the fool-proof hole 500 drawn in the first layer can be automatically positioned and generated in the second layer, thereby ensuring that when the PCB board 100 is manufactured, it can be manufactured according to the plug hole 600 and / or the fool-proof hole 500 in the form of the outline in the second layer to meet the different connection methods of the devices to be connected.

[0061] Preferably, the foolproof hole 500 and the plug hole 600 formed on the PCB board 100 are non-metallic holes. Therefore, when the PCB board 100 is packaged, the non-metallic holes will not affect the electrical connection between the male connector 300 and the female connector 200 of the connector to be packaged.

[0062] In addition, it should be noted that the systems and methods disclosed in the embodiments of this document may also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of the devices, methods, and computer program products according to the various embodiments of this document. In this regard, each box in the flowchart or block diagram may represent a module, program, or portion of code, wherein the module, program segment, or portion of code contains one or more executable instructions for implementing a specified logical function, and the module, program segment, or portion of code contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the boxes may also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes may actually be executed substantially in parallel, or they may sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, as well as combinations of boxes in the block diagram and / or flowchart, may be implemented using a dedicated hardware-based system for performing the specified functions or actions, or may be implemented using a combination of dedicated hardware and computer instructions. In the description of this specification, reference to the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the exemplary expressions of the above terms do not necessarily refer to the same embodiment or example.

[0063] In summary, the packaging design method for a PCB board 100 provided by the present invention draws the foolproof hole 500 and the plug hole 600 in line form on the first layer. Since the presence of the plug hole 600 and / or the foolproof hole 500 on the PCB board 100 during packaging depends on whether the plug hole 600 and / or the foolproof hole 500 are outlined on the second layer, when different packaging design methods are employed, various packaging designs for the PCB board 100 can be achieved by selecting whether the plug hole 600 and / or the foolproof hole 500 are generated in the second layer, or by omitting both the plug hole 600 and / or the foolproof hole 500. Therefore, the packaging design method of the PCB board 100 provided by the present invention can provide different PCB boards 100 for packaging by simply changing whether the second layer has the plug hole 600 and / or the fool-proof hole 500 after the packaging method of the connector to be packaged is changed. The entire modification process does not require the participation of other design links, thereby reducing modification time and improving modification efficiency.

[0064] The above description is merely a preferred embodiment of the present invention and does not limit the present invention in any way. Any person skilled in the art who, without departing from the scope of the present invention, makes any equivalent substitution, modification, or other changes to the technical solution and technical content disclosed in the present invention shall be deemed to be within the scope of the present invention and still fall within the scope of protection of the present invention.

Claims

1. A PCB board packaging design method, characterized in that: include: Get parameter information of the connector to be packaged; According to the parameter information, a preset number of plug holes and at least two fool-proof holes are drawn in line form at preset positions of the first layer; According to a preset package design method, the plug hole and / or the fool-proof hole in the first layer are generated in the second layer in outline form, or the plug hole and the fool-proof hole in the first layer are not generated in the second layer; The generated result of the second layer is used as the package design of the PCB board.

2. A PCB board packaging design method as claimed in claim 1, characterized in that: The obtaining of parameter information of the connector to be packaged includes: The positions of the first pins, the number of the first pins, and the distances between the first pins in the connector to be packaged are obtained.

3. A PCB package design method as claimed in claim 2, characterized in that: The step of drawing a preset number of plug holes in a line form at the preset positions of the first layer includes: Drawing second pins corresponding to the first pins on the first layer according to the acquired positions of the first pins, the number of the first pins, and the distances between the first pins; A plug hole is drawn in line form at each second pin position on the first layer.

4. A PCB package design method according to claim 1, characterized in that: The connector to be packaged includes a male connector and a female connector that can be connected; Wherein, when there is no PCB board between the male connector and the female connector, the connector to be packaged is in a plug-in manner; When there is a PCB board between the male connector and the female connector, the connector to be packaged is in a reverse plug-in manner.

5. A PCB package design method as claimed in claim 4, characterized in that: The preset package design method includes: When the connector to be packaged adopts a foolproof plug-in method, the foolproof hole in the first layer is generated in the second layer in the form of the outline; When the connector to be packaged adopts a foolproof reverse insertion method, the plug hole and the foolproof hole in the first layer are generated in the second layer in the form of the outline; When the connector to be packaged adopts a non-foolproof plug-in method, the plug-in hole and the foolproof hole in the first layer are not generated in the second layer; When the connector to be packaged adopts a non-foolproof reverse plugging method, the plugging hole in the first layer is generated in the second layer in the form of the outline.

6. A PCB package design method according to claim 1, characterized in that: The plug hole and the foolproof hole are drawn in a cadence program, the first layer includes an assembly layer, and the second layer includes a contour layer.

7. A PCB package design method as claimed in claim 6, characterized in that: The cadence program is further provided with a copy command, and the plug hole and / or the fool-proof hole in the first layer are automatically positioned and generated in the second layer by executing the copy command.

8. A PCB package design method as claimed in claim 7, characterized in that: When the plug hole and / or the fool-proof hole in the first layer is generated in the second layer in the form of the outline, it includes: Automatically positioning and generating the plug holes and / or fool-proof holes in the first layer in the second layer in the form of lines by executing the copy command; In the second layer, the plug hole and / or the fool-proof hole are converted from the line form to the outline form for generation.

9. A PCB package design method as claimed in claim 7, characterized in that: When the plug hole and / or the fool-proof hole in the first layer is generated in the second layer in the form of the outline, the method includes: Converting the plug hole and / or the foolproof hole from the line form to the outline form in the first layer; By executing the copy command, the plug hole and / or the fool-proof hole in the first layer are automatically positioned and generated in the second layer in the form of outline.

10. The packaging design method of a PCB board according to claim 1, wherein: The foolproof holes and the plug holes made on the PCB board are non-metallic holes.

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