Chip package heat dissipation component for suppressing electromagnetic radiation

Abstract

The present application provides a chip package heat dissipation component for suppressing electromagnetic radiation, which relates to the field of chip technology. It is used to ensure the electromagnetic radiation suppression effect without being limited by the height dimension between the radiator and the PCB. The chip package heat dissipation component is used for packaging and dissipating heat from the chip group. The chip package heat dissipation component includes: a substrate for carrying the chip group, a reinforcement structure, and a radiator. The reinforcement structure and the chip group are arranged on the same surface of the substrate, and the reinforcement structure surrounds the periphery of the chip group. The radiator is used to cover the side of the chip group away from the substrate and is in contact with the chip group. Among them, at least one of the first area of the reinforcement structure opposite to the radiator and the second area of the radiator opposite to the reinforcement structure is provided with one or more layers of slot groups surrounding the chip group, and each layer of slot group includes one or more slots. The electromagnetic radiation suppression structure formed by the slots can avoid being affected by the height of this chip package heat dissipation component.

Description

Technical Field

[0001] This application relates to the field of chip technology, and particularly to a chip package heat dissipation component, an electronic device, a reinforcement structure, and a radiator for suppressing electromagnetic radiation. Background Art

[0002] With the evolution of chip speeds from 10 Gbps to 25 Gbps, then to 56 Gbps and higher speeds, the electromagnetic waves radiated by the chip will continuously increase. Electromagnetic radiation exceeding the limit will affect the normal operation of other surrounding components or devices. Therefore, it is necessary to suppress the radiated electromagnetic waves.

[0003] Figure 1 The structure shown includes an electromagnetic radiation suppression structure 6 for suppressing the electromagnetic noise radiated by the chip. In this Figure 1 structure, the chip 22 and the reinforcement structure 24 are carried on the same surface of the substrate 21. The substrate 21 is electrically connected to a printed circuit board (PCB) 1. The electromagnetic radiation suppression structure 6 is provided on the surface of the radiator 25 facing the PCB 1. Here, the electromagnetic radiation suppression structure 6 is formed by growing metal pillars on the surface of the radiator 25 facing the PCB 1.

[0004] Among them, the electromagnetic radiation suppression structure 6 is an electromagnetic band gap (EBG) structure. The surface of the electromagnetic radiation suppression structure 6 facing the PCB 1 forms a Perfect Magnetic Conductor (PMC) boundary, and the surface of the PCB 1 facing the radiator 25 forms a Perfect Electrical Conductor (PEC) boundary. Thus, the electromagnetic waves radiated by the chip are suppressed from radiating outward through the electromagnetic radiation suppression structure 6.

[0005] Then, Figure 1 the suppression effect of the shown solution is limited by the height dimension between the radiator 25 and the PCB 1. For example, Figure 2 the curve Q1 in Figure 1 is the curve of the shielding effectiveness (SE) when the height H between the radiator 25 and the PCB 1 shown in Figure 1 is 5 mm. The curve Q2 is the curve of the SE when the height H between the radiator 25 and the PCB 1 shown in Figure 1 is 5.7 mm. The curve Q3 is the curve of the SE when the height H between the radiator 25 and the PCB 1 shown in Figure 2It can be seen that the electromagnetic shielding and suppression effect of the electromagnetic bandgap structure 6 severely attenuates as the height H increases. Summary of the Invention

[0006] The present application provides a chip package heat dissipation component, an electronic device, a reinforcement structure, and a radiator for suppressing electromagnetic radiation, aiming to solve the problem in the prior art that the electromagnetic wave suppression effect of the chip package heat dissipation component is affected by the height dimension between the radiator and the PCB.

[0007] To solve the above technical problems, the present application adopts the following technical solutions:

[0008] In a first aspect, the present application provides a chip package heat dissipation component for encapsulating and dissipating heat from a chip group. The chip package heat dissipation component includes: a substrate for carrying the chip group, a reinforcement structure, and a radiator. The reinforcement structure and the chip group are disposed on the same surface of the substrate, and the reinforcement structure surrounds the periphery of the chip group. The radiator is used to cover and contact the chip group on the side away from the substrate; wherein, the chip group includes one chip or multiple stacked chips. In at least one of the first region of the reinforcement structure opposite to the radiator and the second region of the radiator opposite to the reinforcement structure, one or more layers of slot groups are provided that surround the chip group. Each layer of slot group includes one or more slots. In the chip package heat dissipation component provided by the present application, generally in the chip package heat dissipation component, the reinforcement structure and the radiator are made of a metal material. By opening slots in at least one of the reinforcement structure or the radiator structure, when current passes through the slots, it will exhibit a parallel resonant LC circuit. Near the resonant frequency, the impedance of this parallel resonant LC circuit approaches infinity and is equivalent to an open circuit, which can suppress the diffusion of current towards the edges of the radiator or the reinforcement structure, thereby suppressing the electromagnetic waves radiated by the chip from radiating into space, forming an electromagnetic radiation suppression structure and achieving an electromagnetic suppression effect.

[0009] In addition, since the slots are opened in the first region of the reinforcement structure opposite to the radiator and / or the second region of the radiator opposite to the reinforcement structure, in this way, one of the surfaces of the radiator opposite to the reinforcement structure and the surface of the reinforcement structure opposite to the radiator forms a PMC boundary, and the other surface forms a PEC boundary. Even if the dimension of the chip group in the direction perpendicular to the substrate is large, it will not affect the distance between the PMC boundary and the PEC boundary, thus having basically no impact on the electromagnetic radiation suppression effect of this electromagnetic radiation suppression structure (referring to the slots). Therefore, the electromagnetic radiation suppression structure in the chip package heat dissipation component provided by the embodiments of the present application has a simple structure, and the electromagnetic radiation suppression effect is basically not affected by the chip height dimension.

[0010] In a possible implementation of the first aspect, the depth of each layer of slot groups is equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed. Based on the electromagnetic resonance mechanism, the depth of the slots is designed to be equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed. In this way, electromagnetic waves of the corresponding frequency can be well suppressed.

[0011] In a possible implementation of the first aspect, multiple layers of slot groups are formed in at least one area, and the multiple layers of slot groups are arranged at intervals in a direction away from the chipset. By arranging multiple layers of slot groups at intervals on the reinforcement structure and / or the radiator, multiple parallel resonant LC circuits can be formed, thereby further improving the electromagnetic radiation suppression effect.

[0012] In a possible implementation of the first aspect, the slot depths of at least two layers of slot groups in the multiple layers of slot groups are not equal. For example, the multiple layers of slot groups include two layers of slot groups, where the depth of one layer of slot group is equal to one quarter of the wavelength corresponding to the first electromagnetic wave frequency to be suppressed, and the depth of the other layer of slot group is equal to one quarter of the wavelength corresponding to the second electromagnetic wave frequency to be suppressed. In this way, the electromagnetic radiation suppression structure formed by the multiple layers of slot groups can suppress electromagnetic waves of multiple different frequencies, so as to broaden the suppression frequency band and improve the electromagnetic radiation suppression effect.

[0013] In a possible implementation of the first aspect, at least one layer of slot group is filled with at least one of a dielectric material and a conductive material. When the slot group is filled with a dielectric material, compared with air in the slots, the frequency of the electromagnetic wave to be suppressed can be reduced, so that this electromagnetic radiation suppression can be applied to chip components in the low-frequency band. When the slot group is filled with a conductive material, more losses can be introduced to improve the electromagnetic radiation suppression effect.

[0014] In a possible implementation of the first aspect, at least one layer of slot group is filled with at least one of an electromagnetic shielding material and an electromagnetic wave absorbing material. When the slot group is filled with an electromagnetic shielding material, the electromagnetic radiation suppression effect can be further improved through the shielding of electromagnetic waves by the electromagnetic shielding material; when the slot group is filled with an electromagnetic wave absorbing material, the electromagnetic radiation suppression effect can also be further improved through the absorption of the electromagnetic wave energy projected onto its surface by the electromagnetic wave absorbing material.

[0015] In a possible implementation of the first aspect, at least one layer of slot group includes multiple slots, and the distance between every two adjacent slots is less than or equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed. It can be understood that if the distance between every two adjacent slots is greater than one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed, electromagnetic radiation cannot be suppressed, and the electromagnetic wave can radiate out through the gap between two adjacent slots.

[0016] In a possible implementation of the first aspect, the second region is formed with one or more layers of slot groups, and the slot groups are formed by grooving on the surface of the radiator opposite to the reinforcement structure. That is to say, by grooving on the surface of the radiator to suppress the electromagnetic waves radiated by the chip from radiating into space. In most scenarios, the slot depth is relatively small, basically about 1 mm. Compared with the method of setting a metal ring on the radiator to form a slot structure, in terms of manufacturing process, grooving is easier to implement than setting a metal ring.

[0017] In a possible implementation of the first aspect, the first region is formed with one or more layers of slot groups, and the slot groups are formed by grooving on the surface of the reinforcement structure opposite to the radiator. For the same reason as grooving on the radiator above, grooving on the reinforcement structure is easier to implement in terms of process than forming slots by setting a metal ring.

[0018] In a possible implementation of the first aspect, both the first region of the reinforcement structure opposite to the radiator and the second region of the radiator opposite to the reinforcement structure are formed with one or more layers of slot groups, and the one or more layers of slot groups on the reinforcement structure are arranged staggeredly with the one or more layers of slot groups on the radiator. In this way, the slots on both the reinforcement structure and the radiator can play the role of suppressing electromagnetic radiation.

[0019] In a possible implementation of the first aspect, the one or more layers of slot groups on the reinforcement structure are arranged closer to the chipset relative to the one or more layers of slot groups on the radiator. It can be understood in this way that all the slot groups on the reinforcement structure are located on the side closer to the chipset, and all the slot groups on the radiator are located on the side farther from the chipset. In terms of manufacturing process, it is easier to implement than arranging the slot groups on the reinforcement structure and the slot groups on the radiator at intervals.

[0020] In a possible implementation of the first aspect, the one or more layers of slot groups on the reinforcement structure are arranged farther from the chipset relative to the one or more layers of slot groups on the radiator. Similar to the situation above where all the slot groups on the reinforcement structure are located on the side closer to the chipset and all the slot groups on the radiator are located on the side farther from the chipset, it can reduce the manufacturing process difficulty. In a possible implementation of the first aspect, the reinforcement structure includes a plurality of sub-reinforcement structures, and the plurality of sub-reinforcement structures are arranged at intervals along the periphery of the chipset, and the distance between two adjacent sub-reinforcement structures is less than or equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed. Setting the reinforcement structure as a plurality of discontinuous sub-reinforcement structures, and then setting the distance between two adjacent sub-reinforcement structures to be less than or equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed, in cooperation with the above slot groups, can further improve the electromagnetic radiation suppression effect.

[0021] In a possible implementation of the first aspect, when the chip package heat dissipation component includes multiple layers of slot groups, the slot depths of these multiple layers of slot groups change linearly. In this way, the suppression frequency band range can be further broadened, and the electromagnetic radiation suppression effect can be improved.

[0022] In a second aspect, the present application provides an electronic device, which includes: a printed circuit board, a chipset, and a chip package heat dissipation component. The chipset is disposed on a substrate. The chipset includes one or more chips. The chip package heat dissipation component is the chip package heat dissipation component involved in any implementation manner of the first aspect above. The printed circuit board is electrically connected to the substrate.

[0023] For the electronic device provided by the present application, since it includes the chip package heat dissipation component of any implementation manner of the first aspect above. In this way, one of the surface of the radiator facing the reinforcement structure and the surface of the reinforcement structure facing the radiator forms a PMC boundary, and the other surface forms a PEC boundary. Even if the dimension of the chip in the direction perpendicular to the substrate is large, it will not affect the distance between the PMC boundary and the PEC boundary, so that the electromagnetic radiation suppression effect of the electromagnetic radiation suppression structure (referring to the slot) is basically not affected.

[0024] In a possible implementation of the second aspect, a third region of the printed circuit board facing the radiator has a plurality of metal rings. The plurality of metal rings surround the periphery of the substrate. A layer of third slot groups is formed between adjacent two metal rings. The third slot groups have one or more layers, and each layer of the third slot groups includes one or a plurality of slots surrounding the chipset.

[0025] By forming the third slot groups on the printed circuit board, the electromagnetic radiation suppression effect can be further improved.

[0026] In a possible implementation of the second aspect, the third slot groups have multiple layers, and the multiple layers of third slot groups are spaced apart in a direction away from the substrate. In this way, a plurality of parallel resonant LC circuits can be formed, and thus, the electromagnetic radiation suppression effect will be further improved.

[0027] In a possible implementation of the second aspect, the slot depths of at least two of the multiple layers of third slot groups are not equal. The electromagnetic radiation suppression structure formed by the multiple layers of slot groups can suppress electromagnetic waves of multiple different frequencies to broaden the suppression frequency band and improve the electromagnetic radiation suppression effect.

[0028] In a possible implementation of the second aspect, the third slot groups are filled with at least one of a dielectric material, a conductive material, an electromagnetic wave absorbing material, and an electromagnetic shielding material.

[0029] When filling the dielectric material in the third slot group, compared with air in the slots, the frequency of the electromagnetic wave to be suppressed can be reduced, so that the electromagnetic radiation suppression can be applied to the chip components in the low-frequency band. When filling the conductive material in the third slot group, more losses can be introduced to improve the electromagnetic radiation suppression effect. When filling the electromagnetic shielding material in the third slot group, the electromagnetic radiation suppression effect can be further improved through the shielding of the electromagnetic wave by the electromagnetic shielding material; when filling the electromagnetic wave absorbing material in the third slot group, the electromagnetic radiation suppression effect can also be further improved through the absorption of the electromagnetic wave energy projected onto its surface by the electromagnetic wave absorbing material.

[0030] Among them, for the effects that can be achieved by the second aspect of the present application and various possible implementation manners of the second aspect, reference can be made to the effects of the first aspect and various possible implementation manners of the first aspect.

[0031] In a third aspect, the present application provides a reinforcement structure, which is used in a chip package heat dissipation component. The chip package heat dissipation component includes: a substrate for carrying a chip group, and a heat sink for covering a side of the chip group away from the substrate. The reinforcement structure is used to surround the periphery of the chip group, and one or more layers of first slot groups are formed in a first region of the reinforcement structure opposite to the heat sink. Each layer of the first slot group includes one or more slots.

[0032] The reinforcement structure provided by the present application can be applied in a chip package heat dissipation component and cooperate with the heat sink to suppress the electromagnetic waves radiated by the chip group.

[0033] In a possible implementation manner of the third aspect, the depth of the first slot group is equal to one quarter of the wavelength corresponding to the frequency of the electromagnetic wave to be suppressed.

[0034] In a possible implementation manner of the third aspect, the first slot group is filled with at least one of a dielectric material, a conductive material, an electromagnetic wave absorbing material, and an electromagnetic shielding material.

[0035] In a possible implementation manner of the third aspect, the first slot group has multiple layers, and the slot depths of at least two of the multiple layers of the first slot groups are not equal.

[0036] Among them, for the effects that can be achieved by the third aspect of the present application and various possible implementation manners of the third aspect, reference can be made to the effects of the first aspect and various possible implementation manners of the first aspect.

[0037] Fourth aspect, the present application provides a heat sink, which is used in a chip packaging heat dissipation component. The chip packaging heat dissipation component includes: a substrate for carrying a chip group, and a reinforcement structure disposed on the substrate and surrounding the periphery of the chip group. The heat sink is used to cover the side of the chip group away from the substrate. One or more layers of second groove groups are formed in the second area of the heat sink opposite to the reinforcement structure, and each layer of the second groove group includes one or more grooves.

[0038] The heat sink provided by the present application can also be applied in a chip packaging heat dissipation component and cooperate with the reinforcement structure to suppress the electromagnetic waves radiated by the chip group.

[0039] In a possible implementation manner of the fourth aspect, the depth of the second groove group is equal to one quarter of the wavelength corresponding to the frequency of the electromagnetic wave to be suppressed.

[0040] In a possible implementation manner of the fourth aspect, the second groove group is filled with at least one of a dielectric material, a conductive material, an electromagnetic wave absorbing material, and an electromagnetic shielding material.

[0041] In a possible implementation manner of the fourth aspect, the second groove group has multiple layers, and the groove depths of at least two of the multiple layers of the second groove groups are not equal.

[0042] Among them, for the effects that can be achieved by the fourth aspect of the present application and various possible implementation manners of the fourth aspect, reference can be made to the effects of the first aspect and various possible implementation manners of the first aspect.

[0043] Fifth aspect, the present application provides a circuit board, which is used to carry a substrate provided with a chip group, and the circuit board is disposed opposite to a heat sink on one side of the chip group. Among them, the area of the circuit board opposite to the heat sink has a plurality of metal rings, and the plurality of metal rings surround the periphery of the substrate. A layer of third groove group is formed between adjacent two metal rings, and the third groove group has one or more layers, and each layer of the third groove group includes one or a plurality of grooves surrounding the chip group.

[0044] The circuit board provided by the present application can be, for example, a printed circuit board. By forming a plurality of metal rings on the circuit board to form grooves between adjacent two metal rings, when the circuit board is used to carry a substrate provided with a chip group, it cooperates with the heat sink covering the chip group through the grooves, so that the surface of the metal ring on the circuit board opposite to the heat sink becomes a PMC boundary, and the surface of the heat sink opposite to the circuit board becomes a PEC boundary, thereby suppressing the electromagnetic waves radiated by the chip group. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a partial structural schematic diagram of an electronic device with an electromagnetic radiation suppression structure in the prior art;

[0046] Figure 2 For adopting Figure 1 The test curve graph of the shielding effectiveness at different times between the radiator and the PCB for the electromagnetic radiation suppression structure shown;

[0047] Figure 3 Partial structural schematic diagram of the electronic device according to the embodiment of the present application;

[0048] Figure 4 Detailed schematic diagram of the partial structure of the electronic device according to the embodiment of the present application;

[0049] Figure 5 For Figure 4 Top view;

[0050] Figure 6 Exploded view of the partial structure of the electronic device according to the embodiment of the present application;

[0051] Figure 7 Three-dimensional view of the reinforcement structure according to the embodiment of the present application;

[0052] Figure 8 Schematic diagram of the electromagnetic radiation suppression principle of the first slot group according to the embodiment of the present application;

[0053] Figure 9 Detailed schematic diagram of the partial structure of the electronic device according to the embodiment of the present application;

[0054] Figure 10 Detailed schematic diagram of the partial structure of the electronic device according to the embodiment of the present application;

[0055] Figure 11 Detailed schematic diagram of the partial structure of the electronic device according to the embodiment of the present application;

[0056] Figure 12a Schematic diagram of the structure of the reinforcement structure according to the embodiment of the present application;

[0057] Figure 12b Schematic diagram of the structure of the reinforcement structure according to the embodiment of the present application;

[0058] Figure 12c Schematic diagram of the structure of the reinforcement structure according to the embodiment of the present application;

[0059] Figure 12d Schematic diagram of the structure of the reinforcement structure according to the embodiment of the present application;

[0060] Figure 12e Schematic diagram of the structure of the reinforcement structure according to the embodiment of the present application;

[0061] Figure 13 Detailed schematic diagram of the partial structure of the electronic device according to the embodiment of the present application;

[0062] Figure 14Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0063] Figure 15 Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0064] Figure 16 Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0065] Figure 17 Schematic diagram showing that there are multiple first slot groups according to an embodiment of the present application;

[0066] Figure 18a Cross-sectional view of the first slot group according to an embodiment of the present application;

[0067] Figure 18b Cross-sectional view of the first slot group according to an embodiment of the present application;

[0068] Figure 18c Cross-sectional view of the first slot group according to an embodiment of the present application;

[0069] Figure 18d Cross-sectional view of the first slot group according to an embodiment of the present application;

[0070] Figure 18e Cross-sectional view of the first slot group according to an embodiment of the present application;

[0071] Figure 19 Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0072] Figure 20 Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0073] Figure 21 Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0074] Figure 22 Detailed schematic diagram of a part of the electronic device according to an embodiment of the present application;

[0075] Figure 23a Test curve graph of the shielding effectiveness of the electronic device according to an embodiment of the present application;

[0076] Figure 23b Test curve graph of the shielding effectiveness of the electronic device according to an embodiment of the present application;

[0077] Figure 23c Test curve graph of the shielding effectiveness of the electronic device according to an embodiment of the present application;

[0078] Figure 24 Test curve graph of the shielding effectiveness of the electronic device according to an embodiment of the present application;

[0079] Figure 25 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application;

[0080] Figure 26 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application;

[0081] Figure 27 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application;

[0082] Figure 28 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application;

[0083] Figure 29 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application;

[0084] Figure 30 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application;

[0085] Figure 31 Detailed schematic diagram of a partial structure of the electronic device according to an embodiment of the present application.

[0086] Reference numerals:

[0087] 1 - PCB; 2 - electronic components; 3 - electrical connection structure; 21 - substrate; 22 - chip; 23 - controlled collapse chip connection solder joint; 24 - reinforcement structure; 25 - heat sink; 261 - annular groove group, first groove group; 261 - first layer first groove group, 262 - second layer first groove group, 263 - third layer first groove group; 262 - annular groove group, second groove group; 2621 - first layer second groove group; 27 - TIM layer; 28 - filling layer; 29 - cover plate; 5 - third groove group; 6 - electromagnetic radiation suppression structure; 7 - metal ring. Detailed implementation manners

[0088] An embodiment of the present application provides an electronic device. The electronic device may be a server, a data center, or may also be a mobile phone, a pad, a smart wearable product (for example, a smart watch, a smart bracelet), a virtual reality (VR) device, an augmented reality (AR), or may also be a device such as a household appliance. The specific form of the above-mentioned electronic device is not particularly limited in the embodiment of the present application.

[0089] Figure 3Shown is a partial structural diagram of an electronic device, which includes a printed circuit board (PCB) 1, a chip 22, and a chip package heat dissipation component. The "chip" involved in this application can be a bare chip (die), or a chip that has been encapsulated in a package form such as plastic encapsulation or a cover plate. The chip can be a high-speed chip. For example, the rate is greater than 10 Gbps. The chip package heat dissipation component is used to package and dissipate heat from the chip 22. Here, the chip 22 can be one or more. When there are multiple chips, these multiple chips are stacked in a direction perpendicular to the PCB 1 to form a chip group.

[0090] Figure 4 Shown is Figure 3 detailed structural diagram of, in combination with Figure 3 and Figure 4 , the chip package heat dissipation component includes a substrate 21, the chip 21 is carried on the substrate 21, and the substrate 21 is electrically connected to the PCB 1 through an electrical connection structure 3, so that the chip 22 can be interconnected with other chips or other electronic components 2 (such as transistors, diodes, resistors, capacitors, inductors, etc.) on the PCB 1.

[0091] In an alternative embodiment, the electrical connection structure 3 can be a ball grid array (BGA).

[0092] In some embodiments, the chip 22 can be integrated on the substrate 21 through controlled collapse chip connection (C4) solder joints 23, or can be integrated on the substrate 21 through micro bumps (uBumps).

[0093] Continuing to combine Figure 3 and Figure 4 , the chip package heat dissipation component further includes a heat sink 25, which is disposed on the side of the chip 22 away from the substrate 21 (i.e., the upper surface of the chip 22 shown in the figure), and is in contact with the chip 22 for dissipating heat from the chip 22. Here, the heat sink 25 can be a finned structure as Figure 4 shown, or other structures. The heat sink 25 can be made of a metal material, such as iron, copper, etc.

[0094] Continuing to combine Figure 4, the heat sink 25 covers the upper surface of the chip 22 through a thermal interface material (TIM) layer 27. In this way, the heat dissipated by the chip 22 is conducted to the heat sink 25 through the TIM layer 27, and the heat is diffused out through the heat sink 25 with a large heat conduction area, realizing the cooling of the chip 22 and ensuring the normal operation of the chip 22. Especially for chips with high power consumption or multiple stacked chips, the heat dissipation effect is better. Such a packaging form can be called a die packaging.

[0095] In addition, in order to make the heat sink 25 contact the chip 22 more firmly and reliably, the heat sink 25 can also be fixed to the PCB 1 through a connecting member (not shown in the figure, for example, it can be a bolt).

[0096] In Figure 4 the die packaging, in order to suppress large warping caused by thermal deformation of the chip 22 and the substrate 21, the chip package heat dissipation component further includes a reinforcement structure 24 disposed on the substrate 21, and the reinforcement structure 24 surrounds the periphery of the chip 22. Exemplarily, the reinforcement structure 24 can be adhered to the substrate 21 through an adhesive layer. In the present application, the reinforcement structure refers to a structure made of a material with relatively high stiffness (such as metal), or a structure having the characteristic that the deformation direction during application is opposite to the deformation directions of the substrate 21 and the chip 22. Since in some embodiments of the present application, slots are formed in the reinforcement structure, which will have a little impact on the performance of the reinforcement structure. At this time, it can be compensated by means of material selection or thickening the reinforcement material. The specific implementation of the reinforcement structure 24 is prior art and will not be elaborated in the present application. For example, a suitable material can be selected to form a reinforcing ring around the substrate 21 around the chip 22, and the shape is not limited either. Usually, it can be a rectangle similar to the shape of the chip, but other shapes are not excluded either. In addition, the reinforcement structure can also be in the form of reinforcing ribs (for example, composed of several independent linear structures) disposed on the substrate 21 around the chip 22.

[0097] In specific applications, each chip 22 of the chip group will radiate electromagnetic waves, and will propagate through the gap between the reinforcement structure and the heat sink. Refer to Figure 4 , taking the case where the chip group includes only one chip as an example, there is a gap L between the surface of the heat sink 25 facing the chip 22 and the surface of the reinforcement structure 24 facing the heat sink 24. In actual applications, since the heat sink and the reinforcement structure are usually metal structures, this gap L will become a path for the electromagnetic waves radiated by the chip to radiate outwards. That is to say, the electromagnetic waves radiated by the chip 22 will pass through this gap L and radiate outwards.

[0098] Refer toFigures 4 - 7 , wherein, Figure 5 is Figure 4 the top view of Figure 6 is Figure 4 the exploded view of Figure 7 is the three-dimensional view of the reinforcement structure 24. In order to suppress the electromagnetic waves radiated by the chip 22 from radiating outward, in this embodiment, one or more layers of annular groove groups 261 surrounding the chip 22 are formed in the first region of the reinforcement structure 24 opposite to the radiator 25. Each layer of the annular groove group includes one or more grooves. Among them, each layer of the annular groove group may include one or more grooves. If only one groove is included, all parts of this groove are connected. If multiple grooves are included, the grooves may not be connected to each other, but as a whole, they form an annular structure. The shape of each layer of the annular groove group can be various annular shapes. For example, it can be rectangular, circular, polygonal or other irregular structures. Refer to Figure 7 , in Figure 7 the embodiment shown, there are two layers of annular groove groups 261, and each layer of the annular groove group 261 only includes one groove surrounding the chip. For the convenience of description, in this application, the annular groove in the reinforcement structure is called the first groove group 261.

[0099] Refer to Figure 4 , because the first groove group 261 is provided on the reinforcement structure, the surface of the reinforcement structure 24 opposite to the radiator 25 forms a PMC boundary, and the surface of the radiator 25 opposite to the reinforcement structure 24 forms a PEC boundary. When the electromagnetic waves radiated by the chip 22 pass through between the PMC boundary and the PEC boundary, the electromagnetic waves will be blocked by the provided first groove group 261 to play a role in suppressing electromagnetic radiation.

[0100] Specifically, Figure 8 shows the principle of electromagnetic radiation suppression of the first groove group 261 formed on the reinforcement structure 24. In Figure 8 (a) of Figure 8 , a part of the reinforcement structure including one first groove group 261 is shown. Assuming that the chip is on the left side of the structure of Figure 8 (a), then when the electromagnetic waves radiated by the chip flow through the structure shown in Figure 8 (a) of Figure 8 , the dashed line with an arrow in Figure 8 (a) indicates the approximate direction of the electromagnetic waves flowing through. When the electromagnetic waves flow through the first groove group 261, charge accumulation will be formed at the opening of the first groove group 26, so it can be described by the capacitance C, and the current flows back and forth between the bottom surface and the side surface of the first groove group 261 to form a current loop, so it can be described by the inductance L. That is to say, the bottom metal surface of the first groove group 261 can be equivalent to a short circuit, and the opening of the first groove group 261 is equivalent to an open circuit. Figure 8 (b) of Figure 8The parallel LC resonant circuit formed in (a). In this way, at the resonant frequency, the impedance of the first slot group 261 is infinite, which can further suppress the diffusion of current towards the edge of the reinforcement structure 24, preventing electromagnetic waves from radiating into free space and playing a role in suppressing electromagnetic radiation.

[0101] At the same time, in this solution, good results can be obtained when the distance between the PEC boundary and the PMC boundary is within a certain effective range (such as 3.5 mm). In this way, even if the chip stacking method is adopted, increasing the distance between the PEC boundary and the PMC boundary, good results can still be obtained without changing the reinforcement structure and the radiator structure. For example, referring to Figure 9 , Figure 9 In the embodiment shown, the chip package heat dissipation component is used to package and dissipate heat from two stacked bare chips 22. In this scenario, even if the number of bare chips 22 increases, resulting in the distance between the radiator 25 and the PCB1 increasing from Figure 4 H1 in Figure 9 to Figure 9 H2 in

[0102] Figure 10 These two distances usually still fall within the effective range (for example, H1 can be about 1 mm and H2 can be about 1.8 mm). Therefore, electromagnetic radiation can still be suppressed. At the same time, the reinforcement structure and the radiator structure do not need to be changed, and the previous design can be reused. In this way, the design is simple and the cost is reduced. Of course, if in practice H2 exceeds the effective range (for example, greater than 3.5 mm), the distance between the PEC boundary and the PMC boundary can be reduced by various means such as increasing the height dimension T1 of the reinforcement structure 24 or increasing the height dimension T2 of the part of the radiator 25 opposite to the reinforcement structure 24 shown in

[0103] In Figure 10 , the slot depths of the multiple layers of the first slot group 261 are equal. For example, when the frequency of the electromagnetic wave to be suppressed is f1, then the slot depths of these multiple layers of the first slot group 261 are all equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency f1. In this way, when the electromagnetic wave with frequency f1 is transmitted to the first slot group 261, it will resonate with the first slot group 261 to form a high impedance, blocking the outward radiation of the electromagnetic wave, thus effectively suppressing the electromagnetic wave of a specific frequency.

[0104] Figure 11 shows the structural diagram of another electronic device, and Figure 10 compared with Figure 10 , the groove depths of the multi-layer first groove group are not equal. For example, in

[0105] , adjacent first groove groups 2611 of the first layer, 2612 of the second layer, and 2613 of the third layer are illustrated, and the groove depths of the first groove group 2611 of the first layer, the first groove group 2612 of the second layer, and the first groove group 2613 of the third layer are all not equal. For example, the groove depth of the first groove group 2611 of the first layer is equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency of f1, the groove depth of the first groove group 2612 of the second layer is equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency of f2, and the groove depth of the first groove group 2613 of the third layer is equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency of f3. In this way, the bandwidth of the electromagnetic wave to be suppressed can be broadened, and the electromagnetic radiation suppression effect can be improved.

[0106] As Figure 10 and Figure 11 shown, in the present application, the first groove group 261 can be formed in the first area of the reinforcement structure 24 opposite to the radiator 25, and the first groove group 261 is formed by opening (for example, etching) on the surface of the reinforcement structure 24 facing the radiator 25.

[0107] The reinforcement structure 24 has various different structures. For example, as Figure 12a shown, the reinforcement structure 24 can be a rectangular ring structure; for another example, as Figure 12b shown, the reinforcement structure 24 can be a circular ring structure; for another example, as Figure 12c shown, the reinforcement structure 24 can be a polygonal ring structure (such as a hexagon).

[0108] In the structures shown in the above Figure 12a , Figure 12b and Figure 12c , the reinforcement structure 24 is an integral structure surrounding the chip, and moreover, the first groove group 261 opened on the reinforcement structure 24 is also continuously opened along the circumferential direction of the reinforcement 24.

[0109] Combined with Figure 12d , the reinforcement structure 24 is an integral structure surrounding the chip, however, the first groove group 261 is formed by multiple non-connected grooves, and there is a spacing d1 between every two adjacent grooves.

[0110] In addition, the reinforcement structure 24 can also beFigure 12e As shown, the reinforcement structure 24 includes a plurality of independent sub-reinforcement structures 241, and these plurality of sub-reinforcement structures 241 are arranged at intervals along the periphery of the chip (that is, discontinuous design), and the distance between every two adjacent sub-reinforcement structures 241 is d2.

[0111] It should be noted that: the above Figure 12d spacing d1 and Figure 12e spacing d2 can be less than or equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed, so as to prevent electromagnetic waves from passing through between two adjacent sub-reinforcement structures 241, and to prevent electromagnetic waves from passing through between two adjacent slots.

[0112] Combined with Figure 12e , when the sub-reinforcement structure 241 is surrounded into a rectangular structure, the distance d2 between two adjacent sub-reinforcement structures 241 on any side length is less than or equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed, and the distance d2 between two sub-reinforcement structures 241 at the included angle of two adjacent sides can be decomposed along the Figure 12e shown X and Y directions, and the decomposition amounts in the X direction and the Y direction are both less than or equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed.

[0113] Continuing to combine Figure 12e , when a first slot group 261 is formed on the reinforcement structure of this structure, since the reinforcement structure 24 is formed by a plurality of independent sub-reinforcement structures 241, then each layer of the first slot group 261 is also formed by a plurality of slots, and and Figure 12d the same, the distance between every two adjacent slots can be less than or equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed.

[0114] Figure 13 FIG. shows the structural diagram of another electronic device. In this electronic device, one or more annular slot groups 262 are formed in the second region of the radiator 25 opposite to the reinforcement structure 24. For the convenience of description, in this application, one or more annular slots 262 located in the radiator are called the second slot group 262. The specific setting of the second slot group 262 can refer to the setting of the first slot group 261. For example, the radiator 25 can include one or more layers of the second slot group 262, and each layer of the second slot group 262 can also include one or more slots, etc. In addition, the shape of each slot group and the distance between each slot when including a plurality of slots, etc. can all refer to the above description about the first slot group.

[0115] Figure 14 FIG. shows the structural diagram of another electronic device. Figure 14 Compared with Figure 13 the structure shown in FIG., it includes a plurality of stacked chips 22.

[0116] Similar to the embodiment shown, in this embodiment, a PMC boundary and a PEC boundary are also formed. From Figure 9 and Figure 13 it is known that since the second slot group 262 is formed on the heat sink 25, in this case, the surface of the heat sink 25 opposite to the reinforcement structure 24 forms a PMC boundary, and the surface of the reinforcement structure 24 opposite to the heat sink 25 forms a PEC boundary. Due to the presence of one or more second slot groups 262, based on the same principle as the first slot group 261 for suppressing electromagnetic radiation, the second slot group 26 can also suppress electromagnetic radiation. In addition, even when the number of bare chips 22 increases such that the distance between the heat sink 25 and the PCB1 increases from Figure 14 H1 in Figure 13 to Figure 14 H2 in Figure 14 , the two distances H1 and H2 usually still fall within the effective range of electromagnetic radiation suppression. Therefore, electromagnetic radiation can still be suppressed. Similar to the first slot group 261 suppressing electromagnetic radiation, the reinforcement structure and the heat sink structure do not need to be changed, and the previous design can be reused. If H2 exceeds the effective range (for example, greater than 3.5 mm), the distance between the PEC boundary and the PMC boundary can also be reduced by various methods such as increasing the height dimension T1 of the reinforcement structure 24 or increasing the height dimension T2 of the part of the heat sink 25 opposite to the reinforcement structure 24 as shown in

[0117] so that the distance is still within the effective range, thereby achieving the effect of suppressing electromagnetic radiation. Figure 15 When multiple layers of the second slot group 262 are formed on the heat sink 25, as shown in

[0118] , the depths of the multiple layers of the second slot group 262 are not equal to broaden the frequency band width of the electromagnetic waves to be suppressed and improve the electromagnetic radiation suppression effect. Figure 15 If the second slot group 262 has multiple layers, it can be that the slot depth of the multiple layers of the second slot group 262 gradually increases along the direction away from the chip 22, or, as shown in

[0119] the slot depth of the multiple layers of the second slot group 262 gradually decreases along the direction away from the chip 22. Figure 13 , Figure 14 and Figure 15 In some implementable embodiments, as shown in

[0120] The second slot group 262 is formed on the heat sink 25. In this way, the heat sink 25 not only has the function of dissipating heat from the chip, but also has the function of suppressing electromagnetic wave radiation. Similarly, it is a structure that combines two functions.

[0121] Figure 16 The structure diagram of another electronic device is shown. In this electronic device, not only the first slot group 261 is formed in the first area of the reinforcement structure 24 opposite to the heat sink 25, but also the second slot group 262 is formed in the second area of the heat sink 25 opposite to the reinforcement structure 24.

[0122] In addition, as Figure 16 shown, when the first slot group 261 is on the reinforcement structure 24 and the second slot group 262 is also on the heat sink 25, one or more first slot groups 261 on the reinforcement structure 14 and one or more second slot groups 262 on the heat sink 25 are arranged at intervals. As Figure 16 shown, all the first slot groups 261 are located on one side (the inner side closer to the chip in the figure), and all the second groups are located on the other side (the outer side farther from the chip in the figure); in other examples, the multiple first slot groups 261 and the multiple second slot groups 262 can also be arranged at cross intervals.

[0123] In the electronic device with the first slot group or the second slot group shown above, when the medium in the first slot group or the second slot group is air, based on the electromagnetic resonance mechanism, the depths of the first slot group 261 and the second slot group 262 are designed to be equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed. In this way, the electromagnetic wave of the corresponding frequency can be well suppressed.

[0124] It should be noted that: the design that the depths of the first slot group and the second slot group involved in this application are equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed means that: the depths of the first slot group and the second slot group are exactly equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed; or, the depths of the first slot group and the second slot group are close to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed, and the specific data can be found through simulation or testing to find the specific values that meet the performance requirements.

[0125] In specific processing, as Figure 17 shown, the slot width S of the slots in the first slot group or the second slot group can be 0.5 mm to 2 mm, and the distance d3 between two slot groups in adjacent layers can be 0.3 mm to 1 mm. The above only gives an optional embodiment of the slot width S and the distance d3 between two adjacent slots. Of course, other values can also be selected.

[0126] In the embodiments of the present application, the shape of the cross-section of the first slot group 261 and the second slot group 262 is not specifically limited and can beFigure 18a The rectangular structure shown can also be Figure 18b The fan-shaped structure shown can also be Figure 18c The circular structure shown can also be Figure 18d The triangular structure shown can also be Figure 18e The trapezoidal structure shown. Of course, other structures are also possible.

[0127] When the first slot group 261 and the second slot group 262 contain air as the medium, the above Figure 18a , Figure 18b and Figure 18c ,as well as Figure 18d and Figure 18e The groove depth h shown is one quarter of the wavelength corresponding to the frequency of the electromagnetic wave to be suppressed.

[0128] In order to further improve the electromagnetic radiation suppression effect, a filling layer 28 containing dielectric material can be filled in any one or more of the first slot group 261 and the second slot group 262. For example, the dielectric material can be barium titanate (BaTiO3), lead titanate (PbTiO3), etc.

[0129] exist Figure 19 In the embodiment, a first groove group 261 is formed on the reinforcement structure 24, and a filling layer 28 having a dielectric material is filled in the first groove group 261.

[0130] Figure 20 In the embodiment, a second groove group 262 is formed on the heat sink 25 , and a filling layer 28 having a dielectric material is filled in the second groove group 262 . Figure 21 In the embodiment, a first slot group 261 is formed on the reinforcement structure 24, and a second slot group 262 is formed on the heat sink 25. The first slot group 261 and the second slot group 262 are both filled with a filling layer 28 having a dielectric material. Figure 22 In the embodiment, the area of ​​the heat sink 25 facing the reinforcement structure 24 has a plurality of metal rings 7 extending toward the reinforcement structure 24 , a second groove group 262 is formed between two adjacent metal rings 7 , and the second groove group 262 is filled with a filling layer 28 having a dielectric material.

[0131] When the first slot group 261 or the second slot group 262 is filled with dielectric material, according to the formula When the slot depth h remains unchanged, the relative dielectric constant ε is r Increase, so that the frequency f0 of electromagnetic radiation suppression will decrease, so that the electromagnetic radiation suppression can be applied to chip components in lower frequency bands.

[0132] In addition, according to the formula Adjust the relative dielectric constant ε of the dielectric material r, or change the slot depth h to change the frequency f0 of electromagnetic radiation suppression. C in the above formula is the speed of light. Also, the relative permittivity ε of the dielectric material r The larger it is, the lower the frequency f0 of electromagnetic radiation suppression. The larger the slot depth h, the lower the frequency f0 of electromagnetic radiation suppression. That is to say, when suppressing electromagnetic waves of the same frequency, the slot depth of the first slot group filled with the filling layer is shallower than that of the slot without the filling layer. From a process perspective, it is easier to open slots with a shallower depth. In some alternative embodiments, the slot depth can be about 1 mm.

[0133] In specific implementation, for example, the chip operates within the bandwidth of f1 to f2. In this case, the

[0134] In addition, a filling layer 28 with a conductive material can also be filled in any one or more of the first slot group 261 and the second slot group 262. For example, graphene, conductive rubber, etc. can be filled. The conductive material is used to introduce more losses to improve the electromagnetic radiation suppression effect.

[0135] Furthermore, in some alternative embodiments, the filling layer 28 not only has a dielectric material but also has a conductive material with a conductivity less than 10, such as graphene.

[0136] Figure 23a 、 Figure 23b and Figure 23c give three sets of simulation data. This simulation data is obtained when the first slot group is formed on the reinforcement structure.

[0137] Figure 23a The analysis results of

[0138] In Figure 23a , curve (11) is the curve of the shielding effectiveness (SE) when the slot depth is 1 mm and a filling layer with a conductivity of 1 S / m (Siemens / meter) and a relative permittivity of 8 is filled in the first slot group.

[0139] In Figure 23a , curve (12) is the curve of the SE when the slot depth is 1.5 mm and a filling layer with a conductivity of 1 S / m and a relative permittivity of 8 is filled in the first slot group.

[0140] In Figure 23a , curve (13) is the curve of the SE when the slot depth is 2 mm and a filling layer with a conductivity of 1 S / m and a relative permittivity of 8 is filled in the first slot group.

[0141] From Figure 23aIt can be seen from the curves (11), (12) and (13) that when the conductivity and relative dielectric constant are equal, the deeper the groove depth, the smaller the suppressed frequency.

[0142] Figure 23b The analysis results are as follows:

[0143] In Figure 23b Figure, curve (21) is the curve of SE when the groove depth is 2 mm and the filling layer with a conductivity of 1 S / m and a relative dielectric constant of 4 is filled in the first groove group.

[0144] In Figure 23b Figure, curve (22) is the curve of SE when the groove depth is 2 mm and the filling layer with a conductivity of 1 S / m and a relative dielectric constant of 8 is filled in the first groove group.

[0145] In Figure 23b Figure, curve (23) is the curve of SE when the groove depth is 2 mm and the filling layer with a conductivity of 1 S / m and a relative dielectric constant of 12 is filled in the first groove group.

[0146] From Figure 23b the curves (21), (22) and (23) in Figure, it can be seen that when the groove depth and conductivity are equal, the larger the relative dielectric constant, the smaller the suppressed frequency.

[0147] Figure 23c The analysis results are as follows:

[0148] In Figure 23c Figure, curve (31) is the curve of SE when the groove depth is 1 mm and the filling layer with a conductivity of 0 S / m and a relative dielectric constant of 8 is filled in the first groove group.

[0149] In Figure 23c Figure, curve (32) is the curve of SE when the groove depth is 1 mm and the filling layer with a conductivity of 1 S / m and a relative dielectric constant of 8 is filled in the first groove group.

[0150] In Figure 23c Figure, curve (33) is the curve of SE when the groove depth is 1 mm and the filling layer with a conductivity of 3 S / m and a relative dielectric constant of 8 is filled in the first groove group.

[0151] In Figure 23c Figure, curve (34) is the curve of SE when the groove depth is 1 mm and the filling layer with a conductivity of 5 S / m and a relative dielectric constant of 8 is filled in the first groove group.

[0152] From Figure 23cFrom curves (31), (32), (33), and curve (34), it can be seen that when the groove depth and relative permittivity are equal, the greater the conductivity, the better the suppression effect.

[0153] The following provides a filling layer containing a dielectric material and a conductive material. The dielectric material is barium titanate, and the conductive material is graphene. During implementation, barium titanate and graphene are mixed with epoxy resin. The relative permittivity can be adjusted by adjusting the mass ratio of barium titanate to epoxy resin. For example, as shown in Table 1 below.

[0154] Table 1

[0155] Barium titanate mass ratio 40％ 60％ 70％ 80％ Relative dielectric constant 6.25 7.71 15.5 15.5

[0156] That is to say, as the mass ratio of barium titanate increases, the relative permittivity also gradually increases. For example, the regulation range of the relative permittivity is 3 to 15. The conductivity range can also be regulated by adjusting the mass ratio of graphene. Since the density of graphene is small, the content of graphene can be controlled more precisely to make the conductivity fluctuate within several S / m. For example, when the mass ratio of graphene to epoxy resin is 0.25%, the conductivity is about 1 S / m.

[0157] In some implementable embodiments, when filling the filling layer in the first groove group, the following steps may be included:

[0158] S1: Mix a solvent (such as epoxy resin) and a curing agent (such as polyacetate) in a certain ratio (such as mixing in a ratio of 2 to 1).

[0159] S2: Add a powdered conductive material (such as graphene or conductive rubber) and a powdered dielectric material (such as barium titanate or lead titanate) to the mixed solution containing the solvent and the curing agent, and stir evenly.

[0160] S3: Inject the solution prepared in step S2 into the first groove group, for example, using a straw or other injection device.

[0161] S4: Heat the structure filled with the solution (such as a reinforcement structure or a radiator) (such as heating at a temperature of 80°C) until the solution solidifies.

[0162] The following provides the use of Figure 20When testing the electromagnetic wave noise coefficient of a chip with a maximum speed of 58 Gbps for the structure shown, the distance between the PEC boundary and the PMC boundary is 1.2 mm. The first slot group 261 has three layers. The slot depth of each layer of the first slot group 261 is 1 mm, the slot width of each layer of the first slot group 261 is 1 mm, the distance between adjacent two layers of the first slot group 261 is 0.5 mm. The cross-section of the first slot group 261 is rectangular. The conductivity of the filling layer in the first slot group 261 is 1 S / m, and the relative dielectric constant is 8. Figure 24 The curve Q1 of Figure 24 is the electromagnetic compatibility (EMC) curve without the first slot group. Figure 24 The curve Q2 of Figure 24 is the EMC curve with the first slot group. It can be seen from the two curves that when there is the first slot group and the filling layer with a conductivity of 1 S / m and a relative dielectric constant of 8 is in the first slot group, in the frequency range of 25 GHz to 30 GHz, the SE is above 10 dB, which is significantly higher than the existing about 4 dB, and the electromagnetic radiation suppression effect is significantly improved.

[0163] In some embodiments, in order to further improve the electromagnetic radiation suppression effect, a filling layer with an electromagnetic wave absorbing material can also be filled in any one or more of the first slot group 261 and the second slot group 262. The electromagnetic wave absorbing material here refers to a type of material that can absorb the electromagnetic wave energy projected onto its surface. For example, rubber-based wave absorbing materials, resin-based wave absorbing materials, foam-based wave absorbing materials, etc.

[0164] In some other embodiments, in order to further improve the electromagnetic radiation suppression effect, a filling layer with an electromagnetic shielding material can also be filled in any one or more of the first slot group 261 and the second slot group 262. The electromagnetic shielding material here refers to a type of material that can isolate metals between two spatial regions to control the induction and radiation of electric fields, magnetic fields, and electromagnetic waves from one region to another. For example, conductive sponges, conductive rubber strips, shielding reeds, etc.

[0165] In summary, the material in the filling layer can include one of dielectric materials, conductive materials, electromagnetic wave absorbing materials, and electromagnetic shielding materials, or a combination of at least two of them.

[0166] Figure 25 The structure diagram of another electronic device is given. The electronic device includes a substrate 21, a chip 22, a heat sink 25, and a cover plate (lid) 29. The chip 22 is disposed on the surface of the substrate 21. The cover plate 24 covers the upper surface of the chip 22 through the TIM layer 27. The heat sink 25 then covers the surface of the cover plate 29 through the TIM layer 27, and the cover plate 29 is relatively fixed to the substrate 21. This packaging form based on the cover plate belongs to a type of non-die packaging.

[0167] Continue to combine Figure 25 , on the surface of the cover plate 29 facing the substrate 21, a plurality of metal rings 7 are formed. A groove is formed between two adjacent metal rings 7, and a filling layer 28 can be filled in the groove. When there is no filling layer in the groove, the groove depth of the groove is equal to one-fourth of the wavelength corresponding to the electromagnetic wave frequency to be suppressed; when there is a filling layer in the groove, the electromagnetic wave frequency to be suppressed can be adjusted by adjusting the conductivity and relative permittivity.

[0168] In some other alternative embodiments, Figure 25 the groove in [[ ]] can be formed by etching on the surface of the cover plate 29.

[0169] Based on the above embodiments, as Figure 26 shown, in another embodiment, one or more layers of third groove groups 5 can also be formed on the PCB 1. Specifically, by forming a plurality of metal rings 7 on the PCB 1, a layer of the third groove group 5 as shown can be formed between two adjacent metal rings 7. The third groove group 5 can also be used to suppress electromagnetic wave radiation, and the principle is the same as that of the above-mentioned first groove group 261 and second groove group 262 for suppressing electromagnetic wave radiation, which will not be elaborated here. In addition, as Figure 27 shown, a filling layer 28 having at least one of a dielectric material, a conductive material, an electromagnetic wave absorbing material, and an electromagnetic shielding material can also be filled in the third groove group 5.

[0170] At least one of the first groove group and the second groove group can be used in cooperation with the third groove group 5. For example, in Figure 28 , not only the third groove group 5 is formed on the PCB 1, but also the first groove group 261 is formed on the reinforcement structure 24, and the filling layer 28 is provided in both the first groove group 261 and the third groove group 5. For another example, in Figure 29 , not only the third groove group 5 is formed on the PCB 1, but also the second groove group 262 is formed on the radiator 25, and the filling layer 28 is provided in both the second groove group 262 and the third groove group 5.

[0171] The design principle of the third groove group is similar to that of the first groove group and the second groove group. For example, in some alternative embodiments, the groove depths of the multi-layer third groove groups 5 can be equal. In some other alternative embodiments, in order to broaden the suppression frequency band width, the groove depths of the multi-layer third groove groups 5 can also be designed to be unequal.

[0172] In some other alternative embodiments, a ground plane formed by a metal layer is provided on the surface of the package substrate 21 facing the radiator 25. Furthermore, as Figure 30As shown, a second groove group 262 can be formed on the surface of the heat sink 25 facing the package substrate 21. In this way, the surface of the heat sink 25 opposite to the package substrate 21 forms a PMC boundary, and the ground plane of the package substrate 21 opposite to the PMC boundary forms a PEC boundary.

[0173] In addition, as Figure 31 shown, a filling layer 28 can be filled in the second groove group 262. The material of the filling layer 28 has been described above and will not be elaborated here.

[0174] Based on the above embodiments, an embodiment of the present application provides a heat sink. The heat sink can be used to dissipate heat from the chips in the above-mentioned electronic devices. It can be used not only to dissipate heat from bare chips but also to dissipate heat from non-bare chips. In order to suppress the electromagnetic waves radiated by the chips, a first groove group can be opened on the surface of the heat sink facing the chips. The setting method of the first groove group can be set with reference to the above embodiments and will not be elaborated here.

[0175] Based on the above embodiments, an embodiment of the present application provides a reinforcement structure. The reinforcement structure can be arranged on the substrate for carrying the chips and surround the chips to suppress the warping of the chips and the substrate. In addition, a second groove group can also be opened on the surface of the reinforcement structure away from the substrate to suppress the electromagnetic waves radiated by the chips. The setting method of the second groove group can also be set with reference to the above embodiments and will not be elaborated here.

[0176] In the description of this specification, specific features, structures, materials, or characteristics can be combined in a suitable manner in any one or more embodiments or examples.

[0177] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present application and should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A chip package heat dissipation component for encapsulating and dissipating heat from a chipset, characterized in that, Comprising: A substrate for carrying the chipset, the chipset including one or more chips; A reinforcement structure, the reinforcement structure and the chipset being disposed on the same surface of the substrate, and the reinforcement structure surrounding the periphery of the chipset; A heat sink for contacting the chipset on a side away from the substrate; Wherein, one or more layers of slot groups surrounding the chipset are formed in a first area of the reinforcement structure opposite to the heat sink and a second area of the heat sink opposite to the reinforcement structure, each layer of the slot groups including one or more slots, and the one or more layers of the slot groups on the reinforcement structure are arranged staggeredly with the one or more layers of the slot groups on the heat sink.

2. The chip package heat dissipation component according to claim 1, wherein Multiple layers of the slot groups are formed in at least one of the first area or the second area, and the multiple layers of the slot groups are spaced apart in a direction away from the chipset.

3. The chip package heat dissipation component according to claim 2, characterized in that, The slot depths of at least two layers of the multiple layers of the slot groups are not equal.

4. The chip package heat dissipation component according to any one of claims 1-3, characterized in that The depth of each layer of the slot groups is equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed.

5. The chip package heat dissipation component according to any one of claims 1-3, characterized in that, At least one of a dielectric material, a conductive material, an electromagnetic wave absorbing material, and an electromagnetic shielding material is filled in at least one layer of the slot groups.

6. The chip package heat dissipation component according to any one of claims 1-3, characterized in that, One or more layers of the slot groups are formed in the second area, and the slot groups are formed by grooving on a surface of the heat sink opposite to the reinforcement structure.

7. The chip package heat dissipation component according to any one of claims 1-3, wherein One or more layers of the slot groups are formed in the first area, and the slot groups are formed by grooving on a surface of the reinforcement structure opposite to the heat sink.

8. The chip package heat dissipation component according to any one of claims 1-3, characterized in that, The reinforcement structure includes a plurality of sub-reinforcement structures, and the plurality of sub-reinforcement structures are spaced apart along the periphery of the chipset, and the distance between two adjacent sub-reinforcement structures is less than or equal to one quarter of the wavelength corresponding to the electromagnetic wave frequency to be suppressed.

9. An electronic device, characterized in that, Comprising: A printed circuit board; The chip package heat dissipation component according to any one of claims 1-8; And A chipset, the chipset including one or more chips, the chipset being disposed on the substrate; Wherein, the printed circuit board is electrically connected to the substrate.

10. The electronic device according to claim 9, wherein, A third area of the printed circuit board opposite to the heat sink has a plurality of metal rings, the plurality of metal rings surrounding the periphery of the substrate, and a layer of third slot groups is formed between two adjacent metal rings, the third slot groups having one or more layers, and each layer of the third slot groups including one or a plurality of slots surrounding the chipset.

11. The electronic device according to claim 10, characterized in that, The third slot groups have multiple layers, and the multiple layers of the third slot groups are spaced apart in a direction away from the substrate.

12. The electronic device according to claim 10 or 11, characterized in that, The slot depths of at least two layers of the multiple layers of the third slot groups are not equal.

13. The electronic device according to claim 10 or 11, characterized in that, At least one of a dielectric material, a conductive material, an electromagnetic wave absorbing material, and an electromagnetic shielding material is filled in the third slot groups.

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