Equivalent real-time oscilloscope
By employing software clock recovery technology and a single high-resolution analog-to-digital converter, the problems of high cost and large error in traditional oscilloscopes are solved, enabling low-cost, high-bandwidth, and low-jitter signal measurement, suitable for high-speed signal testing and measurement instruments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TEKTRONIX INC
- Filing Date
- 2021-02-22
- Publication Date
- 2026-04-17
AI Technical Summary
Traditional high-end equivalent time oscilloscopes and traditional real-time oscilloscopes suffer from slow acquisition speeds and high costs due to hardware triggers, while real-time oscilloscopes suffer from errors and high costs due to multiple analog-to-digital converters.
By employing software clock recovery technology, the signal pattern is reconstructed through a single high-resolution analog-to-digital converter and software clock recovery unit, avoiding hardware triggers and achieving low-cost, high-bandwidth, and low-jitter signal acquisition.
It achieves low-cost, low-vertical-noise, low-horizontal-jitter, and high-speed signal measurement, reducing equipment costs while avoiding the limitations of interleaving errors and hardware triggers.
Smart Images

Figure CN115136015B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to systems and methods associated with test and measurement systems, and more particularly to the acquisition of equivalent real-time data in test and measurement instruments. Background Technology
[0002] Traditional high-end equivalent-time oscilloscopes and traditional real-time oscilloscopes can be used for high-speed signal integrity measurements and debugging in research and development as well as in production. However, traditional high-end equivalent-time oscilloscopes have slower acquisition rates and higher costs due to hardware triggers. Traditional real-time oscilloscopes offer additionally high acquisition rates, but are expensive due to the number of hardware components required to achieve these high acquisition rates (such as the number of analog-to-digital converters). Multiple analog-to-digital converters can also introduce errors due to interleaving mismatches between multiple track-and-hold circuits and the analog-to-digital converters.
[0003] The examples disclosed herein address these and other shortcomings of the prior art. Attached Figure Description
[0004] The aspects, features, and advantages of this disclosure will become apparent from the following description of the examples with reference to the accompanying drawings, in which:
[0005] Figure 1 This is a block diagram of a test and measurement instrument according to an example of this disclosure.
[0006] Figure 2 It is by Figure 1 Examples of aliased signals sampled by test and measurement instruments during testing.
[0007] Figure 3 These are examples of eye diagrams based on some examples of this disclosure.
[0008] Figure 4 This is an example of an eye diagram based on other examples of this disclosure.
[0009] Figure 5 Based on Figure 2 Examples of signals reconstructed from aliased signals.
[0010] Figure 6 This is a flowchart of an example method for acquiring and reconstructing signals in a test, based on examples of this disclosure.
[0011] Figure 7 This is a block diagram of test and measurement instruments operating in real-time mode.
[0012] Figure 8 This is another block diagram of test and measurement instruments operating in real-time mode.
[0013] Figure 9This is a block diagram of test and measurement instruments operating in real-equivalent-time mode.
[0014] Figure 10 Is Figure 8 A graph of the recovered waveform acquired during the real-time mode of the test and measurement instruments.
[0015] Figure 11 Is Figure 9 A graph of the recovered waveform acquired during the equivalent real-time mode of the test and measurement instruments.
[0016] Figure 12 This is an example operation used to recover clock data and reconstruct the sampled waveform.
[0017] Figure 13 Based on the spread spectrum clock being turned off Figure 12 The eye diagram is generated by the operation.
[0018] Figure 14 Based on Figure 12 The unit interval of the operation is used as Figure 13 A graph of the function of time.
[0019] Figure 15 Based on the spread spectrum clock being turned off Figure 12 The waveform is reconstructed by the operation.
[0020] Figure 16 Based on the spread spectrum clock being enabled Figure 12 The eye diagram is generated by the operation.
[0021] Figure 17 Based on Figure 12 The unit interval of the operation is used as Figure 16 A graph of the function of time.
[0022] Figure 18 Based on the spread spectrum clock being enabled Figure 12 The waveform is reconstructed by the operation. Detailed Implementation
[0023] This paper discloses an equivalent real-time oscilloscope with high analog bandwidth and uses software clock recovery to extract the clock from the data signal and reconstruct the pattern of the acquired signal based on the extracted clock.
[0024] For mass production environments, there is a need for test and measurement instruments that are less expensive than conventional equivalent-time oscilloscopes and conventional real-time oscilloscopes, yet still meet the requirements for production testing. Examples of this disclosure include test and measurement instrument 100, discussed in more detail below, which features high bandwidth, low jitter, lower vertical noise, and clock recovery capability.
[0025] As the speed of the signal under test continuously increases to higher rates, the test and measurement instrument 100 requires a bandwidth high enough to faithfully capture the signal content. With increasing bit rate and / or baud rate of the signal under test, the unit interval (UI) decreases, which reduces the tolerance for horizontal jitter. Increased bit rate and / or baud rate of the signal under test can also increase the impact of inter-symbol interference on the signal under test, even with respect to transmitter and receiver equalizers, leading to a reduced vertical eye margin. The low-power signaling schemes widely used for the equipment under test can also reduce the vertical eye margin. Most test and measurement instruments are used to monitor or acquire signals under test with repetitive data patterns, such as, for example, pseudo-random binary sequence (PRBS) signals or short stress pattern random quaternary (SSPRQ) signals. As discussed in more detail below, the test and measurement instrument 100 can recover the clock from the data signal.
[0026] Traditional real-time oscilloscopes can sample the entire input waveform in one pass. That is, acquisition and display can occur within the same time frame. To do this, traditional real-time oscilloscopes have a sampling rate high enough for the analog bandwidth to prevent aliasing when acquiring signals in test at high speeds. For example, a real-time oscilloscope might have an analog bandwidth of 70 GHz and a sampling rate of 200 gigabits per second (GS / s). The Nyquist frequency of 100 GHz is higher than the analog bandwidth, so there is no aliasing. Because the Nyquist rate is so high in traditional real-time oscilloscopes, analog signals in test can be acquired without triggering and without aliasing. All traditional real-time oscilloscopes have sampling rates that provide a Nyquist frequency higher than the analog bandwidth. However, traditional real-time oscilloscopes are expensive and can be prohibitively costly for production testing.
[0027] Traditional high-end equivalent time sampling oscilloscopes utilize the properties of repetitive signals by digitally reconstructing the waveform using samples from several trigger events. Clocking and data recovery units can be used to enable the hardware triggers of the equivalent time oscilloscope to acquire samples. Because the repetitive signal is being sampled, the bandwidth of the equivalent time mirror can far exceed its sampling rate. For example, an equivalent time sampling oscilloscope can have very low sampling rates, such as 200 kilosamples per second (KS / s), but can have high vertical resolution, typically more than 12 bits. Traditional equivalent time oscilloscopes use equivalent time sampling techniques to reconstruct the patterned waveform of a signal based on pattern triggering.
[0028] Figure 1 The illustration shows an example block diagram of an equivalent real-time test and measurement instrument 100 according to some configurations of this disclosure. The test and measurement instrument 100 includes one or more ports 102, which can be any telecommunications communication medium. Ports 102 can include receivers, transmitters, and / or transceivers. Each port 102 is a channel of the test and measurement instrument 100.
[0029] The signal from the port is then sent to vertical offset 104, which adjusts the offset or baseline of the received signal. In some configurations or examples, vertical offset 104 may also include vertical gain adjustment. Without vertical gain adjustment, vertical noise can be reduced, but there is also a reduction in dynamic range. To address this, in some examples, external attenuators and / or amplifiers can be used to attenuate and / or amplify the incoming test signal. The signal from vertical offset 104 is sent to sampler track-and-hold circuitry 106. Track-and-hold circuitry 106 holds each signal stable for a sufficient period of time to allow it to be acquired by high-resolution analog-to-digital converter 108.
[0030] Analog-to-digital converter 108 converts the analog signal from track-and-hold circuit 106 into a digital signal. Analog-to-digital converter 108 has a sampling rate larger than that of equivalent-time test and measurement instruments but smaller than that of real-time test and measurement instruments. For example, analog-to-digital converter 108 can sample signals from a few GS / s to tens of GS / s. In some configurations, analog-to-digital converter 108 can sample analog signals between 1 GS / s and 100 GS / s. In other configurations, analog-to-digital converter 108 can sample analog signals between 2 GS / s and 25 GS / s. The digitized signal from analog-to-digital converter 108 can then be stored in acquisition memory 110. That is, the sampling rate is set such that the Nyquist frequency, which is half the sampling rate, is lower than the analog bandwidth of analog-to-digital converter 108. Analog-to-digital converter 108 can be a single high-resolution analog-to-digital converter, such as a 12-bit analog-to-digital converter.
[0031] One or more processors 112 may be configured to execute instructions from memory and may perform any methods and / or associated steps indicated by such instructions, such as receiving acquired signals from the acquisition memory 110 and reconstructing signals in the test without using hardware triggers or acquiring samples at a high acquisition rate.
[0032] The memory 110 or any other memory on the test and measurement instrument 100 can be implemented as a processor cache, random access memory (RAM), read-only memory (ROM), solid-state memory, one or more hard disk drives, or any other type of memory. The memory acts as a medium for storing data, computer program products, and other instructions.
[0033] User input 114 is coupled to the one or more processors 112. User input 114 may include a keyboard, mouse, trackball, touchscreen, and / or any other control device that the user can employ to interact with the GUI on display 116. Display 116 may be a digital screen, a cathode ray tube-based display, or any other monitor used to display waveforms, measurement results, and other data to the user. Although components of test and measurement instrument 100 are depicted as integrated within test and measurement instrument 100, those skilled in the art will appreciate that any of these components may be external to test and measurement instrument 100 and may be coupled to test and measurement instrument 100 in any conventional manner (e.g., wired and / or wireless communication media and / or mechanisms). For example, in some examples, display 116 may be located remotely from test and measurement instrument 100.
[0034] Figure 2 The diagram shows the usable... Figure 1 The waveform obtained by the test and measurement instruments is shown in Figure 200, which is a sampled waveform. The signal in the test is a sine wave, but if... Figure 2 As can be seen, the test and measurement instrument 100 samples the signal, causing it to appear aliased. This is because the Nyquist frequency is below the analog bandwidth of the test and measurement instrument 100 and below the frequency of a sinusoidal signal. Figure 2 In the example waveform, a 13.28125 GHz sine wave was acquired at a sampling rate of 3.124 GS / s, thus obtaining... Figure 2 The aliased waveform is shown in graph 200.
[0035] Once the signal under test has been acquired, processor 112 can determine the accurate bit rate and / or baud rate for the signal to reconstruct the signal sample received at acquisition memory 110. In some examples, the bit rate can be determined by a user who inputs the frequency of the signal under test via user input 114. However, in other examples, when the frequency of the signal under test is not known, processor 112 can iteratively adjust the aliased waveform signal to generate an eye diagram until the eye diagram has the widest horizontal opening. That is, different bit rates and / or baud rates can be selected until the eye of the eye diagram is at its maximum opening. In some examples, the user can set how accurate the bit rate and / or baud rate detection can be via user input 114. For example, Figure 3 and4 The diagram illustrates eye diagrams 300 and 400 determined from samples acquired from the acquisition memory 110. Figure 3 Eye diagram 300 Figure 4 The eye diagram 400 is wider, and therefore has a greater... Figure 4 An eye diagram provides a more accurate representation of the bit rate and / or baud rate. From the eye diagram, the bit rate and / or baud rate can be determined based on the horizontal opening of the eye.
[0036] Once the bit rate and / or baud rate have been determined, since the sampling rate of the test and measurement instrument 100 is known, the processor 112 can reconstruct the signal under test and place each received sample in the appropriate position within the signal. The processor 112 can then output the reconstructed signal to a display or another device. For example, when the bit rate is known (i.e., how often each bit of the signal is received) and the sampling frequency is known, the processor 112 can use this information to appropriately place each sample in the reconstructed signal. That is, for each received sample, if the bit rate and / or baud rate and the sampling rate are known, it is known how many bits to skip before placing the sample in the reconstructed signal. In the test and measurement instrument 100, no hardware triggers and / or hardware clock restorers are used to restore the clock.
[0037] Figure 5 It shows Figure 2 The example of a graph 500 showing the reconstructed signal from the acquired signal. As the processor 112 determines the correct position of each bit, the bits are placed in their proper positions and the reconstructed signal can be displayed on the display 116 of the test and measurement instrument 100.
[0038] In some examples, test and measurement instrument 100 may include a phase-locked loop (PLL). A PLL is a control system that generates an output clock signal whose phase is correlated with the phase of the input signal. When using a PLL in some examples to track low-frequency jitter, processor 112 can adjust the bit rate and / or baud rate along segments of the reconstructed waveform to mimic the PLL effect. Analog-to-digital converter 108 samples at multiple gigabits per second, much higher than the typical bandwidth of a PLL in the tens of megahertz range. This allows sufficient bits and / or symbols in local segments of the waveform to be adjusted to the bit rate and / or baud rate to track low-frequency jitter.
[0039] Processor 112 can also detect pattern length based on the fact that when pattern length is correctly detected, the eye diagram becomes a pattern waveform. The difference between an eye diagram and a pattern waveform is that for each horizontal position, the eye diagram can have multiple vertical values, such as... Figure 3-4 As shown in the figure; while the patterned waveform has a vertical value, as shown in the figure. Figure 5 As shown. In Figure 2-5 In the sample shown, the sinusoidal signal in the test can be considered as a repeating pattern with a pattern length of 2. Since there are two bits for each cycle of the sine, when the pattern length is set to 2, the pattern waveform is... Figure 5 The reconstructed waveform 500 is shown. For a PRBS15 pattern, for example, the pattern length is 2^15-1. Each bit in the pattern is repeated after an integer number of pattern repetitions.
[0040] In some examples, processor 112 can adjust the sampling rate of analog-to-digital converter 108 to avoid situations where the sampling rate is synchronized with the signal bit rate and / or baud rate. Furthermore, because processor 112 is capable of adjusting the sampling rate, it can use multiple different sampling rates to sample the same signal under test. The same frequency content of the signal can be aliased to different frequencies using different sampling rates. Processor 112 can use each of the different acquired signals to determine the most accurate clock recovery to reconstruct the signal under test.
[0041] Figure 6 This is a flowchart illustrating the operation of a test and measurement instrument 100 according to the example described herein. In operation 600, the test and measurement instrument 100, having a Nyquist frequency less than the analog bandwidth, receives a signal under test. In the test and measurement instrument 100, the sampling rate is at least 2 GS / s.
[0042] In operation 602, the processor 112 of the test and measurement instrument 100 determines the frequency of the signal in the test based on the acquired signal stored in the acquisition memory 110 acquired during operation 600. To determine the frequency, in some examples, the processor 602 generates an eye diagram and iteratively adjusts the bit rate and / or baud rate until the eye diagram has the widest horizontal opening.
[0043] Once the bit rate and / or baud rate have been determined, processor 112 can reconstruct the signal under test in operation 604 based on the sampling rate of test and measurement instrument 100 and the determined bit rate and / or baud rate of the signal under test. Processor 112 can determine the bit rate and / or baud rate and reconstruct the signal under test without using hardware patterned triggers. This allows test and measurement instrument 100 to sample data at a faster rate but at a lower cost than using a real-time sampling oscilloscope.
[0044] Examples of this disclosure offer advantages over conventional real-time and equivalent-time test and measurement instruments. For example, examples of this disclosure allow for low vertical noise, low horizontal jitter, and high acquisition speed, all at a lower cost compared to real-time and equivalent-time test and measurement instruments.
[0045] Equivalent-time test and measurement instruments have an additional low noise floor due to their direct analog signal path, sampling techniques, and high-resolution analog-to-digital converters (ADCs). Real-time test and measurement instruments have high noise because the analog signal path includes gain stages, so the interleaving of multiple track-and-hold circuits with the ADC cannot completely avoid mismatch between the interleaved transistors. Although mismatch can be mitigated through calibration, residual mismatch error remains, and environmental changes can affect the mismatch. However, the examples in this disclosure use a single high-resolution ADC, which reduces quantization error compared to multiple 8-bit ADCs used in real-time test and measurement instruments. The single ADC 108 avoids interleaving error.
[0046] The level jitter in the examples disclosed herein is low because the acquisition occurs over a short time period and there is no interleaving error, as is the case with real-time test and measurement instruments. Equivalent-time test and measurement instruments can only improve level jitter by using high-cost additional hardware.
[0047] The examples disclosed herein feature fast acquisition speeds, typically between several GS / s and tens of GS / s, such as between 1 GS / s and 100 GS / s in some configurations or between 2 GS / s and 25 GS / s in others. This is significantly faster than equivalent-time test and measurement instruments that appear at low sampling rates (e.g., 200 KS / s) to achieve low vertical noise. Real-time test and measurement instruments offer an additional 200 GS / s of fast acquisition, but achieve this by using interleaving schemes discussed above that can lead to vertical noise and horizontal jitter, as well as additional costs.
[0048] In other words, real-time test and measurement instruments are expensive due to the hardware required to achieve the additional high sampling rates. Equivalent-time test and measurement instruments are also expensive because they require a clock source to trigger their samplers. However, the examples in this disclosure provide lower-cost test and measurement instruments with higher acquisition rates using a single analog-to-digital converter and without trigger circuitry.
[0049] In some examples of this disclosure, test and measurement instruments may include both real-time mode and equivalent real-time mode. The real-time mode of the test and measurement instrument provides a complete view of the signal, while the equivalent real-time mode provides more high-bandwidth channels with the same number of analog-to-digital converters in an oscilloscope. In real-time mode, the test and measurement instrument utilizes more than one analog-to-digital converter per channel, resulting in a high sampling rate. In equivalent real-time mode, only one analog-to-digital converter is used per channel, resulting in a lower sampling rate but higher acquisition speed.
[0050] Figure 7-9The illustration shows an example block diagram of a test and measurement instrument that includes both real-time mode and equivalent real-time mode. As those skilled in the art will understand, Figure 7-9 Test and measurement instruments may include components not shown, such as user inputs, displays, and other hardware components, such as, but not limited to, those described above. Figure 1 Those shown in the image.
[0051] exist Figure 7-9 In the test and measurement instrument 700, four channels are illustrated for ease of discussion, although the examples in this disclosure are not limited to four channels. Each channel includes a vertical gain / offset 702, a sampler track and hold circuit 704, and an analog-to-digital converter 706, similar to the vertical offset 104, sample track and hold circuit 106, and analog-to-digital converter 108 discussed above.
[0052] Figure 7 and 8 The illustration shows a test and measurement instrument 700 operating in real-time mode, while Figure 9 The illustration shows a test and measurement instrument 700 operating in an equivalent real-time mode. In this example, in Figure 7 During the real-time mode illustrated in the diagram, each of channels 2, 3, and 4 is deactivated, while channel 1 operates as the real-time mode channel. A signal from the device under test is received at channel 1 and processed by vertical gain / offset 702 and sampler track-and-hold circuitry 704. A switch 708 and repeaters can be provided to route the signal to multiple different analog-to-digital converters 706.
[0053] In this example, the switch is operated to route the signal from the sampler track and hold circuit 704 to each of the four analog-to-digital converters 706. Since each of the analog-to-digital converters 706 in this example is 50 GS / s, routing the signal from the sampler track and hold circuit 704 to each of the four analog-to-digital converters 706 can achieve a sampling rate of 200 GS / s. The switch 708 can be operated by the processor 712 or another controller component within the test and measurement instrument based on a mode selected by the test and measurement instrument. As those skilled in the art will understand, the mode selected by the test and measurement instrument can be, for example, from a user interface (such as...). Figure 1 The user interface shown is selected.
[0054] The signal can be sampled by four analog-to-digital converters 706 and reconstructed by the processor 712 using any known method, such as time interleaving of the analog-to-digital converters 706 in real-time mode.
[0055] The test and measurement instrument 700 can be used in several different real-time mode configurations, as required by the operator and based on the signals being tested. For example, instead of a single channel activated in real-time mode, such as... Figure 7 As shown in the diagram, the two channels can be configured and activated as real-time channels.
[0056] exist Figure 8 In this configuration, channels 1 and 3 can be configured as two real-time 33 GHz channels, with each channel operating at 100 GS / s in this example. That is, each of the two channels 1 and 3 is utilizing two 50 GS / s analog-to-digital converters 706. Channels 2 and 4, on the other hand, are disconnected and not in use during this mode. The sampling rate for the real-time mode can be selected, for example, via a user interface. A controller or processor within the test and measurement instrument can then operate the switch, and the user interface can notify the user which channels are currently operating in real-time mode.
[0057] Figure 9 The diagram illustrates the test and measurement instruments in the equivalent real-time mode, where each of channels 1-4 is connected to the corresponding analog-to-digital converter 706. This mode can be described as above regarding... Figure 1-8 The operation is as discussed above. Whether in real-time mode or equivalent real-time mode, the output of the analog-to-digital converter 706 is sent to the fetch memory 710 and further processed by the processor 712, as described above. Figure 1 As discussed in detail.
[0058] although Figure 7-9 Only four channels and only four analog-to-digital converters 706 are shown, but as those skilled in the art will understand, additional channels and / or additional analog-to-digital converters 706 may be provided in the test and measurement instrument 700. This is for illustration and discussion purposes only. Figure 7-9 The diagram shows four channels.
[0059] Test and measurement instrument 700, including both real-time mode and equivalent real-time mode, can use real-time mode to examine all components of the signal under test because there is no aliasing or very little aliasing in the signal acquisition. Real-time mode can also be used to detect symbol rate and pattern length. In some examples, the detected symbol rate and pattern length from real-time mode can then be used in equivalent real-time mode. In equivalent real-time mode, test and measurement instrument 700 has more high-bandwidth channels to measure multiple signals simultaneously, which can be used, for example, during compliance testing of the device under test.
[0060] As mentioned above, during real-time mode, the channel used for real-time acquisition has a higher sampling rate. However, for some high-bandwidth test and measurement instruments, the gap between the analog bandwidth and the Nyquist frequency can be small. For example, a real-time channel might have a 20 GHz analog bandwidth and a 25 GHz Nyquist frequency for a 50 GS / s analog-to-digital converter 706. An analog front-end with a negative 3 dB gain at 20 GHz can still allow some signal content exceeding the 25 GHz analog bandwidth to pass through with some attenuation. These attenuated high-frequency components will be aliased after the tracking and holding sampler 704 and the analog-to-digital converter 706. In such cases, using software data clock recovery, as discussed in more detail below, an equivalent real-time mode can be used to verify the presence of significant high-frequency components exceeding the Nyquist frequency passing through the analog front-end of the test and measurement instrument.
[0061] In some examples, the equivalent real-time mode in the test and measurement instrument 700 can also be used to measure signals that do not have repeating patterns. For non-repeating data signals, the equivalent real-time mode can be used to obtain eye diagrams, and the eye diagram measurements discussed above can be performed.
[0062] As an example of the operation of the test and measurement instrument 700, a signal is acquired from a source that generates a 32 GBaud (Gbaud) 4-level pulse amplitude modulation (PAM4) with a pseudo-random binary sequence (PRBS) data pattern (such as PRBS13Q), the PRBS data pattern having a spread spectrum clock (SSC). In real-time mode, the signal is sampled at 200 GS / s with an analog bandwidth of 33 GHz, and in equivalent real-time mode, the signal is sampled at 50 GS / s with an analog bandwidth of 33 GHz.
[0063] Figure 10 The figure 1000 illustrates the waveform recovered using the real-time mode of test and measurement instrument 700. The sampling rate of the real-time mode is high enough for a 33 GHz bandwidth signal to allow the PAM4 pattern to be visible in the recovered waveform. On the other hand, Figure 11 The figure 1100 illustrates the waveform recovered using the equivalent real-time mode with a sampling rate of 50 GS / s in this example. The Nyquist frequency is 25 GHz, which is below the analog bandwidth of 33 GHz. However, the signal has significant energy exceeding 25 GHz, so the recovered waveform appears aliased and the PAM4 pattern is not visible.
[0064] In high-speed signaling, there exists a nominal UI, which is the reciprocal of the nominal bit rate or baud rate for non-return-to-zero (NRZ) or PAM4, respectively. For example, 32 GBaud is the nominal baud rate for the Serial Computer Extensions Bus standard High-Speed Peripheral Component Interconnect (PCIe) 6.0. However, the actual baud rate changes continuously during data transmission. Some UI / baud rate changes are intentional. For example, the SSC scheme intentionally down-spreads the system clock by 5000 parts per million (ppm) or 0.5% of the nominal baud rate. Another part of the UI or baud rate change comes from inherent system clock jitter, which is due to the system clock not being a perfect clock. Clock data recovery units, which can be part of the processor in test and measurement instruments, are designed to track or reduce the effects of low-frequency jitter by having the recovered clock track the low-frequency portion of the system clock embedded in the data signal. Various software clock data recovery (SCDR) systems developed for real-time oscilloscopes already exist when the original sampled waveform data is not aliased. However, when the original sampled waveform is aliased, such SCDRs do not work.
[0065] Examples of this disclosure relate to clock data recovery for equivalent real-time test and measurement instruments or modes on test and measurement equipment. Clock data recovery for equivalent real-time modes or instruments can track the low-frequency portions of UI changes.
[0066] Figure 12 This is a flowchart illustrating the software clock recovery and reconstruction of signals during testing in an equivalent real-time mode or instrument according to some examples of this disclosure. In operation 1200, the instrument uses time relative to voltage for the electrical signal ( t, y The waveform of an optical signal is sampled or acquired based on time versus power. For ease of discussion, electrical signals will be discussed below, although, as those skilled in the art will understand, the signal may be an optical signal in some examples. Sampling time t The vectors are uniformly spaced. For example, when the sampling rate is 3.125 GS / s, the vectors... t The interval is the reciprocal of the constant sampling rate.
[0067] In operation 1202, the first window of the sample is obtained ( t_i, y_i, i = 1,2,…, w Window size w It is set large enough to have a sufficient sample size for calculating the local average UI value, but small enough to capture slow changes in the UI value.
[0068] To obtain the first window of samples, define the set of estimated UI values surrounding the nominal UI value { period_1_ j, j = 1, 2,…, pFor the first window of the sample, the set has a large number of estimated UI values. For example, when the test and measurement instruments enable the SSC, the average UI value for the first window can be any value in the range of 5000ppm, plus the uncertainty of the system clock, therefore, the periodic value... p It is set to a very large value. The estimated UI resolution can be improved through iterative search.
[0069] For each estimated UI value period_1_j The time vector shown in equation (1) is defined as the normalized time offset for the eye diagram:
[0070] t_eye_ij= mod(t_i,period_1_j) / period_1_j (1).
[0071] because t_eye_ij With t_i A one-to-one mapping, therefore it is possible to determine the pair ( t_eye_ij, y_i, i = 1, 2,…, w And an eye diagram can be generated from this pair. For period_1_j Each of the estimated UI values can be used to generate an eye diagram. Various operations can be used to select the optimal one that produces the best eye opening. j value.
[0072] For example, used to select the optimal j One operation on the value involves defining a vertical range that covers a portion of the intermediate range of the obtained sample (such as, for example, around the mid-crossing level). y_low, y_high}. It is possible to find values falling within the vertical range { y_low, y_high} targeting j, y_j The set of each of them t_mid_crossing_j = {t_eye_j} .
[0073] Then, using equation (2), we can determine e_j_k :
[0074] e_j_k = std(mod(t_mid_crossing_j + t_offset_1_k, 1)), k = 1, 2, … q(2)
[0075] in t_offset_1_k, k = 1, 2,…, q It is a set of offset values between [0, 1].
[0076] Then, for each j Find the optimal value. k The value, which is labeled as jkOptimal :
[0077] e_jkOptimal = min({e_j_k}), k = 1, 2, …, q (3) .
[0078] Find the one marked as jOptimal optimal j Value, such that:
[0079] e_jOptimal = min({e_jkOptimal}), j = 1, 2, …, p (4).
[0080] Can be saved ( jkOptimal, jOptimal This is for later use. Here, jkOptimal Corresponding to jOptimal At this point, the average UI value for the first window is period_1_jOptimal And has a horizontal offset t_ offset_1_jkOptimal .
[0081] After obtaining the average UI of the first window for the sample in operation 1202, the second window for the sample is obtained in operation 1204 using the same window size w. t_i, y_i, i = w+1,w+2,…, 2w The same process can be used to determine the average UI value period for samples in the second window. period_2_jOptimal and horizontal offset t_offset_2_ jkOptimal The search range for the unit interval of the second window for the sample is narrower than the search range for the unit interval of the first window for the sample.
[0082] The process of obtaining the second set of samples is slightly different in that: the set of estimated UI values { period_2_j} was set period_1_jOptimal Around, rather than around the nominal UI value. Furthermore, the periodic value... p It is set to a much smaller value to improve clock data recovery speed because low-frequency changes in UI values should not be too many or too fast.
[0083] In operation 1206, the remaining waveform samples are iterated through in the same manner as in operation 1204 to determine the array of average UI values. period_n_jOptimal, n = 1,2,….,N} and horizontally offset array { t_offset_n_ jkOptimal, n = 1,2,…,N} The search range for the UI of each subsequent window of the sample is narrower than the search range for the unit interval of the first window of the sample.
[0084] In operation 1208, the array {period_n_jOptimal, n = 1,2,….,N} based on the average UI value and the array with horizontal offset { t_offset_n_jkOptimal, n = 1,2,…,N}, in the original waveform pair { t, y The absolute sampling time in} t Convert to { t_normalized, y Normalized sampling time t_normalized This refers to sampling time in units of UI, not in the sampling time. t The normalized sampling time is represented by the absolute time. Many different methods known to those skilled in the art can be used to calculate the normalized sampling time. t_normalized This includes filtering the average UI value. period_n_ jOptimal, n = 1,2,….,N} .
[0085] In operation 1208, the known pattern length is used. PatternLength The pattern normalized sampling time can be exported as:
[0086] t_pattern_normalized = mod(t_normalized, PatternLength) (5) .
[0087] Then, in operation 1210, the {t_pattern_normalized, y} pairs can be classified based on t_pattern_normalized to produce {t_pattern, y_pattern} pairs. The {t_pattern, y_pattern} pairs represent the pattern waveform recovered or reconstructed from the equivalent real-time acquisition. In some examples, the pattern waveform obtained using this procedure or operation from the equivalent real-time acquisition may not be uniformly spaced in time. However, in some examples, the pattern waveform can be resampled to be uniformly spaced in time.
[0088] In some examples, it can be used on signal samples acquired on a real-time oscilloscope where the samples are not aliased. Figure 12 The diagram shows the clock data recovery operation.
[0089] As a numerical example, a signal from a source generating 32 GBaud PAM4 PRBS13Q data patterns with and without SSC is obtained. The equivalent real-time mode or instrument samples the signal at 3.125 GS / s. Because the sampling rate in this example is much lower than the analog bandwidth used to capture a 32 GBaud signal, the sampled waveform is aliased.
[0090] Figure 13-15The diagrams illustrate the eye diagram 1300 of the signal obtained with SSC off, a portion of the plotted reconstructed pattern waveform 1400, and the plotted UI as a function of time 1500. With SSC off, the system clock is relatively stable. Eye diagram 1300 plots each of the eye diagrams generated in operations 1202, 1204, and 1206. Graph 1400 illustrates the waveform reconstructed using operation 1200. As can be seen, the pattern waveform illustrates the PRBS13Q signal. Figure 15 The graph 1500 in the figure shows that the system clock and baud rate are quite stable when SSC is turned off.
[0091] Figure 16-18 The diagrams illustrate the eye diagram 1600 of the signal obtained with SSC enabled, a portion of the reconstructed pattern waveform 1700, and the UI as a function of time 1800. With SSC enabled... Figure 18 The illustration shows that the SSC provides approximately 5000 ppm of downspread to the baud rate. Figure 16-18 The diagram shows... Figure 12 The diagram in the middle and the operations discussed above can trace most SSCs, because... Figure 16 The eye diagram 1600 in the middle is closely matched to Figure 13 The eye diagram 1300, thus indicating Figure 12 The operation shown in the diagram tracks most SSCs. Figure 12 The operation involved changing the window size to simulate the effects of different configurations of a phase-locked loop (PLL) that allow for a wider eye diagram.
[0092] The aspects of this disclosure can operate on specially created hardware, firmware, digital signal processors, or on a specially programmed computer including a processor that operates according to programmed instructions. As used herein, the terms controller or processor are intended to include microprocessors, microcomputers, application-specific integrated circuits (ASICs), and special-purpose hardware controllers. One or more aspects of this disclosure can be embodied in computer-usable data and computer-executable instructions, such as one or more program modules, executed by one or more computers (including monitoring modules) or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform a particular task or implement a particular abstract data type when executed by a processor in a computer or other device. Computer-executable instructions can be stored on a computer-readable storage medium, such as a hard disk, optical disk, removable storage medium, solid-state memory, random access memory (RAM), etc. As those skilled in the art will appreciate, the functionality of program modules can be combined or distributed as desired in various aspects. Additionally, functionality can be embodied, wholly or partially, in firmware or hardware equivalents, such as integrated circuits, FPGAs, etc. Certain data structures may be used to implement one or more aspects of this disclosure more efficiently, and such data structures are conceived within the scope of the computer-executable instructions and computer-usable data described herein.
[0093] In some cases, the disclosed aspects may be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried on or stored on one or more computer-readable storage media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. As discussed herein, a computer-readable medium means any medium accessible by a computing device. By way of example and not limitation, a computer-readable medium may include computer storage media and communication media.
[0094] Computer storage media means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital video disc (DVD), or other optical disc storage, magnetic tape cassettes, magnetic tape, disk storage or other magnetic storage devices, and any other volatile or non-volatile, removable or non-removable media implemented in any technology. Computer storage media excludes signals themselves and the transmission of signals in transient forms.
[0095] Communication medium means any medium that can be used for communication of computer-readable information. By way of example and not limitation, communication medium may include coaxial cable, fiber optic cable, air, or any other medium suitable for communication of electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals.
[0096] Example
[0097] Illustrative examples of the techniques disclosed herein are provided below. Embodiments of the techniques may include any one or more, and any combination of, the examples described below.
[0098] Example 1 is an oscilloscope with a Nyquist frequency lower than the analog bandwidth, the oscilloscope comprising: an input configured to receive a test signal; a single analog-to-digital converter configured to receive the test signal, sample the test signal at a sampling rate, and generate digital samples of the test signal at a single output; and one or more processors configured to determine the frequency of the test signal without triggering and without hardware clock recovery, and to reconstruct a representation of the test signal based on the determined frequency of the test signal and the sampling rate.
[0099] Example 2 is an oscilloscope of Example 1, wherein one or more processors are configured to determine the frequency of the signal in the test by automatically generating an eye diagram and iteratively adjusting the frequency of a selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
[0100] Example 3 is an oscilloscope of either Example 1 or 2, further comprising: a user input configured to receive the frequency of the signal in the test from the user.
[0101] Example 4 is an oscilloscope of any of Examples 1-3, wherein the sampling rate is between 1 gigasamples per second and 100 gigasamples per second.
[0102] Example 5 is an oscilloscope of Example 4, wherein the sampling rate is between 2 gigabits per second and 25 gigabits per second.
[0103] Example 6 is an oscilloscope of any of Examples 1-5, wherein the resolution of the single analog-to-digital converter is at least 12 bits.
[0104] Example 7 is an oscilloscope of any of Examples 1-6, wherein one or more processors are configured to reconstruct the test signal based on the determined frequency and the sampling rate of the test signal without triggering, the reconstruction being performed by determining the corresponding position of each sampled component of the test signal in the test signal reconstructed based on the determined frequency and the sampling rate.
[0105] Example 8 is an oscilloscope of any of Examples 1-7, wherein one or more processors are further configured to: adjust the sampling rate of the analog-to-digital converter; and cause the analog-to-digital converter to sample the signal in the test at different sampling rates.
[0106] Example 9 is an oscilloscope of Example 8, wherein the one or more processors are further configured to determine the frequency of the test signal based on the test signal sampled at different sampling rates.
[0107] Example 10 is a method for reconstructing a test signal in an oscilloscope having a Nyquist frequency lower than the analog bandwidth, comprising: receiving the test signal; sampling the test signal at a sampling rate to digitize the signal using a single analog-to-digital converter having a single output for digital samples of the test signal; determining the frequency of the sampled test signal without using triggering and without using hardware clock recovery; and reconstructing a representation of the test signal based on the determined frequency and the sampling rate.
[0108] Example 11 is the method of Example 10, wherein determining the frequency of the signal in the test includes: automatically generating an eye diagram and iteratively adjusting the frequency of the selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
[0109] Example 12 is a method of either Example 10 or 11, further comprising: receiving the frequency of the signal in the test from user input.
[0110] Example 13 is a method of any of Examples 10-12, wherein the sampling rate is between 1 gigasamples per second and 100 gigasamples per second.
[0111] Example 14 is the method of Example 13, wherein the sampling rate is between 2 gigabits per second and 25 gigabits per second.
[0112] Example 15 is a method of any of Examples 10-14, wherein the resolution of the single analog-to-digital converter is at least 12 bits.
[0113] Example 16 is a method of any one of Examples 10-15, further comprising: adjusting the sampling rate of the analog-to-digital converter; and causing the analog-to-digital converter to sample the signal in the test at different sampling rates.
[0114] Example 17 is a method of Example 16, wherein determining the frequency of the signal in the test includes: determining the frequency of the signal in the test based on the signal in the test sampled at different sampling rates.
[0115] Example 18 is one or more computer-readable storage media including instructions that, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to: receive a test signal having a repeating pattern; sample the test signal on a plurality of repeating patterns at a sampling rate using a single analog-to-digital converter to digitize the signal; determine the frequency of the sampled test signal; and reconstruct the test signal based on the determined frequency and the sampling rate without using triggering.
[0116] Example 19 is one or more computer-readable storage media of Example 18, further comprising instructions for the test and measurement instruments to determine the frequency of a signal in the test by automatically generating an eye diagram and iteratively adjusting the frequency of a selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
[0117] Example 20 is one or more computer-readable storage media of any one of Examples 18 or 19, wherein the sampling rate is between 1 gigasamples per second and 100 gigasamples per second.
[0118] Example 21 is an oscilloscope having a real-time mode and an equivalent real-time mode, comprising: first and second channels; first and second analog-to-digital converters; and one or more processors configured to: during the real-time mode, electrically couple the first channel to both the first and second analog-to-digital converters and decouple the second channel from the first and second analog-to-digital converters; and during the equivalent real-time mode, electrically couple the first channel to the first analog-to-digital converter and couple the second channel to the second analog-to-digital converter.
[0119] Example 22 is an oscilloscope of Example 21, wherein during the equivalent real-time mode, the one or more processors are further configured to: determine the frequency of a test signal received at the first channel; and reconstruct the test signal based on the determined frequency of the test signal and the sampling rate of the first analog-to-digital converter without triggering.
[0120] Example 23 is an oscilloscope of Example 22, wherein the signal in the test includes a repeating pattern.
[0121] Example 24 is an oscilloscope of Example 23, wherein one or more processors are configured to determine the frequency of the signal in the test by automatically generating an eye diagram and iteratively adjusting the frequency of a selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
[0122] Example 25 is an oscilloscope of any of Examples 23 or 24, wherein the one or more processors are further configured to reconstruct the test signal based on the determined frequency and the sampling rate without triggering, the reconstruction being performed by determining the corresponding position of each sampled component of the test signal in the test signal reconstructed based on the determined frequency and the sampling rate.
[0123] Example 26 is an oscilloscope of any of Examples 23-25, wherein one or more processors are further configured to: adjust the sampling rate of the analog-to-digital converter; and cause the analog-to-digital converter to sample the signal in the test at different sampling rates.
[0124] Example 27 is an oscilloscope of Example 26, wherein the one or more processors are further configured to determine the frequency of the test signal based on the test signal sampled at different sampling rates.
[0125] Example 28 is an oscilloscope of any of Examples 22-26, further comprising: a user input configured to receive the frequency of the signal in the test from the user.
[0126] Example 29 is an oscilloscope of any of Examples 21-28, further comprising a plurality of switches, wherein the one or more processors are further configured to control each of the plurality of switches to electrically couple the first and second channels to the first and second analog-to-digital converters based on the mode of the test and measurement instrument.
[0127] Example 30 is an oscilloscope of any of Examples 21-29, wherein the one or more processors are further configured to sample a signal under test in real-time mode or equivalent real-time mode and reconstruct the signal under test by: obtaining a first window of samples, including estimating unit interval values around a nominal unit interval value to determine an average first unit interval value having a first period value; obtaining a second window of samples, including estimating unit interval values around the average first unit interval value to determine an average second unit interval value, wherein the search range of unit intervals for the second window of samples is narrower than the search range of unit intervals for the first window of samples; normalizing the sampling time based on the first window and the second window of samples; and reconstructing the signal under test based on the normalized sampling time.
[0128] Example 31 is a method for reconstructing a signal under test in an oscilloscope, comprising: sampling the signal under test; determining a nominal unit interval value based on the signal under test; obtaining a first window of the sample, including estimating unit interval values around the nominal unit interval value to determine an average first unit interval value having a first period value; obtaining a second window of the sample, including estimating unit interval values around the average first unit interval value to determine an average second unit interval value, wherein the search range of the unit interval for the second window of the sample is narrower than the search range of the unit interval for the first window of the sample; normalizing the sampling time based on the first window and the second window of the sample; and reconstructing the signal under test based on the normalized sampling time.
[0129] Example 32 is a method of Example 31, wherein the signal in the test includes a repeating pattern.
[0130] Example 33 is a method of either Example 31 or 32, wherein sampling the test signal comprises: acquiring the test signal using an analog bandwidth that is larger than the Nyquist frequency of the analog-to-digital converter used to sample the test signal.
[0131] Example 34 is a method of any one of Examples 31-33, further comprising: obtaining a third window of the sample, including estimating unit interval values around the average second unit interval value to determine an average third unit interval value, wherein the search range of the unit interval for the third window of the sample is narrower than the search range of the unit interval for the first window of the sample; and normalizing the sampling time based on the first window of the sample, the second window of the sample, and the third window of the sample.
[0132] Example 35 is one or more computer-readable storage media including instructions that, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to: during real-time mode, electrically couple a first channel to both a first analog-to-digital converter (ADC) and a second ADC, and decouple a second channel from both the first ADC and the second ADC, and acquire a signal under test; and during an equivalent real-time mode, electrically couple the first channel to only the first ADC and electrically couple the second channel to only the second ADC, and acquire a signal under test at one of the first channel or the second channel.
[0133] Example 36 is one or more computer-readable storage media of Example 35, further including instructions to cause the test and measurement instrument to perform the following operations: during the equivalent real-time mode, determine the frequency of a test signal received at the first channel, and reconstruct the test signal based on the determined frequency of the test signal and the sampling rate of the first analog-to-digital converter without triggering.
[0134] Example 37 is one or more computer-readable storage media of Example 36, wherein the signal in the test includes a repeating pattern.
[0135] Example 38 is one or more computer-readable storage media of Example 37, further comprising instructions to cause the test and measurement instruments to perform the following operation: determining the frequency of the signal in the test by automatically generating an eye diagram and iteratively adjusting the frequency of a selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
[0136] Example 39 is one or more computer-readable storage media of any of Examples 35-38, further comprising instructions to cause the test and measurement instruments to perform the following operations in the real-time mode and the equivalent real-time mode: sampling a signal under test at the first channel or the second channel; determining a nominal unit interval value based on the signal under test; obtaining a first window of the sample, including estimating unit interval values around the nominal unit interval value to determine an average first unit interval value having a first period value; obtaining a second window of the sample, including estimating unit interval values around the average first unit interval value to determine an average second unit interval value, wherein the search range of the unit interval for the second window of the sample is narrower than the search range of the unit interval for the first window of the sample; normalizing the sampling time based on the first window and the second window of the sample; and reconstructing the signal under test based on the normalized sampling time.
[0137] The versions of the disclosed subject matter described above have many advantages that are described or will be apparent to those skilled in the art. Even so, these advantages or features are not necessary in all versions of the disclosed apparatus, system, or method.
[0138] Furthermore, the description provides reference to specific features. It should be understood that the disclosure in this specification includes all possible combinations of those specific features. Where a specific feature is disclosed in the context of a particular aspect or example, that feature may also be used in the context of other aspects and examples to the greatest extent possible.
[0139] Furthermore, when a method having two or more defined steps or operations is mentioned in this application, the defined steps or operations may be performed in any order or simultaneously, unless the context precludes those possibilities.
[0140] Although specific examples of the invention have been illustrated and described for purposes of illustration, it should be understood that various modifications may be made without departing from the spirit and scope of the invention. Accordingly, the invention should not be limited except by the appended claims.
Claims
1. An oscilloscope having a Nyquist frequency lower than the analog bandwidth, the oscilloscope comprising: The input is configured to receive signals during testing; A single analog-to-digital converter is configured to receive the test signal, sample the test signal at a sampling rate, and generate digital samples of the test signal at a single output. as well as One or more processors are configured to determine the frequency of the signal under test without triggering and without hardware clock recovery, and to reconstruct a representation of the signal under test based on the determined frequency of the signal under test and the sampling rate. The oscilloscope described herein can measure signals that do not have repeating patterns.
2. The oscilloscope of claim 1, wherein the one or more processors are configured to determine the frequency of the signal in the test by automatically generating an eye diagram and iteratively adjusting the frequency of a selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
3. The oscilloscope of claim 1, further comprising: User input is configured to receive the frequency of the signal during the test from the user.
4. The oscilloscope of claim 1, wherein the sampling rate is between 1 gigabits per second and 100 gigabits per second.
5. The oscilloscope of claim 4, wherein the sampling rate is between 2 gigabits per second and 25 gigabits per second.
6. The oscilloscope of claim 1, wherein the resolution of the single analog-to-digital converter is at least 12 bits.
7. The oscilloscope of claim 1, wherein the one or more processors are configured to: reconstruct the test signal based on the determined frequency and the sampling rate of the test signal without triggering, the reconstruction being performed by determining the corresponding position of each sampled component of the test signal in the test signal reconstructed based on the determined frequency and the sampling rate.
8. The oscilloscope of claim 1, wherein the one or more processors are further configured to: adjust the sampling rate of the analog-to-digital converter; and cause the analog-to-digital converter to sample the signal under test at different sampling rates.
9. The oscilloscope of claim 8, wherein the one or more processors are further configured to determine the frequency of the test signal based on test signals sampled at different sampling rates.
10. A method for reconstructing a test signal in an oscilloscope having a Nyquist frequency lower than the analog bandwidth, comprising: Receive signal during test; A single analog-to-digital converter with a single output for digital samples of the signal under test is used to sample the signal under test at a sampling rate to digitize the signal; Determine the frequency of the sampled signal in the test without using triggers and without using hardware clock recovery; as well as The representation of the signal in the test is reconstructed based on the determined frequency and the sampling rate. The method described above can measure signals that do not have repeating patterns.
11. The method of claim 10, wherein determining the frequency of the signal in the test comprises: An eye diagram is automatically generated and the frequency of the selected signal in the test is iteratively adjusted until the horizontal opening of the eye diagram is at its widest point.
12. The method of claim 10, further comprising: The frequency of the signal received during the test is obtained from user input.
13. The method of claim 10, wherein the sampling rate is between 1 gigabits per second and 100 gigabits per second.
14. The method of claim 13, wherein the sampling rate is between 2 gigabits per second and 25 gigabits per second.
15. The method of claim 10, wherein the resolution of the single analog-to-digital converter is at least 12 bits.
16. The method of claim 10, further comprising: Adjusting the sampling rate of the analog-to-digital converter; and causing the analog-to-digital converter to sample the signal in the test at different sampling rates.
17. The method of claim 16, wherein determining the frequency of the signal in the test comprises: The frequency of the test signal is determined based on the test signal sampled at different sampling rates.
18. One or more computer-readable storage media including instructions that, when executed by one or more processors of a test and measuring instrument, cause the test and measuring instrument to: Receive test signals with repeating patterns; The signal in the test is sampled at a sampling rate on multiple repeating patterns using a single analog-to-digital converter to digitize the signal; Determine the frequency of the sampled signal in the test; as well as The signal in the test is reconstructed based on the determined frequency and the sampling rate without using triggering and without using hardware clock recovery. It can measure signals that do not have repeating patterns.
19. The one or more computer-readable storage media of claim 18, further comprising instructions for the test and measurement instruments to determine the frequency of the signal in the test by automatically generating an eye diagram and iteratively adjusting the frequency of the selected signal in the test until the horizontal opening of the eye diagram is at its widest point.
20. One or more computer-readable storage media as claimed in claim 18, wherein the sampling rate is between 1 gigasamples per second and 100 gigasamples per second.
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