BiFRED control method and BiFRED converter

Abstract

The present application provides a BiFRED control method and a BiFRED converter, wherein the converter has a second resistor connected in series with the first switching tube of the converter, and a first resistor connected between the rectifier circuit and the first switching tube. The method samples a first node signal to obtain a first sampling signal, and samples a second node signal to obtain a second sampling signal. The first node is the connection point between the first resistor, the second resistor, and the energy storage device, and the second node is the connection point between the first switching tube and the second resistor. The method processes the feedback signal to obtain a control signal for the first switching tube. The method utilizes the current on the primary winding side to control the on-time of the first switching tube, thereby suppressing the output current ripple. The method also allows for fine-tuning the resistance values ​​of the first and second resistors. A smaller output electrolytic capacitor can be used without affecting the output current, which is more conducive to system stability.

Description

Technical Field

[0001] The present application relates to electronic power technology, and more specifically, to a BiFRED control method and a BiFRED converter. Background Art

[0002] With the rapid advancement of LED lighting technology, lower-cost LED drivers are often desired. This can be achieved, for example, by reducing the number of components. However, as LED power increases, drivers must meet increasingly stringent requirements related to line current distortion. While low line current distortion is feasible using a single-stage architecture, there is often a trade-off between load and line management, line current distortion, output ripple (flicker), and the corresponding buffer size and cost. In high power factor (PF) and flicker-free applications, a boost integrated flyback (BiFRED) converter shares a single switch between the front and rear stages, simplifying control and reducing system cost. The front-stage circuit implements power factor correction, while the rear-stage DC-DC circuit achieves low ripple output.

[0003] An existing BiFRED converter schematic is shown in FIG. Figure 1 As shown, the AC input passes through the rectifier circuit to obtain the converter input voltage. Inductor L1 and diode D1 are connected in series, with one end connected to one of the rectifier circuit's output terminals and the other end connected to the first terminal of switch Q1. The second terminal of switch Q1 is connected to the other output terminal of the rectifier circuit. Inductor L2 is connected to switch Q1 via capacitor C1. Capacitor C2 is connected to inductor L2 via diode D2. The LED load is connected in parallel to the converter output. When switch Q1 is on, inductor L1 charges. When switch Q1 is off, inductor L1 discharges, capacitor C1 charges, and some current flows through inductor L2 to power the LED load. Existing converters often use peak current control or closed-loop secondary-side current control, but the output current ripple is still large.

[0004] Therefore, it is necessary to provide an improved BiFRED converter to overcome the above problems in the prior art. Summary of the Invention

[0005] This Summary is provided to introduce some concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0006] The present application aims to provide an improved BiFRED converter and control method to reduce output ripple and improve efficiency. These and other objects are achieved by the features of the independent claims. Further implementations are apparent from the dependent claims, the description, and the accompanying drawings.

[0007] According to a first aspect of the present application, a boost integrated flyback (BiFRED) control method is provided for a BiFRED converter, characterized in that it includes: using a boost part of the converter to perform a boost conversion, the boost part including a first inductor element connected between an input voltage and a first switching tube; using a flyback part of the converter to perform a flyback conversion, the flyback part including a primary winding and a secondary winding, and an energy storage device connected in series with the primary winding; sampling a first node signal to obtain a first sampling signal, and sampling a second node signal to obtain a second sampling signal, the first node being a connection point between a first sampling element, a second sampling element, and the energy storage device, and the second node being a connection point between the first switching tube and the second sampling element; and processing the received first sampling signal and the second sampling signal to obtain a control signal for controlling the first switching tube.

[0008] Optionally, the method further includes: when the first switch tube is turned off, the first sampling signal represents the first current information of the boost part; when the first switch tube is turned on, the difference between the second sampling signal and the product of the first sampling signal and the first coefficient represents the second current information of the flyback part.

[0009] Optionally, the first sampling element includes a first resistor, configured to be connected between the rectifier circuit and the first switching tube to obtain the first sampling signal at the negative end of the energy storage device; the second sampling element includes a second resistor, configured to be connected in series with the first switching tube to obtain the second sampling signal at the second output end of the first switching tube when the first switching tube is turned on.

[0010] Optionally, the first coefficient is related to the ratio of the first resistor to the second resistor.

[0011] Optionally, the method further includes: the resistance value of the first resistor is equal to the resistance value of the second resistor, and the resistance value is a first value; or the resistance value of the first resistor and the resistance value of the second resistor are offset above and below the first value, and the offset is between (0, 10%).

[0012] Optionally, the control signal is generated based on the first sampling signal, the second sampling signal, and a reference signal to control the on-time of the first switching tube.

[0013] According to a second aspect of the present application, a BiFRED converter is provided, characterized in that it includes: a boost part, including a first inductor between an input voltage and a first switching tube; a flyback part, including a primary winding and a secondary winding, and having a first capacitor connected in series with the primary winding of the flyback part; a first resistor, configured to be connected between a rectifier circuit and the first switching tube to obtain a first sampling signal of a first node; a second resistor, configured to be connected in series with the first switching tube to obtain a second sampling signal of a second node when the first switching tube is turned on; wherein the first node is a connection point of the first resistor, the second resistor and the first capacitor, and the second node is a connection point of the first switching tube and the second resistor; a controller, including a feedback circuit, for obtaining a compensation voltage according to the first sampling signal, the second sampling signal and a reference voltage, and the controller obtains a control signal of the first switching tube based on the compensation voltage and the reference signal.

[0014] Optionally, the controller includes: a logic circuit, configured to receive the first sampling signal and the second sampling signal, and generate a first voltage signal and a second voltage signal through logical operations; a feedback circuit, receiving the first voltage signal, the second voltage signal and the reference voltage, and generating the compensation voltage; a comparison circuit, having a first input terminal receiving the compensation voltage and a second input terminal receiving the reference signal, and generating the control signal based on the compensation voltage and the reference signal to control the on-time of the first switching tube.

[0015] Optionally, the logic circuit includes: a multiplier, configured to receive the first sampling signal and multiply the first sampling signal by a first coefficient to generate a third signal; a subtractor, configured to receive the second sampling signal and the third signal, and subtract the second sampling signal from the third signal to obtain the first voltage signal; a first switch, configured to receive the first voltage signal at its input end, have its output end connected to the first input end of the feedback circuit, and have its control end controlled by the control signal of the first switch tube; a second switch, configured to receive the first sampling signal at its input end as the second voltage signal, have its output end connected to the second input end of the feedback circuit, and have its control end controlled by the inverted signal of the control signal of the first switch tube.

[0016] Optionally, the feedback circuit includes: a first current source, configured to receive the reference voltage to generate a third current; a second current source, configured to receive the first voltage signal to generate a first current, and output the first current when the first switch tube is turned off; a third current source, configured to receive the second voltage signal to generate a second current; a third capacitor, configured to receive the third current for charging, when the first switch tube is turned off, the first current and the second current discharge the third capacitor, and the voltage at the first polarity end of the third capacitor is output as the compensation voltage.

[0017] The BiFRED converter provided in the present application has a second resistor connected in series with the first switching tube of the converter, and a first resistor connected between the rectifier circuit and the first switching tube. The first node signal is sampled to obtain a first sampling signal, and the second node signal is sampled to obtain a second sampling signal. The first node is the connection point of the first resistor, the second resistor, and the first capacitor, and the second node is the connection point of the first switching tube and the second resistor. The feedback current is processed to obtain a control signal for the first switching tube. The present application uses the current on the primary winding side to control the conduction time of the first switching tube, so that the output current ripple is suppressed. The resistance values ​​of the first resistor and the second resistor can also be fine-tuned. A smaller output electrolytic capacitor can be used without affecting the output current, which is more conducive to system stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0019] Figure 1 A circuit diagram of a BiFRED converter in the prior art is shown;

[0020] Figure 2 A circuit diagram of a BiFRED converter according to an embodiment of the present application is shown;

[0021] Figure 3 FIG1 shows a circuit diagram of a controller in a BiFRED converter according to an embodiment of the present application;

[0022] Figure 4 Shown according to Figure 3 Circuit diagram of the feedback circuit in the controller,

[0023] In the following, identical reference numerals denote identical or at least functionally identical features. DETAILED DESCRIPTION

[0024] The following will describe the technical solutions in the embodiments of this application in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0025] For example, it should be understood that the disclosure in conjunction with a described method also applies to a corresponding device or system for performing the method, and vice versa. For example, if a particular method step is described, the corresponding device may include a unit for performing the described method step, even if such a unit is not described or shown in detail in the accompanying drawings. On the other hand, for example, if a particular device is described based on a functional unit, the corresponding method may include a step for performing the described function, even if the step is not explicitly described or shown in the accompanying drawings. In addition, it should be understood that unless otherwise specifically stated, the features of the various example aspects described herein may be combined with each other.

[0026] It should be understood that the connection / coupling of A and B in the embodiment of the present application means that A and B can be connected in series or in parallel, or A and B can be connected through other devices, and the embodiment of the present application is not limited to this.

[0027] Figure 1 FIG. 4 shows a circuit diagram of a BiFRED converter in the prior art. Figure 1 As shown, the AC input is rectified by the rectifier circuit to obtain the converter input voltage. Inductor L1 and diode D1 are connected in series, with one end connected to one of the rectifier circuit's output terminals and the other end connected to the first end of switch Q1. The second end of switch Q1 is connected to the other output terminal of the rectifier circuit. Inductor L2 is connected to switch Q1 via capacitor C1. Capacitor C2 is connected to inductor L2 via diode D2. The LED load is connected in parallel to the converter output. When switch Q1 is on, inductor L1 charges, and capacitor C1 discharges through inductor L2 via switch Q1. When switch Q1 is off, inductor L1 discharges, capacitor C1 charges, and some current flows through inductor L2. Simultaneously, the energy stored in inductor L2 is used to charge capacitor C2 and power the LED load. Existing converters often use peak current control or closed-loop secondary-side current control, but the output current ripple is still large.

[0028] Figure 2 FIG. 1 shows a circuit diagram of a BiFRED converter according to an embodiment of the present application. Figure 2As shown, the circuit includes an AC input, a rectifier circuit, a converter, and a load. The converter includes a first inductor L3, a first diode D3, a first switch Q2, a first capacitor C3, a transformer T1, a first resistor R1, a second resistor R2, and a controller K. One end of the first inductor L3 and the first diode D2 connected in series is connected to one output end of the rectifier circuit, and the other end is connected to the first end of the first switch Q2. The second end of the first switch Q2 is connected in series with the first resistor R1 and the second resistor R2, and then connected to the other output end of the rectifier circuit. The primary winding of the transformer T1 is connected in series with the first capacitor C3, and then connected in parallel to the branch between the first switch Q2 and the second resistor R2. The connection point between the first resistor R1, the second resistor R2, and the first capacitor C3 constitutes a first node, and the connection point between the first switch Q2 and the second resistor R2 constitutes a second node. When the first switch Q2 is on, the first inductor L3 is charged from the rectified AC power via the first switch Q2, increasing the current in the first inductor L3. When the first switch Q2 is off, the first inductor L3 discharges to charge the first capacitor C3, decreasing the current in the first inductor L3 and increasing the voltage across the first capacitor C3. Part of the charging current from L3 to C3 flows through the primary winding of the transformer T1 and supplies power to the load. When the first switch Q2 is on, the first capacitor C3 also discharges through the first switch Q2 and the primary winding of the transformer T1. During the off period of the first switch Q2, the energy stored in the primary winding of the transformer T1 is used to supply power to the load. The control terminal of the first switch Q2 is connected to a controller K, which receives the voltage VA at the second node and the voltage VB at the first node.

[0029] The above describes an example of a converter according to an embodiment of the present application. However, the embodiment of the present application is not limited thereto and may be expanded and deformed in other ways.

[0030] For example, the resistors and capacitors provided in the embodiments of the present application may be lumped parameter capacitor elements and resistor elements, or may be other equivalent elements with similar functions to capacitors and resistors. The equivalent structures described here may be, for example but not limited to, microstrip lines, varactors, conductor structures with certain patterns, and the like that can provide inductive impedance and / or capacitive impedance.

[0031] Normally, the resistance values ​​of the first resistor R1 and the second resistor R2 are set to be equal. When the first switch tube Q2 is turned on, C3 discharges through the secondary winding of the transformer T1 to generate a flyback current I2. The first inductor L3 is charged from the rectified mains power via the first switch tube Q2 to generate a boost current Iboost. With respect to the reference ground, the voltage of VB is I boost ×R1, the voltage of VA is I1×R2+VB, where I1 is the current flowing through the first switch tube Q2, that is, I1=I2+I boost , when R1=R2=R, the flyback current VA-2VB represents the charging current information of the flyback part. When the first switch tube Q2 is turned off, VB represents the discharge current information of the boost circuit. Figure 3 FIG. 1 shows a circuit diagram of a controller in a BiFRED converter according to an embodiment of the present application. Figure 3 As shown, controller K receives voltages VA and VB. During the on-time of the first switch Q2, a multiplier and subtractor calculate VA-2VB, which is then sent through the switch as voltage V1 to the feedback circuit. During the off-time of the first switch Q2, voltage VB is sent through the switch as voltage V2 to the feedback circuit. The feedback circuit receives a reference signal VREF, processes it, and outputs a compensation signal VCOMP to the non-inverting input of the first comparator. The inverting input receives a triangle wave to output a control signal for controlling the first switch Q2. The reference signal VREF is a voltage signal representing the magnitude of the output current. By controlling the on-time of the first switch Q2, a substantially constant current is supplied to the load.

[0032] Figure 4 Shown according to Figure 3 The circuit diagram of the feedback circuit in the controller is as follows: Figure 4 As shown, the feedback circuit receives voltages V1, V2, and VREF, and generates a current through a voltage-controlled current source to charge and discharge capacitor C5. The positive terminal of capacitor C5 outputs a compensation signal, VCOMP. During a switching cycle, VREF charges capacitor C5. During the on-time of the first switch, the feedback circuit receives voltage V1 and maintains V1. During the off-time of the first switch, the feedback circuit samples voltage V2, pulls down VCOMP through voltages V1 and V2, and controls the enable of the sampled voltage V1 using the inverted phase of the control signal. Through the above feedback circuit and controller circuit structure, indirect sampling of the output current is achieved, thereby regulating and controlling the output current to be constant.

[0033] In the present application, a first resistor R1 and a second resistor R2 are set in the control loop of the BiFRED converter, and the node voltage in the circuit loop is sampled to obtain the current of the loop. The current sampled and the calculated current values ​​of the present application are both positive values. In the subsequent control circuit processing, there is no need to consider the influence of negative current, and the control is simpler.

[0034] The BiFRED converter provided in the present application has a second resistor connected in series with the first switching tube of the converter, and a first resistor connected between the rectifier circuit and the first switching tube, which is used to detect the current of the boost part when the first switching tube is turned off and the current of the flyback part when it is turned on. The feedback current is processed to obtain information characterizing the output current to obtain a control signal for the first switching tube. The present application uses the current on the primary winding side to control the conduction time of the first switching tube, so that the output current ripple is suppressed.

[0035] Under normal circumstances, the voltage of the first capacitor C3 remains essentially unchanged within a power frequency cycle. Near the zero crossing of the mains power grid, the discharge current of the boost part is zero, and the output current is entirely provided by the flyback part. At this time, the VCOMP voltage is the highest. Considering the output current ripple, the output current is lower than the set current. At the peak of the power grid, the discharge current of the boost part reaches its maximum value, the VCOMP voltage is the lowest, and the output current is higher than the set current. The resistance values ​​of the first resistor R1 and the second resistor R2 are set to be equal, for example, to R. As an example, the present application can fine-tune the resistance values ​​of the first resistor R1 and the second resistor R2 so that the resistance value of the first resistor R1 is slightly smaller than R and the resistance value of the second resistor R2 is slightly larger than R, so that the current sampled by the feedback circuit to the flyback part is slightly smaller than the actual value, and the current sampled to the boost part is slightly larger than the actual value. Under the conditions of the same control bandwidth and output capacitance, the voltage of VCOMP is higher at the bottom of the power grid, and lower at the peak of the power grid, and the output current ripple is smaller. That is, under the same output current ripple conditions, the solution of the present application can use a smaller output electrolytic capacitor or allow a lower system bandwidth, which is beneficial to the stability of the system. At the same time, since the resistance values ​​of the first resistor R1 and the second resistor R2 are fine-tuned, and the directions of the fine-tuning of the resistance values ​​of the first resistor R1 and the second resistor R2 are opposite, the effects of the two on the current reference can offset each other, and therefore do not affect the output current reference.

[0036] The above describes an example of a controller according to an embodiment of the present application. However, the embodiment of the present application is not limited thereto and may be expanded and deformed in other ways.

[0037] For example, it should be understood that the reference ground potential in the aforementioned embodiments may be replaced by other non-zero reference potentials (having positive or negative voltage amplitudes) or controlled varying reference signals in alternative embodiments.

[0038] The steps of the methods described herein may be performed in any suitable order, or simultaneously where appropriate. In addition, individual blocks may be deleted from any method without departing from the spirit and scope of the subject matter described herein. Aspects of any of the above-described embodiments may be combined with aspects of any other described embodiments to form further embodiments without losing the desired effect.

[0039] The terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0040] It should be understood that the above description is given only as an example and that various modifications may be made by those skilled in the art. The above description, examples, and data provide a complete description of the structure and use of the exemplary embodiments. Although various embodiments with a certain degree of specificity have been described above, or with reference to one or more individual embodiments, those skilled in the art may make various changes to the disclosed embodiments without departing from the spirit or scope of this specification.

Claims

1. A boost integrated flyback BiFRED control method for a BiFRED converter, characterized in that: include: Performing a voltage boost conversion using a boost part of the converter, wherein the boost part includes a first switch tube and a first inductor and a first diode connected between an input voltage and the first switch tube; Performing a flyback conversion using a flyback portion of the converter, the flyback portion comprising a primary winding and a secondary winding, and an energy storage device connected in series with the primary winding; The flyback part is connected to both ends of the first switch tube, the boost part and the flyback part are connected to a reference ground through a first sampling element, and a second sampling element is connected between a first node and the first switch tube; The connection point between the boost part, the flyback part and the first sampling element is a first node, and the connection point between the second sampling element and the first switch tube is a second node; Sampling the first node signal to obtain a first sampling signal, sampling the second node signal to obtain a second sampling signal; Processing the received first sampling signal and the second sampling signal to obtain a control signal for controlling the first switching tube; When the first switch tube is turned off, the first sampling signal represents first current information of the boost part; When the first switch tube is turned on, the difference between the second sampling signal and the product of the first sampling signal and the first coefficient represents the second current information of the flyback part.

2. The control method according to claim 1, characterized in that: The first sampling element includes a first resistor configured to be connected between the reference ground and the first node to obtain the first sampling signal at the negative terminal of the energy storage device; The second sampling element includes a second resistor, which is configured to be connected in series with the first switch tube to obtain the second sampling signal at the second output end of the first switch tube when the first switch tube is turned on.

3. The control method according to claim 2, characterized in that: The first coefficient is related to a ratio of the first resistor to the second resistor.

4. The control method according to claim 2, characterized in that: Also includes: The resistance value of the first resistor is equal to the resistance value of the second resistor, and the resistance value is a first value; or The resistance value of the first resistor and the resistance value of the second resistor are offset up and down with respect to a first value, and the offset is between (0, 10%).

5. The control method according to claim 1, characterized in that: The control signal is generated based on the first sampling signal, the second sampling signal and a reference signal to control the on-time of the first switch tube.

6. A BiFRED converter, characterized in that: include: A boost part, comprising a first switch tube, and a first inductor and a first diode connected between an input voltage and the first switch tube; A flyback part, comprising a primary winding and a secondary winding, and having a first capacitor connected in series with the primary winding of the flyback part; the flyback part is connected to both ends of the first switch tube; a first resistor configured to be connected between a reference ground and a first node to obtain a first sampling signal of the first node; The first node is a connection point between the boost part, the flyback part and the first resistor; The boost part and the flyback part are connected to the reference ground through the first resistor; the first sampling signal represents the first current information of the boost part when the first switch tube is turned off; a second resistor, configured to be connected in series with the first switch tube to obtain a second sampling signal of the second node when the first switch tube is turned on; The second resistor is connected between the first node and the first switch tube, and the second node is a connection point between the second resistor and the first switch tube; the difference between the second sampling signal and the product of the first sampling signal and the first coefficient represents the second current information of the flyback part when the first switch tube is turned on; The controller includes a feedback circuit for obtaining a compensation voltage according to the first sampling signal, the second sampling signal and a reference voltage. The controller obtains a control signal of the first switch tube based on the compensation voltage and the reference signal.

7. The BiFRED converter according to claim 6, characterized in that The controller includes: a logic circuit configured to receive the first sampling signal and the second sampling signal and generate a first voltage signal and a second voltage signal through a logic operation; a feedback circuit, receiving the first voltage signal, the second voltage signal and the reference voltage, and generating the compensation voltage; The comparison circuit has a first input terminal receiving the compensation voltage and a second input terminal receiving the reference signal, and generates the control signal according to the compensation voltage and the reference signal to control the on-time of the first switch tube.

8. The BiFRED converter according to claim 7, characterized in that The logic circuit comprises: a multiplier configured to receive the first sampled signal and multiply the first sampled signal by a first coefficient to generate a third signal; a subtractor configured to receive the second sampling signal and the third signal, and subtract the second sampling signal from the third signal to obtain the first voltage signal; a first switch, configured such that an input end receives the first voltage signal, an output end is connected to the first input end of the feedback circuit, and a control end is controlled by a control signal of the first switch tube; The second switch is configured to receive the first sampling signal as the second voltage signal at its input end, connect its output end to the second input end of the feedback circuit, and control its control end by the inverted signal of the control signal of the first switch tube.

9. The BiFRED converter according to claim 8, characterized in that The feedback circuit comprises: a first current source configured to receive the reference voltage to generate a third current; a second current source, configured to receive the first voltage signal to generate a first current, and output the first current when the first switch tube is turned off; a third current source, configured to receive the second voltage signal to generate a second current; The third capacitor is configured to receive the third current for charging. When the first switch tube is turned off, the first current and the second current discharge the third capacitor, and the voltage at the first polarity end of the third capacitor is output as the compensation voltage.

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