Power converter

Abstract

A power converter is provided, including a transformer, first and second power switching transistors, first and second current sources, first, second, third, and fourth switching transistors, and a switching control circuit. First, second, third, and fourth switching transistors have first electrodes connected to first, second, third, and fourth outputs of the switching control circuit, respectively, second electrodes of the first and third switching transistors are connected to the first and second current sources, respectively, a second electrode of the second switching transistor is connected to a third electrode of the first switching transistor and a base of the first power switching transistor, a second electrode of the fourth switching transistor is connected to a third electrode of the third switching transistor and a base of the second power switching transistor, a collector of the first power switching transistor is connected to a primary winding of the transformer, an emitter is connected to a base of the second power switching transistor, a collector of the second power switching transistor is connected to the primary winding of the transformer, and an emitter is connected to ground via a current sense resistor.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuits, and in particular to a power converter. BACKGROUND

[0002] In the field of small and medium power power converter, flyback converter occupies the absolute dominant position in the market of 100W below applications with its simple circuit, high conversion efficiency, wide input voltage range and other advantages. In recent years, power switch tube (also known as bipolar transistor) is widely used in the market of 10W below small power due to its good switching characteristics and low price advantage.

[0003] With the increasing functions of mobile devices such as mobile phones and tablet computers, the capacity of the battery for powering the mobile devices has increased explosively, and the output power of the charger or adapter for powering the mobile devices has been continuously improved from the original 5W to 20W, 30W, 45W, 65W or even higher. How to improve the overall efficiency and power density of the power converter on the basis of low cost so that the power converter meets the development needs of the miniaturization of the charger or adapter and the increasingly stringent power efficiency standards has become the focus of current research. SUMMARY

[0004] The power converter according to the embodiment of the present application comprises a transformer, first and second power switch tubes, first and second current sources, first, second, third and fourth switch tubes, and a switch control circuit, wherein: the first electrodes of the first, second, third and fourth switch tubes are respectively connected to the first, second, third and fourth output terminals of the switch control circuit, the second electrodes of the first and third switch tubes are respectively connected to the first and second current sources, the second electrode of the second switch tube is connected to the third electrode of the first switch tube and the base of the first power switch tube, the second electrode of the fourth switch tube is connected to the third electrode of the third switch tube and the base of the second power switch tube, the third electrode of the second switch tube is grounded or connected to the third electrode of the third switch tube and the second electrode of the fourth switch tube, the third electrode of the fourth switch tube is grounded, the collector of the first power switch tube is connected to the primary winding of the transformer, the base is connected to the third electrode of the first switch tube and the second electrode of the second switch tube, and the emitter is connected to the base of the second power switch tube, the collector of the second power switch tube is connected to the primary winding of the transformer, the base is connected to the third electrode of the third switch tube and the second electrode of the fourth switch tube, and the emitter is grounded via a current sensing resistor. BRIEF DESCRIPTION OF DRAWINGS

[0005] The present application can be better understood from the following description of specific embodiments thereof, given by way of example and with reference to the accompanying drawings, in which:

[0006] Figure 1AAn example circuit diagram of a power converter according to an embodiment of the present invention is shown.

[0007] Figure 1B Another example circuit diagram of a power converter according to an embodiment of the present invention is shown.

[0008] Figure 2 It shows Figure 1A The diagram shows the operating waveforms of multiple signals in the power converter shown in / 1B.

[0009] Figure 3A It shows Figure 1A The diagram shows an example block diagram of the control chip in a power converter.

[0010] Figure 3B It shows Figure 1B The diagram shows an example block diagram of the control chip in a power converter.

[0011] Figure 4 It shows Figure 1A The example package schematic diagram of the first and second power switching transistors in the power converter shown in / 1B.

[0012] Figure 5 It shows Figure 1A The diagram below shows an example package of the first and second power switches and the control chip in the power converter. Detailed Implementation

[0013] The features and exemplary embodiments of various aspects of the present invention will now be described in detail. Numerous specific details are set forth in the following detailed description to provide a comprehensive understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of the invention by illustrating examples of the invention. The invention is by no means limited to any specific configuration presented below, but covers any modifications, substitutions, and improvements to elements and components without departing from the spirit of the invention. Well-known structures and techniques are not shown in the drawings and the following description in order to avoid unnecessarily obscuring the invention. Furthermore, it should be noted that the term "connected to B" as used herein can mean "directly connected to B" or "indirectly connected to B via one or more other elements."

[0014] Currently, the main reason why power switching transistors can only be used in the low-power market is that their conduction is current-driven, requiring sufficient drive current to turn them on. Furthermore, the high drive losses, high conduction losses, and slow turn-off speed of power switching transistors also limit their application in the higher-power market.

[0015] In view of the above, a power converter according to an embodiment of the present invention is proposed, wherein four switching transistors are used to drive the power switching transistor in combination, so as to reduce the drive current loss of the power switching transistor, improve the turn-on speed and / or turn-off speed of the power switching transistor, and / or reduce the turn-off loss of the power switching transistor.

[0016] Figure 1A An example circuit diagram of a power converter 100A according to an embodiment of the present invention is shown. Figure 1A As shown, the power converter 100A includes a transformer T, first and second power switches Q1 and Q2, and first and second current sources I. source1 and I source2 The circuit comprises first, second, third, and fourth switching transistors D1 to D4, and a switching control circuit 102, wherein the first electrodes of the first, second, third, and fourth switching transistors D1 to D4 are respectively connected to the first, second, third, and fourth output terminals of the switching control circuit 102, and the second electrodes of the first and third switching transistors D1 and D3 are respectively connected to the first and second current sources I. source1 and I source2 The second electrode of the second switch D2 is connected to the third electrode of the first switch D1 and the base of the first power switch Q1. The second electrode of the fourth switch D4 is connected to the third electrode of the third switch D3 and the base of the second power switch Q2. The third electrodes of the second switch D2 and D4 are grounded. The collector of the first power switch Q1 is connected to the primary winding of the transformer T, the base is connected to the third electrode of the first switch D1 and the second electrode of the second switch D2, and the emitter is connected to the base of the second power switch Q2. The collector of the second power switch Q2 is connected to the primary winding of the transformer T, the base is connected to the third electrode of the third switch D3 and the second electrode of the fourth switch D4, and the emitter is grounded via the current sensing resistor Rs.

[0017] Figure 1A An example circuit diagram of a power converter 100B according to an embodiment of the present invention is shown. Figure 1B The power converter 100B shown is Figure 1B The main structural difference of the power converter 100A shown is that the third electrode of the second switch D2 is connected to the third electrode of the third switch D3 and the second electrode of the fourth switch D4 (i.e., connected to the emitter of the first power switch Q1 and the base of the second power switch Q1). The connection relationships of other parts are the same as those of the corresponding parts shown in Figure 1, and will not be described again here.

[0018] Figure 1A It shows Figure 2The diagram shows the operating waveforms of multiple signals in the power converter 100A / 100B shown in Figure 1B. D1 to D4 represent the drive signals used to turn on and off the first to fourth switching transistors D1 to D4, respectively. B1 I represents the first drive current used for the second power switch Q2. B2 This represents the second drive current used for the second power switch Q2, and Is represents the primary current flowing through the current sensing resistor Rs.

[0019] like Figure 1A / 1B and Figure 1A As shown, in some embodiments, during the process of the second power switch Q2 changing from the off state to the on state, the first switch D1 and the first power switch Q1 are in the on state while the second, third, and fourth switches D2 to D4 are in the off state. The base current of the second power switch Q2 is supplied by the first current source I. source1 Provided via the first switching transistor D1 and the first power switching transistor Q1 (i.e., using the first drive current I). B1 As the drive current for the second power switch Q2.

[0020] like Figure 2 / 1B and Figure 1A As shown, in some embodiments, during the period when the second power switch Q2 is in the on state, before the voltage Vcs on the current sensing resistor Rs reaches a predetermined set value, the first switch D1 and the first power switch Q1 are in the on state, and the second, third, and fourth switches D2 to D4 are in the off state. The base current of the second power switch Q2 is supplied by the first current source I. source1 Provided via the first switching transistor D1 and the first power switching transistor Q1 (i.e., using the first drive current I). B1 As the drive current for the second power switch Q2.

[0021] like Figure 2 / 1B and Figure 1A As shown, in some embodiments, during the period when the second power switch Q2 is in the on state, after the voltage Vcs across the current sensing resistor Rs reaches a predetermined set value, the first switch D1, the fourth switch D4, and the first power switch Q1 are in the off state, while the second and third switches D2 and D3 are in the on state. The base current of the second power switch Q2 is supplied by the second current source I. source2 Provided via the third switch D3 (i.e., using the second drive current I) B2 As the drive current for the second power switch Q2.

[0022] like Figure 2 / 1B and Figure 1AAs shown, in some embodiments, during the period when the second power switch Q2 is in the off state, the first switch Dl, the third switch D3, and the first power switch Ql are in the off state, and the second and fourth switches D2 and D4 are in the on state.

[0023] In Figure 2 In the power converter 100A / B shown in FIG. IB, the first and second switches Dl and D2 are used to control the first drive current I B1 whether to be used as the drive current (the first drive current I B1 of the second power switch Q2, the third and fourth switches D3 and D4 are used to control the second drive current I B2 whether to be used as the drive current of the second power switch Q2. During the period when the second power switch Q2 is in the on state, the first and second drive currents I B1 and I B2 are used as the drive current of the second power switch Q2 in a time-sharing manner. During the period when the second power switch Q2 is in the off state, the first drive current I B1 is used as the drive current of the second power switch Q2. In this case, the first drive current I B1 must be large enough so that the second power switch Q2 can quickly enter the saturation region to minimize the turn-on loss of the second power switch Q2 and improve the switching speed of the second power switch Q2. However, if the drive current of the second power switch Q2 is too large, the turn-off speed of the second power switch Q2 will be reduced and the turn-off loss of the second power switch Q2 will be increased. Therefore, before the process of changing the second power switch Q2 from the on state to the off state begins, the drive current of the second power switch Q2 is switched from the first drive current I B1 to the second drive current I B2 (also referred to as the pre-off drive current), which can make the minority carriers stored in the base region of the second power switch Q2 quickly recombine to reduce the turn-off time of the second power switch Q2, lower the turn-off loss of the second power switch Q2, and improve the system efficiency and output power of the power converter 100A / B.

[0024] Specifically, during the process of changing the second power switch Q2 from the off state to the on state, the first drive current I B1 is used as the drive current of the second power switch Q2. Due to the amplification effect of the first power switch Ql, the base current of the second power switch Q2 is hfe*I B1(hfe is the amplification factor of the first power switch Q1). The larger base current causes the second power switch Q2 to quickly enter the saturation region, reducing the turn-on loss of the second power switch Q2. During the conduction state of the second power switch Q2, the primary current Is flowing through the current sensing resistor Rs is Is = Ic + hfe * Ic. B1 (Ic is the current flowing through the primary winding of transformer T); after the voltage Vcs on the current sensing resistor Rs reaches a predetermined set value (e.g., 90% of the maximum voltage value Vcsmax on the current sensing resistor Rs), the second drive current I is used. B2 As the drive current for the second power switch Q2, due to I B2 < B1 Therefore, when using the second drive current I B2 During the period when the second power switch Q2 is in the on state, there are fewer charge carriers stored in the base region of the second power switch Q2. When the second power switch Q2 is turned off, the fewer charge carriers in its base region can recombine quickly to reduce the turn-off time of the second power switch Q2 and reduce the turn-off loss of the second power switch Q2.

[0025] Figure 1A It shows Figure 3A An example block diagram of the control chip U1A in the power converter 100A is shown. Figure 1A It shows Figure 3B The diagram shows an example block diagram of the control chip U1B in the power converter 100B. For simplicity, control chips U1A and U1B will be collectively referred to as control chip U1 below. Figure 1B As shown in Figure 3B, the first to fourth switching transistors D1 to D4 and the switching control circuit 102 can be included in the control chip U1, and the control chip U1 may also include:

[0026] Chip power supply circuit 104: Connected to the VDD pin of control chip U1, it includes three parts: undervoltage lockout (UVLO), overvoltage protection (OVP), and reference voltage and reference current (Vref & Iref). It provides the operating voltage, reference voltage Vref, and reference current Iref to the internal circuitry of the chip. When the voltage at the VDD pin exceeds the UVLO voltage, the internal circuitry of the chip begins to operate. When the voltage at the VDD pin exceeds the OVP threshold, the internal circuitry of the chip enters an automatic recovery protection state to prevent damage to control chip U1.

[0027] ​The feedback control circuit 106 is connected to the FB pin of the control chip U1, and includes three parts of continuous conduction mode (CCM) / quasi-resonant (QR) mode / green mode / burst mode control, pulse width modulation (PWM) comparator, and pulse width modulation pre-shutoff (PWM_pre) comparator. The PWM comparator and the PWM_pre comparator compare the output voltage feedback signal received by the FB pin with the current sensing signal (for example, the voltage Vcs on the current sensing resistor Rs) received by the CS pin, generate PWM signals and PWM_pre signals, and output the PWM signals and the PWM_pre signals to the logic control circuit 112. In addition, the CCM / QR mode / green mode / burst mode control part implements switching control of the CCM, QR mode, green mode, and burst mode according to the output voltage feedback signal received by the FB pin, and outputs a mode control signal to the logic control circuit 112.

[0028] The current sensing control circuit 108 is connected to the CS pin of the control chip U1, and includes four parts of leading edge blanking (LEB), slope compensation, overcurrent protection (OCP) comparator, and overcurrent protection pre-shutoff (OCP_pre) comparator. When it is detected via the CS pin that the system operating mode is in deep CCM, slope compensation is needed to maintain system stability. The OCP comparator compares the current sensing signal received by the CS pin with an OCP threshold, and outputs an OCP shutoff signal to the logic control circuit 112. The OCP_pre comparator compares the current sensing signal received by the CS pin with an OCP pre-shutoff threshold, and outputs an OCP pre-shutoff signal to the logic control circuit 112.

[0029] The oscillator (OSC) circuit 110 is used to generate a high-frequency sawtooth wave signal provided to the logic control circuit 112 for the logic control circuit 112 to generate a duty cycle adjustable square wave signal.

[0030] The logic control circuit 112 is used to logically analyze the input signals from various circuit modules, and output logic control signals to the switch control circuit 102.

[0031] The protection circuit 114 is used to make the control chip U1 enter an automatic recovery protection state when abnormal fault information is detected, so as to avoid damage to the control chip U1.

[0032] Here, it should be noted that the switch control circuit 102 is used to generate four control signals for controlling the turn-on and turn-off of the first to fourth switch tubes D1 to D4 respectively according to the logic control signals provided by the logic control circuit 112, and the first to fourth switch tubes D1 to D4 are turned on and turned off under the control of the switch control circuit 102, so as to form the first and second drive currents I B1 and I B2The first to fourth switch tubes D1, D2, D3 and D4 can be implemented by N-type metal oxide semiconductor field effect transistors (N-MOSFETs) or bipolar transistors (BJTs). The first and third switch tubes D1 and D3 can also be implemented by P-type metal oxide semiconductor field effect transistors (P-MOSFETs).

[0033] In some embodiments, the turn-on and turn-off of the first and second switch tubes D1 and D2 can be controlled by the first switch control circuit, and the turn-on and turn-off of the third and fourth switch tubes D3 and D4 can be controlled by the second switch control circuit. In addition, the first and second power switch tubes Q1 and Q2 can be two independent power switch tubes or can be formed in one chip package; or the control chip U1 can be formed in one three-chip package with the first and second power switch tubes Q1 and Q2.

[0034] Figure 3A An example package diagram of the first and second power switch tubes Q1 and Q2 in the power converter 100A / B is shown. Figure 4 As shown in FIG. 1, the first and second power switch tubes Q1 and Q2 can be included in the same single base island chip package (in which the collector regions of the first and second power switch tubes Q1 and Q2 are connected), and the detailed pin information of the single base island chip package is as follows: Figure 1A

[0035] 1 pin is a first current pin for receiving a first driving current I B1 , connected to the base region of the first power switch tube Q1;

[0036] 2 pin is a second current pin for receiving a second driving current I B2 , connected to the emitter region of the first power switch tube Q1 and the base region of the second power switch tube Q2;

[0037] 3 / 4 pin is an emitter pin, connected to the emitter region of the second power switch tube Q2. In order to increase the heat dissipation area and reduce the temperature, a plurality of wires and a plurality of pins can be used, for example, two pins are connected by two groups of wires, and the specific number of wires in each group of wires can be determined according to the area of the emitter region of the second power switch tube Q2.

[0038] 5-8 pins are collector pins, connected to the collector regions of the first and second power switch tubes Q1 and Q2. In order to dissipate heat and facilitate printed circuit board layout, a plurality of pins are used, and the collector regions of the first and second power switch tubes Q1 and Q2 are located on the back of the transistor, so that the first and second power switch tubes Q1 and Q2 can be connected by conductive adhesive and chip base island without wire bonding, and the impedance is minimized.

[0039] Figure 4 ​It shows Figure 5 The example package diagram of the first and second power switches Q1 and Q2 and the control chip U1 in the power converter 100A / B shown in Figure / B is shown. Figure 1A As shown, the first and second power switches Q1 and Q2 are packaged in a flat configuration, while the control chip U1 and the second power switch Q2 are packaged in a stacked configuration. The specific package configuration can be adjusted according to the number and shape of the base islands, and is not limited to an 8-pin package. Figure 5 The detailed pin information for the example package shown is as follows:

[0040] Pins 1, 2, and 3 are control pins for the control chip U1 and are connected to the internal pads of the control chip U1.

[0041] Pin 4 is the emitter pin, which is connected to the emitter region of the second power switch Q2. In order to increase the heat dissipation area and reduce the temperature, multiple wires can be used to reduce the wire impedance. The specific number of wires can be determined according to the area of ​​the emitter region of the second power switch Q2.

[0042] Pins 5 to 8 are collector pins, which are connected to the collector areas of the first and second power switching transistors Q1 and Q2. For heat dissipation and convenient printed circuit board layout, a multi-pin package is used. The collector areas of the first and second power switching transistors Q1 and Q2 are located on the back of the transistor and are connected by conductive glue and base island, which does not require wire bonding and minimizes impedance.

[0043] Figure 5 Figure 5 The example package shown can add extra pins without increasing the system pin cost, resulting in a simple system circuit, fewer external components, and low system cost.

[0044] In summary, in the power converter according to embodiments of the present invention, four switching transistors are used to drive the power switching transistor in combination, which reduces the drive current loss of the power switching transistor and improves the turn-on speed of the power switching transistor. Furthermore, by setting a pre-turn-off drive current when the power switching transistor is preparing to change from the on state to the off state, the number of carriers in the base region during the on state of the power switching transistor is reduced, allowing for rapid extraction of the remaining minority carriers in the base region of the power switching transistor during turn-off, thereby improving the turn-off speed, reducing turn-off losses, and thus expanding the application range of the power switching transistor in medium-power systems.

[0045] This invention may be implemented in other specific forms without departing from its spirit and essential characteristics. The present embodiments are to be regarded in all respects as exemplary rather than limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and all modifications falling within the meaning and scope of the claims and their equivalents are included within the scope of the invention.

Claims

1. A power converter, characterized by, The power supply comprises a transformer, a first power switch tube and a second power switch tube, a first current source and a second current source, a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube, and a switch control circuit, wherein: the first electrodes of the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube are connected to the first output end, the second output end, the third output end, and the fourth output end of the switch control circuit respectively, the second electrodes of the first switch tube and the third switch tube are connected to the first current source and the second current source respectively, the second electrode of the second switch tube is connected to the third electrode of the first switch tube and the base of the first power switch tube, the second electrode of the fourth switch tube is connected to the third electrode of the third switch tube and the base of the second power switch tube, the third electrode of the second switch tube is grounded or connected to the third electrode of the third switch tube and the second electrode of the fourth switch tube, the third electrode of the fourth switch tube is grounded, the collector of the first power switch tube is connected to the primary winding of the transformer, the base is connected to the third electrode of the first switch tube and the second electrode of the second switch tube, and the emitter is connected to the base of the second power switch tube, the collector of the second power switch tube is connected to the primary winding of the transformer, the base is connected to the third electrode of the third switch tube and the second electrode of the fourth switch tube, and the emitter is grounded via a current sensing resistor, the switch control circuit is used to generate four control signals for controlling the turn-on and turn-off of the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube, in the process of the second power switch tube changing from the turn-off state to the turn-on state, and during the second power switch tube is in the turn-on state and before the voltage on the current sensing resistor reaches a predetermined set value, the first switch tube and the first power switch tube are in the turn-on state and the second switch tube, the third switch tube, and the fourth switch tube are in the turn-off state, the base current of the second power switch tube is provided by the first current source via the first switch tube and the first power switch tube, after the voltage on the current sensing resistor reaches the predetermined set value during the second power switch tube is in the turn-on state, the first switch tube, the fourth switch tube, and the first power switch tube are in the turn-off state, the second switch tube and the third switch tube are in the turn-on state, and the base current of the second power switch tube is provided by the second current source via the third switch tube.

2. The power converter of claim 1, wherein, during the second power switch tube is in the turn-off state, the first switch tube, the third switch tube, and the first power switch tube are in the turn-off state, and the second switch tube and the fourth switch tube are in the turn-on state.

3. The power converter of claim 1, wherein, the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube are implemented as power switch tubes or field effect transistors.

4. The power converter of claim 1, wherein, Also included is a control chip, the first switch, the second switch, the third switch, and the fourth switch and the switch control circuit are included in the control chip.

5. The power converter of claim 1, wherein, The first power switch and the second power switch are included in the same single base island chip package.

6. The power converter of claim 5, wherein, The single base island chip package has a first current pin, a second current pin, at least one emitter pin, and at least one collector pin.

7. The power converter of claim 4, wherein, The first power switch and the second power switch and the control chip are included in the same chip package.

8. The power converter of claim 7, wherein, The first power switch and the second power switch are packaged in a side-by-side form, and the control chip and the second power switch are packaged in a stacked form.

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