A method and circuit for programming and verifying a memory cell of a flash memory

Abstract

The application discloses a programming verification method and circuit of a storage unit of a Flash memory, and improves the accuracy of programming verification. The method comprises the following steps: judging the state of an oscillator in a charge pump of the Flash memory; if the oscillator is in a closed state, allowing programming verification operation on the currently selected storage unit in the Flash memory; if the oscillator is in an enabled state, prohibiting programming verification operation on the currently selected storage unit in the Flash memory, and then returning to the judging step.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and more particularly to a method and circuit for programming and verifying a storage unit of a Flash memory. Background Art

[0002] After programming a Flash memory cell, a verification operation is required to confirm the correctness of the data. The basic concept of program verification is to convert the current flowing through the memory cell into a voltage. A voltage comparator is then used to read the voltage relative to a reference voltage to verify the correctness of the data.

[0003] The corresponding programming verification system is as follows Figure 1 As shown, it includes: a branch to be tested, a reference branch, an address decoder 3, a voltage comparator 4 and a digital control circuit 5 as the control center of the programming verification system; the branch to be tested and the reference branch share the same charge pump 10; on the branch to be tested, the charge pump 10 is connected to one input end of the voltage comparator 4 via a driver 11, a storage cell array 12, an address switch 13, and a sense amplifier 14; on the reference branch, the charge pump 10 is connected to the other input end of the voltage comparator 4 via another driver 21, a reference cell array 22, another address switch 23, and another sense amplifier 24; the address decoder 3 is connected to two address switches (the storage cells of the Flash memory are arranged in an array, in order to be able to In order to perform read, write, and erase operations on a certain memory cell in the memory cell array 12 / reference cell array 22, the address decoder 3 needs to decode the received address signal on the address switch 13 / address switch 23, thereby selecting the memory cell corresponding to the address signal from the memory cell array 12 / reference cell array 22); in both the test branch and the reference branch, the charge pump 1 provides the programming voltage required for the selected memory cell by driving, so that a current is generated in the selected memory cell, and the current is converted into a voltage by the sense amplifier. The comparator 10 compares the two input voltages, and the comparison result is sent to the digital control circuit 5, which confirms the correctness of the data writing.

[0004] The charge pump 1 internally includes a capacitor, an oscillator, and a voltage regulator. The principle of the charge pump's voltage regulation output is as follows: when the charge pump output voltage (i.e., the capacitor voltage) is lower than a specified voltage, the voltage regulator enables the oscillator, which charges the capacitor and raises the output voltage; and when the charge pump output voltage is higher than the specified voltage, the oscillator is turned off. Ultimately, the charge pump output voltage will stabilize at the specified voltage, but its disadvantage is that the oscillator-enabled stage will cause large ripple in the charge pump output voltage, for example Figure 1 The voltage waveform shown in FIG. 1 is finally stabilized at 6.5V but has large ripple.

[0005] The charge pump output voltage ripple will bring noise to the two sensitive amplifiers, and the impedance of the charge pump output voltage ripple to the memory cell array 12 and the reference cell array 22 can be different, and the impedance difference will affect the comparison accuracy of the voltage comparator 4, and these two factors increase the misjudgment probability of the program verification. SUMMARY

[0006] Therefore, the application provides a memory cell program verification method and circuit of a Flash memory to improve the accuracy of the program verification.

[0007] A memory cell program verification method of a Flash memory, comprising:

[0008] determining the state of an oscillator in a charge pump of the Flash memory;

[0009] if the oscillator is in the closed state, allowing the program verification operation on the currently selected memory cell in the Flash memory;

[0010] if the oscillator is in the enabled state, prohibiting the program verification operation on the currently selected memory cell in the Flash memory, and then returning to the determining step.

[0011] Optionally, the prohibiting the program verification operation on the currently selected memory cell in the Flash memory comprises:

[0012] prohibiting the sampling of the output signal of the voltage comparator, and prohibiting the switching to the next memory cell.

[0013] Another memory cell program verification method of a Flash memory, comprising:

[0014] determining whether the oscillator in the charge pump of the Flash memory is in the enabled state or the closed state;

[0015] if the oscillator is in the closed state, performing the program verification operation on the currently selected memory cell in the Flash memory, and regarding the program verification result as valid;

[0016] if the oscillator is in the enabled state, performing the program verification operation on the currently selected memory cell in the Flash memory, but regarding the program verification result as invalid, and then returning to the determining step.

[0017] Optionally, the regarding the program verification result as invalid comprises:

[0018] regarding the output signal of the voltage comparator as invalid, and prohibiting the switching to the next memory cell.

[0019] Optionally, in any of the above methods for programming and verifying a storage unit of a Flash memory, after determining the state of an oscillator in a charge pump of the Flash memory, the method further includes:

[0020] If the oscillator is at a critical point of switching from an off state to an enabled state, prohibiting a program verification operation on a currently selected memory cell in the Flash memory, and then returning to the determination step;

[0021] If the oscillator is at the critical point of switching from the enabled state to the disabled state, a program verification operation is allowed for the currently selected memory cell in the Flash memory.

[0022] Alternatively, in any of the above methods for programming and verifying a storage unit of a Flash memory, after determining the state of an oscillator in a charge pump of the Flash memory, the method further comprises:

[0023] If the oscillator is at a critical point of switching from an off state to an enabled state, performing a program verification operation on the currently selected memory cell in the Flash memory, but considering the result of this program verification invalid, then returning to the determination step;

[0024] If the oscillator is at a critical point of switching from an enabled state to a disabled state, a program verification operation is performed on a currently selected memory cell in the Flash memory, and the result of this program verification is considered valid.

[0025] A digital control circuit is used to determine the state of an oscillator in a charge pump of a Flash memory; if the oscillator is in an off state, a programming verification operation is allowed for a currently selected storage unit in the Flash memory; if the oscillator is in an enabled state, the programming verification operation is prohibited for the currently selected storage unit in the Flash memory, and then the circuit returns to the determination step.

[0026] Another digital control circuit is used to determine whether an oscillator in a charge pump of a Flash memory is in an enabled state or an off state; if the oscillator is in the off state, a programming verification operation is performed on a currently selected storage cell in the Flash memory, and the result of this programming verification is considered valid; if the oscillator is in the enabled state, a programming verification operation is performed on the currently selected storage cell in the Flash memory, but the result of this programming verification is considered invalid, and then the circuit returns to the determination step.

[0027] Optionally, any of the above-mentioned digital control circuits is also used to, after judging the state of the oscillator in the charge pump of the Flash memory, prohibit the programming verification operation on the currently selected storage unit in the Flash memory if the oscillator is at the critical point of switching from the off state to the enabled state, and then return to the judgment step; if the oscillator is at the critical point of switching from the enabled state to the off state, allow the programming verification operation on the currently selected storage unit in the Flash memory.

[0028] Alternatively, any of the above-mentioned digital control circuits is further used to, after determining the state of an oscillator in a charge pump of the Flash memory, perform a programming verification operation on a currently selected storage cell in the Flash memory if the oscillator is at a critical point of switching from an off state to an enabled state, but consider the result of this programming verification to be invalid, and then return to the determination step; if the oscillator is at a critical point of switching from an enabled state to an off state, perform a programming verification operation on the currently selected storage cell in the Flash memory, and consider the result of this programming verification to be valid.

[0029] It can be seen from the above technical solution that the present invention prohibits programming verification operations during the oscillator enable phase, and performs programming verification operations only after the oscillator is turned off. Although the completion time of the programming verification operation is slightly delayed, misjudgment of programming verification is avoided to a large extent, thereby improving the accuracy of programming verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0031] Figure 1 A schematic diagram of a Flash memory storage unit programming verification system disclosed in the prior art;

[0032] Figure 2 A flowchart of a method for programming and verifying a storage unit of a Flash memory disclosed in an embodiment of the present invention;

[0033] Figure 3 for Figure 1 A signal timing diagram of the memory cell programming verification system shown;

[0034] Figure 4 for Figure 2 A signal timing diagram under the memory cell programming verification method shown;

[0035] Figure 5 This is a flow chart of another method for programming and verifying a storage unit of a Flash memory disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0036] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0037] See also Figure 2 The embodiment of the present invention discloses a method for programming and verifying a storage unit of a Flash memory, comprising:

[0038] Step S01: Determine the state of the oscillator in the charge pump of the Flash memory; if the oscillator is in the off state, proceed to step S02; if the oscillator is in the enabled state, proceed to step S03.

[0039] Step S02: Allow the program verification operation to be performed on the currently selected storage unit in the Flash memory. After the verification is completed, switch to the next storage unit and execute step S01 again, thereby completing the program verification of each storage unit in the Flash memory in turn.

[0040] Step S03: prohibiting the program verification operation on the currently selected storage unit in the Flash memory, and then returning to step S01.

[0041] As described in the "Background Technology" section, prior art requires a program verification operation to confirm the correctness of the data written after writing data to a Flash memory cell, that is, after programming is completed. However, when the oscillator in the charge pump is enabled, the charge pump output voltage ripple is large, which can easily lead to misjudgments during the program verification. However, after the oscillator is turned off, the charge pump output voltage ripple significantly decreases. Based on this, the embodiments of the present invention prohibit the program verification operation during the oscillator-enabled phase and wait until the oscillator is turned off before performing the program verification operation. Although this slightly delays the completion of the program verification operation, it largely avoids misjudgments during the program verification, thereby improving the accuracy of the program verification.

[0042] Optionally, prohibiting the program verification operation on the currently selected memory cell in the Flash memory includes prohibiting the digital control circuit 5 from sampling the output signal of the voltage comparator 4 and prohibiting the two address switches from switching from the current memory cell to the next memory cell (i.e., prohibiting switching to select the next memory cell). Furthermore, prohibiting the program verification operation on the currently selected memory cell in the Flash memory may also include turning off the two sense amplifiers.

[0043] For example, suppose Figure 1 The timing of each signal in the programming verification system is shown as follows Figure 3 As shown, the timing of each signal after improvement according to the embodiment of the present invention is as follows Figure 4 shown.

[0044] The signals are:

[0045] osc_pump: charge pump working clock signal;

[0046] pump_cmp: Flag of the voltage regulator in the charge pump; when pump_cmp is low, the voltage regulator enables the oscillator state, at which time the charge pump output voltage will produce large ripple; when pump_cmp is high, the voltage regulator turns off the oscillator;

[0047] pdsa: enable flag of the sense amplifier 14; when pdsa is low, the sense amplifier 14 works normally;

[0048] rstr: enable flag of the sense amplifier 24; when rstr is low, the sense amplifier 14 works normally;

[0049] sa_out: output signal of voltage comparator 4;

[0050] matchen: falling edge sampling signal; when matchen is a falling edge, the voltage comparator 4 samples the output signal sa_out of the voltage comparator 4;

[0051] address: address signal; Figure 3 Each of the address signals Each corresponds to a memory cell in the memory cell array 12 .

[0052] exist Figure 3 In the timing shown, when the falling edge of the matchen signal corresponds to the low level state of the pump_cmp signal, the programming verification is likely to be misjudged. Figure 4Under the timing shown, the embodiment of the present invention changes the timing of the matchen signal so that the falling edge of the matchen signal and the low level state of the pump_cmp signal are staggered, thereby avoiding the "dangerous zone" where programming verification misjudgment is likely to occur.

[0053] Optional, such as Figure 5 As shown, the embodiment of the present invention further discloses another memory cell programming verification method, including:

[0054] Step S11: Determine the state of the oscillator in the charge pump of the Flash memory; if the oscillator is in the off state, proceed to step S12; if the oscillator is in the enabled state, proceed to step S13.

[0055] Step S12: Perform a program verification operation on the currently selected memory cell in the Flash memory. The program verification result is deemed valid. Program verification for the currently selected memory cell is now complete. The program can then switch to the next memory cell and execute step S01 again, completing program verification for each memory cell in the Flash memory in sequence. Step S12 is essentially the same as step S02.

[0056] Step S13: performing a program verification operation on the currently selected memory cell in the Flash memory, but considering the result of this program verification invalid, and then returning to step S01.

[0057] Figure 5 The scheme shown is Figure 2 The solutions shown belong to the same inventive concept and both avoid the "danger zone" where programming verification misjudgments are likely to occur.

[0058] The treating the verification result as invalid includes: the digital control circuit 5 treating the output signal of the voltage comparator 4 as invalid and prohibiting switching to select the next storage unit.

[0059] Furthermore, considering that at the critical point where the oscillator in the charge pump switches from the off state to the enabled state, if the charge pump output voltage ripple is large, there is also a high risk of misjudgment when performing a programming verification operation at this critical point (i.e., in the aforementioned example, the falling edge of the matchen signal corresponds to the falling edge of the pump_cmp signal). Therefore, based on any of the above-disclosed embodiments, this critical point can also be listed as a "danger zone" where programming verification misjudgments are prone to occur. At this critical point, the programming verification operation is prohibited for the currently selected memory cell in the Flash memory; alternatively, at this critical point, the programming verification operation is performed on the currently selected memory cell in the Flash memory, but the programming verification result is deemed invalid.

[0060] When the oscillator in the charge pump switches from the enabled state to the disabled state at the critical point, it is no longer in the "danger zone" where programming verification misjudgment is prone to occur. The programming verification operation is allowed to be performed on the current storage unit, and the programming verification result is valid.

[0061] Optionally, in any of the above disclosed embodiments, the architecture type of the Flash memory may be the currently mainstream NOR or NAND architecture, without limitation.

[0062] Corresponding to the above-mentioned method embodiment, an embodiment of the present invention further discloses a digital control circuit, which is applied to a storage unit programming verification system of a Flash memory. The digital control circuit is used to determine the state of an oscillator in a charge pump of the Flash memory; if the oscillator is in an off state, a programming verification operation is allowed for the currently selected storage unit in the Flash memory; if the oscillator is in an enabled state, a programming verification operation is prohibited for the currently selected storage unit in the Flash memory, and then the process returns to the step of determining the state of the oscillator in the charge pump of the Flash memory.

[0063] Optionally, in the previous digital control circuit disclosed in the embodiment of the present invention, prohibiting a program verification operation on a currently selected storage cell in the Flash memory includes:

[0064] Sampling of the output signal of the voltage comparator is prohibited, and switching to select the next memory cell is prohibited.

[0065] An embodiment of the present invention also discloses another digital control circuit, which is used to determine whether an oscillator in a charge pump of a Flash memory is in an enabled state or an off state; if the oscillator is in the off state, a programming verification operation is performed on a currently selected storage unit in the Flash memory, and the result of this programming verification is considered valid; if the oscillator is in the enabled state, a programming verification operation is performed on the currently selected storage unit in the Flash memory, but the result of this programming verification is considered invalid, and then the process returns to the step of determining the state of the oscillator in the charge pump of the Flash memory.

[0066] Optionally, in the previous digital control circuit disclosed in the embodiment of the present invention, considering the current programming verification result invalid includes: considering the output signal of the voltage comparator invalid, and prohibiting switching to select the next storage cell.

[0067] Optionally, any of the above-mentioned digital control circuits disclosed in the embodiments of the present invention is also used to, after judging the state of the oscillator in the charge pump of the Flash memory, prohibit the programming verification operation on the currently selected storage unit in the Flash memory if the oscillator is at the critical point of switching from the off state to the enabled state, and then return to the step of judging the state of the oscillator in the charge pump of the Flash memory; if the oscillator is at the critical point of switching from the enabled state to the off state, allow the programming verification operation on the currently selected storage unit in the Flash memory.

[0068] Optionally, any of the above-mentioned digital control circuits disclosed in the embodiments of the present invention is also used to, after judging the state of the oscillator in the charge pump of the Flash memory, perform a programming verification operation on the currently selected storage unit in the Flash memory if the oscillator is at the critical point of switching from the off state to the enabled state, but regard the result of this programming verification as invalid, and then return to the step of judging the state of the oscillator in the charge pump of the Flash memory; if the oscillator is at the critical point of switching from the enabled state to the off state, perform a programming verification operation on the currently selected storage unit in the Flash memory, and regard the result of this programming verification as valid.

[0069] In summary, the present invention prohibits the programming verification operation during the oscillator enable phase and performs the programming verification operation only after the oscillator is turned off. Although the completion time of the programming verification operation is slightly delayed, it largely avoids misjudgment of the programming verification and improves the accuracy of the programming verification.

[0070] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. The digital control circuit disclosed in the embodiments corresponds to the method disclosed in the embodiments, so the description is relatively simple. For relevant parts, refer to the method description.

[0071] The terms "first," "second," and the like in the specification and claims of the present invention and the accompanying drawings are used to distinguish between similar objects and are not necessarily used to describe a specific order or precedence. Furthermore, the terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, product, or apparatus comprising a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, product, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a" does not preclude the presence of additional identical elements in the process, method, product, or apparatus comprising the element.

[0072] The foregoing description of the disclosed embodiments enables a person skilled in the art to make or use the application. Modifications of these embodiments will occur to persons of skill in the art, and, while certain embodiments according to the principles set forth herein are shown and described, it is to be understood that the same are not limiting of the scope of the application as it is set forth in the appended claims, and that various modifications are made within the scope of the appended claims. Therefore, it is contemplated to cover the claims falling within the scope of the claims.

Claims

1. A method for programming and verifying a storage unit of a Flash memory, characterized in that: include: Determine the state of the oscillator in the charge pump of the Flash memory; If the oscillator is in the off state, allowing a programming verification operation to be performed on a currently selected memory cell in the Flash memory, switching to the next memory cell after the verification is completed and executing the step of determining the state of the oscillator in the charge pump of the Flash memory; If the oscillator is in the enabled state, prohibiting the program verification operation on the currently selected storage unit in the Flash memory, and then returning to the step of determining the state of the oscillator in the charge pump of the Flash memory; The program verification operation on the currently selected storage unit in the Flash memory is prohibited, including prohibiting sampling the output signal of the voltage comparator and prohibiting switching to select the next storage unit.

2. The method for programming and verifying a storage unit of a Flash memory according to claim 1, wherein: After determining the state of the oscillator in the charge pump of the Flash memory, the method further includes: If the oscillator is at a critical point of switching from an off state to an enabled state, prohibiting a program verification operation on a currently selected memory cell in the Flash memory, and then returning to the step of determining the state of the oscillator in the charge pump of the Flash memory; If the oscillator is at the critical point of switching from the enabled state to the disabled state, a program verification operation is allowed for the currently selected memory cell in the Flash memory.

3. A digital control circuit, characterized in that: The digital control circuit is used to determine the state of an oscillator in a charge pump of the Flash memory; if the oscillator is in an off state, allowing a programming verification operation to be performed on a currently selected memory cell in the Flash memory, and after the verification is completed, switching to the next memory cell and executing the step of determining the state of the oscillator in the charge pump of the Flash memory; If the oscillator is in the enabled state, a programming verification operation is prohibited on the currently selected storage cell in the Flash memory, and then the process returns to the step of determining the state of the oscillator in the charge pump of the Flash memory; wherein prohibiting the programming verification operation on the currently selected storage cell in the Flash memory includes prohibiting sampling the output signal of the voltage comparator and prohibiting switching to select the next storage cell.

4. The digital control circuit according to claim 3, characterized in that: The digital control circuit is further configured to, after determining the state of an oscillator in a charge pump of the Flash memory, prohibit a programming verification operation on a currently selected storage cell in the Flash memory if the oscillator is at a critical point of switching from an off state to an enabled state, and then return to the step of determining the state of the oscillator in the charge pump of the Flash memory; and allow a programming verification operation on the currently selected storage cell in the Flash memory if the oscillator is at a critical point of switching from an enabled state to an off state.

5. A method for programming and verifying a storage unit of a Flash memory, characterized in that: include: Determine whether the oscillator in the charge pump of the Flash memory is enabled or disabled; If the oscillator is in the off state, performing a program verification operation on the currently selected memory cell in the Flash memory, and considering the result of this program verification to be valid, switching to the next memory cell after the verification is completed and performing the step of determining whether the oscillator in the charge pump of the Flash memory is in the enabled state or the off state; If the oscillator is in the enabled state, performing a program verification operation on the currently selected memory cell in the Flash memory, but considering the result of this program verification invalid, then returning to the step of determining whether the oscillator in the charge pump of the Flash memory is in the enabled state or the disabled state; The present programming verification result is deemed invalid, including: the output signal of the voltage comparator is deemed invalid, and switching to selecting the next memory cell is prohibited.

6. The method for programming and verifying a storage unit of a Flash memory according to claim 5, wherein: After determining whether the oscillator in the charge pump of the Flash memory is in an enabled state or a disabled state, the method further includes: If the oscillator is at a critical point of switching from an off state to an enabled state, performing a program verification operation on a currently selected memory cell in the Flash memory, but considering the result of this program verification invalid, then returning to the step of determining whether the oscillator in the charge pump of the Flash memory is in the enabled state or the off state; If the oscillator is at a critical point of switching from an enabled state to a disabled state, a program verification operation is performed on a currently selected memory cell in the Flash memory, and the result of this program verification is considered valid.

7. A digital control circuit, characterized in that: include: The digital control circuit is used to determine whether an oscillator in a charge pump of the Flash memory is in an enabled state or a disabled state; if the oscillator is in the disabled state, a program verification operation is performed on a currently selected memory cell in the Flash memory, and after the verification is completed, the program verification operation is considered valid. The next memory cell is switched to perform the step of determining whether the oscillator in the charge pump of the Flash memory is in an enabled state or a disabled state. If the oscillator is in the enabled state, a programming verification operation is performed on the currently selected storage cell in the Flash memory, but the result of this programming verification is deemed invalid, and then the process returns to the step of determining whether the oscillator in the charge pump of the Flash memory is in the enabled state or the disabled state; wherein, considering the result of this programming verification to be invalid includes: considering the output signal of the voltage comparator to be invalid, and prohibiting switching to select the next storage cell.

8. The digital control circuit according to claim 7, characterized in that: The digital control circuit is further configured to, after determining whether the oscillator in the charge pump of the Flash memory is in an enabled state or an off state, perform a programming verification operation on the currently selected storage unit in the Flash memory if the oscillator is at a critical point of switching from the off state to the enabled state, but consider the result of this programming verification to be invalid, and then return to the step of determining whether the oscillator in the charge pump of the Flash memory is in an enabled state or an off state; if the oscillator is at a critical point of switching from the enabled state to the off state, perform a programming verification operation on the currently selected storage unit in the Flash memory, and consider the result of this programming verification to be valid.

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