Power converter and method for adjusting its frequency response parameters

Abstract

Power converter and method for adjusting its frequency response parameters. The present invention discloses a power converter, comprising a conversion circuit, an external feedback circuit and a controller. The controller includes an internal feedback compensation circuit, and the internal feedback compensation circuit includes an error amplifier. The power converter forms a loop transfer function through the conversion transfer function of the conversion circuit, the external feedback circuit and the internal feedback compensation circuit. The controller obtains the required voltage of the load demand through the output terminal, and adjusts the amplification gain of the error amplifier based on adjusting the output voltage to the required voltage, so as to limit the bandwidth of the power converter to be less than the frequency threshold related to the non-dominant pole of the discontinuous conduction mode or the right half-plane zero of the continuous conduction mode.

Description

Technical Field

[0001] The present invention relates to a power converter and a method for adjusting its frequency response parameters, and more particularly to a power converter with adaptive frequency response parameter adjustment and an adaptive frequency response parameter adjustment method therefor. Background Art

[0002] In the current technical field of switched-mode power converters, the technology for compensating frequency response is crucial. Generally, its purpose is to keep the switched-mode power converter in a stable operating state, and when the switched-mode power converter is in a transient state where the load changes instantaneously, the switched-mode power converter can respond quickly based on the instantaneous change of the load to achieve the effect of quickly reacting and stabilizing. Therefore, if the parameters of the compensation circuit (capacitor, resistor) are not good, resulting in poor frequency response, the switched-mode power converter may not operate stably, and in the transient state where the load changes instantaneously, it cannot respond quickly and stabilize, directly leading to the situation where the switched-mode power converter loses control and fails.

[0003] Please refer to Figure 1A and 1B which are the conversion transfer function diagrams of the existing switched-mode power converter in continuous conduction mode and discontinuous conduction mode respectively. Figure 1A and 1B The conversion transfer function Cf shown mainly is a third-order conversion transfer function Cf formed without compensation by the switched-mode power converter through the compensation circuit. The third-order conversion transfer function Cf includes a main pole P1 that causes the curve to turn downward and a first zero Z1 that causes the curve to turn upward.

[0004] As Figure 1A shown, when the switched-mode power converter operates in continuous conduction mode, the V o / V comp conversion transfer function Cf has a right half-plane zero Z_RHP.

[0005]

[0006] As Figure 1B shown, when the switched-mode power converter operates in discontinuous conduction mode, the V o / V comp conversion transfer function Cf has a non-main pole P_DCM.

[0007]

[0008] When the load of the switched-mode power converter changes, Figure 1A and 1BThe conversion transfer function Cf will change in response to load variations (as indicated by the dashed arrows). When the load gradually increases (as indicated by the solid arrow), the right half-plane zero Z_RHP of the continuous conduction mode and the non-dominant pole P_DCM frequency of the discontinuous conduction mode will gradually decrease (shift to the left), and the operating frequency bandwidth of the power converter needs to be correspondingly reduced. When the load gradually decreases (as indicated by the dashed arrow), the right half-plane zero Z_RHP and the non-dominant pole P_DCM frequency will gradually increase (shift to the right), and the operating frequency bandwidth of the power converter can be correspondingly increased.

[0009] Currently, all new-generation power converters need to comply with the USB Power Delivery (USB PD) standard. Therefore, the output voltage of the power converter may need to vary in the range of 3V to 36V, with a change amplitude of up to 12 times. As Figure 1A , 1B shown, when the output voltage is adjustable and the change amplitude is up to 12 times, the conversion transfer function Cf will also change drastically with different output voltages.

[0010] Therefore, if a compensation circuit is designed with discrete components such as resistors and capacitors with fixed parameter values outside the IC, thereby affecting the operating frequency bandwidth of the power converter, generally only the heavy load conditions can be targeted to determine the frequency bandwidth range of the power converter after compensation. This seriously sacrifices the bandwidth of the power converter under light load conditions and greatly reduces the frequency response performance of the power converter under light load conditions.

[0011] When the above-mentioned load and output voltage change significantly, it is easy to result in poor frequency response due to the fixed parameters of the compensation circuit. Moreover, due to the many turning points of the third-order conversion transfer function Cf, it is even more difficult to design a compensation circuit for the third-order conversion transfer function Cf when the compensation parameters are fixed and cannot be adjusted.

[0012] Therefore, how to design a power converter with an adaptive frequency response parameter adjustment and its adaptive frequency response parameter adjustment method to adaptively adjust the frequency response parameters is a major research topic for the inventors of this case. Summary of the Invention

[0013] To solve the above problems, the present invention provides a power converter with adaptive frequency response parameter adjustment to overcome the problems of the prior art. Therefore, the power converter of the present invention includes a conversion circuit, an external feedback circuit, and a controller. The conversion circuit converts an input voltage into an output voltage and provides the output voltage to a load through an output terminal. When the conversion circuit is operated in a continuous conduction mode, the conversion transfer function of the conversion circuit has a right half-plane zero. When the conversion circuit is operated in a discontinuous conduction mode, the conversion transfer function has a non-dominant pole. The external feedback circuit is coupled to the output terminal. The controller includes an internal feedback compensation circuit. The internal feedback compensation circuit includes an error amplifier, and the error amplifier is coupled to the external feedback circuit. The controller obtains the required voltage demanded by the load through the output terminal and adjusts the output voltage to the required voltage by adjusting the reference voltage received by the error amplifier. The external feedback circuit and the internal feedback compensation circuit have a compensation transfer function. Among them, the conversion transfer function and the compensation transfer function act together to form a loop transfer function. The controller adjusts the amplification gain of the error amplifier based on the output voltage, and further adjusts the bandwidth of the loop transfer function. Among them, when the conversion circuit is operated in a continuous conduction mode, the controller limits the bandwidth to be less than a first frequency threshold related to the right half-plane zero. Among them, when the conversion circuit is operated in a discontinuous conduction mode, the controller limits the bandwidth to be less than a second frequency threshold related to the non-dominant pole.

[0014] To solve the above problems, the present invention provides a method for adjusting the adaptive frequency response parameters of a power converter to overcome the problems of the prior art. Therefore, the power converter of the present invention includes a conversion circuit, an external feedback circuit, and an internal feedback compensation circuit. When the conversion circuit is operated in a continuous conduction mode, the conversion transfer function of the conversion circuit has a right half-plane zero. When the conversion circuit is operated in a discontinuous conduction mode, the conversion transfer function of the conversion circuit has a non-dominant pole. The conversion transfer function forms a loop transfer function through the external feedback circuit and the internal feedback compensation circuit, and the internal feedback compensation circuit includes an error amplifier. The adaptive bandwidth adjustment method includes the following steps: (a) Controlling the conversion circuit to convert the input voltage into an output voltage and providing the output voltage to the load. (b) Obtaining the required voltage demanded by the load through the output terminal. (c) Adjusting the output voltage to the required voltage by adjusting the reference voltage received by the error amplifier. (d) Adjusting the amplification gain of the error amplifier based on the required voltage, and further adjusting the bandwidth of the loop transfer function. (e) When the conversion circuit is operated in a continuous conduction mode, limiting the bandwidth to be less than a first frequency threshold related to the right half-plane zero. (f) When the conversion circuit is operated in a continuous conduction mode, limiting the bandwidth to be less than a second frequency threshold related to the non-dominant pole.

[0015] The main objective and efficacy of the present invention is that when the output voltage is to be adjusted to the required voltage, the controller can adjust the gain of the error amplifier through a handshaking signal, and adaptively adjust the parameters of the frequency response to achieve the effect of maintaining the bandwidth less than the frequency threshold.

[0016] To further understand the technologies, means and efficacy adopted by the present invention to achieve the predetermined objective, please refer to the following detailed description and drawings of the present invention. It is believed that the objectives, features and characteristics of the present invention can be deeply and specifically understood therefrom. However, the attached drawings are only for reference and illustration, and are not used to limit the present invention. Brief Description of the Drawings

[0017] Figure 1A It is a conversion transfer function diagram of an existing switched-mode power converter in continuous conduction mode;

[0018] Figure 1B It is a conversion transfer function diagram of an existing switched-mode power converter in discontinuous conduction mode;

[0019] Figure 2 It is a circuit block diagram of a power converter with adaptive frequency response parameter adjustment according to the present invention;

[0020] Figure 3A It is a loop transfer function diagram of the power converter according to the present invention operating in continuous conduction mode;

[0021] Figure 3B It is a loop transfer function diagram of the power converter according to the present invention operating in discontinuous conduction mode;

[0022] Figure 4A It is a detailed circuit block diagram of the voltage-current adjustment circuit and the error amplifier according to the present invention;

[0023] Figure 4B It is a detailed circuit block diagram of the first embodiment of the voltage-current adjustment circuit according to the present invention;

[0024] Figure 4C It is a detailed circuit block diagram of the second embodiment of the voltage-current adjustment circuit according to the present invention;

[0025] Figure 5 It is a flowchart of the method for adjusting the adaptive frequency response parameters of the power converter according to the present invention;

[0026] Figure 6A It is a schematic diagram of the bandwidth curve of the method for adjusting the adaptive frequency response parameters according to the present invention under heavy load conditions; and

[0027] Figure 6B It is a schematic diagram of the bandwidth curve of the method for adjusting the adaptive frequency response parameters according to the present invention under light load conditions.

[0028] Among them, reference numerals:

[0029] 100…Power converter

[0030] 100A…Output terminal

[0031] 1…Conversion circuit

[0032] 2…External feedback circuit

[0033] 22…Voltage division circuit

[0034] R A …First resistor

[0035] R B …Second resistor

[0036] R C …Resistor

[0037] CTR…Optocoupler

[0038] 3…Controller

[0039] 32…Internal feedback compensation circuit

[0040] EA…Error amplifier

[0041] IN 1 …Input terminal

[0042] IN 2 …Reference terminal

[0043] OUT…Output terminal

[0044] 324, 324’…Voltage and current adjustment circuit

[0045] 324-1…Voltage regulator

[0046] 324-2…Constant current source circuit

[0047] 324-3…Current source control circuit

[0048] 3A, 3B, 3C…Current source circuit

[0049] 326…Compensation circuit

[0050] R COMP …Compensation resistor

[0051] C COMP …Compensation capacitor

[0052] 328…Transistor

[0053] 200…Load

[0054] Vin … Input voltage

[0055] V O … Output voltage

[0056] VCOMP… Voltage

[0057] I OPTO … Current

[0058] I C … Reference current

[0059] I BIAS … Bias current

[0060] I1… Reference current

[0061] I2~I4… Current source

[0062] S h … Handshake signal

[0063] S C … Control signal

[0064] PWM… Pulse width modulation signal

[0065] V REF … Reference voltage

[0066] V FB … Feedback voltage

[0067] Cf… Transfer function

[0068] Clf… Loop transfer function

[0069] P_DCM… Non-dominant pole

[0070] Z_RHP… Right half-plane zero

[0071] P1… Dominant pole

[0072] Z1… First zero

[0073] BW… Bandwidth

[0074] gm… Amplification gain

[0075] C BW1 、C BW2 、C BW3 … Bandwidth curve Detailed implementation manners

[0076] Regarding the technical content and detailed description of the present invention, it is described below in conjunction with the drawings:

[0077] Please refer to Figure 2This is a circuit block diagram of a power converter with adaptive frequency response parameter adjustment. Please refer to Figure 1 for details. The power converter 100 mainly converts the input voltage V in to the output voltage V O , and provides the output voltage V O to the load 200 through the output terminal 100A. Among them, the power converter 100 complies with the USB Power Delivery (USB PD) standard specification and can be coupled to the load 200 through a USB interface to perform handshake communication with the load 200. The load 200 can first learn about the voltage that the power converter 100 can supply (for example, it can vary from 3V to 22V) through the handshake signal S h . The load 200 can then notify the power converter 100 of the required demand voltage through the handshake signal S h . Then, the power converter 100 adjusts the output voltage V O to the demand voltage to provide the power required for the operation of the load 200. However, the power converter 100 can also learn about the demand voltage required by the load 200 through other existing methods (such as but not limited to detection, external circuit notification, etc.).

[0078] The power converter 100 includes a conversion circuit 1, an external feedback circuit 2, and a controller 3. The conversion circuit 1 can be an isolated conversion circuit (such as but not limited to a forward or flyback conversion circuit, etc.). The controller 3 can be, for example but not limited to, a digital signal processor (DSP), a microcontroller (MCU), etc., which are arithmetic processing devices that can change the arithmetic content using internal software / hardware. The conversion circuit 1 receives the input voltage V in , and converts the input voltage V in to the output voltage V O . The external feedback circuit 2 is coupled to the output terminal 100A and preferably can include a voltage dividing circuit 22, a resistor R C , and an optocoupler CTR. The controller 3 includes an internal feedback compensation circuit 32. The internal feedback compensation circuit 32 includes an error amplifier EA and a voltage-current adjustment circuit 324, and preferably can also include a compensation circuit 326 and a transistor 328. Among them, the output terminal 100A can include a power supply terminal and a communication terminal. The power supply terminal is coupled to the conversion circuit 1 to receive / provide the output voltage V O to the load 200, and the communication terminal (such as a USB interface) is coupled to the controller 3 to receive / provide the handshake signal S h to communicate with the load 200. Among them, Figure 2 The circuit structure and coupling relationship of the external feedback circuit 2 shown are only one of the coupling methods using resistors, capacitors, and optocouplers for feedback, and are not limited thereto. In addition, the handshake signal S hIn addition to being provided to the voltage and current adjustment circuit 324, it can also communicate with other modules of the controller 3, which is represented by a dotted line here.

[0079] The voltage dividing circuit 22 preferably may include a first resistor R connected in series A and a second resistor R B , one end of the first resistor R A is coupled to the power supply terminal of the output terminal 100A, and the other end of the first resistor R A is coupled to one end of the second resistor R B , and the voltage dividing node between the first resistor R A and the second resistor R B is coupled to the error amplifier EA. One end of the resistor R C is coupled to one end of the first resistor R A and the output terminal 100A, and the other end of the resistor R C is coupled to the optocoupler CTR. The optocoupler CTR includes a light emitting end and a light receiving end, the light emitting end is coupled to the resistor R C , and the light receiving end is coupled to the feedback circuit 32 input terminal of the primary side control circuit (for example: PWM controller).

[0080] The error amplifier EA includes an input terminal IN 1 , a reference terminal IN 2 and an output terminal OUT. The input terminal IN 1 is coupled to the voltage dividing node between the first resistor R A and the second resistor R B . One end of the voltage and current adjustment circuit 324 is coupled to the reference terminal IN 2 of the error amplifier EA to provide a reference voltage V REF , and the other end is coupled to the communication terminal of the output terminal 100A to receive the handshake signal S h . The output terminal OUT of the error amplifier EA is coupled to the compensation circuit 326 and the transistor 328. The compensation circuit 326 includes a compensation resistor R COMP and a compensation capacitor C COMP . One end of the compensation resistor R COMP is coupled to the output terminal OUT of the error amplifier EA and the transistor 328, and the other end of the compensation resistor R COMP is coupled to the compensation capacitor C COMP . The transistor 328 includes a first end, a second end and a control end. The first end is coupled to the light receiving end of the optocoupler CTR, and the control end of the transistor 328 is coupled to the output terminal OUT of the error amplifier EA and one end of the compensation resistor R COMP .

[0081] The controller 3 is based on the handshake signal S communicated with the load 200 hThe required voltage of the load 200 is obtained, and the reference voltage V received by the error amplifier EA is adjusted by the voltage-current adjustment circuit 324 REF and the primary-side pulse-width modulation signal PWM of the power converter 100 is adjusted to adjust the output voltage V by adjusting the pulse-width modulation signal PWM O to the required voltage. Specifically, the voltage-dividing circuit 22 is based on the output voltage V O , and a feedback voltage V is generated at the voltage-dividing node between the first resistor R A and the second resistor R B . The controller 3 compares the feedback voltage V FB with the reference voltage V FB through the error amplifier EA and provides a control signal S at the output terminal OUT of the error amplifier EA REF . Among them, the voltage-current adjustment circuit 324 obtains the required voltage of the load 200 based on the handshake signal S C to adjust the magnitude of the reference voltage V h accordingly. REF

[0082] The control signal S C is used to control the channel size of the transistor 328 to adjust the magnitude of the current I that can flow through the optocoupler CTR and the transistor 328 OPTO . In this way, the current I OPTO can adjust the magnitude of the voltage VCOMP through the coupling of the light-receiving end and the light-receiving end of the optocoupler CTR to adjust the pulse-width modulation signal PWM, and further adjust the output voltage V by adjusting the pulse-width modulation signal PWM O to the required voltage. Among them, the power converter 100 has the function of hybrid-mode control, and the controller 3 can operate the power converter 100 (including: the conversion circuit 1, the external feedback circuit 2, and the internal feedback compensation circuit 32) in the continuous conduction mode CCM or the discontinuous conduction mode DCM, and has different loop transfer functions Clf in these two modes (which will be further described later), and the loop transfer functions Clf in these two modes will also change under light-load and heavy-load conditions, as well as the adjustment of the output voltage V O (based on the USB PD function). Therefore, how to adaptively adjust the parameters of the frequency response by using the error amplifier EA to maintain the bandwidth less than the frequency threshold will be further described later.

[0083] Please refer to Figure 3A the loop transfer function diagram of the power converter of the present invention operating in the continuous conduction mode, Figure 3B the loop transfer function diagram of the power converter of the present invention operating in the discontinuous conduction mode, and also refer to Figures 1A - 2 . In Figure 1A and1B The presented conversion transfer function Cf, a third-order conversion transfer function Cf formed by specific parameters of the switching power converter (conversion circuit 1), is mainly from the voltage VCOMP point to the output voltage V O The derived response.

[0084] And for the power converter 100 of the present invention, the external feedback circuit 2 and the internal feedback compensation circuit 32 provide a feedback compensation path from the output voltage V O fed back to the voltage VCOMP point. The compensation transfer function derived from the relevant path is as follows. It will be described in the following paragraphs that this compensation transfer function has: a pole P0 at the origin, a second zero Z2, and a second pole P2:

[0085]

[0086] Through the external feedback circuit 2 and the internal feedback compensation circuit 32, the compensation transfer function is introduced to provide poles and zeros to eliminate Figure 1A and 1B the zeros and poles of the third-order conversion transfer function Cf of. Specifically, in the CCM mode, the conversion transfer function Cf of the conversion circuit 1 has a right-half plane zero Z_RHP ( Figure 1A ), and in the DCM mode, the conversion transfer function Cf of the conversion circuit 1 has a non-dominant pole P_DCM ( Figure 1B ). In addition, the transfer function Cf of both includes a dominant pole P1 and a first zero Z1. To eliminate the dominant pole P1 and the first zero Z1. The compensation transfer function is used to provide: a pole P0 formed at the origin, a second pole P2, and a second zero Z2, so as to respectively compensate the first zero Z1 and the dominant pole P1 through the pole-zero cancellation of the second pole P2 and the second zero Z2.

[0087] Therefore, as Figure 3A and 3B shown, the loop transfer function Clf formed by the combined action of the conversion transfer function Cf and the compensation transfer function will become a single-pole transfer function. When operating in the CCM mode or the DCM mode, and the loop transfer function Clf after pole-zero compensation will show a curve that drops from the origin by -20 dB to the right-half plane zero Z_RHP ( Figure 3A ) or drops from the origin by -20 dB to the non-dominant pole P_DCM ( Figure 3B ) ( Figure 1A , 1BThe origin is the horizontal line of 0 dB). When the controller operates the conversion circuit 1 in the CCM mode, it will form Figure 3A , a loop transfer function Clf with a right half-plane zero Z_RHP. Conversely, when the controller operates the conversion circuit 1 in the DCM mode, it will form Figure 3B , a loop transfer function Clf with a non-dominant pole P_DCM. Among them, the specific frequency range can refer to the frequency range below the frequency of the pulse-width modulation signal PWM (i.e., the switching frequency).

[0088] Specifically, in Figure 1A , the break frequencies when operating in the CCM mode are shown in the following equations 1 to 3:

[0089]

[0090]

[0091]

[0092] Among them, ω represents the frequency, equations 1 to 2 represent the dominant pole P1 and the first zero Z1 respectively, and the point represented by ω in equation 3 z2 is the right half-plane zero Z_RHP. In Figure 1B , the break frequencies when operating in the DCM mode are shown in the following equations 4 to 6:

[0093]

[0094]

[0095]

[0096] Among them, ω in equations 4 and 6 p1 、ω z1 represent the dominant pole P1 and the first zero Z1 respectively, and the point represented by ω in equation 5 p2 is the non-dominant pole P_DCM. To eliminate the dominant pole P1 and the first zero Z1 (i.e., equations 1 to 2, 4, 6), an external feedback circuit 2 and an internal feedback compensation circuit 32 are specially used to form a second pole, a second zero, and a pole at the origin, as shown in the following equations 7 to 9:

[0097]

[0098]

[0099]

[0100] Among them, the point represented by ω in equation 7 p is the pole at the origin, and ω in equations 8 to 9z and ω p_COMP respectively represent the second zero and the second pole. Therefore, through the second zero and the second pole of Equations 8-9, the main pole P1 (Equation 1) and the first zero Z1 (Equation 2) of Figure 1A can be eliminated respectively to form a loop transfer function Clf as shown in Figure 3A . In addition, through the second zero and the second pole of Equations 8-9, the main pole P1 (Equation 4) and the first zero Z1 (Equation 6) of Figure 1B can be eliminated respectively to form a loop transfer function Clf as shown in Figure 3B . It is worth mentioning that in an embodiment of the present invention, the parameters not detailedly explained in the above formulas are well-known parameters to those skilled in the art, and are only used to explain the cancellation of poles and zeros, and are not the main features of the present invention, so they will not be elaborated here.

[0101] Among them, in the practice of converter design, the bandwidth BW of the overall power converter 100 must be considered. And since when the frequency exceeds the non-dominant pole P_DCM or the right-half plane zero Z_RHP, the entire system will become unstable and the converter is likely to fail accidentally during operation. Therefore, the bandwidth BW of the overall power converter 100 must be designed (limited) to be less than the first frequency threshold related to the right-half plane zero Z_RHP (i.e., having a proportional relationship) or less than the second frequency threshold related to the non-dominant pole P_DCM (i.e., having a proportional relationship).

[0102] This first frequency threshold can be designed to be between 1 / 10 and 1 / 2 of the right-half plane zero Z_RHP frequency, preferably between 1 / 5 and 1 / 2, to improve loop stability. For example: when the right-half plane zero Z_RHP is at 20KHz, if the higher value 1 / 2 of the first frequency threshold is selected, the bandwidth BW of the overall power converter 100 must be designed to be less than 1 / 2 of 20KHz, that is, 10KHz; if the lower value 1 / 10 of the first frequency threshold is selected, the bandwidth BW must be designed to be less than 1 / 10 of 20KHz, that is, 2KHz.

[0103] Similarly, this second frequency threshold can be designed to be between 1 / 10 and 1 / 2 of the non-dominant pole P_DCM frequency, preferably between 1 / 5 and 1 / 2, to improve loop stability. For example: when the non-dominant pole P_DCM is at 10KHz, if the higher value 1 / 2 of the second frequency threshold is selected, the bandwidth BW of the overall power converter 100 must be designed to be less than 1 / 2 of 10KHz, that is, 5KHz; if the lower value 1 / 10 of the second frequency threshold is selected, the bandwidth BW must be designed to be less than 1 / 10 of 10KHz, that is, 1KHz.

[0104] Although the bandwidth BW can be designed by the resistors and capacitors of the external feedback circuit 2, these parameters are difficult to modify for different conditions. Therefore, it is necessary to use the internal feedback compensation circuit 32 to adaptively adjust the frequency response parameters by detecting / receiving signals under different operating conditions while maintaining the bandwidth BW less than the first or second frequency threshold.

[0105] Please refer to Figure 4A FIG. 2 to 3B are detailed circuit block diagrams of the voltage-current adjustment circuit and the error amplifier of the present invention. In this embodiment, the internal structure of the error amplifier EA is shown, including a current mirror and a differential amplifier, and including the input terminal IN of the input / output 1 , reference terminal IN 2 and output terminal OUT. The voltage-current adjustment circuit 324 is coupled to the reference terminal IN of the error amplifier EA 2 and receives the handshake signal S h . The voltage-current adjustment circuit 324 obtains the required voltage demanded by the load 200 based on the handshake signal S h and adjusts the magnitude of the reference voltage V REF accordingly. Since the adjustment of the reference voltage V REF will cause the pulse width modulation signal PWM and the output voltage V O to be adjusted accordingly, resulting in a change in the loop transfer function Clf, the voltage-current adjustment circuit 324 also adjusts the reference current I h based on the handshake signal S C so that the voltage-current adjustment circuit 324 changes the bias current I C based on the adjustment of the reference current I BIAS . Therefore, the controller 3 can adjust the bias current I O of the error amplifier EA based on the output voltage V BIAS being adjusted to the required voltage, and further adjust the amplification gain gm of the error amplifier EA by adjusting the bias current I BIAS of the error amplifier EA to limit the bandwidth BW of the power converter 100 to be less than the first or second frequency threshold.

[0106] Specifically, the amplification gain gm of the error amplifier EA can be obtained by Equation 10 below, and the bandwidth BW can be obtained by Equation 11 below:

[0107]

[0108]

[0109] It can be known from the above Equation 10 that the amplification gain gm of the error amplifier EA is related to the bias current I BIAS of the error amplifier EA. If the bias current I BIASchanges, the amplification gain gm of the error amplifier EA will change accordingly, and the amplification gain gm is positively correlated with the bias current I BIAS is positively correlated. On the other hand, it can be known from the above formula 11 that the bandwidth BW will change due to the influence of the amplification gain gm of the error amplifier EA. Therefore, if the input voltage V O or the operating mode (CCM, DCM) changes, and the amplification gain gm still maintains the original value, the bandwidth BW will be affected and cannot be maintained below the frequency threshold. Conversely, if the bias current I BIAS can be adaptively adjusted according to the operating conditions of the power converter 100, then the bandwidth BW of the power converter 100 can be maintained below the first or second frequency threshold. The advantage is that regardless of the operating conditions of the power converter 100, the power converter 100 has better transient response and improves the stability of the overall loop. It is worth mentioning that in an embodiment of the present invention, Figure 4A the internal structure of the error amplifier EA only shows one of many types of error amplifiers EA, and is not limited thereto. Any operational amplifier internal structure that can be used as the error amplifier EA can be included in the scope of this embodiment.

[0110] Please refer to Figure 4B FIG. is a detailed circuit block diagram of the first embodiment of the voltage-current adjustment circuit of the present invention. Please also refer to FIGS. 2 to 4A. The voltage-current adjustment circuit 324 includes a voltage regulator 324-1 and a constant current source circuit 324-2. The voltage regulator 324-1 is coupled to the communication terminal and the reference terminal IN 2 , and the constant current source circuit 324-2 is coupled to the voltage regulator 324-1 and the error amplifier EA. The voltage regulator 324-1 receives the handshake signal S h through the communication terminal to adjust the reference voltage V h based on the handshake signal S REF . The constant current source circuit 324-2 is composed of a voltage follower and a current mirror. The voltage follower is coupled to the voltage regulator 324-1 and one side of the current mirror, and the other side of the current mirror is coupled to the error amplifier EA. The current mirror generates a current source representing the reference current I REF on the other side based on the reference voltage V C . The constant current source circuit 324-2 generates a voltage change at the output terminal of the voltage follower based on the change of the reference voltage V REF , so that the current mirror adjusts the magnitude of the reference current I C on the other side based on this voltage change. Due to the change of the reference current I C , the bias current I BIAS changes accordingly to adjust the amplification gain gm of the error amplifier EA.

[0111] Please refer toFigure 4C This is the detailed circuit block diagram of the second embodiment of the voltage and current adjustment circuit of the present invention. Please also refer to FIGS. 2 to 4B. Figure 4C The voltage and current adjustment circuit 324' and Figure 4B The difference between the voltage and current adjustment circuit 324 is that the voltage and current adjustment circuit 324' includes a reference current source I1 and a current source control circuit 324-3. The current source control circuit 324-3 includes a plurality of current source circuits 3A, 3B, 3C (the quantity is only for illustration), and the current source circuits 3A, 3B, 3C respectively include a series-connected switch SW and current sources I2 to I4. The reference current source I1 is coupled to the error amplifier EA. The current source circuits 3A, 3B, 3C are connected in parallel with the reference current source I1, and the control end of the switch SW is coupled to the communication end to receive the handshake signal S h . The current source control circuit 324-3 is based on the handshake signal S h Selectively controls the switches SW of the current source circuits 3A, 3B, 3C to conduct or turn off to control whether the reference current source I1 and the current sources I2 to I4 are connected in parallel, so as to generate and adjust the reference current I by the number of parallel-connected current sources I1 to I4 C .

[0112] Please refer to Figure 5 This is the flow chart of the adaptive frequency response parameter adjustment method of the power converter of the present invention. Please also refer to FIGS. 2 to 4C. The adaptive bandwidth frequency response parameter adjustment method is mainly applied to the power converter 100 with USB power transmission function, and adaptively adjusts the frequency response parameters of the power converter 100 based on the adjustment of the output voltage V O . The adjustment is made to maintain the bandwidth BW of the power converter 100 less than the first or second frequency threshold, so that the power converter 100 has a better transient response and improves the stability of the overall loop. Therefore, the adaptive frequency response parameter adjustment method of the power converter includes obtaining the required voltage of the load demand through the output end (S100). Then, determining whether to adjust the output voltage (S200). In a preferred embodiment, the controller 3 obtains the required voltage of the load 200 based on the handshake signal S h communicated with the load 200, and determines whether to adjust the output voltage V based on whether there is a difference between the current voltage value of the output voltage V O and the required voltage of the load demand O . When there is no need to adjust the output voltage V O , return to step (S200).

[0113] On the contrary, when it is necessary to adjust the output voltage V O , then adjust the reference voltage and the amplification gain of the error amplifier based on the adjustment of the output voltage (S300). In a preferred embodiment, the voltage and current adjustment circuit 324 is used to adjust based on the handshake signal S hThe required voltage of the load 200 is obtained, and the reference voltage V is adjusted accordingly. REF and the bias current I BIAS are adjusted, and then the amplification gain gm of the error amplifier EA is adjusted. Among them, the voltage-current adjustment circuit 324 mainly adjusts the reference current I h based on the handshake signal S C , so that the voltage-current adjustment circuit 324 changes the bias current I C according to the adjustment of the reference current I BIAS . In this way, the amplification gain gm of the error amplifier EA can be changed by adjusting the bias current I BIAS , so that when the output voltage V O of the power converter 100 is adjusted, the bandwidth BW can still be limited to be less than the first or second frequency threshold.

[0114] Please refer to Figure 6A the schematic diagram of the bandwidth curve of the adaptive frequency response parameter adjustment method of the present invention under heavy load conditions, Figure 6B the schematic diagram of the bandwidth curve of the adaptive frequency response parameter adjustment method of the present invention under light load conditions, and also refer to FIGS. 2-5 for reference. C BW1 is the ideal bandwidth curve, C BW2 is the bandwidth curve that can adaptively adjust the frequency response parameters of the present invention, C BW3 is the bandwidth curve that cannot adjust the frequency response parameters. Among them, the C BW3 curve usually appears in the situation where physical components such as resistors and capacitors are used in the feedback compensation circuit to perform feedback compensation on the power converter 100. It is usually external compensation, and the values of the components are fixed and cannot be adjusted. As Figure 6A shown, since the C BW2 curve of the present invention can adaptively adjust the frequency response parameters, the C BW2 curve can be adjusted closer to the C O curve according to the magnitude of the output voltage V BW1 , and it is not the C BW3 curve with a generally fixed slope (because the values of the components are fixed). Therefore, it can have better transient response and improve the stability of the overall loop. Figure 6B For the curves C BW1 , C BW2 , C BW3 the same is true, and details are not described herein again.

[0115] However, as described above, it is only a detailed description and illustration of the preferred specific embodiments of the present invention. However, the features of the present invention are not limited thereto and are not intended to limit the present invention. The entire scope of the present invention shall be subject to the following patent application scope. All embodiments that conform to the spirit of the patent application scope of the present invention and its similar variations shall be included within the scope of the present invention. Any changes or modifications that can be easily conceived by those skilled in the art within the field of the present invention can be covered by the patent scope of this case below.

Claims

1. A power converter, characterized in that, comprising: a conversion circuit that converts an input voltage into an output voltage and provides the output voltage to a load through an output terminal. When the conversion circuit is operated in a continuous conduction mode, a conversion transfer function of the conversion circuit has a right half-plane zero. When the conversion circuit is operated in a discontinuous conduction mode, the conversion transfer function has a non-dominant pole; an external feedback circuit coupled to the output terminal; and a controller including an internal feedback compensation circuit. The internal feedback compensation circuit includes an error amplifier, and the error amplifier is coupled to the external feedback circuit. The controller obtains a required voltage of the load demand through the output terminal and adjusts the output voltage to the required voltage by adjusting a reference voltage received by the error amplifier. The external feedback circuit and the internal feedback compensation circuit have a compensation transfer function; wherein, the conversion transfer function and the compensation transfer function act together to form a loop transfer function, and the controller adjusts an amplification gain of the error amplifier based on the output voltage, thereby adjusting a bandwidth of the loop transfer function; wherein, when the conversion circuit is operated in the continuous conduction mode, the controller limits the bandwidth to be less than a first frequency threshold related to the right half-plane zero; and wherein, when the conversion circuit is operated in the discontinuous conduction mode, the controller limits the bandwidth to be less than a second frequency threshold related to the non-dominant pole.

2. The power converter according to claim 1, characterized in that, the controller adjusts the amplification gain by adjusting a bias current of the error amplifier, and the amplification gain is positively correlated with the bias current.

3. The power converter according to claim 2, characterized in that, the controller obtains the required voltage based on a handshaking signal communicated with the load.

4. The power converter according to claim 3, characterized in that, the internal feedback compensation circuit further includes: a voltage-current adjustment circuit coupled to a reference terminal of the error amplifier to provide the reference voltage, and an input terminal of the error amplifier is coupled to the external feedback circuit. The voltage-current adjustment circuit adjusts the reference voltage based on the handshaking signal; wherein, the voltage-current adjustment circuit provides a reference current based on the handshaking signal, and the error amplifier adjusts the bias current based on the reference current.

5. The power converter according to claim 4, characterized in that, the voltage-current adjustment circuit includes: a voltage regulator coupled to a communication terminal of the output terminal to receive the handshaking signal to adjust the reference voltage based on the handshaking signal; and a constant current source circuit coupled to the voltage regulator and the error amplifier, and including a current source representing the reference current; wherein, the constant current source circuit adjusts the magnitude of the current source based on a change in the reference voltage.

6. The power converter according to claim 4, characterized in that, the voltage-current adjustment circuit includes: a voltage regulator coupled to a communication terminal of the output terminal to receive the handshaking signal to adjust the reference voltage based on the handshaking signal; a reference current source coupled to the error amplifier; A current source control circuit is connected in parallel with the reference current source and includes a plurality of current source circuits. Each current source circuit includes a switch and a current source connected in series. The control terminal of the switch is coupled to the communication terminal to receive the handshaking signal; wherein, the current source control circuit selectively controls the switches of the current source circuits to be turned on or off based on the handshaking signal, so as to control whether the reference current source is connected in parallel with the current source circuits to generate and adjust the reference current.

7. The power converter according to claim 1, wherein, the first frequency threshold and the second frequency threshold are respectively between the right half-plane zeros of 1 / 2 to 1 / 5 or between the non-dominant poles of 1 / 2 to 1 / 5.

8. The power converter according to claim 1, wherein, when the conversion circuit is operated in the continuous conduction mode or the discontinuous conduction mode, the conversion transfer function further has a dominant pole and a first zero, the compensation transfer function has a pole at the origin, a second pole and a second zero, and the second pole and the second zero are used to respectively compensate the first zero and the dominant pole.

9. The power converter according to claim 1, wherein, the external feedback circuit includes: a voltage dividing circuit including a first resistor and a second resistor connected in series. The first resistor is coupled to the output terminal, and a node between the first resistor and the second resistor is coupled to the error amplifier; a resistor, one end of which is coupled to the first resistor and the output terminal; and an optocoupler including an optical emitting end and an optical receiving end. The optical emitting end is coupled to the other end of the resistor, and the optical receiving end is coupled to the controller; wherein, the voltage dividing circuit generates a feedback voltage at the node based on the output voltage, and the controller compares the feedback voltage with the reference voltage through the error amplifier to adjust a current flowing through the optical emitting end, so as to adjust the output voltage based on the adjustment of the current.

10. The power converter according to claim 9, wherein, the internal feedback compensation circuit further includes: a compensation circuit including a compensation resistor and a compensation capacitor connected in series. The compensation circuit is coupled to an output terminal of the error amplifier; and a transistor including a first end, a second end and a control terminal. The first end is coupled to the external feedback circuit, and the control terminal is coupled to the output terminal; wherein, the error amplifier provides a control signal at the output terminal based on the feedback voltage and the reference voltage, and the control signal is provided to the control terminal through the output terminal to adjust the current by controlling the channel size of the transistor.

11. A method for adjusting the frequency response parameters of a power converter, wherein, The power converter includes a conversion circuit, an external feedback circuit, and an internal feedback compensation circuit. When the conversion circuit is operated in a continuous conduction mode, the conversion transfer function of the conversion circuit has a right half-plane zero. When the conversion circuit is operated in a discontinuous conduction mode, the conversion transfer function of the conversion circuit has a non-dominant pole. The conversion transfer function forms a loop transfer function through the external feedback circuit and the internal feedback compensation circuit, and the internal feedback compensation circuit includes an error amplifier. The frequency response parameter adjustment method includes the following steps: Control the conversion circuit to convert an input voltage into an output voltage and provide the output voltage to a load; Obtain a required voltage demanded by the load through the output terminal; Adjust the output voltage to the required voltage by adjusting a reference voltage received by the error amplifier; Adjust a gain of the error amplifier based on the required voltage, and further adjust a bandwidth of the loop transfer function; When the conversion circuit is operated in the continuous conduction mode, limit the bandwidth to be less than a first frequency threshold related to the right half-plane zero; and When the conversion circuit is operated in the discontinuous conduction mode, limit the bandwidth to be less than a second frequency threshold related to the non-dominant pole.

12. The frequency response parameter adjustment method according to claim 11, characterized in that, further comprising the following steps: adjusting the gain by adjusting a bias current of the error amplifier, and the gain is positively correlated with the bias current.

13. The frequency response parameter adjustment method according to claim 12, characterized in that, further comprising the following steps: Obtain the required voltage based on a handshaking signal communicated with the load.

14. The frequency response parameter adjustment method according to claim 13, characterized in that, further comprising the following steps: Adjust the reference voltage based on the handshaking signal; Provide a reference current based on the handshaking signal; and The error amplifier adjusts the bias current based on the reference current.

15. The frequency response parameter adjustment method according to claim 14, characterized in that, further comprising the following steps: Adjust the reference current based on a change in the reference voltage.

16. The frequency response parameter adjustment method according to claim 14, characterized in that, further comprising the following steps: Control whether a basic current source is connected in parallel with a plurality of current sources based on the handshaking signal to generate and adjust the reference current.

17. The frequency response parameter adjustment method according to claim 11, characterized in that, further comprising the following steps: Generate a feedback voltage based on the output voltage; Compare the feedback voltage with the reference voltage through the error amplifier to adjust a current flowing through a light emitting end of an optocoupler; and Adjust the output voltage based on the adjustment of the current.

18. The frequency response parameter adjustment method according to claim 17, characterized in that, further comprising the following steps: The error amplifier provides a control signal based on the feedback voltage and the reference voltage; and Adjust the current by controlling a channel size of a transistor through the control signal.

Images