Driver circuit, display driver chip, display device and electronic device

Abstract

The present disclosure relates to a driving circuit, a display driving chip, a display device, and an electronic device. The driving circuit includes a first-stage circuit, a second-stage circuit, and an auxiliary circuit. The first-stage circuit is configured to receive a first input signal and a second input signal, amplify them, obtain a first output signal and a second output signal, and output them to the second-stage circuit. The second-stage circuit is configured to output a third output signal to drive a load according to the first output signal and the second output signal. The second-stage circuit is further connected to the first-stage circuit through a Miller capacitor. The auxiliary circuit is connected to the first-stage circuit and the second-stage circuit and is configured to reduce the output impedance of the first-stage circuit. As a driving circuit with Miller compensation, the driving circuit can meet the requirements of connecting any load capacitance and having a smooth transient response.

Description

Technical Field

[0001] The present disclosure relates to the field of integrated circuits, and particularly to a driving circuit, a display driving chip, a display device, and an electronic device. Background Art

[0002] An operational amplifier is a circuit unit with a very high amplification factor. It is widely used in the field of integrated circuits, so problems that may occur in different application scenarios need to be considered in the design. A common problem is that the load capacitance of the operational amplifier is uncertain. For example, when an operational amplifier is used in a driving circuit to drive an LED display and can drive a lot of LEDs, and the number of LEDs is determined by the user, so when designing the operational amplifier, it is necessary to consider that the load capacitance of the operational amplifier can be approximately any value; at the same time, in some application scenarios, the operational amplifier can be used as a gain amplifier. The gain amplifier requires a certain amplification factor between the output and the input. Therefore, another problem is that the transient response of the operational amplifier (the process of the output changing to a stable state when the input changes) should be smooth, that is, the value of the output voltage has no overshoot, which usually requires a phase margin greater than 60°. This is a very difficult thing for a Miller-compensated operational amplifier.

[0003] Therefore, designing a Miller-compensated driving circuit that can meet the above requirements has become a research hotspot in this field. Summary of the Invention

[0004] In view of this, the present disclosure provides a driving circuit, a display driving chip, a display device, and an electronic device. As a Miller-compensated driving circuit, the driving circuit can meet the requirements of connecting any load capacitance and having a smooth transient response.

[0005] According to one aspect of the present disclosure, a driving circuit is provided, including a first-stage circuit, a second-stage circuit, and an auxiliary circuit. The first-stage circuit is configured to receive a first input signal and a second input signal, amplify them, obtain a first output signal and a second output signal, and output them to the second-stage circuit; the second-stage circuit is configured to output a third output signal to drive a load according to the first output signal and the second output signal; the second-stage circuit is further connected to the first-stage circuit through a Miller capacitor; the auxiliary circuit is connected to the first-stage circuit and the second-stage circuit, and is configured to reduce the output impedance of the first-stage circuit.

[0006] In a possible implementation, the auxiliary circuit includes a first resistor and a second resistor. The first output signal is output from the first end of the first-stage circuit, and the second output signal is output from the second end of the first-stage circuit. The first resistor is connected between the power supply voltage and the first end of the first-stage circuit; the second resistor is connected between the second end of the first-stage circuit and the ground.

[0007] In a possible implementation, the auxiliary circuit further includes a first transistor and a second transistor. The first transistor and the first resistor are connected in series between the power supply voltage and the first end of the first-stage circuit, and the current flowing through the first resistor also flows through the first and second poles of the first transistor; the gate of the first transistor is connected to one of the first and second poles of the first transistor that is farther from the power supply voltage; the first transistor is used to reduce the current flowing through the first resistor; the second transistor and the second resistor are connected in series between the second end of the first-stage circuit and the ground, and the current flowing through the second resistor also flows through the first and second poles of the second transistor; the gate of the second transistor is connected to one of the first and second poles of the second transistor that is farther from the ground; the second transistor is used to reduce the current flowing through the second resistor.

[0008] In a possible implementation, the auxiliary circuit further includes a third transistor and a fourth transistor. The third transistor, the first transistor, and the first resistor are connected in series between the power supply voltage and the first end of the first-stage circuit, and the current flowing through the first resistor also flows through the first and second poles of the third transistor. The gate of the third transistor receives a first bias signal; the third transistor is used to control the maximum value of the current flowing through the first resistor to be less than the current value of the tail current of the first-stage circuit; the fourth transistor, the second transistor, and the second resistor are connected in series between the second end of the first-stage circuit and the ground, and the current flowing through the second resistor also flows through the first and second poles of the fourth transistor. The gate of the fourth transistor receives a second bias signal; the fourth transistor is used to control the maximum value of the current flowing through the second resistor to be less than the current value of the tail current of the first-stage circuit.

[0009] In a possible implementation, when the first bias signal makes the third transistor operate in the linear region, the first output signal decreases and the current flowing through the first resistor increases; when the first output signal decreases to make the third transistor operate in the saturation region, the current flowing through the first resistor reaches the maximum value; when the second bias signal makes the fourth transistor operate in the linear region, the second output signal increases and the current flowing through the second resistor increases; when the second output signal increases to make the fourth transistor operate in the saturation region, the current flowing through the second resistor reaches the maximum value.

[0010] In a possible implementation, the second-stage circuit includes a fifth transistor and a sixth transistor. A first pole of the fifth transistor is connected to a power supply voltage, a second pole serves as a first end of the second-stage circuit to output the third output signal, and a gate serves as a second end of the second-stage circuit to receive the first output signal. A first pole of the sixth transistor is connected to the second pole of the fifth transistor, a second pole is connected to ground, and a gate serves as a third end of the second-stage circuit to receive the second output signal. Wherein, the fifth transistor and the sixth transistor have different polarities, the fifth transistor and the first transistor have the same polarity, and the sixth transistor and the second transistor have the same polarity.

[0011] According to another aspect of the present disclosure, there is provided a display driving chip, including a plurality of display units and at least one of the above-mentioned driving circuits, and the plurality of display units are connected to a third end of a second-stage circuit of the driving circuit.

[0012] According to another aspect of the present disclosure, there is provided a display device, including the above-mentioned display driving chip.

[0013] In a possible implementation, the display unit includes a display panel, and the display panel includes at least one of a liquid crystal display panel, a micro light-emitting diode display panel, a light-emitting diode display panel, a mini light-emitting diode display panel, a quantum dot light-emitting diode display panel, an organic light-emitting diode display panel, a cathode ray tube display panel, a digital light processing display panel, a field emission display panel, a plasma display panel, an electrophoretic display panel, an electro-wetting display panel, and a small-pitch display panel.

[0014] According to another aspect of the present disclosure, there is provided an electronic device, including the above-mentioned display device.

[0015] According to the driving circuit of the embodiment of the present disclosure, the first-stage circuit receives a first input signal and a second input signal, amplifies them, obtains a first output signal and a second output signal, and outputs them to the second-stage circuit, so as to implement an amplification function and provide a bias for the second-stage circuit. The second-stage circuit outputs a third output signal according to the first output signal and the second output signal to drive a load. The second-stage circuit is also connected to the first-stage circuit through a Miller capacitor. Therefore, the driving circuit of the embodiment of the present disclosure is a Miller-compensated driving circuit. By connecting an auxiliary circuit to the first-stage circuit and the second-stage circuit, it is used to reduce the output impedance of the first-stage circuit, so that during the change of the load capacitance, the minimum value of the phase margin of the driving circuit increases, realizing a smooth transient response, that is, the Miller-compensated driving circuit meets the requirements of connecting any load capacitance and having a smooth transient response.

[0016] Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Description of the Drawings

[0017] The drawings included in and constituting a part of the specification illustrate exemplary embodiments, features, and aspects of the present disclosure together with the specification, and are used to explain the principles of the present disclosure.

[0018] Figure 1 An exemplary structural diagram of a two-stage operational amplifier of the prior art is shown.

[0019] Figure 2 An exemplary structural diagram of a driving circuit according to an embodiment of the present disclosure is shown.

[0020] Figure 3 An exemplary structural schematic diagram of a first-stage circuit 210 according to an embodiment of the present disclosure is shown.

[0021] Figure 4 An exemplary structural diagram of a second-stage circuit 220 according to an embodiment of the present application is shown.

[0022] Figure 5 An exemplary structural diagram of an auxiliary circuit 230 according to an embodiment of the present disclosure is shown.

[0023] Figure 6 Another exemplary structural diagram of an auxiliary circuit 230 according to an embodiment of the present disclosure is shown.

[0024] Figure 7 Another exemplary structural diagram of an auxiliary circuit 230 according to an embodiment of the present disclosure is shown. Detailed Description of Specific Embodiments

[0025] The following will detail various exemplary embodiments, features, and aspects of the present disclosure with reference to the accompanying drawings. Like reference numerals in the drawings denote elements having the same or similar functions. Although various aspects of the embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0026] The term "exemplary" used herein means "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior to or better than other embodiments.

[0027] In addition, for a better description of the present disclosure, numerous specific details are given in the following detailed description. Those skilled in the art should understand that the present disclosure can be implemented without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art are not described in detail so as to highlight the gist of the present disclosure.

[0028] Figure 1 An exemplary structural diagram of a two-stage operational amplifier in the prior art is shown.

[0029] As Figure 1 shown, the amplifier can be divided into an input-stage circuit and an output-stage circuit. The input-stage circuit is used to provide a large voltage gain, and the output-stage circuit is used to provide a large current driving ability for the driving circuit. A Miller capacitor Cm is connected across the input terminal and the output terminal of the output-stage circuit to achieve phase compensation of the operational amplifier poles. Where VN and VP are the input signals of the two-stage operational amplifier, OUT is the output signal of the two-stage operational amplifier, VB is the bias voltage, AVDD is the power supply voltage, CL is the load capacitor, and Cm is the Miller capacitor.

[0030] When designing an operational amplifier, the specific value of the load capacitor CL in the actual application of the operational amplifier cannot be determined in advance. Therefore, when designing the operational amplifier, it is necessary to consider that the load capacitor can be approximately any value. In some scenarios, the operational amplifier is used as a gain amplifier. Therefore, the design of the operational amplifier also needs to consider smooth transient response, that is, the output signal has no overshoot (usually requiring a phase margin of more than 60°). This is a very difficult thing for the operational amplifier compensated by the Miller capacitor in the prior art.

[0031] To solve this technical problem, the present disclosure proposes a driving circuit, a display driving chip, a display device, and an electronic device. The driving circuit, as a driving circuit for Miller compensation, can meet the requirements of connecting any load capacitor and having a smooth transient response.

[0032] Figure 2 An exemplary structural diagram of the driving circuit according to an embodiment of the present disclosure is shown.

[0033] As Figure 2 shown, in a possible implementation, the driving circuit includes a first-stage circuit 210, a second-stage circuit 220, and an auxiliary circuit 230.

[0034] The first-stage circuit 210 is configured to receive a first input signal Vin1 and a second input signal Vin2, amplify them, and output a first output signal Vout1 and a second output signal Vout2 to the second-stage circuit 220.

[0035] The first-stage circuit 210 in the embodiment of the present disclosure may be a voltage gain amplifier circuit implemented based on the prior art. Figure 3Shows an exemplary structural schematic diagram of the first-stage circuit 210 according to an embodiment of the present disclosure. The circuit 210 includes a differential input unit, a tail current source, and a voltage amplification unit. The differential input unit includes P-type transistors T1 and T2. The gates of the transistors T1 and T2 are respectively connected to the differential input signals (the first input signal Vin1 and the second input signal Vin2). The sources of the transistors T1 and T2 are connected together and connected to the ground through the tail current source. The drains of the transistors T1 and T2 are connected to the voltage amplification unit to perform signal amplification processing through the current mirror structure formed by transistors in the voltage amplification unit, and provide a bias voltage (the first output signal Vout1 and the second output signal Vout2) to the second-stage circuit 220. Among them, the tail current source can be implemented by a P-type transistor T3. The gate of the transistor T3 can receive a control signal for controlling the output of the tail current I3. The source can be connected to the ground, and the drain is connected to the first pole of the transistors T1 and T2. VDD represents the power supply voltage.

[0036] Those skilled in the art should understand that Figure 3 the structure in is only an example of the first-stage circuit 210. The first-stage circuit 210 may also include more structures that can be implemented by the prior art. As long as it can amplify the first input signal Vin1 and the second input signal Vin2 and output the first output signal Vout1 and the second output signal Vout2 to provide a bias for the second-stage circuit, the present disclosure does not limit the specific structure of the first-stage circuit 210.

[0037] The second-stage circuit 220 is configured to output a third output signal Vout3 to drive the load CL according to the first output signal Vout1 and the second output signal Vout2; the second-stage circuit 220 is also connected to the first-stage circuit 210 through Miller capacitors C1 and C2.

[0038] The second-stage circuit 220 can be implemented based on the prior art. Figure 4 Shows an exemplary structural diagram of the second-stage circuit 220 according to an embodiment of the present application. As Figure 4As shown, the circuit 220 may include transistors T5 and T6 of opposite polarities. Taking transistor T5 as a PMOS transistor and transistor T6 as an NMOS transistor as an example, the first pole (source) of transistor T5 is connected to the power supply voltage, the gate receives the first output signal Vout1, the first pole (source) of transistor T6 is connected to the ground, and the gate receives the second output signal Vout2. The second poles (drains) of transistor T5 and transistor T6 are connected to each other and serve as the third terminal of the second-stage circuit 220. The third terminal is also connected to the load CL, that is, the third output signal Vout3 can be used as the signal provided to the load CL. The second poles (drains) of transistor T5 and transistor T6 are also respectively connected to the first-stage circuit 210 through Miller capacitors C1 and C2 to achieve phase compensation of the circuit poles. The specific compensation method can be implemented based on the prior art and will not be elaborated here.

[0039] The auxiliary circuit 230 (including 230a and 230b) is connected to the first-stage circuit 210 and the second-stage circuit 220 and is used to reduce the output impedance of the first-stage circuit 210.

[0040] The output impedance of the first-stage circuit 210 is associated with the phase margin of the drive circuit. The association relationship between the two is as follows: during the change of the load capacitance CL, the smaller the output impedance of the first-stage circuit 210, the larger the minimum value of the phase margin of the drive circuit. When the phase margin is greater than 60%, it can be considered that the transient response of the drive circuit is smooth. Therefore, by reducing the output impedance of the first-stage circuit 210 through the auxiliary circuit 230, the transient response of the drive circuit can be optimized.

[0041] According to the drive circuit of the present disclosure embodiment, the first-stage circuit receives the first input signal and the second input signal and amplifies them to obtain the first output signal and the second output signal and outputs them to the second-stage circuit, which can achieve the amplification function and provide bias for the second-stage circuit; the second-stage circuit outputs the third output signal according to the first output signal and the second output signal to drive the load; the second-stage circuit is also connected to the first-stage circuit through the Miller capacitor; therefore, the drive circuit of the present disclosure embodiment is a Miller-compensated drive circuit; by connecting the auxiliary circuit to the first-stage circuit and the second-stage circuit and being used to reduce the output impedance of the first-stage circuit, during the change of the load capacitance, the minimum value of the phase margin of the drive circuit increases, and the transient response is smoothed, that is, it realizes the requirement that the Miller-compensated drive circuit satisfies connecting any load capacitance and has a smooth transient response.

[0042] There are various structures for the auxiliary circuit 230 in the embodiments of the present disclosure. The following will be combined with Figures 5 - 7 Several exemplary structures of the auxiliary circuit 230 and their advantages will be introduced respectively.

[0043] Figure 5An exemplary structural diagram of the auxiliary circuit 230 according to an embodiment of the present disclosure is shown.

[0044] As Figure 5 shown, in a possible implementation, the auxiliary circuit 230 includes a first resistor R1 and a second resistor R2. The first output signal Vout1 is output from the first terminal a1 of the first-stage circuit 210, and the second output signal Vout2 is output from the second terminal a2 of the first-stage circuit 210. The first resistor R1 is connected between the power supply voltage VDD and the first terminal a1 of the first-stage circuit 210; the second resistor R2 is connected between the second terminal a2 of the first-stage circuit 210 and the ground.

[0045] For example, from Figure 3 and Figure 4 it can be known that the first-stage circuit 210 has two output terminals a1 and a2. Therefore, when designing the auxiliary circuit 230, it is necessary to consider reducing the output impedance of the two output terminals a1 and a2 respectively. The simplest way is to connect resistors to the two output terminals a1 and a2 respectively, that is, as Figure 5 shown, the first resistor R1 is connected between the first terminal a1 of the first-stage circuit 210 and the power supply voltage VDD, and the second resistor R2 is connected between the second terminal a2 of the first-stage circuit 210 and the ground GND. Then the auxiliary circuit 230 (including 230a and 230b) may include the first resistor R1 and the second resistor R2. The present disclosure embodiment does not limit the resistance values of the first resistor R1 and the second resistor R2. In this case, the structure of the auxiliary circuit 230 is relatively simple, easy to implement and has a low cost.

[0046] However, Figure 5 in the circuit shown, due to the presence of the first resistor R1 and the second resistor R2 in the auxiliary circuit 230 (including 230a and 230b), there will be current flowing through the first resistor R1 and the second resistor R2. And for the transistor T5, its gate-source voltage is related to its threshold voltage, and the source voltage is the power supply voltage VDD which is a fixed value. Therefore, the gate voltage of the transistor T5 is related to its threshold voltage; the current I1 flowing through the first resistor R1 should be equal to the ratio of the difference between the power supply voltage VDD and the gate voltage of the transistor T5 to the resistance value of the first resistor R1. So it can be considered that the current I1 flowing through the first resistor R1 is based on the threshold voltage of the transistor T5. Similarly, it can be considered that the current I2 flowing through the second resistor R2 is based on the threshold voltage of the transistor T6. The transistor T5 and the transistor T6 are two transistors of different polarities, so their threshold voltages may not be the same, which will cause the current I1 flowing through the first resistor R1 and the current I2 flowing through the second resistor R2 to be unequal. When the difference between these two currents is relatively large, a relatively large offset voltage will be introduced, reducing the stability of the drive circuit.

[0047] Therefore, the present disclosure proposes another design method for the auxiliary circuit 230.Figure 6 Another exemplary structural diagram of the auxiliary circuit 230 according to an embodiment of the present disclosure is shown.

[0048] As Figure 6 shown, in a possible implementation, the auxiliary circuit 230 further includes a first transistor M1 and a second transistor M2.

[0049] The first transistor M1 and the first resistor R1 are connected in series between the power supply voltage VDD and the first end a1 of the first-stage circuit 210. The current I1 flowing through the first resistor also flows through the first pole m11 and the second pole m12 of the first transistor M1. The gate m13 of the first transistor M1 is connected to one of the first pole m11 and the second pole m12 of the first transistor M1 that is far from the power supply voltage VDD. The first transistor M1 is used to reduce the current I1 flowing through the first resistor.

[0050] The second transistor M2 and the second resistor R2 are connected in series between the second end a2 of the first-stage circuit 120 and the ground. The current I2 flowing through the second resistor R2 also flows through the first pole m21 and the second pole m22 of the second transistor M2. The gate m13 of the second transistor M2 is connected to one of the first pole m21 and the second pole m22 of the second transistor M2 that is far from the ground. The second transistor M2 is used to reduce the current I2 flowing through the second resistor R2.

[0051] In Figure 6 the example, the first transistor M1 may be a P-type transistor. The first pole m11 of the first transistor M1 may be the drain, connected to the first resistor R1. The second pole m12 may be the source, connected to the power supply voltage VDD. The one far from the power supply voltage VDD may be the first pole m11. The first resistor is also connected to the first end a1 of the first-stage circuit. The second transistor M1 may be an N-type transistor. The first pole m21 of the second transistor M2 may be the source, connected to the ground. The second pole m22 may be the drain, connected to the second resistor R2. The one far from the ground may be the second pole m22. The second resistor is also connected to the second end a2 of the first-stage circuit. Those skilled in the art should understand that the first transistor and the second transistor may also be transistors of other polarities, and the present disclosure does not limit this.

[0052] It can be understood that in addition to Figure 6In addition to the connection manners described above, the first resistor may also be connected to the power supply voltage, the first transistor may also be connected to the first end a1 of the first-stage circuit, the second resistor may also be connected to the ground, and the second transistor may also be connected to the second end a2 of the first-stage circuit, as long as the connection manner that the first transistor M1 and the first resistor R1 are connected in series between the power supply voltage VDD and the first end a1 of the first-stage circuit 210, and the second transistor M2 and the second resistor R2 are connected in series between the second end a2 of the first-stage circuit 120 and the ground is satisfied. The present disclosure does not limit the specific connection manners of the first transistor M1, the first resistor R1, the second transistor, and the second resistor R2.

[0053] The principle of reducing the current flowing through the first resistor and the current flowing through the second resistor by the auxiliary circuit shown below in combination with the structure of the second-stage circuit will be introduced. Figure 6

[0054] In a possible implementation manner, the second-stage circuit includes a fifth transistor T5 and a sixth transistor T6.

[0055] The first pole of the fifth transistor T5 is connected to the power supply voltage VDD, the second pole serves as the first end b1 of the second-stage circuit 220 and outputs a third output signal, and the gate serves as the second end b2 of the second-stage circuit 220 and receives the first output signal Vout1.

[0056] The first pole of the sixth transistor T6 is connected to the second pole a2 of the fifth transistor T5, the second pole is connected to the ground, and the gate serves as the third end of the second-stage circuit and receives the second output signal Vout2.

[0057] Among them, the fifth transistor T5 and the sixth transistor T6 have different polarities, the fifth transistor T5 and the first transistor M1 have the same polarity, and the sixth transistor T6 and the second transistor M2 have the same polarity.

[0058] For example, the fifth transistor is the transistor T5 described above, the sixth transistor is the transistor T6 described above, the fifth transistor T5 and the sixth transistor T6 are transistors with different polarities, the fifth transistor T5 and the first transistor M1 may have the same polarity, and the sixth transistor T6 and the second transistor M2 may have the same polarity. For example, in the embodiments of the present disclosure, the fifth transistor T5 and the first transistor M1 may be P-type transistors, and the sixth transistor T6 and the second transistor M2 may be N-type transistors.

[0059] Among them, when the first transistor M1 is connected in the manner shown Figure 6 it can be regarded as a diode. When the first transistor M1 is a P-type transistor, its threshold voltage is the same as that of the fifth transistor T5 (the threshold voltages of transistors with the same polarity are also the same). Among the first pole m11 and the second pole m12 of the first transistor M1, the pole closer to the power supply voltage VDD (in​Figure 6 In the example of Figure 6 , the second pole m12) is the negative pole of the diode, and the other pole (the first pole m11 in the example of Figure 6 ) is the positive pole of the diode. That is, the first transistor M1 acts as a diode and is reversely connected in the circuit, and the first transistor M1 is connected in series with the first resistor R1. Therefore, in this case, the current I1 flowing through the first resistor R1 is very small. Similarly, when the second transistor M2 is connected in the manner shown in

[0060] However, Figure 6 , the circuit shown in Figure 6 is more suitable for a driving circuit with a large static current. If the application scenario requires a driving circuit with low power consumption, then the tail current I3 in the first-stage circuit needs to be designed to be relatively small. Then Figure 6 , the circuit shown in

[0061] Therefore, the present disclosure proposes another design method for the auxiliary circuit. Figure 7 FIG. shows another exemplary structural diagram of the auxiliary circuit 230 according to an embodiment of the present disclosure.

[0062] As Figure 7 shown, in a possible implementation, the auxiliary circuit 230 further includes a third transistor M3 and a fourth transistor M4.

[0063] The third transistor M3, the first transistor M1, and the first resistor R1 are connected in series between the power supply voltage VDD and the first end a1 of the first-stage circuit 210. The current flowing through the first resistor R1 also flows through the first pole m31 and the second pole m32 of the third transistor M3. The gate m33 of the third transistor M3 receives the first bias signal VBP. The third transistor M3 is used to control the maximum value of the current I1 flowing through the first resistor R1 to be less than the current value of the tail current I3 of the first-stage circuit 210.

[0064] The fourth transistor M4, the second transistor, and the second resistor R2 are connected in series between the second end a2 of the first-stage circuit 210 and the ground. The current I2 flowing through the second resistor R2 also flows through the first pole m41 and the second pole m42 of the fourth transistor M4. The gate of the fourth transistor M4 receives the second bias signal VBN. The fourth transistor M4 is used to control the maximum value of the current I2 flowing through the second resistor R2 to be less than the current value of the tail current I3 of the first-stage circuit 210.

[0065] In Figure 7 this example, the first transistor M1 may be a P-type transistor. The first pole m11 of the first transistor M1 may be the drain, connected to the first resistor R1. The second pole m12 may be the source, connected to the first pole m31 of the third transistor M3. The third transistor M3 may be a P-type transistor. The first pole m31 of the third transistor M3 may be the drain, and the second pole m32 may be the source, connected to the power supply voltage VDD. The second transistor M1 may be an N-type transistor. The first pole m21 of the second transistor M2 may be the source, connected to the second pole m42 of the four transistors M4. The second pole m22 may be the drain, connected to the second resistor R2. The fourth transistor M4 may be an N-type transistor. The first pole m41 of the fourth transistor M4 may be the source, connected to the ground, and the second pole m42 may be the drain. Those skilled in the art should understand that the first transistor, the second transistor, the third transistor, and the fourth transistor may also be transistors of other polarities, and the present disclosure does not limit this.

[0066] It can be understood that in addition to Figure 7In addition to the connection manner in [the reference], the first resistor may also be connected in series between the first transistor and the third transistor, and the second resistor may also be connected in series between the fourth transistor and the second transistor, etc. As long as the connection manner that the third transistor M3, the first transistor M1, and the first resistor R1 are connected in series between the power supply voltage VDD and the first end a1 of the first-stage circuit 210, and the fourth transistor M4, the second transistor, and the second resistor R2 are connected in series between the second end a2 of the first-stage circuit 210 and the ground is satisfied, the present disclosure does not limit the specific connection manner of the third transistor M3, the first transistor M1, and the first resistor R1, nor the specific connection manner of the fourth transistor M4, the second transistor, and the second resistor R2.

[0067] The following describes Figure 7 exemplary ways for the third transistor M3 and the fourth transistor M4 to control the current I1 flowing through the first resistor R1 and the current I2 flowing through the second resistor R2.

[0068] In a possible implementation, when the first bias signal VBP causes the third transistor M3 to operate in the linear region, the first output signal Vout1 decreases, and the current I1 flowing through the first resistor R1 increases;

[0069] When the first output signal Vout1 decreases to cause the third transistor M3 to operate in the saturation region, the current I1 flowing through the first resistor R1 reaches the maximum value;

[0070] When the second bias signal VBN causes the fourth transistor M4 to operate in the linear region, the second output signal Vout2 increases, and the current I2 flowing through the second resistor R2 increases;

[0071] When the second output signal Vout2 increases to cause the fourth transistor M4 to operate in the saturation region, the current I2 flowing through the second resistor R2 reaches the maximum value.

[0072] For example, the first bias signal VBP and the second bias signal VBN can be set to fixed values, and are generated by a bias circuit (not shown) capable of stably outputting a bias voltage in the prior art and provided to the auxiliary circuit 230 (including 230a and 230b). In the normal state, the third transistor M3 and the fourth transistor M4 are respectively pressed into the deep linear region by the first bias signal VBP and the second bias signal VBN. At this time, the current I1 flowing through the first resistor R1 and the current I2 flowing through the second resistor R2 are very small and will not cause the driving circuit to introduce an offset voltage. When the driving circuit needs to perform a voltage conversion, taking the first output signal Vout1 as an example, the voltage value of the first output signal Vout1 decreases, and the current I1 flowing through the first resistor R1 will increase. However, when the voltage value of the first output signal Vout1 drops to a certain value, the third transistor M3 enters the saturation region. At this time, the current I1 flowing through the first resistor R1 will no longer increase, that is, the current I1 flowing through the first resistor R1 reaches the maximum value at this time. As long as this maximum value is less than the tail current I3 of the first-stage circuit 210, the voltage value of the first output signal Vout1 can continue to drop without introducing the problem that the voltage conversion rate of the driving circuit becomes smaller.

[0073] Similarly, taking the second output signal Vout2 as an example, when the voltage value of the second output signal Vout2 rises, the current I2 flowing through the second resistor R2 will increase. However, when the voltage value of the second output signal Vout2 rises to a certain value, the fourth transistor M4 enters the saturation region. At this time, the current I2 flowing through the second resistor R2 will no longer increase, that is, the current I2 flowing through the second resistor R2 reaches the maximum value at this time. As long as this maximum value is less than the tail current I3 of the first-stage circuit 210, the voltage value of the second output signal Vout2 can continue to drop without introducing the problem that the voltage conversion rate of the driving circuit becomes smaller.

[0074] Those skilled in the art should understand that Figures 5 - 7 the structure in is only an example of the auxiliary circuit 230. The auxiliary circuit 230 may further include more structures, as long as it can achieve reducing the output impedance of the first-stage circuit 210. The present disclosure does not limit the specific structure of the auxiliary circuit 230.

[0075] The present disclosure also provides a display driving chip, including a plurality of display units and at least one of the above-mentioned driving circuits. The plurality of display units are connected to the third end of the second-stage circuit 220 of the driving circuit. The third end of the second-stage circuit 220 may be the end where the second-stage circuit 220 is connected to the load, that is, the end where the third output signal Vout3 is output. The plurality of display units are the loads described above, and their capacitance values are the load capacitances of the driving circuit.

[0076] The present disclosure also provides a display device, which includes the display driving chip described above. The display driving chip according to the embodiment of the present invention can be formed into a general driving chip, which can be applied to display panels with different sub-pixel arrangements, thereby reducing the design cost and manufacturing cost.

[0077] In a possible implementation manner, the display unit includes a display panel, and the display panel includes at least one of a liquid crystal display panel, a micro light-emitting diode display panel, a light-emitting diode display panel, a mini light-emitting diode display panel, a quantum dot light-emitting diode display panel, an organic light-emitting diode display panel, a cathode ray tube display panel, a digital light processing display panel, a field emission display panel, a plasma display panel, an electrophoretic display panel, an electro-wetting display panel, and a small-pitch display panel.

[0078] The present disclosure also provides an electronic device, including the display device described above.

[0079] Exemplarily, the electronic device in this embodiment includes, but is not limited to, a desktop computer, a television, a mobile device with a large-size screen such as a mobile phone, a tablet computer, and other common electronic devices that require multiple chips to be cascaded and connected to achieve driving.

[0080] Exemplarily, the electronic device may also be a user equipment (UE), a mobile device, a user terminal, a terminal, a handheld device, a computing device, or a vehicle-mounted device, etc. Exemplarily, some examples of terminals are: a display, a smart phone or a portable device, a mobile phone, a tablet computer, a laptop computer, a palm computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, a wireless terminal in a vehicle-to-everything network, etc. For example, the server may be a local server or a cloud server.

[0081] The embodiments of the present disclosure have been described above. The above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The choice of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other ordinary skilled persons in the art to understand the embodiments disclosed herein.

Claims

1. A driving circuit, characterized in that, It includes a first-stage circuit, a second-stage circuit, and an auxiliary circuit. The first-stage circuit is configured to receive a first input signal and a second input signal, amplify them, obtain a first output signal and a second output signal, and output them to the second-stage circuit. The second-stage circuit is configured to output a third output signal to drive a load according to the first output signal and the second output signal; the second-stage circuit is also connected to the first-stage circuit through a Miller capacitor. The auxiliary circuit is connected to the first-stage circuit and the second-stage circuit and is used to reduce the output impedance of the first-stage circuit. The auxiliary circuit includes a first resistor and a second resistor. The first output signal is output from the first end of the first-stage circuit, and the second output signal is output from the second end of the first-stage circuit. The first resistor is connected between the power supply voltage and the first end of the first-stage circuit; the second resistor is connected between the second end of the first-stage circuit and the ground. The auxiliary circuit further includes a first transistor and a second transistor. The first transistor and the first resistor are connected in series between the power supply voltage and the first end of the first-stage circuit, and the current flowing through the first resistor also flows through the first and second poles of the first transistor; the gate of the first transistor is connected to one of the first and second poles of the first transistor that is farther from the power supply voltage; the first transistor is used to reduce the current flowing through the first resistor; the second transistor and the second resistor are connected in series between the second end of the first-stage circuit and the ground, and the current flowing through the second resistor also flows through the first and second poles of the second transistor; the gate of the second transistor is connected to one of the first and second poles of the second transistor that is farther from the ground; the second transistor is used to reduce the current flowing through the second resistor.

2. The drive circuit according to claim 1, wherein The auxiliary circuit further includes a third transistor and a fourth transistor. The third transistor, the first transistor, and the first resistor are connected in series between the power supply voltage and the first end of the first-stage circuit, and the current flowing through the first resistor also flows through the first and second poles of the third transistor. The gate of the third transistor receives a first bias signal; the third transistor is used to control the maximum value of the current flowing through the first resistor to be less than the current value of the tail current of the first-stage circuit. The fourth transistor, the second transistor, and the second resistor are connected in series between the second end of the first-stage circuit and the ground, and the current flowing through the second resistor also flows through the first and second poles of the fourth transistor. The gate of the fourth transistor receives a second bias signal; the fourth transistor is used to control the maximum value of the current flowing through the second resistor to be less than the current value of the tail current of the first-stage circuit.

3. The drive circuit according to claim 2, wherein when the first bias signal makes the third transistor operate in the linear region, the first output signal decreases, and the current flowing through the first resistor increases. when the first output signal decreases to make the third transistor operate in the saturation region, the current flowing through the first resistor reaches the maximum value. When the second bias signal causes the fourth transistor to operate in the linear region, the second output signal rises, and the current flowing through the second resistor increases; When the second output signal rises to cause the fourth transistor to operate in the saturation region, the current flowing through the second resistor reaches the maximum value.

4. The drive circuit according to any one of claims 1-3, characterized in that, The second-stage circuit includes a fifth transistor and a sixth transistor, A first pole of the fifth transistor is connected to a power supply voltage, a second pole serves as a first end of the second-stage circuit and outputs the third output signal, and a gate serves as a second end of the second-stage circuit and receives the first output signal; A first pole of the sixth transistor is connected to the second pole of the fifth transistor, a second pole is connected to ground, and a gate serves as a third end of the second-stage circuit and receives the second output signal; Wherein, the fifth transistor and the sixth transistor have different polarities, the fifth transistor and the first transistor have the same polarity, and the sixth transistor and the second transistor have the same polarity.

5. A display driving chip, characterized in that, It includes a plurality of display units and at least one driving circuit according to any one of claims 1-4, and the plurality of display units are connected to a third end of the second-stage circuit of the driving circuit.

6. A display device, characterized in that, It includes the display driving chip according to claim 5.

7. The display device according to claim 6, characterized in that, The display unit includes a display panel, and the display panel includes at least one of a liquid crystal display panel, a micro light-emitting diode display panel, a light-emitting diode display panel, a mini light-emitting diode display panel, a quantum dot light-emitting diode display panel, an organic light-emitting diode display panel, a cathode ray tube display panel, a digital light processing display panel, a field emission display panel, a plasma display panel, an electrophoretic display panel, an electro-wetting display panel, and a small-pitch display panel.

8. An electronic device, characterized in that, It includes a display device according to claim 6 or 7.

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