Chopper-Modulated Instrumentation Amplifier with Offset Voltage Cancellation Circuit

Abstract

The invention discloses a chopper modulation instrument amplifier with an offset voltage elimination circuit, comprising a first chopper, a second chopper, a chopper operational amplifier, input capacitors C1 and C2, feedback capacitors C3 and C4, an offset voltage detector and an offset voltage eliminator. The offset voltage detector comprises a fourth chopper, a low-pass filter, single-pole double-throw switches SW1, SW2, SW3, SW4 and capacitors C7 and C8. The offset voltage eliminator is composed of two current source tubes, and the offset voltage is eliminated in the first-stage transconductance circuit of the chopper operational amplifier. The chopper modulation instrument amplifier with an offset voltage elimination circuit of the invention utilizes the existing two-stage transconductance of the chopper operational amplifier to amplify, detect and eliminate the offset voltage, has low extra power consumption, and has little noise impact on the main circuit. At the same time, the low-pass filter in the offset voltage detector adopts a duty cycle resistor, has high accuracy and small area.

Description

Technical Field

[0001] The invention relates to an instrument amplifier, in particular to a chopper modulation instrument amplifier with an offset voltage elimination circuit. Background Art

[0002] The chopper-modulated instrument amplifier uses a chopper to modulate the input signal so that the low frequency of the input signal can be extended to DC. The chopper can also reduce the flicker noise in the operational amplifier. It is widely used in DC metering, AC metering and other high-precision sensors. The main disadvantage of the chopper-modulated instrument amplifier is that the offset voltage will present a large amplitude signal with the same frequency as the chopper clock at the output of the amplifier. If the offset voltage is not processed separately, the dynamic range of the amplifier will be seriously affected. Summary of the invention

[0003] In view of the above problems, a chopper-modulated instrument amplifier with an offset voltage elimination circuit is provided for the offset voltage of the chopper-modulated instrument amplifier.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] A chopper modulation instrument amplifier with an offset voltage elimination circuit comprises a first chopper CH1, a second chopper CH2, a chopper operational amplifier, a first input capacitor C1 and a second input capacitor C2, a first feedback capacitor C3 and a second feedback capacitor C4, an offset voltage detector and an offset voltage eliminator. The chopper operational amplifier comprises a first-stage transconductance circuit Gm1, a third chopper CH3, a second-stage transconductance circuit Gm2, a first Miller compensation capacitor C5 and a second Miller compensation capacitor C6. The positive end and the negative end of the input signal are connected to The positive input terminal and the negative input terminal of the first chopper CH1 are connected to the positive input terminal and the negative input terminal of the first chopper CH1, the positive output terminal and the negative output terminal of the first chopper CH1 are connected to one end of the first input capacitor C1 and the second input capacitor C2 respectively, the other ends of the first input capacitor C1 and the second input capacitor C2 are connected to the negative input terminal and the positive input terminal of the first-stage transconductance circuit Gm1 respectively, the positive output terminal and the negative output terminal of the first-stage transconductance circuit Gm1 are connected to the positive input terminal and the negative input terminal of the third chopper CH3 respectively, and the positive output terminal and the negative output terminal of the third chopper CH3 are connected to The second-stage crossover circuit Gm2 has a negative input terminal and a positive input terminal, two ends of the first Miller compensation capacitor C5 are respectively connected to the positive output terminal and the negative input terminal of the second-stage transconductance circuit Gm2, two ends of the second Miller compensation capacitor C6 are respectively connected to the negative output terminal and the positive input terminal of the second-stage transconductance circuit Gm2, the positive output terminal and the negative output terminal of the second-stage transconductance circuit Gm2 are respectively connected to the positive input terminal and the negative input terminal of the second chopper CH2, the positive output terminal and the negative output terminal of the second chopper CH2 are respectively connected to the first feedback capacitor C3 and the second feedback capacitor C4. One end of the capacitor C4 and the other ends of the first feedback capacitor C3 and the second feedback capacitor C4 are respectively connected to the positive input terminal and the negative input terminal of the first-stage transconductance circuit Gm1, the positive output terminal and the negative output terminal of the second-stage transconductance circuit Gm2 are respectively connected to the positive input terminal and the negative input terminal of the offset voltage detection circuit, the positive output terminal and the negative output terminal of the offset voltage detector are respectively connected to the positive input terminal and the negative input terminal of the offset voltage eliminator, and the offset voltage eliminator generates a DC current according to the result of the offset voltage detector to compensate for the offset current of the first-stage transconductance circuit.

[0006] Preferably, the first-stage transconductance circuit Gm1 and the second-stage transconductance circuit Gm2 further include PMOS tubes M1, M2, M3, M4, M5, M6, M7, M12, M13, NMOS tubes M8, M9, M10, M11, M14, M15, the positive input terminal and the negative input terminal of the chopper operational amplifier are respectively connected to the gate of M3 and the gate of M2, the source of M2 and the source of M3 are both connected to the drain of M1, and the source of M1 is connected to to the power supply voltage VDD, the gate of M1 is connected to the voltage VP1, the drain of M2 and the drain of M3 are connected to the source of M8 and the source of M9 respectively, the gate of M8 and the gate of M9 are both connected to the voltage VN2, the source of M8 and the source of M9 are connected to the drain of M10 and the drain of M11 respectively, the gate of M10 and the gate of M11 are both connected to the voltage VN1, the source of M10 and the source of M11 are both connected to ground, the drain of M8 and the drain of M9 are connected to ground, The drains are connected to the drain of M6 and the drain of M7 respectively, the gate of M6 and the gate of M7 are both connected to the voltage VP3, the source of M6 and the source of M7 are connected to the drain of M4 and the drain of M5 respectively, the gate of M4 and the gate of M5 are both connected to the voltage VP2, the source of M4 and the source of M5 are both connected to the power supply voltage VDD, the drain of M6 and the drain of M7 are respectively connected to the positive input terminal and the negative input terminal of the third chopper CH3, the positive output terminal and the negative output terminal of the third chopper CH3 are respectively connected to the gate of M12 and the gate of M13, the drain of M12 and the drain of M13 are respectively connected to the drain of M14 and the drain of M15, the two ends of the first Miller compensation capacitor C5 are respectively connected to the gate of M12 and the drain of M12, the two ends of the second Miller compensation capacitor C6 are respectively connected to the gate of M13 and the drain of M13, the drain of M12 and the drain of M13 are respectively the positive output terminal and the negative output terminal.

[0007] Preferably, the offset voltage detector includes a fourth chopper CH4, a low-pass filter, single-pole double-throw switches SW1, SW2, SW3, SW4 and capacitors C7, C8.

[0008] Preferably, the positive output terminal and the negative output terminal of the output signal of the chopper operational amplifier are respectively connected to the positive input terminal and the negative input terminal of the fourth chopper CH4, the positive output terminal and the negative output terminal of the fourth chopper CH4 are respectively connected to the positive input terminal and the negative input terminal of the low-pass filter, the positive output terminal of the low-pass filter is connected to a fixed end of the single-pole double-throw switches SW1 and SW3, the other fixed ends of SW1 and SW3 are respectively connected to the voltage VP3 and the voltage VP2, the negative output terminal of the low-pass filter is connected to a fixed end of the single-pole double-throw switches SW2 and SW4, the other fixed ends of SW2 and SW4 are respectively connected to the voltage VP2 and the voltage VP4, the two ends of the capacitor C7 are respectively connected to the moving ends of SW1 and SW2, and the two ends of the capacitor C8 are respectively connected to the moving ends of SW3 and SW4.

[0009] Preferably, the offset voltage eliminator comprises two current source tubes, and the offset voltage is eliminated in the first-stage transconductance circuit of the chopper operational amplifier.

[0010] Preferably, the offset voltage eliminator includes PMOS tubes M16 and M17, the source of M16 and the source of M17 are both connected to the power supply voltage VDD, the drain of M16 is connected to the drain of M4 in the operational amplifier, the drain of M17 is connected to the drain of M5 in the operational amplifier, the gate of M16 is connected to the voltage VP3, and the gate of M17 is connected to the voltage VP4.

[0011] Preferably, the low-pass filter comprises a first resistor R1, a second resistor R2, switches SW5, SW6 and a capacitor C9, the positive input terminal and the negative input terminal of the filter are respectively connected to one end of the first resistor R1 and one end of the second resistor R2, the other end of the first resistor R1 and the other end of the second resistor R2 are respectively connected to one end of the switch SW5 and one end of the switch SW6, the other end of the switch SW5 is connected to one end of the capacitor C9 and serves as the positive output terminal of the filter; the other end of the switch SW6 is connected to the other end of the capacitor C9 and serves as the negative output terminal of the filter, and the control signals of the switches SW5 and SW6 are f SW , which is a periodic signal with a duty cycle of 1 / N and the same frequency as the chopper clock.

[0012] Beneficial effects: The offset voltage can be eliminated, and the power consumption and noise of the original circuit are less affected. The circuit structure is simple and easy to implement, with a small area and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments, and the above and / or other advantages of the present invention will become more clear.

[0014] Figure 1 The invention is a block diagram of the principle of a chopper-modulated instrument amplifier with an offset voltage elimination circuit according to an embodiment of the present invention.

[0015] Figure 2 It is a structural schematic diagram of a chopper operational amplifier in an offset voltage eliminator according to an embodiment of the present invention.

[0016] Figure 3 The diagram is a schematic structural diagram of an offset voltage detector in an offset voltage eliminator according to an embodiment of the present invention.

[0017] Figure 4 The invention is a schematic structural diagram of a low-pass filter with an offset voltage detector in an offset voltage eliminator according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] See also Figure 1The embodiment of the present invention discloses a chopper modulation instrument amplifier with an offset voltage elimination circuit, including a first chopper CH1, a second chopper CH2, a chopper operational amplifier, a first input capacitor C1 and a second input capacitor C2, a first feedback capacitor C3 and a second feedback capacitor C4, an offset voltage detector and an offset voltage eliminator. The chopper operational amplifier includes a first-stage transconductance circuit Gm1, a third chopper CH3, a second-stage transconductance circuit Gm2, a first Miller compensation capacitor C5 and a second Miller compensation capacitor C6, the positive end and the negative end of the input signal are respectively connected to the positive input end and the negative input end of the first chopper CH1, the positive output end and the negative output end of the first chopper CH1 are respectively connected to one end of the first input capacitor C1 and the second input capacitor C2, the other ends of the first input capacitor C1 and the second input capacitor C2 are respectively connected to the negative input end and the positive input end of the first-stage transconductance circuit Gm1, the positive output end and the negative output end of the first-stage transconductance circuit Gm1 are respectively connected to the positive input end and the negative input end of the third chopper CH3, the positive output end and the negative output end of the third chopper CH3 are respectively connected to the negative input end and the positive input end of the second-stage transconductance circuit Gm2, and the two ends of the first Miller compensation capacitor C5 are respectively connected to the positive input The positive output terminal and the negative input terminal of the second-stage transconductance circuit Gm2 are connected to the positive output terminal and the negative input terminal of the second-stage transconductance circuit Gm2, respectively. The positive output terminal and the negative output terminal of the second-stage transconductance circuit Gm2 are connected to the positive input terminal and the negative input terminal of the second chopper CH2, respectively. The positive output terminal and the negative output terminal of the second chopper CH2 are connected to one end of the first feedback capacitor C3 and the second feedback capacitor C4, respectively. The other ends of the first feedback capacitor C3 and the second feedback capacitor C4 are connected to the positive input terminal and the negative input terminal of the first-stage transconductance circuit Gm1, respectively. The positive output terminal and the negative output terminal of the second-stage transconductance circuit Gm2 are connected to the positive input terminal and the negative input terminal of the offset voltage detection circuit, respectively. The positive output terminal and the negative output terminal of the offset voltage detector are connected to the positive input terminal and the negative input terminal of the offset voltage eliminator, respectively. The offset voltage eliminator generates a DC current according to the result of the offset voltage detector to compensate for the offset current of the first-stage transconductance circuit.

[0019] In a specific implementation, according to a preferred embodiment of the present invention, a chopper operational amplifier with an offset voltage eliminator is as follows: Figure 2As shown, the first-stage transconductance circuit Gm1 and the second-stage transconductance circuit Gm2 further include PMOS tubes M1, M2, M3, M4, M5, M6, M7, M12, M13, NMOS tubes M8, M9, M10, M11, M14, M15, the positive input terminal and the negative input terminal of the chopper operational amplifier are respectively connected to the gate of M3 and the gate of M2, the source of M2 and the source of M3 are both connected to the drain of M1, and the source of M1 is connected to to the power supply voltage VDD, the gate of M1 is connected to the voltage VP1, the drain of M2 and the drain of M3 are connected to the source of M8 and the source of M9 respectively, the gate of M8 and the gate of M9 are both connected to the voltage VN2, the source of M8 and the source of M9 are connected to the drain of M10 and the drain of M11 respectively, the gate of M10 and the gate of M11 are both connected to the voltage VN1, the source of M10 and the source of M11 are both connected to ground, the drain of M8 and the drain of M9 are connected to ground, The drains are connected to the drain of M6 and the drain of M7 respectively, the gate of M6 and the gate of M7 are both connected to the voltage VP3, the source of M6 and the source of M7 are connected to the drain of M4 and the drain of M5 respectively, the gate of M4 and the gate of M5 are both connected to the voltage VP2, the source of M4 and the source of M5 are both connected to the power supply voltage VDD, the drain of M6 and the drain of M7 are respectively connected to the positive input terminal and the negative input terminal of the third chopper CH3, the positive output terminal and the negative output terminal of the third chopper CH3 are respectively connected to the gate of M12 and the gate of M13, the drain of M12 and the drain of M13 are respectively connected to the drain of M14 and the drain of M15, the two ends of the first Miller compensation capacitor C5 are respectively connected to the gate of M12 and the drain of M12, the two ends of the second Miller compensation capacitor C6 are respectively connected to the gate of M13 and the drain of M13, the drain of M12 and the drain of M13 are respectively the positive output terminal and the negative output terminal.

[0020] In a specific embodiment, the offset voltage detector is as follows Figure 3As shown, it includes a fourth chopper CH4, a low-pass filter, four single-pole double-throw switches SW1, SW2, SW3, SW4 and capacitors C7 and C8. The positive output terminal and the negative output terminal of the chopper operational amplifier output signal are respectively connected to the positive input terminal and the negative input terminal of the fourth chopper CH4, the positive output terminal and the negative output terminal of the fourth chopper CH4 are respectively connected to the positive input terminal and the negative input terminal of the low-pass filter, the positive output terminal of the low-pass filter is connected to a fixed end of the single-pole double-throw switches SW1 and SW3, and the other fixed ends of SW1 and SW3 are respectively connected to the voltage VP3 and the voltage VP2. The negative output terminal of the low-pass filter is connected to a fixed end of the single-pole double-throw switches SW2 and SW4, and the other fixed ends of SW2 and SW4 are respectively connected to the voltage VP2 and the voltage VP4. The two ends of the capacitor C7 are respectively connected to the moving ends of SW1 and SW2, and the two ends of the capacitor C8 are respectively connected to the moving ends of SW3 and SW4. Φ1 and Φ2 are the high-level phase and low-level phase of the chopper clock signal, respectively. In the Φ1 phase, capacitor C7 is connected to the positive and negative output terminals of the low-pass filter to sample the DC offset voltage output by the low-pass filter; in the Φ2 phase, capacitor C7 is connected between VP3 and VP2 to feed the offset voltage back to the first-stage transconductance circuit Gm1 through M16. In the Φ2 phase, capacitor C8 is connected to the positive and negative output terminals of the low-pass filter to sample the DC offset voltage output by the low-pass filter; in the Φ1 phase, capacitor C8 is connected between VP4 and VP2 to feed the offset voltage back to the first-stage transconductance circuit Gm1 through M17.

[0021] When there is an offset voltage in the output signal of the amplifier, the offset voltage detection circuit extracts the offset voltage as a DC voltage and stores it in capacitors C7 and C8 with opposite polarities. Since the leakage of the capacitor is very small, the offset voltage detector can work intermittently. During the stop period, capacitors C7 and C8 are connected to the offset voltage eliminator to further save power consumption.

[0022] In a specific embodiment, according to a preferred solution of the present invention, the low-pass filter is as follows: Figure 4 As shown, it includes duty cycle resistors and capacitors, namely, a first resistor R1, a second resistor R2, switches SW5, SW6 and a capacitor C9. The positive input terminal and the negative input terminal of the filter are respectively connected to one end of the first resistor R1 and one end of the second resistor R2, and the other end of the first resistor R1 and the other end of the second resistor R2 are respectively connected to one end of the switch SW5 and one end of the switch SW6. The other end of the switch SW5 is connected to one end of the capacitor C9 and serves as the positive output terminal of the filter; the other end of the switch SW6 is connected to the other end of the capacitor C9 and serves as the negative output terminal of the filter. The control signals of switches SW5 and SW6 are f SW, is a periodic signal with a duty cycle of 1 / N and the same frequency as the chopper clock, that is, the on-time of the switch per cycle is Ton = 1 / (N*f SW ). The equivalent resistance of the duty cycle resistor is N*R1 and N*R2, which increases the resistance value by N times, has high accuracy, and saves chip area.

[0023] In a specific embodiment, the offset voltage eliminator is composed of PMOS tubes M16 and M17, the source of M16 and the source of M17 are both connected to the power supply voltage VDD, the drain of M16 is connected to the drain of M4 in the operational amplifier, the drain of M17 is connected to the drain of M5 in the operational amplifier, the gate of M16 is connected to the voltage VP3, and the gate of M17 is connected to the voltage VP4. In actual design, M16 and M17 can be formed by dividing a part of the original M4 and M5, the gate voltage of M16 is the voltage VP2 plus the output offset voltage of the amplifier, and the gate voltage of M17 is the voltage VP2 minus the output offset voltage of the amplifier. In this way, the offset voltage is eliminated without changing the power consumption of the original circuit.

[0024] The chopper modulated instrument amplifier with an offset voltage elimination circuit of the embodiment of the present invention utilizes the existing two-stage transconductance of the chopper operational amplifier to achieve amplification, detection and elimination of the offset voltage, with low additional power consumption and little noise impact on the main circuit. At the same time, the low-pass filter in the offset voltage detector adopts a duty cycle resistor, which has high accuracy and small area.

[0025] The idea and method of a chopper modulated instrument amplifier with an offset voltage elimination circuit provided in the embodiment of the present invention, there are many methods and ways to implement the technical solution, the above is only the preferred implementation of the present invention, it should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention. All components not specified in this embodiment can be implemented by existing technologies.

Claims

1. A chopper-modulated instrument amplifier with an offset voltage elimination circuit, characterized in that: The invention comprises a first chopper CH1, a second chopper CH2, a chopper operational amplifier, a first input capacitor C1 and a second input capacitor C2, a first feedback capacitor C3 and a second feedback capacitor C4, an offset voltage detector and an offset voltage eliminator. The chopper operational amplifier comprises a first-stage transconductance circuit Gm1, a third chopper CH3, a second-stage transconductance circuit Gm2, a first Miller compensation capacitor C5 and a second Miller compensation capacitor C6. The positive end and the negative end of the input signal are respectively connected to the positive input end and the negative input end of the first chopper CH1. The positive output end and the negative output end of the first chopper CH1 are respectively connected to one end of the first input capacitor C1 and the second input capacitor C2. The other ends of the first input capacitor C1 and the second input capacitor C2 are respectively connected to the negative input end and the positive input end of the first-stage transconductance circuit Gm1. The positive output end and the negative output end of the first-stage transconductance circuit Gm1 are respectively connected to the positive input end and the negative input end of the third chopper CH3. The positive output end and the negative output end of the third chopper CH3 are respectively connected to the second-stage transconductance circuit Gm2. negative input terminal and positive input terminal, both ends of the first Miller compensation capacitor C5 are respectively connected to the positive output terminal and negative input terminal of the second-stage transconductance circuit Gm2, both ends of the second Miller compensation capacitor C6 are respectively connected to the negative output terminal and positive input terminal of the second-stage transconductance circuit Gm2, the positive output terminal and negative output terminal of the second-stage transconductance circuit Gm2 are respectively connected to the positive input terminal and negative input terminal of the second chopper CH2, the positive output terminal and negative output terminal of the second chopper CH2 are respectively connected to one end of the first feedback capacitor C3 and the second feedback capacitor C4, the other ends of the first feedback capacitor C3 and the second feedback capacitor C4 are respectively connected to the positive input terminal and negative input terminal of the first-stage transconductance circuit Gm1, the positive output terminal and negative output terminal of the second-stage transconductance circuit Gm2 are respectively connected to the positive input terminal and negative input terminal of the offset voltage detection circuit, the positive output terminal and negative output terminal of the offset voltage detector are respectively connected to the positive input terminal and negative input terminal of the offset voltage eliminator, and the offset voltage eliminator generates a DC current according to the result of the offset voltage detector to compensate for the offset current of the first-stage transconductance circuit; The offset voltage detector includes a fourth chopper CH4, a low-pass filter, single-pole double-throw switches SW1, SW2, SW3, SW4 and capacitors C7 and C8, wherein the positive output terminal and the negative output terminal of the chopper operational amplifier output signal are respectively connected to the positive input terminal and the negative input terminal of the fourth chopper CH4, the positive output terminal and the negative output terminal of the fourth chopper CH4 are respectively connected to the positive input terminal and the negative input terminal of the low-pass filter, the positive output terminal of the low-pass filter is connected to one fixed terminal of the single-pole double-throw switches SW1 and SW3, the other fixed terminals of SW1 and SW3 are respectively connected to the voltage VP3 and the voltage VP2, the negative output terminal of the low-pass filter is connected to one fixed terminal of the single-pole double-throw switches SW2 and SW4, the other fixed terminals of SW2 and SW4 are respectively connected to the voltage VP2 and the voltage VP4, the two ends of the capacitor C7 are respectively connected to the moving terminals of SW1 and SW2, and the two ends of the capacitor C8 are respectively connected to the moving terminals of SW3 and SW4.

2. The chopper-modulated instrument amplifier with an offset voltage elimination circuit as claimed in claim 1, characterized in that: The first-stage transconductance circuit Gm1 and the second-stage transconductance circuit Gm2 further include PMOS tubes M1, M2, M3, M4, M5, M6, M7, M12, M13, NMOS tubes M8, M9, M10, M11, M14, M15, the positive input terminal and the negative input terminal of the chopper operational amplifier are respectively connected to the gate of M3 and the gate of M2, the source of M2 and the source of M3 are both connected to the drain of M1, and the source of M1 is connected to the power supply voltage VDD, the gate of M1 is connected to the voltage VP1, the drain of M2 and the drain of M3 are connected to the source of M8 and the source of M9 respectively, the gate of M8 and the gate of M9 are both connected to the voltage VN2, the source of M8 and the source of M9 are connected to the drain of M10 and the drain of M11 respectively, the gate of M10 and the gate of M11 are both connected to the voltage VN1, the source of M10 and the source of M11 are both connected to ground, the drain of M8 and the drain of M9 The first Miller compensation capacitor C5 is connected to the drain of M12 and the drain of M12 respectively, the gate of M6 and the gate of M7 are both connected to the voltage VP3, the source of M6 and the source of M7 are connected to the drain of M4 and the drain of M5 respectively, the gate of M4 and the gate of M5 are both connected to the voltage VP2, the source of M4 and the source of M5 are both connected to the power supply voltage VDD, the drain of M6 and the drain of M7 are respectively connected to the positive input terminal and the negative input terminal of the third chopper CH3, the positive output terminal and the negative output terminal of the third chopper CH3 are respectively connected to the gate of M12 and the gate of M13, the drain of M12 and the drain of M13 are respectively connected to the drain of M14 and the drain of M15, the two ends of the first Miller compensation capacitor C5 are respectively connected to the gate of M12 and the drain of M12, the two ends of the second Miller compensation capacitor C6 are respectively connected to the gate of M13 and the drain of M13, the drain of M12 and the drain of M13 are respectively the positive output terminal and the negative output terminal.

3. The chopper-modulated instrument amplifier with an offset voltage elimination circuit as claimed in claim 1, characterized in that: The offset voltage eliminator includes two current source tubes, which eliminate the offset voltage in the first-stage transconductance circuit of the chopper operational amplifier; the offset voltage eliminator includes PMOS tubes M16 and M17, the source of M16 and the source of M17 are both connected to the power supply voltage VDD, the drain of M16 is connected to the drain of M4 in the operational amplifier, the drain of M17 is connected to the drain of M5 in the operational amplifier, the gate of M16 is connected to the voltage VP3, and the gate of M17 is connected to the voltage VP4.

4. The chopper-modulated instrument amplifier with an offset voltage elimination circuit as claimed in claim 1, characterized in that: The low-pass filter comprises a first resistor R1, a second resistor R2, switches SW5, SW6 and a capacitor C9, the positive input terminal and the negative input terminal of the filter are respectively connected to one end of the first resistor R1 and one end of the second resistor R2, the other end of the first resistor R1 and the other end of the second resistor R2 are respectively connected to one end of the switch SW5 and one end of the switch SW6, the other end of the switch SW5 is connected to one end of the capacitor C9 and serves as the positive output terminal of the filter; the other end of the switch SW6 is connected to the other end of the capacitor C9 and serves as the negative output terminal of the filter, and the control signals of the switches SW5 and SW6 are f SW , which is a periodic signal with a duty cycle of 1 / N and the same frequency as the chopper clock.

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