Semiconductor device and power conversion device

Abstract

In the semiconductor device (1), the emitter electrode (5) of the power semiconductor element (2) includes: a first sub-electrode (5a) formed in a region including a central portion of the surface of the semiconductor substrate (3); and a second sub-electrode (5b) formed in a region excluding the central portion of the surface of the semiconductor substrate. A first bonding wire (21-23) connects the first sub-electrode to an emitter terminal (13). A second bonding wire (24-26) connects the second sub-electrode to the emitter terminal. The first and second voltage detectors (41, 42) detect the voltage between the first and second sub-electrodes and the emitter terminal, respectively. The degradation of both the first bonding wire that is degraded in the early stage and the second bonding wire that is degraded in the late stage can be detected.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a power conversion device. Background Art

[0002] Generally, in a power module, the emitter electrode of a power semiconductor element is connected to an emitter terminal via a plurality of bonding wires. When the power semiconductor element is repeatedly turned on and off and the power semiconductor element is repeatedly heated and cooled, the bonding wires deteriorate due to the difference in linear expansion coefficient between the bonding wires and the emitter electrode.

[0003] For example, in the specification of International Publication No. 2018-211735 (Patent Document 1), the following method is disclosed: the emitter electrode is divided into a plurality of sub-electrodes, each two adjacent sub-electrodes are connected by a resistor portion, each sub-electrode and the emitter terminal are connected by a plurality of bonding wires, and when the voltage between a certain sub-electrode and the emitter terminal exceeds a threshold voltage, it is determined that the bonding wire has degraded.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: International Publication No. 2018-211735 Summary of the invention

[0007] However, Patent Document 1 fails to detect the degradation of both the wires that are degraded in the early stage and the wires that are degraded in the late stage among a plurality of bonding wires, and fails to accurately determine whether the power module as a whole is in the early stage or the late stage of degradation.

[0008] Therefore, a main object of the present disclosure is to provide a semiconductor device capable of detecting degradation of both a bonding wire that has degraded in the early stage and a bonding wire that has degraded in the final stage, and a power conversion device using the semiconductor device.

[0009] The semiconductor device disclosed in the present invention comprises: a semiconductor element including a semiconductor substrate, a first electrode, a second electrode and a control electrode, which allows a current of a value corresponding to a voltage applied to the control electrode to flow from the first electrode to the second electrode; a first terminal; and a plurality of bonding wires connecting the second electrode to the first terminal. The second electrode is divided into a plurality of sub-electrodes, and the plurality of sub-electrodes include: a first sub-electrode formed in a first region including a central portion on the surface of the semiconductor substrate; and a second sub-electrode formed in a second region excluding the central portion on the surface of the semiconductor substrate. The plurality of bonding wires include: a first bonding wire connecting the first sub-electrode to the first terminal; and a second bonding wire connecting the second sub-electrode to the first terminal. The semiconductor device also comprises: a first voltage detector detecting a voltage between the first sub-electrode and the first terminal; and a second voltage detector detecting a voltage between the second sub-electrode and the first terminal.

[0010] In this semiconductor device, the temperature of the first sub-electrode is higher than the temperature of the second sub-electrode, so the first bonding wire connected to the first sub-electrode degrades at the initial stage, and the second bonding wire connected to the second sub-electrode degrades at the final stage. In addition, when the first bonding wire degrades, the voltage of the first sub-electrode increases, and when the second bonding wire degrades, the voltage of the second sub-electrode increases. Therefore, based on the detection results of the first and second voltage detectors, the degradation of both the first bonding wire that degrades at the initial stage and the second bonding wire that degrades at the final stage can be detected. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a diagram showing the structure of a semiconductor device according to Embodiment 1.

[0012] Figure 2 yes Figure 1 Sectional view along line II-II.

[0013] Figure 3 It is used to illustrate the detection Figure 1 Circuit diagram showing the method of degradation degree of bonding wire.

[0014] Figure 4 This is a diagram showing the structure of a semiconductor device according to a second embodiment.

[0015] Figure 5 This is a diagram showing the structure of a semiconductor device according to a third embodiment.

[0016] Figure 6 This is a diagram showing the structure of a semiconductor device according to a fourth embodiment.

[0017] Figure 7 This is a diagram showing the structure of a semiconductor device according to a fifth embodiment.

[0018] Figure 8This is a diagram showing the structure of a semiconductor device according to a sixth embodiment.

[0019] Fig. 9 This is a diagram showing the configuration of a power conversion system according to a seventh embodiment.

[0020] Explanation of symbols

[0021] 1, 50, 51, 55, 60, 70, 84: semiconductor device; 2: power semiconductor element; 3: semiconductor substrate; 3a~3c: current source; 4: collector electrode; 5, 52: emitter electrode; 5a~5c, 52a~52d: secondary electrode; 6: gate electrode; 10: bottom plate; 11: insulating layer; 12: collector terminal; 13: emitter terminal; 14: gate terminal; 15, 16: monitor terminal; 21~32: bonding wire; 41~43: voltage detector; 45, 87: load; 61~63: determination unit; 64: temperature detection unit; 71: gate control unit; 72: reporting unit; 80: power conversion system; 81: power supply; 82: power conversion device; 83: main conversion circuit; 85: voltage detection unit; 86: control circuit. DETAILED DESCRIPTION

[0022] Implementation method 1.

[0023] Figure 1 This is a diagram showing the structure of the semiconductor device 1 according to the first embodiment. Figure 2 yes Figure 1 The II-II line cross-sectional view. Figure 1 as well as Figure 2 In the embodiment, the semiconductor device 1 includes a power semiconductor element 2 .

[0024] The power semiconductor element 2 is, for example, an IGBT (Insulated Gate Bipolar Transistor), and includes a semiconductor substrate 3, a collector electrode 4 (first electrode), an emitter electrode 5 (second electrode), and a gate electrode 6 (control electrode). The power semiconductor element 2 allows a current having a value corresponding to a voltage applied to the gate electrode 6 to flow from the collector electrode 4 to the emitter electrode 5.

[0025] The semiconductor substrate 3 is formed in a rectangular shape. The surface of the semiconductor substrate 3 has a side extending in the X direction in the figure and a side extending in the Y direction in the figure. The thickness direction of the semiconductor substrate 3 is the Z direction in the figure. The collector electrode 4 is formed in a manner covering the entire back surface of the semiconductor substrate 3.

[0026] The emitter electrode 5 and the gate electrode 6 are formed on the surface of the semiconductor substrate 3. The emitter electrode 5 is divided into three sub-electrodes 5a, 5b, and 5c. The sub-electrodes 5a to 5c are respectively formed in a rectangular shape, and the long sides of the sub-electrodes 5a to 5c are all oriented in the Y direction in the figure. The sub-electrode 5a (first sub-electrode) is arranged at the center of the surface of the semiconductor substrate 3, the sub-electrode 5b (second sub-electrode) is arranged on one side of the sub-electrode 5a (right side in the figure), and the sub-electrode 4c is arranged on the other side of the sub-electrode 5a (left side in the figure).

[0027] In other words, the surface of the semiconductor substrate 3 is divided into the first to third regions. The first region is a region including the central portion of the surface of the semiconductor substrate 3. The second region is a region excluding the central portion of the surface of the semiconductor substrate 3, and is a region on one side (right side in the figure) of the first region. The third region is a region on the other side (left side in the figure) of the first region. The third region may include the central portion of the surface of the semiconductor substrate 3, or may not include the central portion.

[0028] The gate electrode 6 is formed to cover the upper center portion of the first region in the figure, and the sub-electrode 5a is formed to cover the remaining portion of the first region. The sub-electrode 5b is formed to cover the second region, and the sub-electrode 5c is formed to cover the third region.

[0029] The emitter electrode 5 includes aluminum, aluminum silicon alloy (AlSi) or gold (Au). In order to prevent the emitter electrode 5 from being deteriorated due to temperature changes of the power semiconductor element 2, a metal film such as nickel (Ni) or copper is sometimes formed on the emitter electrode 5 by plating, evaporation or sputtering.

[0030] The semiconductor device 1 further includes a metal base plate 10 and a plurality of bonding wires 21 to 32. The base plate 10 is formed in a rectangular shape larger than the semiconductor substrate 3. An insulating layer 11 is formed on the surface of the base plate 10, and a collector terminal 12, an emitter terminal 13, a gate terminal 14, and monitor terminals 15 and 16 are formed on the surface of the insulating layer 11. The terminals 12 to 16 are each made of a metal material such as copper (Cu) or aluminum (Al).

[0031] The collector terminal 12 is formed in a rectangular shape larger than the semiconductor substrate 3, and is arranged in the center of the base plate 10 when viewed from above. The power semiconductor element 2 is arranged in the center of the surface of the collector terminal 12, and the collector electrode 4 is bonded by a conductive adhesive (not shown). The conductive adhesive is, for example, solder, sintered silver, etc.

[0032] The emitter terminal 13 (first terminal) is formed in a strip shape, extends in the X direction in the figure, and is arranged along one side of the lower side in the figure of the collector terminal 12. The bonding wires 21 to 23 connect the sub-electrode 5a to the center of the emitter terminal 13. The bonding wires 24 to 26 connect the sub-electrode 5b to one end (the right end in the figure) of the emitter terminal 13. The bonding wires 27 to 29 connect the sub-electrode 5c to the other end (the left end in the figure) of the emitter terminal 13.

[0033] When viewed from above, the bonding wires 21 to 29 extend in the Y direction in the figure. The bonding wires 21 to 23 are respectively bonded to multiple locations (3 locations in the figure) on the surface of the auxiliary electrode 5a, and bonded to the surface of the emitter terminal 13. The bonding wires 24 to 26 are respectively bonded to multiple locations (3 locations in the figure) on the surface of the auxiliary electrode 5b, and bonded to the surface of the emitter terminal 13. The bonding wires 27 to 29 are respectively bonded to multiple locations (3 locations in the figure) on the surface of the auxiliary electrode 5c, and bonded to the surface of the emitter terminal 13.

[0034] As a method of bonding a bonding wire to the surface of an electrode, there is a method of applying ultrasonic waves to the bonding wire while pressing the bonding wire to the surface of the electrode, thereby mechanically and electrically connecting the bonding wire to the electrode.

[0035] The gate terminal 14 is formed in a rectangular shape and is arranged near the gate electrode 6 along one side of the upper side of the collector terminal 12 in the figure. The long side of the gate terminal 14 faces the X direction in the figure. The bonding wire 30 is bonded to the surface of the gate electrode 6 and to the surface of the gate terminal 14, connecting the gate electrode 6 and the gate terminal 14.

[0036] The monitor terminal 15 (second terminal) is formed in a rectangular shape and is arranged near the sub-electrode 5a along one side of the upper side of the collector terminal 12 in the figure. The short side of the monitor terminal 15 faces the X direction in the figure. The bonding wire 31 is bonded to the surface of the sub-electrode 5a and to the surface of the monitor terminal 15, connecting the sub-electrode 5a and the monitor terminal 15.

[0037] The monitor terminal 16 (third terminal) is formed in a rectangular shape and is arranged near the auxiliary electrode 5b along one side of the upper side of the collector terminal 12 in the figure. The long side of the monitor terminal 16 faces the X direction in the figure. The bonding wire 32 is bonded to the surface of the auxiliary electrode 5b and to the surface of the monitor terminal 16, connecting the auxiliary electrode 5b and the monitor terminal 16.

[0038] The semiconductor device 1 further includes voltage detectors 41 to 43. The voltage detector 41 detects a voltage Va between the monitor terminal 15 and the emitter terminal 13 and outputs a signal indicating the detected value. Signal It is used to determine the degree of degradation of the bonding wires 21 to 23 that have degraded in the early stage.

[0039] The voltage detector 42 detects the voltage Vb between the monitor terminal 16 and the emitter terminal 13, and outputs a signal indicating the detected value. Signal It is used to determine the degree of degradation of the bonding wires 24 to 26 that have degraded in the final stage. It is used to determine the degree of degradation of the semiconductor device 1 as a whole.

[0040] The voltage detector 43 detects the voltage Vc between the monitor terminal 15 and the monitor terminal 16, and outputs a signal indicating the detected value. Signal Used to detect the temperature T of the power semiconductor element 2.

[0041] In addition, the power semiconductor element 2, the bonding wires 21 to 32, and the like are sealed with silicone or epoxy resin in order to protect them and ensure insulation.

[0042] The entire semiconductor device 1 may be configured as a power module, or only the base plate 10 and a portion mounted on the base plate in the semiconductor device 1 may be configured as a power module, and the voltage detectors 41 to 43 may be provided outside the power module.

[0043] Figure 3 2 is a circuit diagram for explaining a method for detecting the degree of degradation of the bonding wires 21 to 26. Figure 3 In the figure, the bonding wires 21 to 29 are represented by symbols representing resistor elements. In addition, the current sources 3a to 3c correspond to the portion between the collector electrode 4 and the auxiliary electrodes 5a to 5c in the semiconductor substrate 3, and when the power semiconductor element 2 is turned on, a certain current Ia to Ic flows from the collector electrode 4 to the auxiliary electrodes 5a to 5c.

[0044] The collector terminal 12 is connected to a line of a DC voltage VDC, and the emitter terminal 13 is connected to a line of a ground voltage GND via a load 45. One terminal of each of the current sources 3a to 3c is connected to the collector terminal 12, and the other terminals thereof are connected to the sub-electrodes 5a to 5c, respectively. The bonding wires 21 to 23 are connected between the sub-electrode 5a and the emitter terminal 13, the bonding wires 24 to 26 are connected between the sub-electrode 5b and the emitter terminal 13, and the bonding wires 27 to 29 are connected between the sub-electrode 5c and the emitter terminal 13. The sum of the currents Ia to Ic flowing through the current sources 3a to 3c is the current IL flowing through the load 45.

[0045] When the semiconductor device 1 is new, the bonding portions between the bonding wires 21 to 29 and the auxiliary electrodes 5a to 5c are not degraded. When the power semiconductor element 2 is repeatedly turned on and off, the bonding portions between the bonding wires 21 to 29 and the auxiliary electrodes 5a to 5c are gradually degraded.

[0046] The temperature of the auxiliary electrode 5a formed in the first region including the central portion of the surface of the semiconductor substrate 3 is higher than the temperature of the auxiliary electrode 5b formed in the second region not including the central portion of the surface of the semiconductor substrate 3. Therefore, the joints between the bonding wires 21 to 23 and the auxiliary electrode 5a deteriorate earlier than the joints between the bonding wires 24 to 26 and the auxiliary electrode 5b. This will be described in detail later.

[0047] When the resistance value of each bonding wire 21 to 29 is set to R, in the case where the semiconductor device 1 is a new product, the voltage Va between the sub-electrode 5a and the emitter terminal 13 is expressed by the product of the current Ia flowing from the collector terminal 12 to the sub-electrode 5a via the current source 3a and the resistance value (R / 3) of the parallel connection of the three bonding wires 21 to 23, Va=Ia×R / 3.

[0048] The voltage Vb between the auxiliary electrode 5b and the emitter terminal 13 is expressed by the product Vb=Ib×R / 3 of the current Ib flowing from the collector terminal 12 to the auxiliary electrode 5b via the current source 3b and the resistance value (R / 3) of the parallel connection of the three bonding wires 24 to 26.

[0049] When the power semiconductor element 2 is repeatedly turned on and off, the bonding portion between the bonding wires 21 to 23 and the auxiliary electrode 5a first deteriorates. For example, when the bonding wire 21 deteriorates and falls off from the auxiliary electrode 5a, the voltage Va is represented by the product of the current Ia and the resistance value (R / 2) of the parallel connection of the two bonding wires 22 and 23, Va=Ia×R / 2. In addition, when the two bonding wires 21 and 22 deteriorate and fall off, the voltage Va is represented by the product of the current Ia and the resistance value R of one bonding wire 23, Va=Ia×R.

[0050] That is, when the bonding wire 21 is disconnected, the voltage Va increases from Ia×R / 3 to Ia×R / 2, and when the bonding wire 22 is disconnected, the voltage Va increases from Ia×R / 2 to Ia×R. The degree of deterioration of the joints between the bonding wires 21 to 23 and the auxiliary electrode 5 a is determined.

[0051] Furthermore, when the power semiconductor element 2 is repeatedly turned on and off, the bonding portion between the bonding wires 24 to 26 and the auxiliary electrode 5b is degraded. For example, when the bonding wire 24 is degraded and falls off, the voltage Vb is expressed by the product of the current Ib and the resistance value (R / 2) of the parallel connection of the two bonding wires 25 and 26, Vb=Ib×R / 2. In addition, when the two bonding wires 24 and 25 are degraded and fall off, the voltage Vb is expressed by the product of the current Ib and the resistance value R of one bonding wire 26, Vb=Ib×R.

[0052] That is, when the bonding wire 24 is disconnected, the voltage Vb rises from Ib×R / 3 to Ib×R / 2, and when the bonding wire 25 is disconnected, the voltage Vb rises from Ib×R / 2 to Ib×R. The degree of deterioration of the joints between the bonding wires 24 to 26 and the auxiliary electrode 5 b is determined.

[0053] Next, the reason why the bonding portions of the bonding wires 21 to 23 and the auxiliary electrode 5a deteriorate earlier than the bonding portions of the bonding wires 24 to 26 and the auxiliary electrode 5b will be described in detail. When a voltage of an inactive level (e.g., 0 V) ​​is applied between the gate terminal 14 and the emitter terminal 13, the power semiconductor element 2 is in an off state (high resistance state), and no current flows between the collector terminal 12 and the emitter terminal 13.

[0054] When an activation level voltage (e.g., 15 V) is applied between the gate terminal 14 and the emitter terminal 13, the power semiconductor element 2 becomes conductive (low resistance state), and current flows from the collector terminal 12 to the emitter terminal 13 via the collector electrode 4, the semiconductor substrate 3, the emitter electrode 5, and the bonding wires 21 to 29.

[0055] The power semiconductor element 2 is generally switched at a high frequency of several kHz or more to switch between the on state and the off state. When the power semiconductor element 2 is in the on state, heat is generated by the current flowing between the collector electrode 4 and the emitter electrode 5, and the power semiconductor element 2 expands due to the temperature rise. On the contrary, when the power semiconductor element 2 is in the off state, no current flows, so no heat is generated, and the power semiconductor element 2 contracts due to the temperature drop.

[0056] When the power semiconductor element 2 is repeatedly turned on and off, and repeatedly expands and contracts, deformation is repeatedly generated between the power semiconductor element 2 and the member connected thereto. The largest deformation occurs at the junction of the auxiliary electrodes 5a to 5c and the bonding wires 21 to 29 where a large current is concentrated in a small area.

[0057] The joint between the auxiliary electrode and the bonding wire gradually deteriorates due to intermittent deformation. In the early stage of degradation, cracks are generated in the joint, and the cracks grow larger, and eventually the bonding wire falls off from the auxiliary electrode or breaks.

[0058] For example, when the bonding wire 21 is completely detached from the auxiliary electrode 5 a , no current flows through the bonding wire 21 , so that the current flowing through the other bonding wires 22 and 23 increases, accelerating the degradation of the other bonding wires 22 and 23 .

[0059] For example, when the current stops flowing through the bonding wire 21 and the current flowing through the other bonding wires 22 and 23 increases, the voltage Va between the sub-electrode 5a and the emitter terminal 13 rises (jumps) instantaneously. By detecting the rise in the voltage Va, the degree of degradation of the bonding wires 21 to 23 can be detected. Similarly, by detecting the rise in the voltage Vb, the degree of degradation of the bonding wires 24 to 26 can be detected.

[0060] In addition, generally speaking, the area of ​​the power semiconductor element 2 is very large, so the cooling efficiency and temperature are different in the central part and the peripheral part of the power semiconductor element 2. Figure 2 ) is bonded to the surface of the collector terminal 12 using a conductive adhesive. The collector terminal 12 is formed on the surface of the base plate 10 via the insulating layer 11. The base plate 10 is combined with a cooler (not shown).

[0061] In the center of the power semiconductor, heat is also generated around it, whereas in the peripheral part of the power semiconductor element 2, there is no heat generating body outside it. Therefore, even if the cooler provides cooling force uniformly to the entire back surface of the power semiconductor element 2, the cooling capacity at the center of the power semiconductor element 2 is smaller than the cooling capacity at the peripheral part of the power semiconductor element 2.

[0062] Therefore, the temperature of the central portion of the power semiconductor element 2 is higher than that of the peripheral portion thereof. The higher the temperature, the faster the degradation of the joint between the bonding wire and the auxiliary electrode proceeds. Therefore, the bonding wires 21 to 23 connected to the central portion of the power semiconductor element 2 fall off earlier than the bonding wires 24 to 26 connected to the peripheral portion of the power semiconductor element 2. That is, the bonding wires 21 to 23 of the bonding wires 21 to 29 degrade at the initial stage, and the bonding wires 24 to 26 degrade at the final stage.

[0063] Next, a method of detecting the temperature T of the power semiconductor element 2 will be described. The voltage detector 43 ( Figure 1 ) detects the voltage Vt between the monitor terminals 15 and 16, that is, the voltage Vt between the auxiliary electrodes 5a and 5b = Va-Vb. When the power semiconductor element 2 is turned on, a voltage Vt is generated between the auxiliary electrodes 5a and 5b. The voltage Vt is generated because there is a current distribution between the collector electrode 4 and the emitter electrode 5 (that is, the auxiliary electrodes 5a to 5c). Therefore, even when the power semiconductor element 2 is a new product, the voltage Vt is generated.

[0064] When the power semiconductor element 2 is turned on and off intermittently, the voltage Vt also changes intermittently. The voltage Vt when the power semiconductor element 2 is turned on changes according to the temperature T of the power semiconductor element 2. When any of the bonding wires 21 to 26 falls off, the voltage Vt instantaneously shows a continuous change (jump), but as long as the bonding wire does not fall off, the voltage Vt reflects the temperature T of the power semiconductor element 2.

[0065] Therefore, when the voltage Vt is repeatedly measured, the change in the temperature T of the power semiconductor element 2 can be measured. The change in the temperature T of the power semiconductor element 2 reflects the change in the temperature of the base plate 10 ( Figure 1 ) or reflects the degradation of the solder or sintered silver that bonds the collector electrode 4 to the collector terminal 12. Therefore, by repeatedly measuring the voltage Vt, it is also possible to infer the degradation of the capability of the cooler that cools the semiconductor device 1.

[0066] By repeatedly and continuously measuring the voltage Vt, it is also possible to detect the bond wire falling off and the voltage Vt showing a continuous change (jump). When the continuous change (jump) of the voltage Vt is detected, the relationship between the voltage Vt and the temperature T of the power semiconductor element 2 is reset, and the temperature change can be continuously measured. That is, when it is assumed that the temperature T is the same before and after the jump, the new voltage Vt is replaced with the previous voltage Vt and the measurement is continued. To this end, it is necessary to repeatedly measure the voltage Vt at a certain high frequency, but the measurement frequency only needs to be faster than the speed at which the temperature T changes under the same conditions. Generally speaking, every few tenths of a second to every few seconds is sufficient.

[0067] This voltage Vt reflects the temperature dependency of the resistance value of the material of the emitter electrode 5, that is, metal (aluminum, copper, etc.), and is therefore a straight line with respect to the temperature T. The temperature coefficient is also known, so correction after the jump is easy.

[0068] In addition, since a large current does not flow through the bonding wires 31 and 32 connected to the monitor terminals 15 and 16, the degradation of the bonding wires 31 and 32 progresses much more slowly than that of the bonding wires 21 to 29. Therefore, the measurement can be continued with good reliability until the end of the degradation of the semiconductor device 1. Moreover, since the temperature of the emitter electrode 5 formed on the surface of the power semiconductor element 2 is reflected, rather than being detected by a separate temperature sensor such as a substrate mounted inside the semiconductor device 1, the temperature of the power semiconductor element 2 itself is measured, and the load condition of the power semiconductor element 2 can be accurately known.

[0069] As described above, in the first embodiment, the degradation degree of the bonding wires 21 to 23 that are degraded in the early stage and the degradation degree of the bonding wires 24 to 26 that are degraded in the final stage can be separately determined based on the detection results of the voltage detectors 41 and 42. Furthermore, based on the determination results, it is possible to accurately determine to what extent the degradation of the semiconductor device 1 as a whole has progressed, and it is also possible to accurately estimate the remaining life of the semiconductor device 1.

[0070] In addition, the temperature T of the power semiconductor element 2 can be measured based on the detection result of the voltage detector 43. Therefore, the degradation of the ability to cool the semiconductor device 1 and the load condition of the power semiconductor element 2 can be accurately detected.

[0071] In addition, the power semiconductor element 2 may be a semiconductor element other than an IGBT, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), a BJT (Bipolar Junction Transistor), a GTO (Gate Turn-Off Thyristor), or a GCT (Gate Commutated Turn-off Thyristor). For example, in the case of a MOSFET, the electrode connected to the positive side of the DC power supply is the drain electrode, and the electrode connected to the negative side is the source electrode.

[0072] Implementation method 2.

[0073] In the first embodiment, the monitor terminals 15 and 16 are connected to the auxiliary electrodes 5a and 5b, respectively. Figure 1At the upper end of the power semiconductor device 2, the voltage Vt=Va-Vb between the monitor terminals 15 and 16 is detected by the voltage detector 43, and the temperature T of the power semiconductor device 2 is detected based on the detection result of the voltage detector 43. However, since the voltage Vt between the monitor terminals 15 and 16 is small, the detection accuracy of the temperature T may be reduced. In the second embodiment, this problem is solved.

[0074] Figure 4 is a diagram showing the structure of a semiconductor device 50 according to Embodiment 2, and is similar to Figure 1 Comparison chart. Figure 4 The semiconductor device 50 is different from the semiconductor device 1 in the position of the monitor terminal 16. That is, in the semiconductor device 1, the monitor terminal 16 is arranged along the right end of the upper side of the collector terminal 12 in the figure, and is connected to the upper end of the auxiliary electrode 5b in the figure by the bonding wire 32.

[0075] In contrast, in the semiconductor device 50 , the monitor terminal 16 is arranged along the lower end of the right side of the collector terminal 12 in the figure, and is connected to the lower end of the sub-electrode 5 b in the figure by the bonding wire 32 .

[0076] Next, the reason is described. In the semiconductor device 1, 50, when the power semiconductor element 2 is turned on, the main current of the power semiconductor element 2 flows from the collector electrode 4 ( Figure 2 ) flows into the back side of the semiconductor substrate 3, flows in the thickness direction (Z direction) of the semiconductor substrate 3 and flows out to the surface of the semiconductor substrate 3, and flows from the upper side to the lower side in the figure in the auxiliary electrodes 5a to 5c and the bonding wires 21 to 29. Therefore, a voltage drop ΔVa is generated between the upper end and the lower end of the auxiliary electrode 5a, and a voltage drop ΔVb is generated between the upper end and the lower end of the auxiliary electrode 5b.

[0077] Therefore, the detected value of the voltage Vt when detecting the voltage Vt between the upper end of the auxiliary electrode 5a and the lower end of the auxiliary electrode 5b is greater by ΔVb than when detecting the voltage Vt between the upper end of the auxiliary electrode 5a and the upper end of the auxiliary electrode 5b. Therefore, in the second embodiment, the voltage Vt between the upper end of the auxiliary electrode 5a and the lower end of the auxiliary electrode 5b is detected.

[0078] As described above, in the second embodiment, the voltage Vt between the upper end of the auxiliary electrode 5a and the lower end of the auxiliary electrode 5b is detected by the voltage detector 43, so that a larger voltage Vt can be detected compared to the first embodiment, and the detection accuracy of the temperature T of the power semiconductor element 2 can be improved.

[0079] In addition, in the present embodiment 2, the voltage Vt between the upper end of the auxiliary electrode 5a and the lower end of the auxiliary electrode 5b is detected, but it is not limited to this. The voltage Vt between a first position at a first distance away from one end of the auxiliary electrode 5a and a second position at a second distance different from the first distance away from one end of the auxiliary electrode 5b can also be detected.

[0080] Implementation method 3.

[0081] Figure 5 is a diagram showing the structure of a semiconductor device 51 according to Embodiment 3, and is similar to Figure 1 Comparison chart. Figure 5 The semiconductor device 51 is different from the semiconductor device 1 in that the emitter electrode 5 is replaced by an emitter electrode 52 .

[0082] The emitter electrode 52 is divided into four sub-electrodes 52a, 52b, 52c, and 52d. The sub-electrode 52a makes the sub-electrode 5a ( Figure 1 ) is reduced in width except for the upper end in the figure, and is connected to the emitter terminal 13 using only the central bonding wire 22 among the three bonding wires 21 to 23. The auxiliary electrode 52a is formed in the first region including the central portion of the surface of the semiconductor substrate 3. The upper end of the auxiliary electrode 52a is connected to the monitor terminal 15 using the bonding wire 31.

[0083] The auxiliary electrode 52b makes the auxiliary electrode 5b ( Figure 1 ) is reduced in width, and only the right-hand bonding wire 26 in the figure is connected to the emitter terminal 13 among the three bonding wires 24 to 26. The auxiliary electrode 52b is formed in the second region excluding the central portion of the surface of the semiconductor substrate 3. The upper end of the auxiliary electrode 52b is connected to the monitor terminal 16 by the bonding wire 32.

[0084] The auxiliary electrode 52c makes the auxiliary electrode 5c ( Figure 1 ) is increased in width except for the upper end in the figure, and is connected to the emitter terminal 13 by four bonding wires 21, 27 to 29. The sub-electrode 52c is formed in a third region different from the first and second regions. The third region may include the central portion of the surface of the semiconductor substrate 3 or may not include the central portion.

[0085] The auxiliary electrode 52d is formed between the auxiliary electrode 52a and the auxiliary electrode 52b, and is connected to the emitter terminal 13 by three bonding wires 23 to 25. The auxiliary electrode 52d is formed in the fourth region between the first region and the second region. The fourth region may include the central portion of the surface of the semiconductor substrate 3 or may not include the central portion.

[0086] In the third embodiment, the auxiliary electrode 52a and the emitter terminal 13 are connected by only one bonding wire 22. Therefore, compared with the case where the auxiliary electrode 52a and the emitter terminal 13 are connected by a plurality of bonding wires, the deterioration of the bonding wire 22 has a greater influence on the voltage Va between the auxiliary electrode 52a and the emitter terminal 13. Therefore, compared with the first embodiment, the deterioration of the bonding wire 22 that is deteriorated in the early stage can be detected with good accuracy.

[0087] Similarly, in the third embodiment, the auxiliary electrode 52b and the emitter terminal 13 are connected by only one bonding wire 26, so the degradation of the bonding wire 26 has a greater influence on the voltage Vb between the auxiliary electrode 52b and the emitter terminal 13 than when the auxiliary electrode 52b and the emitter terminal 13 are connected by a plurality of bonding wires. Therefore, the degradation of the bonding wire 26 that is degraded at the end stage can be detected with good accuracy compared with the first embodiment.

[0088] Furthermore, since degradation of the bonding wire 22 that is degraded in the initial stage and degradation of the bonding wire 26 that is degraded in the final stage can be detected with high accuracy, degradation of the semiconductor device 51 as a whole can be detected with high accuracy, and the remaining life of the semiconductor device 51 can be estimated with high accuracy.

[0089] Furthermore, when the number of bonding wires connecting the emitter electrode 52 and the emitter terminal 13 is extremely large, even if the number of bonding wires connecting the sub-electrodes 52 a and 52 b and the emitter terminal 13 is greater than one, the same effect as that of the third embodiment can be obtained.

[0090] Implementation method 4.

[0091] Figure 6 is a diagram showing the structure of a semiconductor device 55 according to a fourth embodiment. Figure 5 Comparison chart. Figure 6 The semiconductor device 55 is different from the semiconductor device 51 in the position of the monitor terminal 16. That is, in the semiconductor device 51, the monitor terminal 16 is arranged along the right end of the upper side of the collector terminal 12 in the figure, and is connected to the upper end of the auxiliary electrode 52b in the figure by the bonding wire 32.

[0092] In contrast, in the semiconductor device 55, the monitor terminal 16 is arranged along the lower end of the right side of the collector terminal 12 in the figure, and is connected to the lower end of the auxiliary electrode 52b in the figure by the bonding wire 32. That is, the fourth embodiment is a modification of the second embodiment ( Figure 4 ) and implementation mode 3 ( Figure 5 ) are combined.

[0093] In the semiconductor devices 51 and 55, when the power semiconductor element 2 is turned on, the main current of the power semiconductor element 2 flows from the collector electrode 4 ( Figure 2 ) flows into the back side of the semiconductor substrate 3, flows in the thickness direction (Z direction) of the semiconductor substrate 3 and flows out to the surface of the semiconductor substrate 3, and flows from the upper side to the lower side in the figure in the auxiliary electrodes 52a to 52d and the bonding wires 21 to 29. Therefore, a voltage drop ΔVA is generated between the upper end and the lower end of the auxiliary electrode 52a, and a voltage drop ΔVB is generated between the upper end and the lower end of the auxiliary electrode 52b.

[0094] The width of the auxiliary electrode 52a is narrower than the width of the auxiliary electrode 5a, so the voltage drop ΔVA between the upper end and the lower end of the auxiliary electrode 52a is larger than the voltage drop ΔVa between the upper end and the lower end of the auxiliary electrode 5a. In addition, the width of the auxiliary electrode 52b is narrower than the width of the auxiliary electrode 5b, so the voltage drop ΔVB between the upper end and the lower end of the auxiliary electrode 52b is larger than the voltage drop ΔVb between the upper end and the lower end of the auxiliary electrode 5b.

[0095] Compared with the case where the voltage Vt between the upper end of the auxiliary electrode 52a and the upper end of the auxiliary electrode 52b is detected, the detected value of the voltage Vt is greater by ΔVB when the voltage Vt between the upper end of the auxiliary electrode 52a and the lower end of the auxiliary electrode 52b is detected. Therefore, in the present fourth embodiment, the voltage Vt between the upper end of the auxiliary electrode 52a and the lower end of the auxiliary electrode 52b is detected.

[0096] As described above, in this embodiment 4, in addition to being able to obtain the same effect as in embodiment 3, auxiliary electrodes 52a and 52b having a width narrower than that of the auxiliary electrodes 5a and 5b are formed, and the voltage Vt between the upper end of the auxiliary electrode 52a and the lower end of the auxiliary electrode 52b is detected by the voltage detector 43. Therefore, compared with embodiment 1, a larger voltage Vt can be detected, and the detection accuracy of the temperature T of the power semiconductor element 2 can be improved.

[0097] In addition, in the present embodiment 4, the voltage Vt between the upper end of the auxiliary electrode 52a and the lower end of the auxiliary electrode 52b is detected, but it is not limited to this. The voltage Vt between the first position at a first distance away from one end of the auxiliary electrode 52a and the second position at a second distance different from the first distance away from one end of the auxiliary electrode 52b can also be detected.

[0098] Implementation method 5.

[0099] Figure 7 is a diagram showing the structure of a semiconductor device 60 according to Embodiment 5, and is similar to Figure 1 Comparison chart. Figure 7 , the semiconductor device 60 and the semiconductor device 1 ( Figure 1) is different in that determination units 61 to 63 and a temperature detection unit 64 are added.

[0100] The determination unit 61 determines the output signal of the voltage detector 41 based on the output signal of the voltage detector 41. Determines the degree of degradation of the bonding wires 21 to 23 that are initially degraded, and outputs a signal indicating the determination result The output signal of the voltage detector 41 The larger the indicated voltage Va is, the higher the determination unit 61 determines that the degree of degradation of the bonding wires 21 to 23 is.

[0101] The determination unit 62 determines the output signal of the voltage detector 42 based on the output signal of the voltage detector 42. Determines the degree of degradation of the bonding wires 24 to 26 that have degraded in the final stage, and outputs a signal indicating the determination result The output signal of the voltage detector 42 The larger the indicated voltage Vb is, the higher the determination unit 62 determines that the degree of degradation of the bonding wires 24 to 26 is.

[0102] The determination unit 63 determines the output signals of the determination units 61 and 62. Determines the degree of degradation of the semiconductor device 70 as a whole and outputs a signal indicating the determination result. The determination unit 63, for example, converts the output signal of the determination unit 61 into The degradation degree of the bonding wires 21 to 23 represented by the output signal of the determination unit 62 is The degradation degree of the bonding wires 24 to 26 indicated by the voltage detector 43 is added together to obtain the degradation degree of the semiconductor device 70 as a whole. Detects the temperature T of the power semiconductor element 2 and outputs a signal indicating the detected value

[0103] As described above, according to the fifth embodiment, the output signal of the semiconductor device 60 can be used. The degradation degrees of the bonding wires 21 to 23 that are degraded in the initial stage, the degradation degrees of the bonding wires 24 to 26 that are degraded in the final stage, the degradation degree of the semiconductor device 70 as a whole, and the temperature T of the power semiconductor element 2 are detected.

[0104] In addition, the entire semiconductor device 60 can be set as a power module, or only the base plate 10 in the semiconductor device 60 and the part mounted on the base plate 10 can be set as a power module, and voltage detectors 41~43, determination units 61~63 and temperature detection unit 64 are set outside the power module.

[0105] Implementation method 6.

[0106] Figure 8is a diagram showing the structure of a semiconductor device 70 according to Embodiment 6, and is similar to Figure 7 Comparison chart. Figure 8 , the semiconductor device 70 and the semiconductor device 60 ( Figure 7 ) The difference is that a gate control unit 71 and a reporting unit 72 are added.

[0107] The gate control unit 71 generates a gate control signal based on the output signals of the determination units 61 to 63. The output signal of the temperature detection unit 64 And the external control signal CNT applies the gate voltage Vg between the gate terminal 14 and the monitor terminal 15 (or the monitor terminal 16).

[0108] The external control signal CNT is, for example, a PWM (Pulse Width Modulation) signal, which is a signal that alternately becomes an "H" level and an "L" level. Basically, when the external control signal CNT is at an "L" level, the gate voltage Vg becomes 0V and the power semiconductor element 2 is turned off. In addition, when the external control signal CNT is at an "H" level, the gate voltage Vg becomes 15V and the power semiconductor element 2 is turned on.

[0109] The gate control unit 71 receives the output signal of the determination unit 61. When the degree of degradation of the bonding wires 21 to 23 indicated by is low, the gate voltage Vg is applied between the gate terminal 14 and the monitor terminal 15. The gate control unit 71 generates a gate voltage Vg based on the output signal of the determination unit 61. When the degree of degradation of the bonding wires 21 to 23 shown is high, a gate voltage Vg is applied between the gate terminal 14 and the monitor terminal 16 .

[0110] In addition, the gate control unit 71 receives the output signal of the determination unit 63. When the indicated degradation degree of the semiconductor device 70 reaches the maximum value, it is determined that the life of the semiconductor device 70 has ended, the gate voltage Vg is fixed to 0 V, and the power semiconductor element 2 is fixed to the off state.

[0111] In addition, the gate control unit 71 is connected to the output signal of the determination unit 61 to 63. Regardless, the output signal of the temperature detection unit 64 When the temperature T of the power semiconductor element 2 exceeds the first upper limit temperature, it is determined that the capacity of the cooler cooling the power semiconductor element 2 has decreased or the load current has exceeded the upper limit value, and the gate voltage Vg is fixed to 0 V to fix the power semiconductor element 2 in the off state.

[0112] The reporting unit 72 receives the output signal of the determining unit 63. If the degradation degree of the semiconductor device 70 indicated by the indicator reaches an upper limit value lower than the above-mentioned maximum value, it is determined that the life of the semiconductor device 70 is at the end, and a warning signal is turned on. It becomes the "H" level which is the activation level.

[0113] In addition, the reporting unit 72 receives the output signal of the determining unit 63. When the degradation degree of the semiconductor device 70 indicated by the signal reaches the above-mentioned maximum value, it is determined that the life of the semiconductor device 70 has expired, and an error signal is generated. It becomes the "H" level which is the activation level.

[0114] In addition, the reporting unit 72 receives the output signal of the temperature detection unit 64. When the temperature T of the power semiconductor element 2 indicated by the indicator exceeds the second upper limit temperature which is lower than the first upper limit temperature, it is determined that the capacity of the cooler cooling the power semiconductor element 2 is reduced or the load current exceeds the rated value, and a warning signal is turned on. It becomes the "H" level which is the activation level.

[0115] In addition, the reporting unit 72 receives the output signal of the temperature detection unit 64. If the temperature T of the power semiconductor element 2 indicated by the display exceeds the first upper limit temperature, it is determined that the capacity of the cooler for cooling the power semiconductor element 2 is reduced or the load current exceeds the upper limit value, and an error signal is generated. It becomes the "H" level which is the activation level.

[0116] As described above, in the sixth embodiment, when the life of the semiconductor device 70 is exhausted and the temperature T of the power semiconductor element 2 exceeds the first upper limit temperature, the power semiconductor element 2 can be fixed in the off state. and error signals The degree of degradation of the semiconductor device 70 , a decrease in cooling capability, an increase in load current, and the like can be easily detected.

[0117] In addition, the entire semiconductor device 70 can be set as a power module, or only the base plate 10 in the semiconductor device 70 and the portion mounted on the base plate 10 can be set as a power module, and voltage detectors 41 to 43, determination units 61 to 63, a temperature detection unit 64, a gate control unit 71 and a reporting unit 72 are set outside the power module.

[0118] Implementation method 7.

[0119] In this embodiment 7, any of the semiconductor devices 1, 50, 51, 55, 60, and 70 of the above-mentioned embodiments 1 to 6 is applied to a power conversion device. The present disclosure is not limited to a specific power conversion device, but the following describes a case where the present disclosure is applied to a three-phase inverter as embodiment 7.

[0120] Fig. 9 is a block diagram showing the configuration of a power conversion system 80 according to Embodiment 7. Fig. 9 In the diagram, the power conversion system 80 includes a power source 81 , a power conversion device 82 , and a load 87 .

[0121] The power supply 81 is a DC power supply, and supplies DC power to the power conversion device 82. The power supply 81 can be composed of various power supplies. For example, the power supply 81 can be composed of a DC system, a solar cell, or a storage battery. The power supply 81 can also be composed of a rectifier circuit or an AC / DC converter connected to an AC system. The power supply 81 can also be composed of a DC / DC converter that converts the DC power output from the DC system into a predetermined power.

[0122] The power conversion device 82 is a three-phase inverter connected between the power supply 81 and the load 87. The power conversion device 82 converts the DC power supplied from the power supply 81 into AC power, and supplies the AC power to the load 87. The power conversion device 82 includes: a main conversion circuit 83 that converts the DC power into AC power and outputs it; and a control circuit 86 that outputs a control signal for controlling the main conversion circuit 83 to the main conversion circuit 83.

[0123] The load 87 is a three-phase motor driven by the AC power supplied from the power conversion device 82. The load 87 is not limited to a specific use, and is a motor mounted on various electrical equipment. For example, the load 87 is a motor mounted on a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioner.

[0124] The following describes the details of the power conversion device 82. The main conversion circuit 83 includes a semiconductor device 84. The semiconductor device 84 includes the constituent elements of any of the semiconductor devices 1, 50, 51, 55, 60, and 70 of embodiments 1 to 6. The semiconductor device 84 includes a power semiconductor element 2 and a freewheeling diode (not shown) connected in anti-parallel to each other. The power semiconductor element 2 performs switching to convert the DC power supplied from the power supply 81 into AC power and supply it to the load 87. The semiconductor device 84 includes a voltage detection unit 85. The voltage detection unit 85 includes voltage detectors 41 to 43 ( Figure 1 ).

[0125] There are various structures as the specific circuit structure of the main conversion circuit 83, but in this embodiment 7, the main conversion circuit 83 is a 2-level three-phase full-bridge circuit. The circuit may include 6 power semiconductor elements 2 and 6 freewheeling diodes respectively connected in anti-parallel with the 6 power semiconductor elements 2. Among the 6 power semiconductor elements 2, two are connected in series to form 3 upper and lower branches. Each upper and lower branch constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminal of each upper and lower branch, that is, the three output terminals of the main conversion circuit 83, is connected to the load 87. At least one of the 6 power semiconductor elements 2 is mounted on a semiconductor device 84 that includes the constituent elements of any semiconductor device among the semiconductor devices 1, 50, 51, 55, 60, 70 of embodiments 1 to 6.

[0126] The main conversion circuit 83 includes a drive circuit (not shown) for driving each power semiconductor element 2. The drive circuit may be built into the semiconductor device 84 or may be provided separately from the semiconductor device 84. The drive circuit generates a drive signal for driving the power semiconductor element 2 of the main conversion circuit 83 and supplies it to the gate electrode 6 of the power semiconductor element 2.

[0127] Specifically, the drive circuit outputs a drive signal for turning the power semiconductor element 2 on or off to the gate electrode 6 of each power semiconductor element 2 in accordance with a control signal from the control circuit 86. When the power semiconductor element 2 is maintained in the on state, the drive signal is a voltage signal (on signal) higher than the threshold voltage of the power semiconductor element 2, and when the power semiconductor element 2 is maintained in the off state, the drive signal is a voltage signal (off signal) lower than the threshold voltage of the power semiconductor element 2.

[0128] The control circuit 86 controls each power semiconductor element 2 of the main conversion circuit 83 so as to supply desired power to the load 87. Specifically, the control circuit 86 calculates the time (on-time) when each power semiconductor element 2 of the main conversion circuit 83 should be in the on state according to the power to be supplied to the load 87. For example, the control circuit 86 can control the main conversion circuit 83 by PWM control that modulates the on-time of the power semiconductor element 2 according to the voltage to be output.

[0129] The control circuit 86 outputs a control instruction (control signal) to the drive circuit included in the main conversion circuit 83 in such a manner that an on signal is outputted corresponding to the power semiconductor element 2 in the on state at each time point, and an off signal is outputted corresponding to the power semiconductor element 2 in the off state. The drive circuit outputs an on signal or an off signal as a drive signal to the gate electrode of the power semiconductor element 2 in accordance with the control signal.

[0130] In addition, when the semiconductor device 84 includes the components of the semiconductor device 70 of the sixth embodiment, a drive circuit is not required, and the control circuit 86 outputs the external control signal CNT to the gate control unit 71 .

[0131] In addition, when the semiconductor device 84 includes the components of the semiconductor device 1, for example, the control circuit 86 controls the output signal of the voltage detection unit 85 (voltage detectors 41 to 43) included in the semiconductor device 84. The degradation degree of the bonding wires 21 to 23 that are degraded in the initial stage, the degradation degree of the bonding wires 24 to 26 that are degraded in the final stage, the degradation degree of the semiconductor device 84 as a whole, and the temperature T of the power semiconductor element 2 are detected.

[0132] For example, when the degree of degradation of the semiconductor device 84 as a whole reaches the upper limit value, the control circuit 86 outputs a first warning signal to warn that the remaining life of the semiconductor device 84 is short. In addition, when the degree of degradation of the semiconductor device 84 as a whole reaches a maximum value higher than the upper limit value, the control circuit 86 outputs a first error signal indicating that the life of the semiconductor device 84 has expired, and fixes the power semiconductor element 2 included in the semiconductor device 84 to the off state.

[0133] In addition, when the temperature T of the power semiconductor element 2 included in the semiconductor device 84 exceeds the second upper limit temperature, the control circuit 86 outputs a second warning signal to warn that the temperature T of the power semiconductor element 2 is high. In addition, when the temperature T of the power semiconductor element 2 included in the semiconductor device 84 exceeds the first upper limit temperature higher than the second upper limit temperature, the control circuit 86 outputs a second error signal indicating that the temperature T of the power semiconductor element 2 is too high, and fixes the power semiconductor element 2 included in the semiconductor device 84 to the off state.

[0134] As described above, in this embodiment 7, the main conversion circuit 83 is formed using a semiconductor device 84 including constituent elements of any of the semiconductor devices 1, 50, 51, 55, 60, and 70 of embodiments 1 to 6, so that the degree of degradation of the bonding wires 21 to 23 that are degraded in the early stage, the degree of degradation of the bonding wires 24 to 26 that are degraded in the late stage, the degree of degradation of the semiconductor device 84 as a whole, and the temperature T of the power semiconductor element 2 can be detected for each semiconductor device 84.

[0135] In addition, in the present embodiment 7, the semiconductor device 84 is applied to a 2-level three-phase inverter, but it is not limited to this. The semiconductor device 84 can be applied to various power conversion devices. In the present embodiment 7, the semiconductor device 84 is applied to a 2-level power conversion device, but it can also be applied to a 3-level or multi-level power conversion device. In addition, when power is supplied to a single-phase load, the semiconductor device 84 can also be applied to a single-phase inverter. In addition, when power is supplied to a DC load, the semiconductor device 84 can also be applied to a DC / DC converter or an AC / DC converter.

[0136] In addition, the load 87 connected to the power conversion device 82 is not limited to the motor. The power conversion device 82 can also be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating conditioner, or a contactless power supply system. The power conversion device 82 can also be used as a power conditioner for a solar power generation system or a power storage system.

[0137] The embodiments disclosed this time should be considered in all respects as illustrative and non-restrictive. The present invention is shown by the claims rather than the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.

Claims

1. A semiconductor device comprising: A semiconductor element including a semiconductor substrate, a first electrode, a second electrode, and a control electrode, wherein a current having a value corresponding to a voltage applied to the control electrode flows from the first electrode to the second electrode; Terminal 1; as well as a plurality of bonding wires connecting the second electrode and the first terminal; The second electrode is divided into a plurality of sub-electrodes, The plurality of secondary electrodes include: a first sub-electrode formed in a first region including a central portion of the surface of the semiconductor substrate; and a second sub-electrode formed in a second region excluding a central portion of the surface of the semiconductor substrate; The plurality of bonding wires include: a first bonding wire connecting the first sub-electrode and the first terminal; and a second bonding wire connecting the second sub-electrode and the first terminal, The semiconductor device further comprises: a first voltage detector for detecting a voltage between the first sub-electrode and the first terminal; and The second voltage detector detects a voltage between the second sub-electrode and the first terminal.

2. The semiconductor device according to claim 1, wherein Also available: The second terminal and the third terminal; a third bonding wire connecting the first sub-electrode and the second terminal; and a fourth bonding wire connecting the second sub-electrode and the third terminal, The first voltage detector detects a voltage between the second terminal and the first terminal. The second voltage detector detects a voltage between the third terminal and the first terminal.

3. The semiconductor device according to claim 1, wherein The plurality of sub-electrodes further include a third sub-electrode formed in a third region of the surface of the semiconductor substrate that is different from the first region and the second region. The plurality of bonding wires further include a third bonding wire that connects the third sub-electrode and the first terminal. The width of each of the first sub-electrode and the second sub-electrode is smaller than the width of the third sub-electrode, The number of each of the first bonding wires and the second bonding wires is smaller than the number of the third bonding wires.

4. The semiconductor device according to claim 3, wherein: The first bonding wire is provided with one piece, The number of second bonding wires provided is one.

5. The semiconductor device according to claim 1, wherein The semiconductor device further includes a third voltage detector configured to detect a voltage between the first sub-electrode and the second sub-electrode.

6. The semiconductor device according to claim 5, wherein: Also available: The second terminal and the third terminal; a third bonding wire connecting the first sub-electrode and the second terminal; a fourth bonding wire connecting the second sub-electrode and the third terminal, The first voltage detector detects a voltage between the second terminal and the first terminal. The second voltage detector detects a voltage between the third terminal and the first terminal. The third voltage detector detects a voltage between the second terminal and the third terminal.

7. The semiconductor device according to claim 5, wherein: A current flows from one end to the other end of the first sub-electrode, and a current flows from one end to the other end of the second sub-electrode. The third voltage detector detects a voltage between a first position separated from one end of the first sub-electrode by a first distance and a second position separated from one end of the second sub-electrode by a second distance different from the first distance.

8. The semiconductor device according to claim 5, wherein: The semiconductor device further includes a temperature detection unit that detects a temperature of the semiconductor element based on an output signal of the third voltage detector.

9. The semiconductor device according to claim 1, wherein: Also available: a first determination unit that determines a degree of degradation of the first bonding wire based on a detection result of the first voltage detector; and The second determination unit determines a degree of degradation of the second bonding wire based on a detection result of the second voltage detector.

10. The semiconductor device according to claim 9, wherein The semiconductor device further includes a third determination unit configured to determine a degree of degradation of the semiconductor device based on determination results of the first determination unit and the second determination unit.

11. A power conversion device comprising: A main conversion circuit, comprising the semiconductor device according to claim 1, wherein the main conversion circuit converts input power and outputs the converted power; and The control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

12. The power conversion device according to claim 11, wherein: The control circuit controls the semiconductor element included in the semiconductor device based on detection results of the first voltage detector and the second voltage detector included in the semiconductor device.

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