A method and device for detecting LED chip probes

Abstract

The present invention provides a method and device for detecting LED chip probes, the method comprising the following steps: inserting the first probe group of multiple probe groups into the grain area, and the other probe groups fall into the insulating Mark area in sequence; performing VF judgment on the multiple probe groups to determine whether the wiring of the first probe group is normal; if the wiring of the first probe group is normal, controlling the multiple probe groups to move toward the grain area, so that the second probe group of the multiple probe groups is inserted into the grain area, and determining whether the wiring of the second probe group is normal; if the wiring of the second probe group is normal, repeating the steps of controlling the movement of the multiple probe groups in sequence until all probe groups pass the wiring test. By detecting each probe group in sequence, before the probe group operates, it is ensured that the wiring of all probe groups is normal, and data confusion due to wiring errors between probe groups is prevented, thereby affecting product quality.

Description

Technical Field

[0001] The present invention relates to the technical field of LED chip processing, and in particular to a method and device for detecting an LED chip with a probe. Background Art

[0002] With the birth and mass production of smaller mini products, in order to improve production capacity, LED chip point testing has gradually adopted 4-crystal / 8-pin and 8-crystal / 16-pin interlaced and parallel testing methods, which greatly improves the detection efficiency. However, due to the large number of probes and their dense placement and complex circuits, higher requirements are placed on the accuracy of needle adjustment by personnel and machine wiring.

[0003] In the prior art, it is easy for the wiring circuits of each channel of the machine to be connected in reverse, especially after the equipment is repaired and maintained, because the wiring is entirely dependent on personnel to check. If the personnel are not careful, a group of wiring may be connected in reverse, and the abnormality cannot be discovered, resulting in confusion in product test data and affecting product quality. Summary of the invention

[0004] In view of the deficiencies in the prior art, the purpose of the present invention is to provide a method and device for detecting LED chip probes, aiming to solve the technical problem in the prior art that test data is easily confused, which affects product quality.

[0005] On the one hand, an embodiment of the present invention provides: a LED chip probe detection method, comprising the following steps:

[0006] Adjusting the relative positions between the multiple probe groups to complete needle alignment;

[0007] The first probe group of the plurality of probe groups is inserted into the grain area, and the other probe groups are sequentially placed in the insulating mark area, wherein the grain area includes a plurality of grains distributed in an array, and the insulating mark area includes a plurality of insulating mark sheets arranged on one side of the grain;

[0008] Performing VF determination on the multiple probe groups to determine whether the wiring of the first probe group is normal;

[0009] If the connection of the first probe group is normal, control the multiple probe groups to move toward the die area so that the second probe group of the multiple probe groups can penetrate the die area, and determine whether the connection of the second probe group is normal;

[0010] If the connection of the second probe group is normal, the step of controlling the plurality of probe groups to move toward one side of the die area is repeated in sequence until all the probe groups in the plurality of probe groups pass the connection test.

[0011] In some embodiments, the steps of determining whether the wiring of the probe group in the die area is normal are:

[0012] Check whether the voltage value of the probe group in the die area is within a preset range, and whether the probe group in the insulation Mark area is outside the preset range.

[0013] In some embodiments, the method further comprises:

[0014] If the wiring of any probe group among the multiple probe groups is abnormal, the test machine is controlled to shut down and alarm.

[0015] In some embodiments, after the step of adjusting the relative positions between the plurality of probe groups, the method further comprises:

[0016] Moving the plurality of probe groups to a positioning area to detect relative positions between the plurality of probe groups;

[0017] The positioning area includes a plurality of positioning grains arranged at intervals, and a positioning insulating Mark sheet is provided between every two adjacent positioning grains.

[0018] In some embodiments, the step of detecting the relative positions between the plurality of probe groups specifically includes:

[0019] Based on CCD scanning, the probe group is controlled to move to the positioning grain to perform a VF determination;

[0020] If the VF determination of any probe group among the plurality of probe groups is abnormal during one VF determination, it is determined that the relative positions between the plurality of probe groups are offset.

[0021] In some embodiments, after the step of performing a VF determination, the method further includes:

[0022] If the VFs of the multiple probe groups are all determined to be normal in a VF determination, the multiple probe groups are controlled to move a preset distance so that the probe groups are moved to the positioning insulating Mark sheet to perform a secondary VF determination;

[0023] If, in the secondary VF determination, the plurality of probe groups are all determined to be normal, it is determined that the relative positions between the plurality of probe groups are correct, and the needle alignment is completed.

[0024] On the other hand, an embodiment of the present invention further provides an LED chip probe detection device, comprising:

[0025] A needle alignment module is used to adjust the relative positions between multiple probe groups to complete needle alignment;

[0026] A wiring detection module, used for inserting the first probe group of the plurality of probe groups into the die area, and the other probe groups fall into the insulating mark area in sequence, wherein the die area includes a plurality of die distributed in an array, and the insulating mark area includes a plurality of insulating mark sheets arranged on one side of the die;

[0027] A determination module, performing VF determination on the plurality of probe groups to determine whether the wiring of the first probe group is normal;

[0028] A test module, for controlling the plurality of probe groups to move toward the die area if the connection of the first probe group is normal, so that the second probe group of the plurality of probe groups can penetrate the die area, and determining whether the connection of the second probe group is normal;

[0029] The loop module is used for, if the connection of the second probe group is normal, sequentially repeating the step of controlling the plurality of probe groups to move toward one side of the die area until all the probe groups in the plurality of probe groups pass the connection test.

[0030] In some embodiments, the determination module is specifically used to:

[0031] Check whether the voltage value of the probe group in the die area is within a preset range, and whether the probe group in the insulation Mark area is outside the preset range.

[0032] In some embodiments, the LED chip probe detection device further includes:

[0033] The alarm module is used to control the test machine to shut down and alarm if the wiring of any probe group among the multiple probe groups is abnormal.

[0034] In some embodiments, the LED chip probe detection device further includes:

[0035] A needle detection module, used for moving the plurality of probe groups to a positioning area to detect relative positions between the plurality of probe groups;

[0036] The positioning area includes a plurality of positioning crystal grains arranged at intervals, and a plurality of positioning insulating Mark sheets arranged between every two of the crystal grains.

[0037] In some embodiments, the needle detection module specifically includes:

[0038] A first moving unit, used for controlling the probe group to move to the positioning die based on CCD scanning to perform a VF determination;

[0039] The first judgment unit is configured to judge that relative positions between the plurality of probe groups are offset if the VF judgment of any probe group among the plurality of probe groups is abnormal during a VF judgment.

[0040] In some embodiments, the needle detection module further includes:

[0041] The second moving unit is used for controlling the multiple probe groups to move a preset distance if the VF of the multiple probe groups are all judged to be normal in the first VF judgment, so that the probe groups are moved to the positioning insulation Mark sheet to perform a second VF judgment;

[0042] The second judgment unit is used for judging that if the plurality of probe groups are all judged to be normal in the secondary VF judgment, judging that the relative positions between the plurality of probe groups are correct and completing the needle alignment.

[0043] Compared with the prior art, the beneficial effect of the embodiments of the present invention lies in: utilizing the non-conductive characteristics of the insulating Mark area, by testing each probe group in turn, that is, first piercing one group of probe groups into the grain area, and the others fall into the insulating area in turn, based on the VF voltage judgment, if the voltage value of the probe group in the grain area is within the preset range, and the voltage of the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the probe group in the grain area is normal, and then after confirming that the wiring of the first group of probe groups is normal, by moving the probe group as a whole toward the grain area, a new probe group to be tested is added to the grain area, and the wiring condition of the probe group to be tested is judged based on the above judgment, and the above steps are repeated in sequence until all probe groups pass the wiring test, and before the probe groups operate, it is ensured that the wiring of all probe groups is normal to prevent data confusion due to wiring errors between probe groups, thereby affecting product quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 This is a flow chart of the LED chip probe detection method in the first embodiment of the present invention;

[0045] Figure 2 This is a flow chart of the LED chip probe detection method in the second embodiment of the present invention;

[0046] Figure 3 This is a flow chart of the LED chip probe detection method in the third embodiment of the present invention;

[0047] Figure 4 This is a structural block diagram of an LED chip probe detection device in a fourth embodiment of the present invention;

[0048] Description of main component symbols:

[0049] Needle alignment module 10 Wiring detection module 20 Determination module 30 Test Module 40 Loop Module 50 Alarm module 60 Needle detection module 70 First mobile unit 71 The first judgment unit 72 Second mobile unit 73 Second judgment unit 74

[0050] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0051] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0052] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0054] Embodiment 1

[0055] A first embodiment of the present invention provides a LED chip probe detection method. Figure 1 is a flow chart of a LED chip probe detection method according to an embodiment of the present application, such as Figure 1 As shown, the process includes the following steps:

[0056] Step S101, adjusting the relative positions between multiple probe groups to complete needle alignment. Specifically, in this step, according to the layout of the die in the wafer, the relative positions between the probe groups are adjusted to achieve multi-needle parallel measurement, that is, to ensure that each probe group can correspond to the die.

[0057] Step S102, the first probe group of the plurality of probe groups is inserted into the grain area, and the other probe groups fall into the insulating Mark area in sequence, wherein the grain area includes a plurality of grains distributed in an array, and the insulating Mark area includes a plurality of insulating Mark sheets arranged on one side of the grain. For ease of understanding, in some application scenarios of the present embodiment, the above-mentioned probe group includes two probes connected from both ends of the test machine, and the two probes are respectively connected to the positive and negative sides of the grain to form a current output loop, and the test machine is used to output a constant current, and the current passes through the probe to conduct the positive and negative electrodes of the LED grain, so that the grain emits light and conducts, and at the same time, the test machine synchronously tests the voltage value VF at both ends of the LED grain, and several probe groups are set corresponding to the plurality of grains on the wafer, and the current can be synchronously output through multiple channels to complete the simultaneous testing of multiple grains. Since the measurement system adopts a multi-channel parallel measurement method, the detection efficiency is high, but due to the high integration density, the wiring density between the test machine and the probe is large, and it is very easy to have a wrong connection in series. For example, the four probe groups a, b, c, and d should correspond to the four grains 1, 2, 3, and 4 respectively. If there is a wiring error and a and c are connected reversely, when grain 3 has quality problems and other grain products are qualified, the data of probe group a will be displayed as abnormal on one end of the tester, but probe group a corresponds to grain 1. Not only will an erroneous detection prompt be issued, but the grain with quality problems will also be difficult to find.

[0058] Step S103, VF determination is performed on the multiple probe groups to determine whether the wiring of the first probe group is normal. Specifically, in this step, only one probe group is located in the die area. When the voltage value of the probe group in the die area falls within the preset range, and the voltage value result of the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the first probe group is correct; if the voltage value of the probe group in the die area falls outside the preset range, and the voltage value result of one of the probe groups in the insulating Mark area falls within the preset range, it means that there is an error in the wiring.

[0059] Step S104, if the wiring of the first probe group is normal, control the multiple probe groups to move toward the side of the die area, so that the second probe group of the multiple probe groups can penetrate the die area, and determine whether the wiring of the second probe group is normal. Specifically, in this step, if the wiring of the probe group that falls into the die area in step S102 is correct, the other probe groups can be tested in turn, but in order to ensure the accuracy of the test, only one probe group to be tested can be added at each test. If two probe groups are added at a time, there is a possibility that the two probe groups are connected to each other incorrectly.

[0060] Step S105 , if the connection of the second probe group is normal, sequentially repeating the step of controlling the plurality of probe groups to move toward one side of the die area until all the probe groups in the plurality of probe groups pass the connection test.

[0061] In the above steps S101 to S105, the non-conductive property of the insulating Mark area is utilized to detect each probe group in turn, that is, one of the probe groups is first inserted into the grain area, and the others are sequentially placed in the insulating area. It is determined based on the VF voltage that if the voltage value of the probe group in the grain area is within the preset range, and the voltage of the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the probe group in the grain area is normal. After confirming that the wiring of the first group of probe groups is normal, a new probe group to be tested is added to the grain area by moving the probe group as a whole toward the grain area. The wiring condition of the probe group to be tested is judged based on the above judgment. The above steps are repeated in sequence until all probe groups pass the wiring test. Before the probe groups operate, it is ensured that the wiring of all probe groups is normal to prevent data confusion due to wiring errors between probe groups, thereby affecting product quality.

[0062] Embodiment 2

[0063] like Figure 2 As shown, the second embodiment of the present invention provides a LED chip probe detection method. Figure 2 is a flow chart of a LED chip probe detection method according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0064] Step S201, adjusting the relative positions between the multiple probe groups to complete the needle alignment.

[0065] Step S202, inserting the first probe group of the plurality of probe groups into the grain area, and placing the other probe groups into the insulating mark area in sequence, wherein the grain area includes a plurality of array-distributed grains, and the insulating mark area includes a plurality of insulating mark sheets disposed on one side of the grains.

[0066] Step S203 , performing VF determination on a plurality of the probe groups to check whether the voltage value of the probe group in the die region is within a preset range, and whether the voltage value of the probe group in the insulation Mark region is outside the preset range.

[0067] Step S204, if the voltage value of the probe group in the grain area is within the preset range, and the probe group in the insulating Mark area is outside the preset range, then control the multiple probe groups to move toward one side of the grain area, so that the second probe group in the multiple probe groups can penetrate the grain area, and determine whether the wiring of the second probe group is normal. It can be understood that if the voltage value of the probe group in the grain area is within the preset range, and the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the first probe group is normal; if the voltage value of the probe group in the grain area is outside the preset range, or the probe group in the insulating Mark area is within the preset range, it means that the wiring of the first probe group is abnormal.

[0068] Step S205 , if the connection of any probe group among the plurality of probe groups is abnormal, the test machine is controlled to shut down and alarm is sounded.

[0069] Step S206 , if the connection of the second probe group is normal, sequentially repeat the step of controlling the plurality of probe groups to move toward one side of the die area until all the probe groups in the plurality of probe groups pass the connection test.

[0070] In the above steps S201 to S206, the non-conductive property of the insulating Mark area is utilized to detect each probe group in turn, that is, one of the probe groups is first inserted into the grain area, and the others are sequentially placed in the insulating area. It is determined based on the VF voltage that if the voltage value of the probe group in the grain area is within the preset range, and the voltage of the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the probe group in the grain area is normal. After confirming that the wiring of the first group of probe groups is normal, a new probe group to be tested is added to the grain area by moving the probe group as a whole toward the grain area. The wiring condition of the probe group to be tested is judged based on the above judgment. The above steps are repeated in sequence until all probe groups pass the wiring test. Before the probe groups operate, it is ensured that the wiring of all probe groups is normal to prevent data confusion due to wiring errors between probe groups, thereby affecting product quality.

[0071] Embodiment 3

[0072] like Figure 3 As shown, the third embodiment of the present invention provides a LED chip probe detection method. Figure 3 is a flow chart of a LED chip probe detection method according to an embodiment of the present application, such as Figure 3 As shown, the process includes the following steps:

[0073] Step S301, adjusting the relative positions between multiple probe groups.

[0074] In step S302, the plurality of probe groups are moved to the positioning area, and the probe groups are controlled to move to the positioning grains based on CCD scanning to perform a VF judgment, wherein the positioning area includes a plurality of positioning grains that are spaced apart, and a positioning insulating Mark sheet is provided between each two adjacent positioning grains; for ease of understanding, in this step, the existing small-size mini products have a small size and a large number of grains, and the distance between the probe groups is relatively close during testing. When multiple crystals are measured in parallel, interlaced testing is required to avoid electrostatic interference. Under this test method, since the position of the probes needs to be adjusted manually, it is easy to pierce the wrong row, resulting in abnormal testing and confusing data. In this step, the positioning area can be understood as a non-conductive Mark sheet provided at intervals between the grains, so that the originally densely arranged grains become spaced apart grains. At the same time, to facilitate the operation of the operator, the appearance of the Mark sheet and the grain is quite different.

[0075] Step S303, if in a VF determination, the VF determination of any probe group among the multiple probe groups is abnormal, it is determined that the relative positions between the multiple probe groups are offset. Specifically, in this step, the crystal grains are separated by setting a positioning insulating Mark sheet. The above-mentioned moving the probe group to the crystal grain means that at least one of the probe groups is located on the crystal grain as much as possible. If the needle position is correct, the other probe groups will also be on the crystal grain. If there is a probe group with a shifted position, due to the non-conductive property of the Mark sheet, its voltage value VF will fall outside the preset range, which means that the position of the probe group is offset. In addition, the movement of the above-mentioned probe group is based on the CCD camera scanning the positioning mark on one side of the crystal grain and the positioning insulating Mark sheet to obtain the relative position of the crystal grain and the Mark, so that the probe group is automatically positioned on the crystal grain according to the position of the positioning Mark.

[0076] Step S304 , if the VFs of the plurality of probe groups are all determined to be normal, control the plurality of probe groups to move a preset distance so that the probe groups move to the positioning insulating Mark sheet to perform a secondary VF determination.

[0077] Step S305 : If, in the secondary VF determination, the plurality of probe groups are all determined to be normal, it is determined that the relative positions between the plurality of probe groups are correct, and the needle alignment is completed.

[0078] Step S306, inserting the first probe group of the plurality of probe groups into the grain area, and placing the other probe groups into the insulating Mark area in sequence, wherein the grain area includes a plurality of array-distributed grains, and the insulating Mark area includes a plurality of insulating Mark sheets disposed on one side of the grains.

[0079] Step S307 , performing VF determination on a plurality of the probe groups to check whether the voltage value of the probe group in the die region is within a preset range, and whether the voltage value of the probe group in the insulation Mark region is outside the preset range.

[0080] Step S208, if the voltage value of the probe group in the grain area is within a preset range, and the probe group in the insulating Mark area is outside the preset range, the multiple probe groups are controlled to move toward one side of the grain area, so that the second probe group in the multiple probe groups can penetrate into the grain area, and it is determined whether the wiring of the second probe group is normal.

[0081] Step S209: If the connection of any probe group among the plurality of probe groups is abnormal, the test machine is controlled to shut down and alarm is sounded.

[0082] Step S310 , if the connection of the second probe group is normal, sequentially repeating the step of controlling the plurality of probe groups to move toward one side of the die area until all the probe groups in the plurality of probe groups pass the connection test.

[0083] In the above steps S301 to S310, the non-conductive property of the insulating Mark area is utilized to detect each probe group in turn, that is, one of the probe groups is first inserted into the grain area, and the others are sequentially placed in the insulating area. Based on the VF voltage judgment, if the voltage value of the probe group in the grain area is within the preset range, and the voltage of the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the probe group in the grain area is normal. Then, after confirming that the wiring of the first probe group is normal, the probe group is moved as a whole toward the grain area, so that a new probe group to be tested is added to the grain area. Based on the above judgment, the probe group to be tested is tested. The wiring conditions are judged, and the above steps are repeated in sequence until all probe groups pass the wiring test. Before the probe groups operate, ensure that the wiring of all probe groups is normal; control the probe groups to move to the positioning crystal grain based on CCD scanning, and perform VF judgment on the probe groups to quickly check whether all probe groups fall on the crystal grain. At the same time, control the probe groups to fall on the Mark piece to perform a secondary VF judgment to further detect whether there is any displacement of the position of the probe groups. Before the probe groups operate, ensure that all probe groups are correctly aligned to prevent data confusion due to wiring errors between probe groups, thereby affecting product quality.

[0084] Embodiment 4

[0085] Figure 4 is a structural block diagram of the LED chip probe detection device in the embodiment of the present application, such as Figure 4As shown, the LED chip probe detection in the fourth embodiment of the present invention includes a needle alignment module 10, a wiring detection module 20, a determination module 30, a test module 40 and a circulation module 50; the needle alignment module 10 is used to adjust the relative positions between multiple probe groups to complete the needle alignment; the wiring detection module 20 is used to pierce the first probe group of the multiple probe groups into the grain area, and the other probe groups fall into the insulating Mark area in sequence, wherein, The grain area includes a plurality of grains distributed in an array, and the insulating mark area includes a plurality of insulating mark sheets arranged on one side of the grain; the judgment module 30 is used to perform VF judgment on the plurality of probe groups to determine whether the wiring of the first probe group is normal; the test module 40 is used to control the plurality of probe groups to move toward one side of the grain area if the wiring of the first probe group is normal, so that the second probe group in the plurality of probe groups can penetrate into the grain area, and determine whether the wiring of the second probe group is normal; the loop module 50 is used to repeat the step of controlling the plurality of probe groups to move toward one side of the grain area in sequence if the wiring of the second probe group is normal, until all the probe groups in the plurality of probe groups pass the wiring test.

[0086] Furthermore, in this embodiment, the determination module 30 is specifically used to check whether the voltage value of the probe group in the grain area is within a preset range, and whether the probe group in the insulation Mark area is outside the preset range. Specifically, in this embodiment, the LED chip probe detection device also includes an alarm module 60 for controlling the test machine to shut down and alarm if the wiring of any probe group among the multiple probe groups is abnormal.

[0087] In addition, in this embodiment, the LED chip probe detection device further includes: a needle detection module 70, which is used to move the plurality of probe groups to the positioning area to detect the relative positions between the plurality of probe groups. Specifically, the needle detection module 70 includes a first moving unit 71 and a first judgment unit 72; the first moving unit 71 is used to control the probe group to move to the positioning crystal grain based on CCD scanning to perform a VF judgment; the first judgment unit 72 is used to determine that the relative positions between the plurality of probe groups are offset if the VF judgment of any probe group among the plurality of probe groups is abnormal during a VF judgment. Furthermore, in the present embodiment, the needle alignment detection module 70 also includes a second moving unit 73 and a second judgment unit 74. The second moving unit 73 is used to control the multiple probe groups to move a preset distance if the VFs of the multiple probe groups are all judged to be normal in the first VF judgment, so that the probe groups are moved to the positioning insulating Mark sheet to perform a secondary VF judgment; the second judgment unit 74 is used to determine that the relative positions between the multiple probe groups are correct and complete the needle alignment if the multiple probe groups are all judged to be normal in the secondary VF judgment.

[0088] In summary, the LED chip probe detection device in this embodiment utilizes the non-conductive property of the insulating Mark area to detect each probe group in turn, that is, first one of the probe groups is inserted into the grain area, and the others are placed in the insulating area in turn, and it is judged based on the VF voltage. If the voltage value of the probe group in the grain area is within the preset range, and the voltage of the probe group in the insulating Mark area is outside the preset range, it means that the wiring of the probe group in the grain area is normal. Then, after confirming that the wiring of the first group of probe groups is normal, the probe group is moved toward the grain area as a whole to add a probe group to be tested in the grain area, and the wiring condition of the probe group to be tested is judged based on the above judgment. The above steps are repeated in turn until all probe groups pass the wiring test. Before the probe groups operate, it is ensured that the wiring of all probe groups is normal; the probe group is moved to the positioning grain based on CCD scanning control, and a VF judgment is performed on the probe group. It can quickly check whether all probe groups fall on the positioning die. At the same time, by controlling the probe groups to fall on the positioning insulating Mark piece, a secondary VF judgment is performed to further detect whether there is any position deviation of the probe groups. Before the probe groups operate, it is ensured that all probe groups are correctly aligned to prevent data confusion due to wiring errors between probe groups, thereby affecting product quality.

[0089] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0090] The above-described embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the present invention. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the attached claims.

Claims

1. A LED chip probe detection method, characterized in that: The method comprises the following steps: Adjusting the relative positions between the multiple probe groups to complete needle alignment; The first probe group of the plurality of probe groups is inserted into the grain area, and the other probe groups are sequentially placed in the insulating mark area, wherein the grain area includes a plurality of grains distributed in an array, and the insulating mark area includes a plurality of insulating mark sheets arranged on one side of the grain; Performing VF determination on the multiple probe groups to determine whether the wiring of the first probe group is normal, wherein the step of performing VF determination on the multiple probe groups specifically includes: Performing voltage value VF detection on the die and the insulating Mark sheet based on a probe group in the plurality of probe groups; If the voltage value corresponding to the first probe group located in the grain area falls within the preset range, and the voltage values ​​corresponding to other probe groups located in the insulating Mark area fall outside the preset range, it is determined that the wiring of the first probe group is normal, and the multiple probe groups are controlled to move toward one side of the grain area, so that the second probe group in the multiple probe groups can penetrate the grain area, and it is determined whether the wiring of the second probe group is normal; If the connection of the second probe group is normal, the step of controlling the plurality of probe groups to move toward one side of the die area is repeated in sequence until all the probe groups in the plurality of probe groups pass the connection test.

2. The LED chip probe detection method according to claim 1, characterized in that: The steps for judging whether the wiring of the probe group in the die area is normal are as follows: Check whether the voltage value of the probe group in the die area is within a preset range, and whether the probe group in the insulation Mark area is outside the preset range.

3. The LED chip probe detection method according to claim 1, characterized in that: The method further comprises: If the wiring of any probe group among the multiple probe groups is abnormal, the test machine is controlled to shut down and alarm.

4. The LED chip probe detection method according to claim 1, characterized in that: After the step of adjusting the relative positions between the multiple probe groups, the method further comprises: Moving the plurality of probe groups to a positioning area to detect relative positions between the plurality of probe groups; The positioning area includes a plurality of positioning grains arranged at intervals, and a positioning insulating Mark sheet is provided between every two adjacent positioning grains.

5. The LED chip probe detection method according to claim 4, characterized in that: The step of detecting the relative positions between the plurality of probe groups specifically comprises: Based on CCD scanning, the probe group is controlled to move to the positioning grain to perform a VF determination; If the VF determination of any probe group among the plurality of probe groups is abnormal during one VF determination, it is determined that the relative positions between the plurality of probe groups are offset.

6. The LED chip probe detection method according to claim 5, characterized in that: After the step of performing a VF determination, the method further includes: If the VFs of the multiple probe groups are all normal in the first VF determination, the multiple probe groups are controlled to move a preset distance so that the probe groups are moved to the positioning insulation Mark sheet to perform a second VF determination; If, in the secondary VF determination, the plurality of probe groups are all determined to be normal, it is determined that the relative positions between the plurality of probe groups are correct, and the needle alignment is completed.

7. A LED chip probe detection device, characterized in that: include: A needle alignment module is used to adjust the relative positions between multiple probe groups to complete needle alignment; A wiring detection module, used for inserting the first probe group of the plurality of probe groups into the grain area, and the other probe groups fall into the insulating Mark area in sequence, wherein the grain area includes a plurality of array-distributed grains, and the insulating Mark area includes a plurality of insulating Mark sheets arranged on one side of the grain; A determination module performs VF determination on the multiple probe groups to determine whether the wiring of the first probe group is normal. The determination module is specifically used to: perform voltage value VF detection on the die and the insulating Mark sheet based on the probe groups in the multiple probe groups; A test module, for determining that the wiring of the first probe group located in the grain area is normal if the voltage value corresponding to the first probe group located in the grain area falls within a preset range, and the voltage values ​​corresponding to other probe groups located in the insulating Mark area fall outside the preset range, and controlling the multiple probe groups to move toward one side of the grain area so that the second probe group among the multiple probe groups can penetrate into the grain area, and determining whether the wiring of the second probe group is normal; The loop module is used for, if the connection of the second probe group is normal, sequentially repeating the step of controlling the plurality of probe groups to move toward one side of the die area until all the probe groups in the plurality of probe groups pass the connection test.

8. The LED chip probe detection device according to claim 7, characterized in that: The determination module is specifically used for: Check whether the voltage value of the probe group in the die area is within a preset range, and whether the probe group in the insulation Mark area is outside the preset range.

9. The LED chip probe detection device according to claim 7, characterized in that: The LED chip probe detection device also includes: The alarm module is used to control the test machine to shut down and alarm if the wiring of any probe group among the multiple probe groups is abnormal.

10. The LED chip probe detection device according to claim 7, characterized in that: The LED chip probe detection device also includes: A needle detection module, used for moving the plurality of probe groups to a positioning area to detect relative positions between the plurality of probe groups; The positioning area includes a plurality of positioning crystal grains arranged at intervals, and a plurality of positioning insulating Mark sheets arranged between every two of the crystal grains.

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