Capacitive digital isolator packaging structure and packaging method

Abstract

The present invention discloses a capacitive digital isolator packaging structure and packaging method, relating to the field of integrated circuit packaging. The capacitive digital isolator packaging structure includes a lead unit, an isolation chip, and a plastic package. The lead unit includes a base island and pins. The isolation chip is fixed to the front of the base island via an adhesive layer. The isolation chip is connected to the pins via bonding wires. The base island, isolation chip, and bonding wires are all located within the plastic package. The inner ends of the pins are located within the plastic package. Through holes are formed in the base island and / or the pins. The through holes are located within the plastic package, and the through holes contain a plastic encapsulation compound that constitutes the plastic package. The capacitive digital isolator packaging structure and packaging method provided by the present invention can solve the problem of low reliability of existing packaging structures.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit packaging, and in particular to a capacitive digital isolator packaging structure and a packaging method. Background Art

[0002] Digital isolators are common electronic devices that physically separate the low-voltage and high-voltage domains of a circuit. With a digital isolator, there's no direct path between the low-voltage and high-voltage domains of a circuit; signals or energy are transmitted between the two through coupling. Isolators are used in a wide range of fields, including industrial networks, communications engineering, automotive electronics, and medical electronics. Digital isolators primarily use optoelectronic, inductive, and capacitive coupling. Capacitive coupling offers numerous advantages, including high voltage resistance, high transmission rates, low transmission latency, strong immunity to electromagnetic interference, and a wide operating temperature range. Isolators using capacitive coupling are well-suited to meet the application needs of emerging sectors such as smart manufacturing, electric vehicles, photovoltaic power generation, and 5G communications, and hold considerable market potential.

[0003] However, there are two problems with the existing packaging structure of capacitor isolators. First, the plastic package is large and easily delaminated from the lead frame, resulting in low product reliability. Second, the base island on the lead frame is prone to shaking and difficult to bond, resulting in a low packaging yield. Summary of the Invention

[0004] The object of the present invention is to provide a capacitive digital isolator packaging structure, which can solve the problem of low reliability of existing packaging structures.

[0005] In order to achieve the above-mentioned object, the present invention provides a capacitive digital isolator packaging structure including a lead unit, an isolation chip and a plastic package body, wherein the lead unit includes a base island and pins, the isolation chip is fixed to the front side of the base island by an adhesive layer, the isolation chip is connected to the pins by bonding wires, the base island, the isolation chip and the bonding wires are all located in the plastic package body, the inner ends of the pins are located in the plastic package body, through holes are opened on the base island and / or the pins, the through holes are located in the plastic package body, and the through holes contain a plastic packaging material constituting the plastic package body.

[0006] In a preferred embodiment, there are two base islands, a gap is provided between the two base islands, isolation chips are mounted on both base islands via an adhesive layer, and the isolation chips are connected via bonding wires.

[0007] In a preferred embodiment, the two base islands are symmetrically arranged about a horizontal central axis.

[0008] In a preferred embodiment, the gap between the two base islands is 0.6-1.5 mm.

[0009] In a preferred embodiment, a non-through indentation is provided on the back side of the base island.

[0010] In a preferred embodiment, the surface of the lead unit is roughened.

[0011] In a preferred embodiment, a pressing rib is provided on the base island, and the pressing rib is located on a side surface of the base island and protrudes from the base island.

[0012] In a preferred embodiment, a false foot is provided on the base island, one end of the false foot is connected to the base island, and the other end of the false foot can be connected to the lead frame base.

[0013] In a preferred embodiment, each communication channel between the two isolation chips is connected by two bonding wires, the two bonding wires of the same communication channel between the two isolation chips are parallel to each other, and the bonding wires of the communication channel are not parallel to the bonding wires on the adjacent communication channel.

[0014] The present invention differs from the prior art in that the capacitive digital isolator packaging structure provided by the present invention utilizes through-holes in the base island or pins to form a single integral unit from the upper and lower portions of the plastic package. This suppresses relative movement between the plastic package near the through-hole and the base island or pins due to differences in thermal expansion coefficients, thereby reducing the likelihood of delamination of the plastic package at the base island or pins. Therefore, the capacitive digital isolator packaging structure provided by the present invention can address the low reliability issues of existing packaging structures.

[0015] Another object of the present invention is to provide a method for packaging a capacitive digital isolator, which can solve the problem of low reliability of existing packaging structures.

[0016] In order to achieve the above object, the technical solution of the present invention is achieved as follows:

[0017] A method for packaging a capacitive digital isolator comprises the following steps:

[0018] S10, forming a lead frame, wherein the formed lead frame includes a plurality of lead units arranged in a matrix on a frame substrate, wherein the lead units are lead units of the above-mentioned capacitive digital isolator packaging structure;

[0019] S20, mounting an isolation chip on the front surface of the base island of the lead unit and performing a curing process;

[0020] S30, connecting the two isolation chips using bonding wires; connecting the isolation chip to the pins of the lead unit using bonding wires;

[0021] S40, placing the lead frame in a plastic packaging mold, and forming a plastic packaging body by injection molding;

[0022] S50. Use the stamping method to cut the pins, bend the pins and separate the components of the lead frame after plastic packaging.

[0023] The capacitive digital isolator packaging method has the same technical advantages as the above-mentioned capacitive digital isolator packaging structure and packaging method over the prior art, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 1 is a schematic diagram (top view) of a capacitive digital isolator packaging structure according to a preferred embodiment of the present invention;

[0025] Figure 2 yes Figure 1 Cross-section along the AA direction;

[0026] Figure 3 yes Figure 1 A schematic diagram of the structure of the lead unit used in the capacitive digital isolator package structure shown (bottom view, the lead unit is not separated from the lead frame base);

[0027] Description of reference numerals:

[0028] 1-base island; 2-pin; 3-connecting rib; 4-bonding wire; 5-adhesive layer; 6-isolation chip; 7-plastic package; 8-through hole; 9-non-through indentation; 10-pressing rib; 11-false foot; 12-horizontal center axis; 13-center rib between pins. DETAILED DESCRIPTION

[0029] To make the objectives, technical solutions, and advantages of this application more clearly understood, this application is further described below in conjunction with specific embodiments and with reference to the accompanying drawings. It should be understood that these descriptions are merely illustrative and are not intended to limit the scope of this application. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion in the concepts of this application.

[0030] The accompanying drawings illustrate schematic diagrams of layer structures according to embodiments of the present application. These figures are not drawn to scale; for clarity, some details are exaggerated and some details may be omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art may design regions / layers with different shapes, sizes, and relative positions as needed.

[0031] Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0032] In the description of this application, it should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0033] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0034] The capacitive digital isolator packaging structure and packaging method provided by the present application are described in detail below with reference to specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0035] As shown in the reference figure, the capacitive digital isolator packaging structure of the basic embodiment provided by the present invention includes a lead unit, an isolation chip 6 and a plastic package 7. The lead unit is formed on a lead frame substrate by etching and other processes. The lead unit includes a base island 1 and pins 2. The main function of the base island 1 is to carry the isolation chip 6, ensuring that the position of the isolation chip 6 is relatively stable during the packaging process of the product and easy to process. The function of the pins 2 is to establish an electrical connection inside and outside the plastic package 7 to transmit energy and signals. The number of the pins 2 is determined according to the isolation chip 6, for example, Figure 1 16 pins 2 are shown in FIG, with 8 pins 2 on each of the front and rear sides of the lead unit.

[0036] The isolation chip 6 includes an isolation capacitor structure. Figure 2 As shown, the isolation chip 6 is secured to the front surface of the base island 1 via an adhesive layer 5. The adhesive layer 5 secures the isolation chip 6 to the base island 1 and forms an electrical connection. The adhesive layer 5 can be made of conductive silver paste or conductive DAF. The isolation chip 6 is connected to the pins 2 via bonding wires 4, which form an electrical connection between the pins 2 and the isolation chip 6 to achieve product functionality. The number and position of the bonding wires 4 can vary depending on the product design and functional requirements.

[0037] The base island 1, isolation chip 6, and bonding wire 4 are all located within the plastic package 7. The inner end of the pin 2 is located within the plastic package 7. The size of the plastic package 7 varies depending on the type of isolation chip 6. For example, the size of the plastic package 7 can be 10.3mmX7.5mmX2.3mm. The plastic package 7 encapsulates the base island 1, isolation chip 6, and bonding wire 4, providing good insulation properties to meet the isolation requirements of the product. It also isolates external dust, pollution, or water vapor, providing a good environment for the normal operation of the chip and ensuring product reliability.

[0038] like Figure 1 、 Figure 3 As shown, the base island 1 and / or the pin 2 are provided with a through hole 8, the through hole 8 is located in the plastic package 7, and the through hole 8 contains the plastic package material constituting the plastic package 7. The number of through holes 8 provided on the base island 1 can be one or more, for example Figure 1 As shown, a through hole 8 is provided on each side of the base island 1 for mounting the isolation chip 6. The number of through holes 8 provided on the pin 2 can also be one or more, for example Figure 1 As shown, a through hole 8 is provided on each pin 2 .

[0039] In this embodiment, by setting the through hole 8, the upper and lower parts of the plastic package 7 can form a whole through the through hole 8, thereby suppressing the relative movement tendency between the plastic package 7 and the base island 1 and the pin 2 near the through hole 8 due to the different thermal expansion coefficients, reducing the probability of delamination of the plastic package 7 at the base island 1 and the pin 2, and improving the reliability of the package.

[0040] In a preferred embodiment of the present invention, Figure 1 As shown, there are two base islands 1, with a gap between them. Isolation chips 6 are mounted on both base islands 1 via an adhesive layer 5, and the isolation chips 6 are connected via bonding wires 4. In this embodiment, by providing two base islands 1, with an isolation chip 6 mounted on each base island 1, and the isolation chips 6 connected in series via bonding wires 4, a reinforced isolation structure can be formed, thereby improving the reliability of the capacitive digital isolator packaging structure.

[0041] Further preferably, the two base islands 1 are symmetrically arranged about the horizontal central axis 12. In this embodiment, by arranging the two base islands 1 symmetrically about the horizontal central axis 12, the base islands 1 can ensure that the lead unit has a minimum area while being able to support the chip, thereby further reducing the probability of delamination of the plastic package 7 and improving the reliability of the package.

[0042] The gap between the two base islands 1 is 0.6-1.5 mm, that is, the distance between the two base islands 1 is 0.6-1.5 mm, which can meet the voltage resistance requirements of the enhanced isolation formed by the two isolation chips 6 while ensuring the overall size of the capacitive digital isolator packaging structure.

[0043] like Figure 1 、 Figure 3As shown, in the present invention, the lead unit further includes connecting ribs 3, preferably four in number, with two connecting ribs 3 provided on each side of the plastic package body 7. In this embodiment, by providing the connecting ribs 3 on the lead unit, it is possible to facilitate the removal of the inter-pin ribs 13 between the pins 2 during the manufacturing process of the package structure, thereby ensuring that the lead unit can remain coupled to the lead frame and facilitating other processing steps and operations.

[0044] In a preferred embodiment of the present invention, a non-through indentation 9 is provided on the back of the base island 1. Figure 3 As shown, the non-through indentations 9 provided on the base island 1 are preferably arranged in a matrix. By providing the non-through indentations 9 on the back of the base island 1, the plastic encapsulation body 7 and the back of the base island 1 can be meshed with each other, thereby reducing the risk of plastic encapsulation body delamination on the back of the base island.

[0045] In order to further reduce the probability of delamination of the plastic encapsulation body 7 due to thermal stress and improve product reliability, in a preferred embodiment of the present invention, the surface of the lead unit is roughened. For example, the surface of the lead unit composed of the base island 1, the lead 2, and the connecting rib 3 is roughened. The roughening method can adopt a brown oxidation method or a micro-etching method. The roughened surface of the lead unit can make the surface of the plastic encapsulation body 7 and the lead unit mesh with each other, increase the friction coefficient between the two, thereby reducing the probability of delamination due to thermal stress and improving product reliability.

[0046] In view of the problem that the base island on the lead frame in the prior art is easy to shake and difficult to bond, resulting in low packaging yield, such as Figure 1 As shown, in a preferred embodiment of the present invention, the base island 1 is provided with a pressing rib 10. The pressing rib 10 is located on the side of the base island 1 and protrudes from the base island 1. That is, the pressing rib 10 extends from the side of the base island 1 but is not connected to the lead frame base. In this embodiment, by providing the pressing rib 10 on the base island 1, the pressing plate and heating block can be used to clamp the pressing rib 10 during the bonding process, thereby preventing the base island from shaking and resonating during the bonding process, thereby improving the bonding yield.

[0047] More preferably, Figure 1As shown, a false foot 11 is provided on the base island 1, one end of the false foot 11 is connected to the base island 1, and the other end of the false foot 11 can be connected to the lead frame base. The false foot 11 is used to connect the base island 1 and the lead frame base before the rib cutting and forming process to ensure that the position of the base island 1 is relatively stable, so that the base island 1 is not prone to deformation, shaking and resonance. During the rib cutting and forming process, the false foot 11 will be cut off and will not extend out of the plastic package 7, so it will not affect the package shape. In this embodiment, by providing the false foot 11 on the base island 1, the yield of the bonding process can be improved, the risk of deformation of the base island 1 during transportation and transshipment can be reduced, and the situation of connecting the base island 1 with multiple pins 2 to stabilize the base island 1 is avoided, thereby increasing the number of effective I / Os and improving the flexibility of product wiring design.

[0048] In the present invention, each communication channel between the two isolation chips 6 is connected by two bonding wires 4 to ensure simultaneous transmission and reception. Figure 1 As shown, the two bonding wires 4 in the same communication channel between the two isolation chips 6 are parallel to each other; the bonding wires 4 in one communication channel are not parallel to the bonding wires 4 in the adjacent communication channel, that is, there is a certain angle between the bonding wires 4 in adjacent communication channels. In this embodiment, by making the two bonding wires 4 in the same communication channel parallel to each other and the bonding wires 4 in adjacent communication channels non-parallel, the impact of parasitic capacitance between the bonding wires 4 on communication can be effectively reduced.

[0049] Similar to the technical concept of the capacitive digital isolator packaging provided in the above embodiment, the present invention also provides a capacitive digital isolator packaging method, comprising the following steps:

[0050] S10. Forming a lead frame, wherein the formed lead frame includes a plurality of lead units arranged in a matrix on a frame substrate, wherein the lead units adopt the lead units of the capacitive digital isolator packaging structure described in the above embodiment.

[0051] The lead frame can be formed by etching, and the frame substrate is a copper alloy frame substrate. The length of the lead frame can be 238mm-300mm, the width can be 70mm-100mm, and the thickness can be 0.152mm-0.254mm, and 84-144 lead units can be formed therein. By using a matrix multi-row lead frame, the packaging processing efficiency can be improved. The surface of the lead frame can be roughened, and the treatment method can be a brown oxidation method or a micro-etching method.

[0052] S20: Mount an isolation chip 6 on the front surface of the lead unit's base island 1 and perform a curing process. After mounting the isolation chip 6 on each base island 1, perform a curing process at a constant temperature of 165°C-185°C for 1-1.5 hours. During the curing process, the oven must be filled with nitrogen for protection.

[0053] S30. Use bonding wire 4 to connect the two isolation chips 6; use bonding wire 4 to connect the isolation chip 6 to the pin 2 of the lead unit. The isolation chip 6 includes an isolation capacitor structure, and the isolation capacitors of the two isolation chips 6 are connected in series through the bonding wire 4 to form an enhanced isolation structure. The material of the bonding wire 4 can be gold, copper, silver alloy, etc. When bonding using the bonding wire 4, thermal ultrasonic wire bonding is performed to form an electrical connection.

[0054] The bonding wire 4 connecting the two isolation chips 6 first bonds a metal ball to a chip pad through a ball placement process, then performs normal wire bonding to bond a second solder joint to the metal ball, preventing damage to the chip caused by the second solder joint. Due to the isolation capacitor structure, the bonding wire 4 connecting the isolation chips 6 cannot be grounded, requiring optical inspection to monitor the integrity of the solder joints during the bonding process.

[0055] When bonding wire 4 connects isolation chip 6 and pin 2, it connects the pad on isolation chip 6 to the corresponding pin 2. The bonding temperature is 180°C-220°C, the ultrasonic power is 120mW-350mW, the bonding time is 8ms-54ms, and the bonding pressure is 0.078N-0.294N. Conventional electrical testing methods are required to monitor product quality during the bonding process.

[0056] S40. Place the lead frame in a plastic encapsulation mold and form a plastic encapsulation body 7 by injection molding. During the plastic encapsulation process, place the lead frame after lead bonding in the plastic encapsulation mold. Two lead frames can be placed at a time. During the injection molding process, the mold temperature is 165°C-185°C, the mold clamping pressure is 1275kN-1472kN, the injection pressure is 12.8kN-23.5kN, and the molding time is 80s-100s. After injection molding, the plastic encapsulation compound needs to be cured. The curing temperature of the plastic encapsulation compound is 150°C-180°C, and the curing time of the plastic encapsulation compound is 4-8 hours.

[0057] S50, use the stamping method to cut the pins, bend the pins and separate the components of the lead frame after plastic packaging. Figure 3 Therefore, lead rib cutting involves severing the ribs 13 between the leads, which secure the leads 2 to the lead frame. After rib cutting, the lead is bent into the desired shape in a dedicated forming die. After lead formation, the connecting ribs 3 on the left and right sides of the lead unit are punched out, separating the device from the lead frame and producing a complete product.

[0058] In summary, the present invention has the following beneficial effects compared to the prior art:

[0059] 1. The present invention adopts a series of measures, such as providing through holes 8 on the pins 2 and the base island 1, providing non-through indentations 9 on the back of the base island 1, and roughening the surface of the lead unit, to increase the bonding between the plastic package 7 and the lead unit, reduce the probability of delamination, and achieve product reliability of MSL1 (Moisture Sensitivity Level 1).

[0060] 2. The present invention ensures the relative stability of the position of the base island 1 by arranging false feet 11 and pressing ribs 10 on the base island 1, making it easier for the clamp to fix the base island 1 during the wire bonding process, reducing bonding failures caused by shaking and resonance of the base island 1, and improving the packaging yield.

[0061] 3. The present invention retains sufficient gap width between the base islands 1 within a limited package size, and can meet the packaging requirements of 2-6 channel capacitive isolators with an isolation voltage greater than 5700V and a maximum transient withstand voltage greater than 8000V.

[0062] The order of the above implementations is only for the convenience of description and does not represent the advantages or disadvantages of the implementations.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A capacitive digital isolator packaging structure, comprising a lead unit, an isolation chip (6) and a plastic package (7), wherein the lead unit comprises a base island (1) and a pin (2), the isolation chip (6) is fixed to the front of the base island (1) through an adhesive layer (5), the isolation chip (6) is connected to the pin (2) through a bonding wire (4), the base island (1), the isolation chip (6) and the bonding wire (4) are all located in the plastic package (7), and the inner end of the pin (2) is located in the plastic package (7), characterized in that The base island (1) and / or the pin (2) are provided with a through hole (8), the through hole (8) is located in the plastic package (7), and the through hole (8) contains a plastic package material constituting the plastic package (7); there are two base islands (1), a gap is provided between the two base islands (1), isolation chips (6) are mounted on the two base islands (1) through an adhesive layer (5), and the isolation chips (6) are connected through bonding wires (4); each communication channel between the two isolation chips (6) is connected through two bonding wires (4), the two bonding wires (4) of the same communication channel between the two isolation chips (6) are parallel to each other, and the bonding wires (4) of a communication channel are not parallel to the bonding wires (4) on adjacent communication channels.

2. The capacitive digital isolator packaging structure according to claim 1, wherein: The two base islands (1) are symmetrically arranged about a horizontal central axis (12).

3. The capacitive digital isolator packaging structure according to claim 1, wherein: The gap between the two base islands (1) is 0.6-1.5 mm.

4. The capacitive digital isolator packaging structure according to claim 1, wherein: The back side of the base island (1) is provided with a non-through indentation (9).

5. The capacitive digital isolator packaging structure according to claim 1, wherein: The surface of the lead unit is roughened.

6. The capacitive digital isolator packaging structure according to any one of claims 1 to 5, characterized in that: The base island (1) is provided with a pressing rib (10), and the pressing rib (10) is located on the side of the base island (1) and protrudes from the base island (1).

7. The capacitive digital isolator packaging structure according to any one of claims 1 to 5, characterized in that: A false foot (11) is provided on the base island (1), one end of the false foot (11) is connected to the base island (1), and the other end of the false foot (11) can be connected to the lead frame substrate.

8. A method for packaging a capacitive digital isolator, characterized in that: The following steps are involved: S10. Forming a lead frame, wherein the formed lead frame includes a plurality of lead units arranged in a matrix on a frame substrate, wherein the lead units are lead units of the capacitive digital isolator package structure according to any one of claims 1 to 7; S20, mounting an isolation chip (6) on the front surface of the base island (1) of the lead unit and performing a curing process; S30, connecting the two isolation chips (6) using a bonding wire (4); connecting the isolation chip (6) to the pin (2) of the lead unit using a bonding wire (4); S40, placing the lead frame in a plastic packaging mold, and forming a plastic packaging body (7) by injection molding; S50. Use the stamping method to cut the pins, bend the pins and separate the components of the lead frame after plastic packaging.

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