Light source assembly, display panel, light emitting diode and preparation method thereof

Abstract

This application relates to display technology and provides a light source assembly, a display panel, a light-emitting diode, and a method for manufacturing the same. The light-emitting diode comprises: a first electrode pad, a second electrode pad, a substrate layer, an epitaxial layer, a second electrode lead pad, and an electrode lead. The second electrode lead pad is formed on a side of the epitaxial layer away from the substrate layer. The electrode lead comprises a first end and a second end, the first end being connected to the second electrode lead pad, and the second end passing through a lead via in the substrate layer and connected to the second electrode pad. This greatly simplifies the connection and packaging of vertical LED chips, enabling the direct application of vertical LED chips in glass-based display panels without increasing process steps or costs.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a light source assembly, a display panel, a light emitting diode, and a method for manufacturing the same. Background Art

[0002] In vertically structured LED (light-emitting diode) chips, current can flow evenly through the epitaxial layer when flowing between the two electrodes, thus avoiding local current congestion and solving the problem of uneven light emission in the epitaxial layer. Therefore, it has been widely used in actual production.

[0003] In the existing technology, vertical LED chips have electrodes on both sides of the LED chip, and glass-based displays glue the LED structure layer between two layers of glass. The electrodes on one side of the vertical LED need to be connected to the driver substrate through the glass via. Therefore, vertical LEDs are still difficult to apply to glass-based displays. Unlike horizontal LEDs, they cannot be flipped in a structure with both electrodes facing one side of the driver substrate. The vertical LED cannot be directly transferred to the driver substrate, and it is difficult to achieve display by contacting the electrodes on the same side with the driver substrate electrodes. Summary of the Invention

[0004] The present application provides a light source assembly, a display panel, a light emitting diode and a method for manufacturing the same, which are used to solve the technical problem in the prior art that the electrodes of a vertical LED chip are located on both sides of the LED chip, which makes the design and manufacturing inconvenient.

[0005] To solve the above problems, the present application provides a light emitting diode, comprising:

[0006] The first electrode disk and the second electrode disk are two electrode connection ends spaced apart from each other;

[0007] A substrate layer comprising a first side surface and a second side surface, wherein the second side surface has an epitaxial region for forming an epitaxial layer, the first electrode pad and the second electrode pad are arranged outside the first side surface, and the substrate layer is provided with a lead via penetrating the first side surface and the second side surface, wherein the lead via is located outside the epitaxial region;

[0008] a first semiconductor layer, disposed outside the second side surface of the substrate layer, wherein the first semiconductor layer is electrically connected to the first electrode plate;

[0009] a quantum well layer, formed on a side of the first semiconductor layer away from the substrate layer;

[0010] a second semiconductor layer formed on a side of the quantum well layer away from the first semiconductor layer;

[0011] A second electrode lead-out plate is formed on a side of the second semiconductor layer away from the quantum well layer;

[0012] The electrode lead includes a first end and a second end, wherein the first end is connected to the second electrode lead plate, and the second end passes through the lead via hole and is connected to the second electrode plate.

[0013] Compared with the vertical LED chip structure of the prior art, in the embodiment of the present application, the electrode lead is connected to the second electrode plate through the lead via on the substrate layer from the other side, so that the two first electrode plates and the second electrode plates for external electrode connection are located on the same side of the vertical LED chip, so that the vertical LED chip can also be directly transferred to the driving substrate, and then the electrical connection is achieved using rapid welding technology, and then it can be packaged, which greatly simplifies the connection and packaging work of the vertical LED chip, and enables the vertical LED chip to be directly applied to the glass-based display panel without increasing the process and cost.

[0014] According to a specific embodiment of the present application, a conductive reflective layer is further included, which is arranged on the side of the first semiconductor layer facing the substrate layer.

[0015] According to a specific embodiment of the present application, a conductive adhesive layer is further included, formed between the substrate layer and the reflective layer.

[0016] According to a specific embodiment of the present application, an insulating layer is further included, which surrounds the first semiconductor layer, the quantum well layer and the second semiconductor layer, and the electrode lead is located outside the insulating layer.

[0017] According to a specific embodiment of the present application, the outer side surface of the second electrode lead-out plate protrudes from the insulating layer and is exposed to the outside.

[0018] According to a specific embodiment of the present application, the first semiconductor layer is a P-type semiconductor layer, and the second semiconductor layer is an N-type semiconductor layer.

[0019] According to a specific embodiment of the present application, the electrode lead is a copper wire, a nanosilver wire or an aluminum wire.

[0020] According to a specific embodiment of the present application, the substrate layer is a conductive base layer, an insulating isolation layer is provided between the electrode lead and the substrate layer, and an insulating isolation layer is also provided between the second electrode disk and the substrate layer.

[0021] In another aspect of the present application, a light source assembly is provided, comprising a plurality of light emitting diodes as described above.

[0022] On the other hand, the present application provides a display panel, including a driving layer and a plurality of light-emitting diodes as described above, wherein the first electrode disk and the second electrode disk of the light-emitting diodes are both located on the side facing the driving layer, so that the first electrode disk and the second electrode disk are respectively electrically connected to the driving circuit in the driving layer.

[0023] In another aspect of the present application, a method for preparing a light emitting diode is provided, comprising:

[0024] Providing a substrate layer with an epitaxial layer, wherein the epitaxial layer located on a first side of the substrate layer includes a first semiconductor layer, a quantum well layer, and a second semiconductor layer;

[0025] forming a first electrode pad and a second electrode pad on the second side of the substrate layer;

[0026] forming a lead via hole on the substrate layer, wherein the lead via hole is located outside the epitaxial layer setting area on the substrate;

[0027] forming a second electrode lead pad on the second semiconductor layer in the epitaxial layer away from the substrate layer;

[0028] providing a lower insulating layer covering the epitaxial layer;

[0029] An electrode lead is electrically connected between the second electrode lead pad and the second electrode pad, and the electrode lead passes through the substrate layer.

[0030] According to a specific embodiment of the present application, the present invention further includes:

[0031] The substrate layer is thinned at the second side surface of the substrate layer by an etching process. This step is performed before forming the first electrode disk and the second electrode disk.

[0032] According to a specific embodiment of the present application, there is also a substrate separation step, which includes:

[0033] forming the epitaxial layer on a substrate;

[0034] Laminating the substrate layer to the side of the epitaxial layer facing away from the substrate;

[0035] The substrate is peeled off.

[0036] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art:

[0037] The technical solution of the present application, in which the electrode lead is connected to the second electrode plate through the lead via on the substrate layer from the other side in the embodiment of the present application, so that the two first electrode plates and the second electrode plate for external connection of the electrode are both located on the same side of the vertical LED chip, so that the vertical LED chip can also be directly transferred to the driving substrate, and then the electrical connection is achieved by using rapid welding technology, and then it can be packaged, which greatly simplifies the connection and packaging of the vertical LED chip, and realizes that the vertical LED chip can be directly applied to the glass-based display panel without increasing the process and cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0040] Figure 1 A schematic diagram of the cross-sectional structure of a light-emitting diode in an embodiment of the present application is shown;

[0041] Figure 2 It shows a schematic structural diagram of a light-emitting diode in a first process state according to an embodiment of the present application;

[0042] Figure 3 A schematic structural diagram of a light-emitting diode in a second process state according to an embodiment of the present application is shown;

[0043] Figure 4 A schematic structural diagram of a light-emitting diode in a third process state according to an embodiment of the present application is shown;

[0044] Figure 5 A schematic structural diagram of a light-emitting diode in a fourth process state according to an embodiment of the present application is shown;

[0045] Figure 6 A schematic structural diagram of a light-emitting diode in a fifth process state according to an embodiment of the present application is shown;

[0046] Figure 7 A schematic structural diagram of a light-emitting diode in a sixth process state according to an embodiment of the present application is shown;

[0047] Figure 8 A schematic structural diagram of a light-emitting diode in a seventh process state according to an embodiment of the present application is shown;

[0048] Figure 9 A schematic diagram of a top view of a light emitting diode in an embodiment of the present application is shown;

[0049] Figure 10 It shows a schematic diagram of the structure of multiple light-emitting diodes assembled and driven by a substrate in an embodiment of the present application;

[0050] Figure 11 shows a schematic cross-sectional structure diagram of a light emitting diode in another embodiment of the present application;

[0051] Figure 12 A schematic structural diagram of a light emitting diode in an intermediate process state in another embodiment of the present application is shown;

[0052] Figure 13 A schematic structural diagram of a light emitting diode in an intermediate process state in another embodiment of the present application is shown.

[0053] Description of reference numerals:

[0054] 100, vertical LED chip;

[0055] 1. First electrode disk;

[0056] 2. Second electrode disk;

[0057] 3. Substrate layer; 31. Lead via; 32. Insulation isolation layer; 33. Dielectric layer;

[0058] 4. Conductive adhesive layer;

[0059] 5. Conductive reflective layer; 58. Epitaxial layer;

[0060] 6. a first semiconductor layer;

[0061] 7. Quantum well layer;

[0062] 8. a second semiconductor layer;

[0063] 9. Second electrode lead plate;

[0064] 10. Insulation layer;

[0065] 11. Electrode lead.

[0066] 21. Substrate;

[0067] 22. Buffer layer;

[0068] 200, driving substrate;

[0069] 34. Glass substrate;

[0070] 35. ITO transparent electrode layer. DETAILED DESCRIPTION

[0071] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0072] In order to solve the technical problem of the electrodes of the vertical LED chip on both sides of the LED chip in the prior art, which makes it inconvenient to design and manufacture, the present application provides a light-emitting diode, in which the electrode lead passes through the lead via on the substrate layer from the other side and is connected to the second electrode plate, so that the two first electrode plates and the second electrode plate for external connection of the electrodes are both located on the same side of the vertical LED chip, so that the vertical LED chip can also be directly transferred to the driving substrate, and then the electrical connection is achieved using rapid welding technology, and then it can be packaged, which greatly simplifies the connection and packaging work of the vertical LED chip, and enables the vertical LED chip to be directly applied to the glass-based display panel without increasing the process and cost.

[0073] Figure 1 A schematic diagram of the cross-sectional structure of the light-emitting diode in an embodiment of the present application is shown. The embodiment of the present application mainly provides a light-emitting diode structure, which mainly includes, from the electrode lead-out side to the other side: a first electrode disk 1 and a second electrode disk 2, a substrate layer 3, a conductive adhesive layer 4, a conductive reflective layer 5, a first semiconductor layer 6, a quantum well layer 7, a second semiconductor layer 8, a second electrode lead-out disk 9, an insulating layer 10 and an electrode lead 11.

[0074] The first electrode disk 1 and the second electrode disk 2 are two electrode connection terminals spaced apart from each other; the first electrode disk 1 and the second electrode disk 2 include, but are not limited to, at least one of molybdenum (Mo), aluminum (Al), nickel (Ni), copper (Cu), tungsten (W), gold (Au), silver (Ag), platinum (Pt), and chromium (Cr). In some examples of this embodiment, the first electrode disk 1 and the second electrode disk 2 may be composed of a single metal, while in other examples, the first electrode disk 1 and the second electrode disk 2 include two or more metals. It is understood that in other examples, the first electrode disk 1 and the second electrode disk 2 may also be made of a non-metallic material with conductive properties, such as silicon or CNT (carbon nanotube) material.

[0075] The substrate layer 3 includes a first side surface and a second side surface facing away from each other. The second side surface of the substrate layer 3 has an epitaxial region for forming the epitaxial layer 58. The first electrode disk 1 and the second electrode disk 2 are arranged outside the first side surface. An insulating isolation layer 32 can be provided between the second electrode disk 2 and the second electrode disk 2. The substrate layer 3 is provided with a lead via 31 passing through the first side surface and the second side surface. The lead via 31 is located outside the epitaxial region, and a dielectric layer 33 can be provided on the inner side wall of the lead via 31. The lead via 31 can be located on the left side as shown in the figure, and it is understandable that it can also be located on the right side. It is understandable that the substrate layer 3 includes but is not limited to any one of a conductive silicon (Si) substrate, a silicon oxide (Al2O3) substrate (i.e., a sapphire substrate), a silicon carbide (SiC) substrate, and a gallium nitride (GaN) substrate. In this embodiment, the substrate layer 3 may not be the growth substrate of the epitaxial layer 58. The epitaxial layer 58 can be transferred to the substrate layer 3 after the growth is completed. In order to facilitate the configuration of the second electrode disk 2, the substrate layer 3 in this embodiment has an epitaxial region that is usually used to form the epitaxial layer 58, and also extends a certain distance to one side from the epitaxial region. The extension distance is substantially equivalent to the extension width of the second electrode disk 2. In this embodiment, the insulating isolation layer 32, the dielectric layer and the insulating layer can be made of, for example, silicon nitride (SiN X ), silicon oxide (SiO X ) etc., and of course it can also be made of resin insulating layer materials such as polyimide.

[0076] The conductive adhesive layer 4 is formed between the substrate layer 3 and the conductive reflective layer 5. In this embodiment, the first semiconductor layer 6 is selected to be a P-type semiconductor layer, and the second semiconductor layer 8 is an N-type semiconductor layer. According to the description of the subsequent embodiments of this application, the first semiconductor layer 6 can also be selected to be an N-type semiconductor layer, and the second semiconductor layer 8 can be a P-type semiconductor layer. The conductive adhesive layer 4 can specifically be a conductive adhesive material. It can be understood that conductive adhesive is an adhesive that has certain conductive properties after curing or drying. It usually has a base resin and a conductive filler, i.e., conductive particles, as its main components. The conductive particles are combined together through the bonding effect of the base resin to form a conductive path, thereby achieving a conductive connection between the bonded materials.

[0077] The conductive reflective layer 5 can be made of a conductive reflective material such as silver or nickel and is disposed on the side of the first semiconductor layer 6 facing the substrate layer 3. The conductive reflective layer 5 is used to reflect light emitted from the epitaxial layer 58 toward the substrate layer 3 back to the light emitting surface of the vertical LED chip 100.

[0078] The first semiconductor layer 6 is arranged outside the second side of the substrate layer 3, and the first semiconductor layer 6 is electrically connected to the first electrode disk 1; the quantum well layer 7 is formed on the side of the first semiconductor layer 6 away from the substrate layer 3; the second semiconductor layer 8 is formed on the side of the quantum well layer 7 away from the first semiconductor layer 6.

[0079] A second electrode lead pad 9 is formed on the side of the second semiconductor layer 8 away from the quantum well layer 7. According to a specific embodiment of the present application, an insulating layer 10 surrounds the first semiconductor layer 6, the quantum well layer 7, and the second semiconductor layer 8, and the electrode lead 11 is located outside the insulating layer 10. The insulating layer 10 may include, but is not limited to, at least one of SiO2 (silicon oxide), Al2O3 (aluminum oxide), AlN (aluminum nitride), AlON (aluminum oxynitride), and AlF3 (aluminum trifluoride).

[0080] According to a specific embodiment of the present application, the outer side surface of the second electrode lead-out pad 9 is protruded and exposed to the outside by the insulating layer 10. The second electrode lead-out pad 9 is located on the side of the epitaxial layer 58 away from the substrate layer 3, and is electrically connected to the second semiconductor layer 8 in the epitaxial layer 58 through the insulating layer 10. It can be understood that the second electrode lead-out pad 9 can be directly connected to the second semiconductor layer 8. In some examples, other layer structures can be provided between the second semiconductor layer 8 and the second electrode lead-out pad 9. In some other examples of this embodiment, other layer structures can also be provided between the second electrode lead-out pad 9 and the second semiconductor layer 8, such as an ohmic contact layer. Generally, the second electrode lead-out pad 9 can be a metal electrode, but this embodiment does not exclude the case where the second electrode lead-out pad 9 is a non-metallic electrode. For example, the second electrode lead-out pad 9 can be a transparent ITO electrode.

[0081] The electrode lead 11 includes a first end and a second end, wherein the first end is connected to the second electrode lead plate 9, and the second end is connected to the second electrode plate 2 through the lead via 31. The electrode lead 11 can be made of a metal material with good electrical conductivity, for example, at least one of gold, silver, copper, platinum and other metals, or a non-metallic material, such as graphene, carbon nanotube materials, etc. The first electrode plate 1 is connected to the conductive reflective layer 5 serving as the positive electrode through the substrate layer 3 and the conductive adhesive layer 4, and is connected to the light-emitting layer through the positive electrode; the first electrode plate 1 is made directly on the substrate layer 3, and can be formed by a metal sputtering process, and then patterned by an etching process; there must be an insulating layer between the second electrode plate 2 and the substrate layer 3, that is, Sin must be deposited first in the area where the substrate layer 3 is deposited. x or SIO x, and then make a metal second electrode disk 2; the second electrode disk 2 can be made of a conductive metal, copper (Cu), aluminum (Al) or a conductive alloy material.

[0082] Compared with the vertical LED chip structure of the prior art, in the embodiment of the present application, the electrode lead 11 is connected to the second electrode disk 2 through the lead via 31 on the substrate layer 3 from the other side, so that the two first electrode disks 1 and the second electrode disk 2 for external electrode connection are both located on the same side of the vertical LED chip, so that the vertical LED chip can also be directly transferred to the driving substrate, and then the electrical connection is achieved using rapid welding technology, and then it can be packaged, which greatly simplifies the connection and packaging work of the vertical LED chip, and enables the vertical LED chip to be directly applied to the glass-based display panel without increasing the process and cost.

[0083] In another aspect, the present application provides a light source assembly comprising a plurality of light-emitting diodes as described above. Since each light-emitting device in the light source assembly utilizes the aforementioned light-emitting diodes, the two first electrode disks 1 and second electrode disks 2 for external electrode connection of the light-emitting diodes are located on the same side of the light-emitting diodes, thereby locating all electrode output terminals of the light source assembly on the same side. This allows for direct transfer to a driver substrate, followed by electrical connection using rapid soldering technology, and subsequent packaging. This greatly simplifies the connection and packaging of the light source assembly, enabling the light source assembly to be directly applied to a glass-based display panel without increasing the process and cost.

[0084] On the other hand, the present application provides a display panel, including a driving layer and a plurality of light-emitting diodes as described above, wherein the first electrode disk 1 and the second electrode disk 2 of the light-emitting diodes are both located on the side facing the driving layer, so that the first electrode disk 1 and the second electrode disk 2 are respectively electrically connected to the driving circuit in the driving layer.

[0085] In another aspect, the present application provides an embodiment of a method for manufacturing a light emitting diode, comprising the following steps:

[0086] Figure 2 The schematic diagram of the structure of the light emitting diode in the first process state in the embodiment of the present application is shown. As shown in the figure, a buffer layer 22 is first formed on the substrate 21, and then an epitaxial layer 58 is grown on the buffer layer 22. Figure 2 As shown in FIG, in this embodiment, the epitaxial layer 58 includes, from bottom to top, a second semiconductor layer 8 (an N-type GaN layer in this example), a quantum well layer 7, and a first semiconductor layer 6 (a P-type GaN layer in this example). It can be understood that although Figure 2 Although not shown, the epitaxial layer 58 may also include an undoped GaN layer and an electron blocking layer.

[0087] Figure 3 The schematic diagram of the structure of the light-emitting diode in the second process state in the embodiment of the present application is shown, in which the substrate layer 3 is bonded to the side of the epitaxial layer 58 facing away from the substrate 21, and then the substrate 21 and the buffer layer 22 are peeled off. The process of peeling off the substrate 21 can be a laser lift-off technology. Before bonding the substrate layer 3, a conductive adhesive layer 4 is first applied to the surface of the substrate layer 3 to be bonded and the outermost surface of the epitaxial layer 58, so as to establish a conductive connection between the conductive substrate layer 3 and the epitaxial layer 58. The material of the substrate 21 can be a sapphire substrate. The substrate layer 3 includes but is not limited to any one of a silicon (Si) substrate, a silicon oxide (Al2O3) substrate (i.e., a sapphire substrate), a silicon carbide (SiC) substrate, and a gallium nitride (GaN) substrate.

[0088] Figure 4 The schematic diagram of the structure of the light emitting diode in the third process state of the embodiment of the present application is shown. After the above steps, a substrate layer 3 with an epitaxial layer 58 is formed. The epitaxial layer 58 located on the first side of the substrate layer 3 includes a first semiconductor layer 6, a quantum well layer 7 and a second semiconductor layer 8 in sequence. An insulating isolation layer 32 is formed on the second side of the substrate layer 3. The insulating isolation layer 32 can be made of silicon nitride (SiN X ), silicon oxide (SiO X ) etc., and can of course also be made of resin insulating layer materials such as polyimide. The insulating isolation layer 32 is formed in the area outside the epitaxial region of the substrate layer 3.

[0089] Figure 5 The structure of the light-emitting diode in the fourth process state in the embodiment of the present application is shown; on the second side of the substrate layer 3, a metal sputtering process is used to form the first electrode disk 1 and the second electrode disk 2, and then the metal sputtering process is used to form the first electrode disk 1 and the second electrode disk 2. The first electrode disk 1 and the second electrode disk 2 include but are not limited to at least one of molybdenum (Mo), aluminum (Al), nickel (Ni), copper (Cu), tungsten (W), gold (Au), silver (Ag), platinum (Pt), and chromium (Cr). In some examples of the present embodiment, the first electrode disk 1 and the second electrode disk 2 can be composed of a single metal. In other examples, the first electrode disk 1 and the second electrode disk 2 include two or more metals. It is understandable that in other examples, the first electrode disk 1 and the second electrode disk 2 can also be non-metallic materials with conductive properties, such as silicon, CNT (carbon nanotube) materials, etc.

[0090] Lead vias 31 are formed on the substrate layer 3 by etching or laser processing. To achieve the holes, the thickness of the substrate layer 3 needs to be thinned to about 10 microns to meet the drilling process requirements. The lead vias 31 are located outside the area where the epitaxial layer 58 is provided on the substrate. It is understood that the substrate layer 3 can be thinned by etching or grinding.

[0091] Figure 6 FIG2 shows a schematic structural diagram of a light-emitting diode in a fifth process state according to an embodiment of the present application. A second electrode lead pad 9 is formed on the second semiconductor layer 8 in the epitaxial layer 58, which is away from the substrate layer 3. The second electrode lead pad 9 can be formed by a metal sputtering process and then patterned by an etching process.

[0092] Figure 7 FIG. 1 shows a schematic structural diagram of a light emitting diode in a sixth process state according to an embodiment of the present invention, wherein an insulating layer 10 covering the epitaxial layer 58 is provided. The insulating layer 10 may be made of, for example, silicon nitride (SiN X ), silicon oxide (SiO X ) etc., and can also be made of resin insulating layer materials such as polyimide. In this step, there is a lead via 31 above the second electrode disk 2. The lead via 31 is realized on the substrate layer 3 by etching or laser processing. In order to realize the drilling, the thickness of the substrate layer 3 needs to be thinned to about 10 microns to meet the drilling process requirements. After the lead via 31 is punched, a dielectric layer 33 is formed on the inner side wall of the lead via 31. The dielectric layer 33 can be made of silicon nitride (SiN X ), silicon oxide (SiO X ), etc., and can also be made of a resin insulating layer material such as polyimide. The dielectric layer 33 is connected to the insulating layer 10, thereby facilitating insulation between the electrode lead 11 and the epitaxial layer and the substrate layer 3. During the process of drilling the substrate layer 3, the insulating isolation layer 32 is also penetrated, so that the electrode lead 11 can be directly electrically connected to the second electrode disk 2 after it is subsequently formed.

[0093] Figure 8 A schematic structural diagram of a light-emitting diode in a seventh process state according to an embodiment of the present application is shown; Figure 9The top view of the light-emitting diode in the embodiment of the present application is shown; the electrode lead 11 is electrically connected between the second electrode lead pad 9 and the second electrode pad 2, and the electrode lead 11 passes through the substrate layer 3. It is understood that the electrode lead 11 can be connected by welding using a process similar to the common chip bonding wire in the industry, and of course, it can also be formed by applying a curable conductive paste and then curing it. The electrode lead 11 can be made of a metal material with good electrical conductivity, such as at least one of gold, silver, copper, platinum, etc., or it can be a non-metallic material, such as graphene, carbon nanotube material, etc.

[0094] Figure 10 The schematic diagram of the structure of the multiple light-emitting diode assembly and drive substrate in the embodiment of the present application is shown, wherein a second electrode disk 2 and a first electrode disk 1 are fabricated below the substrate layer 3. Directly above the first electrode disk 1, there is a conductive reflective layer 5 (Ag), a first semiconductor layer 6, a quantum well layer 7, a second semiconductor layer 8, a second electrode disk 2, and an insulating layer 10 on the substrate layer 3. The second electrode disk 2 is located on the left or right side of the first electrode disk 1. Above the second electrode disk 2, there is a lead via 31. The lead via 31 is implemented on the substrate layer 3 through an etching process or a laser process. In order to achieve drilling, the thickness of the substrate layer 3 needs to be thinned to about 10 microns to meet the drilling process requirements. The second electrode disk 2 above the LED chip is connected to the second electrode disk 2 below the substrate layer 3 through a metal lead, so that the LED can be lit as long as the second electrode disk 2 and the first electrode disk 1 below the substrate layer 3 are powered. In this embodiment, multiple vertical LED chips 100 are connected to the second electrode plate by electrode leads passing through the lead vias on the substrate layer from the other side, so that the two first electrode plates and the second electrode plate for external electrode connection are located on the same side of the vertical LED chip 100, so that the vertical LED chip 100 can be directly transferred to the driving substrate 200, and then the electrical connection is achieved using rapid welding technology, and then it can be packaged, which greatly simplifies the connection and packaging of the vertical LED chip and enables the vertical LED chip to be directly applied to the glass-based display panel without increasing the process and cost.

[0095] Figure 11 A schematic cross-sectional view of a light-emitting diode in another embodiment of the present application is shown. As shown in the figure, the main structural difference between the light-emitting diode and the previous embodiment is that the order of the film layers in the epitaxial layer 58 is reversed, and the second semiconductor layer 8 (in this case, an N-type GaN layer), the quantum well layer 7, and the first semiconductor layer 6 (in this case, a P-type GaN layer) are arranged in the opposite order to the previous embodiment. In other words, the two electrodes of the LED are installed upside down. In this way, the positive electrode can be placed on the light-emitting side, making it easier for the backlight module to rationally configure the various electrode lead layers according to the electrical parameter requirements.

[0096] Figure 12 FIG. 1 shows a schematic structural diagram of a light emitting diode in an intermediate process state in another embodiment of the present application; FIG. Figure 11 In the preparation embodiment of the flip-chip LED, it is prepared in reverse in the epitaxial layer 58, that is, the second semiconductor layer 8 is formed first instead of the first semiconductor layer 6 being formed first, so that a vertical LED chip with opposite electrodes can be prepared using the same subsequent process.

[0097] Figure 13 FIG. 1 shows a schematic diagram of the structure of a light emitting diode in an intermediate process state in another embodiment of the present application. In other words, Figure 11 In the embodiment of the preparation of the flip-chip LED, the conventional epitaxial layer 58 preparation process can also be used. Instead, an ITO transparent electrode layer 35 and a glass substrate 34 are formed on the side away from the substrate 21 to replace the second electrode lead pad 9 and the insulating layer 10. The backing layer 3 is attached to the side after the substrate 21 is peeled off. In this way, a structural solution with higher transparency on the light-emitting side can be formed, and a glass-based package can also be directly formed. The electrode lead 11 can be connected to the side of the ITO transparent electrode layer 35. On the one hand, the ITO transparent electrode layer 35 replaces the electrode function of the second electrode lead pad 9. On the other hand, it also serves as an electrode diffusion layer to disperse the current signal to the semiconductor layer connected to it, thereby facilitating the increase of the current density of this semiconductor layer.

[0098] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0099] The foregoing description is intended only to provide specific embodiments of the present invention, which will enable those skilled in the art to understand and implement the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but is intended to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A light emitting diode, characterized in that: include: The first electrode disk and the second electrode disk are two electrode connection ends spaced apart from each other; A substrate layer comprising a first side surface and a second side surface, wherein the second side surface has an epitaxial region for forming an epitaxial layer, the first electrode pad and the second electrode pad are arranged outside the first side surface, and the substrate layer is provided with a lead via penetrating the first side surface and the second side surface, wherein the lead via is located outside the epitaxial region; a first semiconductor layer, disposed outside the second side surface of the substrate layer, wherein the first semiconductor layer is electrically connected to the first electrode plate; a quantum well layer, formed on a side of the first semiconductor layer away from the substrate layer; a second semiconductor layer formed on a side of the quantum well layer away from the first semiconductor layer; A second electrode lead-out plate is formed on a side of the second semiconductor layer away from the quantum well layer; an electrode lead, comprising a first end and a second end, wherein the first end is connected to the second electrode lead plate, and the second end passes through the lead via hole and is connected to the second electrode plate; The first electrode disk, the second electrode disk, the first semiconductor layer, the quantum well layer, and the second semiconductor layer are located on different sides of the substrate layer.

2. The light emitting diode according to claim 1, wherein It also includes a conductive reflective layer, which is arranged on the side of the first semiconductor layer facing the substrate layer.

3. The light emitting diode according to claim 2, wherein It also includes a conductive adhesive layer formed between the substrate layer and the reflective layer.

4. The light emitting diode according to claim 1, wherein It also includes an insulating layer, which surrounds the first semiconductor layer, the quantum well layer and the second semiconductor layer, and the electrode lead is located outside the insulating layer.

5. The light emitting diode according to claim 4, wherein The outer side surface of the second electrode lead-out plate protrudes from the insulating layer and is exposed to the outside.

6. The light emitting diode according to claim 1, wherein The first semiconductor layer is a P-type semiconductor layer, and the second semiconductor layer is an N-type semiconductor layer.

7. The light emitting diode according to claim 1, wherein The electrode leads are copper wires, nano silver wires or aluminum wires.

8. The light emitting diode according to any one of claims 1 to 7, characterized in that The substrate layer is a conductive base layer, an insulating isolation layer is provided between the electrode lead and the substrate layer, and an insulating isolation layer is also provided between the second electrode disk and the substrate layer.

9. A light source assembly, characterized in that: The light emitting diode comprises a plurality of light emitting diodes according to any one of claims 1 to 8.

10. A display panel, characterized in that: It includes a driving layer and a plurality of light-emitting diodes as described in any one of claims 1 to 8, wherein the first electrode disk and the second electrode disk of the light-emitting diode are both located on the side facing the driving layer, so that the first electrode disk and the second electrode disk are respectively electrically connected to the driving circuit in the driving layer.

11. A method for preparing a light emitting diode, characterized in that: include: Providing a substrate layer with an epitaxial layer, wherein the epitaxial layer located on a first side of the substrate layer includes a first semiconductor layer, a quantum well layer, and a second semiconductor layer; forming a first electrode pad and a second electrode pad on the second side of the substrate layer; forming a lead via hole on the substrate layer, wherein the lead via hole is located outside the epitaxial layer setting area on the substrate; forming a second electrode lead pad on the second semiconductor layer in the epitaxial layer away from the substrate layer; providing a lower insulating layer covering the epitaxial layer; An electrode lead is electrically connected between the second electrode lead pad and the second electrode pad, and the electrode lead passes through the substrate layer; The first electrode disk, the second electrode disk, the first semiconductor layer, the quantum well layer, and the second semiconductor layer are located on different sides of the substrate layer.

12. The method for preparing a light emitting diode according to claim 11, wherein: Also includes: The substrate layer is thinned at the second side surface of the substrate layer by an etching process. This step is performed before forming the first electrode disk and the second electrode disk.

13. The method for preparing a light emitting diode according to claim 11, wherein: The method further comprises a substrate separation step, which comprises: forming the epitaxial layer on a substrate; Laminating the substrate layer to the side of the epitaxial layer facing away from the substrate; The substrate is peeled off.

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